Micro-flow sensor of integrated interface circuit and photoetching-free manufacturing method of micro-flow sensor

Abstract

The invention discloses a micro-flow sensor of an integrated interface circuit and a photoetching-free manufacturing method of the micro-flow sensor, and the manufacturing method comprises the steps: determining a metal layer structure where a microstrip line assembly of the micro-flow sensor is located according to a layered structure arranged in an initial sensor chip containing the interface circuit; the metal sacrificial layer on the periphery of the metal layer where the microstrip line assembly is located is completely etched clean through wet etching; reactive ion etching is adopted to expose a top-layer plate electrode located on one side of the microstrip line assembly in the initial sensor chip; and electrically connecting the top-layer plate electrode of the microstrip line assembly with the top-layer plate electrode of the interface circuit, and packaging the initial sensor chip to obtain the corresponding integrated micro-flow sensor. According to the manufacturing method, on the basis of a photoetching-free post-CMOS processing technology, thinning release of an MEMS structure can be efficiently achieved, integrated arrangement of the MEMS micro-suspension bridge and the CMOS interface circuit of the micro-flow sensor is achieved, and the application effects of high sensitivity and low cost are achieved.

Description

Technical Field

[0001] The invention relates to the technical field of integrated circuits, and in particular to a micro flow sensor with an integrated interface circuit and a non-photolithography manufacturing method thereof. Background Art

[0002] Flow sensors are widely used in important fields related to national economy and people's livelihood, such as environmental monitoring, medical diagnosis, industrial control, and aerospace exploration. With the rapid development of emerging fields such as smart buildings, smart cities, and precision medicine, the performance requirements of sensors used for flow monitoring are increasing. For example, in smart buildings, in order to achieve energy-saving personalized ventilation and thermal comfort control, flow sensors need to accurately detect indoor low-speed flows of -2m / s to 2m / s, and achieve extremely low flow rate measurements below 0.05m / s. In smart cities, millions of flow sensors are required in the collection, transportation, and distribution of gas and heating systems, which requires sensors to have not only high precision but also low cost to meet the needs of large-scale node deployment. In the field of precision medicine, ventilators, as key equipment, need to be equipped with high-performance core flow sensor components to assist clinical diagnosis and treatment decisions, such as low-flow oxygen inhalation and micro-flow anesthesia. In addition, the maximum airflow velocity under the nose of a normal human body is about 4m / s, and the sensor in the connected respiratory duct needs to detect extremely low gas flow velocities of 4m / s or even below 0.1m / s to identify high-risk situations such as hypopnea or apnea. In view of this, the development of low-cost, high-sensitivity sensors that can measure extremely low gas flow rates has become an urgent need for the development of IoT-related technology fields such as smart buildings, smart cities, and precision medicine.

[0003] Traditional differential pressure, turbine, and Karman vortex flow sensors cannot meet the application requirements of low power consumption, extremely low flow velocity measurement, and large-scale sensor node deployment due to their large size, high cost, high power consumption, and strong flow field interference. In recent years, with the rapid development of CMOS and MEMS technology, CMOS-MEMS flow sensors have gradually attracted people's attention as a new type of sensor with high performance, low power consumption and high integration. Among them, calorimetric (thermal temperature difference) flow sensors measure flow velocity by detecting the temperature difference on both sides of the microheater. Thanks to the symmetrical structural design, the temperature difference output of the sensor is only related to the convective heat transfer on the chip surface, which can offset the influence of other heat transfer factors and significantly improve the sensitivity. In addition, the sensor based on the calorimetric principle does not require movable micromechanical components, has a simple structure, and is easy to realize integrated manufacturing in the CMOS process, which provides a new direction for the development of integrated sensors that can detect low-speed or even ultra-low-speed bidirectional airflows at the millimeter per second level.

[0004] In recent years, research on micro flow sensors based on CMOS-MEMS integration has made great progress. Researchers at the Delft University of Technology in the Netherlands proposed a monolithic integrated CMOS flow sensor. However, the micro heater and thermistor of the sensor are directly made on the silicon substrate, and the device sensitivity is low and the power consumption is high. The research team of Southeast University has realized a wind speed sensor with a deep groove thermal insulation structure through standard CMOS process and MEMS silicon etching, which reduces the lateral heat transfer of the silicon substrate, improves the sensitivity and can accurately measure wind speeds as low as 0.5m / s. In order to improve the low flow rate measurement capability, Xu et al. proposed a suspended microstructure, interface circuit, and microchannel wafer-level three-dimensional integrated flow sensor based on the InvenSense CMOS-MEMS process. By strengthening the convective heat transfer of the fluid on both sides of the suspended structure in the microchannel, the sensor sensitivity is improved, and the gas flow rate measurement as low as 0.4m / s (0.75sccm) is achieved. Recently, Luca et al. from the University of Cambridge in the UK developed a monolithic integrated flow rate sensor with a suspended disk insulation structure through the silicon-on-insulator CMOS-MEMS process. However, due to the thick insulation structure (about 5μm), its power consumption is high (about 13mW), and the improvement in sensor sensitivity is relatively limited.

[0005] The above studies show that the use of thermal insulation design is an important way to improve the sensitivity of sensors and improve the ability to measure extremely low flow rates. However, the total thickness of the thin layer on the silicon substrate of the mainstream deep submicron CMOS process used for integrated sensor manufacturing is greater than 8μm. Even if the thermal insulation treatment of the sensing structure is achieved by silicon etching, the thicker microstructure still limits the improvement of sensor sensitivity. At the same time, the Post-CMOS process scheme that realizes the thinning and release of the microstructure through photolithography and multi-step etching on the CMOS chip has a high processing complexity. Therefore, in order to simplify the monolithic integrated manufacturing of microflow sensors, it is necessary to study a post-CMOS processing method without photolithography to achieve one-step etching molding and thinning and release of the microstructure. On the other hand, high-performance MEMS microflow sensors need to work in conjunction with drive and detection circuits in practical applications to achieve functions such as heating temperature control, weak signal amplification and analog-to-digital conversion. Obviously, the sensitive measurement process of this integrated sensor involves the conversion and coupling of multiple energy domains such as fluid mechanics, thermodynamics and electricity, and the optimization of its overall performance depends on the precise design of the MEMS sensing structure and AS IC interface circuit parameters. Therefore, it is necessary to design a dedicated high-precision CMOS interface circuit for MEMS sensors to provide support for the development of integrated flow sensors with low noise, high sensitivity and ultra-low detection limit. Summary of the invention

[0006] The embodiment of the present invention provides a micro flow sensor with an integrated interface circuit and a non-photolithography manufacturing method thereof, aiming to solve the problems of high manufacturing complexity and poor sensitivity of CMOS-MEMS integrated micro flow sensors in the prior art methods.

[0007] In a first aspect, an embodiment of the present application provides a non-photolithography manufacturing method, wherein the manufacturing method is used to manufacture a micro flow sensor with an integrated interface circuit, and the manufacturing method comprises:

[0008] Determining the metal layer where the microstrip line component of the micro flow sensor is located according to the layered structure set in the initial sensor chip including the interface circuit;

[0009] The metal sacrificial layer around the metal layer where the microstrip line component is located is completely etched away by wet etching to form a suspended MEMS structure and expose the silicon base at the bottom of the cavity; the metal sacrificial layer structure around the microstrip line is selected to adjust the thickness of the MEMS structure and control the sensor performance;

[0010] Reactive ion etching is used to expose the top plate electrode located on one side of the microstrip line component in the initial sensor chip;

[0011] The top-layer plate electrode of the microstrip line component is electrically connected to the top-layer plate electrode of the interface circuit, and the initial sensor chip is packaged to obtain the corresponding monolithic integrated micro flow sensor.

[0012] In a second aspect, an embodiment of the present application further provides a micro flow sensor with an integrated interface circuit, wherein the micro flow sensor is manufactured using the non-photolithography manufacturing method as described in the first aspect; the flow sensor includes a microstrip line component and an interface circuit arranged on a substrate, and the interface circuit includes a control circuit, a clock pulse circuit and a reading circuit;

[0013] The microstrip line assembly is composed of a microheater and two pairs of thermistors, one pair of thermistors is arranged upstream of the microheater, and the other pair of thermistors is arranged downstream of the microheater; the two pairs of thermistors are spaced equidistant from the microheater; the microheater and the two pairs of thermistors are parallelly mounted on the bottom cavity of the substrate in the form of micro-suspension bridges;

[0014] The control circuit comprises a primary operational amplifier circuit and a secondary operational amplifier circuit, wherein the secondary operational amplifier circuit comprises a pulse generator, a compensation circuit and a Wheatstone bridge; a first fixed value resistor, a second fixed value resistor and the micro heater are respectively arranged in series on the first bridge arm, the second bridge arm and the fourth bridge arm of the Wheatstone bridge; a temperature sensitive resistor and an adjustable resistor are connected in series and then arranged in series on the third bridge arm of the Wheatstone bridge;

[0015] The connection point between the first bridge arm and the second bridge arm is connected to the second end of the compensation circuit and the drain of the first MOS tube, the gate of the first MOS tube is connected to the first end of the compensation circuit and the connection point is connected to the compensation connection end of the first-stage operational amplifier circuit, the source of the first MOS tube is connected to the drain of the second MOS tube, the gate of the second MOS tube is connected to the output end of the pulse generator, and the source of the second MOS tube is connected to the voltage-stabilizing power supply; the connection point between the second bridge arm and the third bridge arm is connected to the first connection end of the first-stage operational amplifier circuit, the connection point between the second bridge arm and the fourth bridge arm is connected to the second connection end of the first-stage operational amplifier circuit, and the connection point between the third bridge arm and the fourth bridge arm is grounded;

[0016] The clock signal output terminal of the clock pulse circuit is connected to the gate of the second MOS tube;

[0017] The read circuit includes an input chopper, a first capacitor, a second capacitor, a first transconductor, an output chopper and a second transconductor;

[0018] The connection point between the first thermistor and the third thermistor in the microstrip line component is connected to the sensor bridge power supply, and the connection point between the second thermistor and the fourth thermistor in the microstrip line component is grounded; the connection point between the first thermistor and the fourth thermistor and the connection point between the second thermistor and the third thermistor are respectively connected to the two input ends of the input chopper, the two output ends of the input chopper are respectively connected to one end of the first capacitor and one end of the second capacitor, the other end of the first capacitor and the other end of the second capacitor are respectively connected to the two input ends of the first transconductor, the two output ends of the first transconductor are respectively connected to the two input ends of the output chopper, the two output ends of the output chopper are respectively connected to the two input ends of the second transconductor, and the two output ends of the second transconductor are respectively used as the positive output end and the negative output end to output voltage signals.

[0019] The embodiment of the present invention provides a micro-flow sensor with a monolithic integrated interface circuit and a non-photolithography manufacturing method thereof, the manufacturing method comprising: determining the metal layer where the microstrip line component of the micro-flow sensor is located according to the layered structure set in the initial sensor chip containing the interface circuit; using wet etching to completely etch the metal sacrificial layer around the metal layer where the microstrip line component is located; using reactive ion etching to expose the top-layer plate electrode located on one side of the microstrip line component in the initial sensor chip; electrically connecting the top-layer plate electrode of the microstrip line component with the top-layer plate electrode of the interface circuit, and packaging the initial sensor chip to obtain the corresponding integrated micro-flow sensor. The above-mentioned manufacturing method of the micro-flow sensor, based on the non-photolithography post-CMOS processing technology, can efficiently perform the thinning and release of the MEMS structure, realize the integrated setting of the MEMS micro-suspension bridge of the micro-flow sensor and the CMOS interface circuit, and achieve the application effect of high sensitivity and low processing cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying any creative work.

[0021] Figure 1 The overall structure diagram of the micro flow sensor provided by the embodiment of the present invention;

[0022] Figure 2 A top view of the microstrip line assembly provided by an embodiment of the present invention;

[0023] Figure 3 A schematic diagram of a process for manufacturing a micro flow sensor provided by an embodiment of the present invention;

[0024] Figure 4 A hierarchical structure diagram of an initial sensor chip provided by an embodiment of the present invention;

[0025] Figure 5 A circuit structure diagram of a control circuit provided by an embodiment of the present invention;

[0026] Figure 6 An application effect diagram of the micro flow sensor provided by an embodiment of the present invention;

[0027] Figure 7 A circuit structure diagram of a clock pulse circuit provided in an embodiment of the present invention;

[0028] Figure 8 A circuit structure diagram of a D flip-flop provided in an embodiment of the present invention;

[0029] Fig. 9Another application effect diagram of the micro flow sensor provided by an embodiment of the present invention;

[0030] Fig.10 A circuit structure diagram of a reading circuit provided by an embodiment of the present invention;

[0031] Fig.11 A circuit structure diagram of a two-stage fully differential operational amplifier transistor-level circuit of a read circuit provided by an embodiment of the present invention;

[0032] Fig.12 A circuit structure diagram of a third transconductor provided by an embodiment of the present invention;

[0033] Fig.13 Another application effect diagram of the micro flow sensor provided by an embodiment of the present invention;

[0034] Fig.14 Another application effect diagram of the micro flow sensor provided by the embodiment of the present invention;

[0035] Fig.15 The following is an effect diagram of the application of the micro flow sensor provided by the embodiment of the present invention;

[0036] Fig.16 Another application effect diagram of the micro flow sensor provided by the embodiment of the present invention;

[0037] Fig.17 Another application effect diagram of the micro flow sensor provided by the embodiment of the present invention;

[0038] Fig.18 A further application effect diagram of the micro flow sensor provided by the embodiment of the present invention;

[0039] Fig.19 This is another subsequent application effect diagram of the micro flow sensor provided by the embodiment of the present invention.

[0040] Figure numerals: Rh, micro heater; Ru1, first thermistor; Ru2, second thermistor; Rd1, third thermistor; Rd2, fourth thermistor; 10, substrate; 11, bottom cavity; 12, interface circuit; 121, pulse control circuit; 123, reading circuit; S1, primary operational amplifier circuit; S2, secondary operational amplifier circuit; P, pulse generator; MC, compensation circuit; WB, Wheatstone bridge; R1, first fixed resistor; R2, second fixed resistor; Rr, temperature sensitive resistor; Rc, adjustable resistor; M1, first MOS tube; M2, second MOS tube; CH in , input chopper; C1, first capacitor; C2, second capacitor; Gm1, first transconductor; CH out, output chopper; Gm2, second transconductor; RRL, ripple suppression loop circuit; CH1, first chopper; C3, third capacitor; C4, fourth capacitor; C5, fifth capacitor; C6, sixth capacitor; C7, seventh capacitor; C8, eighth capacitor; Gm3, third transconductor; Gm4, fourth transconductor; C9, ninth capacitor; C10, tenth capacitor; C11, eleventh capacitor; C12, twelfth capacitor; CH pf , the second chopper; CH fb , feedback chopper; R3, third resistor; C13, thirteenth capacitor; R4, fourth resistor; C14, fourteenth capacitor; R5, fifth resistor; R6, sixth resistor; M3, third MOS tube; M4, fourth MOS tube; M5, fifth MOS tube; C15, fifteenth capacitor; R9, ninth resistor; FB, square wave generating circuit; FP, frequency dividing circuit; M6, sixth MOS tube; M7, seventh MOS tube; M8, eighth MOS tube; M9, ninth MOS tube ; M10, the tenth MOS tube; M11, the eleventh MOS tube; M12, the twelfth MOS tube; M13, the thirteenth MOS tube; M14, the fourteenth MOS tube; M15, the fifteenth MOS tube; M16, the sixteenth MOS tube; R7, the seventh resistor; R8, the eighth resistor; 101, the silicon substrate; 102, the silicon dioxide; 103, the aluminum layer; 104, the tungsten; 105, the passivation layer; 106, the polysilicon layer; Via, the through hole; 107, the top plate electrode. DETAILED DESCRIPTION

[0041] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0042] It should be understood that when used in this specification and the appended claims, the terms "include" and "comprises" indicate the presence of described features, integers, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or combinations thereof.

[0043] It should also be understood that the terms used in the present specification are only for the purpose of describing specific embodiments and are not intended to limit the present invention. As used in the present specification and the appended claims, the singular forms "a", "an" and "the" are intended to include the plural forms unless the context clearly indicates otherwise. It should also be further understood that the term "and / or" used in the present specification and the appended claims refers to any combination of one or more of the associated listed items and all possible combinations, and includes these combinations.

[0044] The embodiment of the present application discloses a non-photolithography manufacturing method, which is used to manufacture a micro-flow sensor with an integrated interface circuit, wherein the manufacturing method includes the following steps: determining the metal layer where the microstrip line component of the micro-flow sensor is located according to the layered structure set in the initial sensor chip containing the interface circuit; using wet etching to completely etch the metal sacrificial layer around the metal layer where the microstrip line component is located to form a suspended MEMS structure, and exposing the silicon base at the bottom of the cavity; by selectively setting the metal sacrificial layer structure around the microstrip line, the thickness of the MEMS structure is adjusted and the sensor performance is regulated; using reactive ion etching to expose the top-layer plate electrode 107 located on one side of the microstrip line component in the initial sensor chip; electrically connecting the top-layer plate electrode 107 of the microstrip line component with the top-layer plate electrode 107 of the interface circuit, and packaging the initial sensor chip to obtain the corresponding integrated micro-flow sensor.

[0045] First, the metal layer where the microstrip line component of the micro flow sensor is located can be determined according to the layered structure set in the initial sensor chip including the interface circuit.

[0046] Figure 3 is a schematic diagram of the manufacturing method, Figure 3 The specific process of the non-photolithography Post-CMOS processing technology for thinning and releasing the MEMS sensing structure is illustrated in the figure. The process has the advantages of simple steps, low manufacturing cost and short time. In order to process the sensor through the non-photolithography Post-CMOS process, the MEMS flow sensor structure needs to be carefully designed, and two key steps of wet etching and RIE etching need to be performed in the subsequent Post-CMOS process.

[0047] The non-photolithography Post-CMOS process in the present invention is based on the 0.18μm 1P6M manufacturing process of a large foundry, but the process is also applicable to other similar CMOS processes. Figure 4 As shown, 1P6M represents the hierarchical structure of the process, that is, the number of metal layers (Metal) is six layers ( Figure 4There are six aluminum layers 103 shown in the figure, and the number of polysilicon layers 106 (Poly) is 1 layer; wherein, the thickness of the top aluminum layer 103 is 0.8μm, the thickness of the five aluminum layers 103 below it is 0.53μm, and the thickness of the polysilicon layer 106 is 0.2μm. Each conductor layer (the conductor layer includes the aluminum layer 103 and the polysilicon layer 106) is separated by a silicon dioxide 102 layer, and a passivation layer 105 is provided on the upper layer of the silicon dioxide 102; adjacent metal layers can only be connected through vias (tungsten 104 is filled in the vias as a conductor), and the vias Via between the bottom aluminum layer 103 and the polysilicon layer 106 are called CONT. It is worth noting that if the active region (ActiveRegion) is drawn directly below the bottom aluminum layer 103, then the bottom aluminum layer 103 can be directly connected to the silicon base through the CONT layer.

[0048] In the present invention, the fifth aluminum layer 103 metal layer is used as the microheater Rh and sensitive unit (sensitive unit is also a thermistor) of the microflow sensor, and the remaining metal layers are designed as sacrificial layers consistent with the cavity size, and the metal layers are connected through mesh through holes Via. The purpose of designing the mesh through holes Via is to minimize the ratio of silicon dioxide 102 between adjacent metal layers under the conditions permitted by the design rules, and to divide the silicon dioxide 102 layer into independent rectangular columns to ensure the one-step wet etching release of the MEMS structure. At the same time, the material filled in the through hole Via is metal tungsten 104, which can be etched synchronously with the metal layer. Based on this design concept, the cross-section of the MEMS sensing structure designed in this application is as follows: Figure 3 As shown in Figure (a), this cross-sectional structure is the initial sensor chip. In addition to the metal sensor (that is, the metal layer where the microstrip line components of the microflow sensor are located), the CMOS chip is also covered with a metal sacrificial layer for etching release. It should be emphasized that the MEMS sensor electrode interface designed this time is different from the traditional technology. It does not use the design of connecting the window electrode and the via hole, which effectively isolates the connection between the sixth metal layer (aluminum layer 103) and the fifth metal layer (aluminum layer 103). Therefore, in the subsequent metal wet etching process, it will not affect the circuit structure under the flat electrode and the passivation layer.

[0049] Secondly, wet etching is used to clean the metal sacrificial layer around the metal layer where the microstrip line components are located in one step, which can realize the suspension release of the MEMS structure and expose the silicon base at the bottom of the cavity; on this basis, researchers can also choose to use XeF 2 The silicon-based etching process (also without the need for photolithography) increases the etching depth of the MEMS bottom cavity to improve the sensor performance; in addition, by selecting and setting the metal sacrificial layer structure around the microstrip line (such as adjusting to the fourth aluminum layer 103), the MEMS structure thickness can be changed, thereby adjusting the sensor performance.

[0050] After the above special design of the MEMS sensor, the first step of the non-photolithography Post-CMOS processing implemented in this example is wet etching. Figure 3 As shown in Figure (b), in this step, the metal sacrificial layer is completely etched away using a piranha solution, thereby achieving the effect of releasing the MEMS structure in one step.

[0051] The method of completely etching the metal sacrificial layer around the metal layer where the microstrip line component is located by wet etching includes: placing the initial sensor chip in a piranha solution and heating it to above 95° C. for 10-18 minutes to etch the metal sacrificial layer; wherein the piranha solution is a solution composed of a mixture of concentrated sulfuric acid and 30% hydrogen peroxide.

[0052] The piranha solution is a highly corrosive chemical solution made by mixing concentrated sulfuric acid and 30% hydrogen peroxide, and it has extremely strong oxidizing properties. The mixture can quickly oxidize and corrode organic matter, remove organic residues on the surface of the device, and effectively etch the tungsten 104 metal material in the CMOS chip. In the experiment, the sensor chip prepared by the CMOS process was placed in the newly prepared piranha solution and heated to above 95°C, and in a more preferred embodiment it can be heated to 100°C. At this point, the piranha solution will begin to etch the metal on the surface of the chip, and etch downward layer by layer through the through-hole Via until all the metal connected to the sixth top metal aluminum layer 103 is completely etched clean. The whole process takes about ten minutes to complete, and the resulting device structure is as shown. Figure 3 As shown in Figure (b).

[0053] Thirdly, reactive ion etching is used to expose the top plate electrode located on one side of the microstrip line component in the initial sensor chip.

[0054] After wet etching, the sensor MEMS structure has been successfully suspended. The next step is to expose the top plate electrode for signal extraction. The resulting device structure is as follows: Figure 3 As shown in Figure (c) of FIG. Wherein, the use of reactive ion etching to expose the top plate electrode located on one side of the microstrip line component in the initial sensor chip includes: placing the initial sensor chip in a flowing mixed atmosphere and performing ion etching for 3-5 minutes; CHF in the flowing mixed atmosphere 3 The gas flow rate is 45 sccm, O 2 The gas flow rate is 45 sccm; the pressure of the mixed atmosphere is 10 mTorr, the ion source power of ion etching is 500 W, and the base power is 100 W.

[0055] The step adopts RIE (Reactive Ion Etching) technology to etch silicon dioxide. The etching depth required by this process is significantly reduced to only 1 μm. The technical solution of this application finally determines the RIE process parameters as follows: mode GSE200Plus, CHF in mixed atmosphere 3 The gas flow rate is 45 sccm, O 2 The gas flow rate is 45 sccm; the pressure of the mixed atmosphere is 10 m Torr, the ion source power of ion etching is 500 W, the base power is 100 W, the ion etching time is 3-5 minutes, preferably 4 minutes; the etching depth is 1 μm.

[0056] Finally, the top-layer planar electrode of the microstrip line component is electrically connected to the top-layer planar electrode of the interface circuit, and the initial sensor chip is packaged to obtain the corresponding monolithic integrated micro flow sensor.

[0057] After RIE etching is completed to expose the top-layer plate electrode, the MEMS sensor can be wired, packaged and tested. First, the top-layer plate electrode of the microstrip line component can be electrically connected to the top-layer plate electrode of the interface circuit, and then the device can be packaged to obtain a micro flow sensor that can be used normally. Obviously, this process has strong scalability and compatibility. It can not only adapt to other CMOS processes, but also introduce a silicon-based etching step before or after etching the silicon dioxide layer using RIE technology to increase the height of the cavity, thereby further improving the performance of the sensor.

[0058] The structure of the MEMS flow sensor after specific processing is as follows Figure 1 and Figure 2 As shown, the micro heater and the two pairs of thermistors are parallelly mounted on the bottom cavity of the substrate in the form of micro suspension bridges, and interface circuits are arranged on the substrates on both sides of the bottom cavity.

[0059] Usually, MEMS flow sensors need to be equipped with exclusive interface circuits to achieve functions such as temperature control, temperature drift compensation and signal amplification. Therefore, the present invention designs a dedicated precision CMOS interface circuit, which mainly includes a CTD (Constant Temperature Difference) control circuit of a microheater, a clock pulse circuit and a reading circuit 123, which is also a low-noise CCIA (Capacitively Coupled Chopper Stabilized Instrumentation Amplifier) ​​circuit.

[0060] The embodiment of the present invention further provides a micro flow sensor with an integrated interface circuit. The device is manufactured using the non-photolithography manufacturing method described in the above embodiment. The flow sensor includes a microstrip line component and an interface circuit arranged on a substrate 10. The interface circuit includes a control circuit, a clock pulse circuit and a reading circuit 123, wherein the control circuit and the clock pulse circuit are combined into a pulse control circuit 121; Figure 2 As shown, the microstrip line component is composed of a microheater Rh and two pairs of thermistors, one pair of thermistors is arranged upstream of the microheater Rh, and the other pair of thermistors is arranged downstream of the microheater Rh; the two pairs of thermistors are equidistant from the microheater Rh; the microheater Rh and the two pairs of thermistors are parallelly mounted on the bottom cavity 11 of the substrate 10 in the form of a micro-suspension bridge.

[0061] like Figure 5 As shown, the control circuit includes a primary operational amplifier circuit S1 and a secondary operational amplifier circuit S2, the secondary operational amplifier circuit S2 includes a pulse generator P, a compensation circuit MC and a Wheatstone bridge WB; a first fixed resistor R1, a second fixed resistor R2, and the micro heater Rh are respectively arranged in series on the first bridge arm, the second bridge arm and the fourth bridge arm of the Wheatstone bridge WB; a temperature-sensitive resistor Rr and an adjustable resistor Rc are connected in series and then arranged in series on the third bridge arm of the Wheatstone bridge WB; the connection point between the first bridge arm and the second bridge arm is connected to the second end of the compensation circuit MC and the drain of the first MOS tube M1, the gate of the first MOS tube M1 is connected to the first end of the compensation circuit MC and the connection point The first MOS tube M1 is connected to the compensation connection end of the first-stage operational amplifier circuit S1, the source of the first MOS tube M1 is connected to the drain of the second MOS tube M2, the gate of the second MOS tube M2 is connected to the output end of the pulse generator P, and the source of the second MOS tube M2 is connected to the voltage-stabilizing power supply; the connection point of the second bridge arm and the third bridge arm is connected to the first connection end of the first-stage operational amplifier circuit S1, the connection point of the first bridge arm and the fourth bridge arm is connected to the second connection end of the first-stage operational amplifier circuit S1, and the connection point of the third bridge arm and the fourth bridge arm is grounded; the clock signal output end of the clock pulse circuit is connected to the gate of the second MOS tube M2; the reading circuit includes an input chopper CH in , first capacitor C1, second capacitor C2, first transconductor Gm1, output chopper CH outand a second transconductor Gm2; the connection point between the first thermistor Ru1 and the third thermistor Rd1 in the microstrip line component is connected to the sensor bridge power supply, and the connection point between the second thermistor Ru2 and the fourth thermistor Rd2 in the microstrip line component is grounded; the connection point between the first thermistor Ru1 and the fourth thermistor Rd2 and the connection point between the second thermistor Ru2 and the third thermistor Rd1 are respectively connected to the input chopper CH in The two input terminals of the input chopper CH in The two output ends of the first transconductor Gm1 are connected to one end of the first capacitor C1 and one end of the second capacitor C2 respectively, the other end of the first capacitor C1 and the other end of the second capacitor C2 are connected to the two input ends of the first transconductor Gm1 respectively, and the two output ends of the first transconductor Gm1 are connected to the output chopper CH out The two input terminals of the output chopper CH out The two output ends of are respectively connected to the two input ends of the second transconductor Gm2, and the two output ends of the second transconductor Gm2 serve as a positive output end and a negative output end to output voltage signals.

[0062] In a more specific embodiment, the first-level operational amplifier circuit S1 includes a sixth MOS tube M6, a seventh MOS tube M7, an eighth MOS tube M8, a ninth MOS tube M9, a tenth MOS tube M10, an eleventh MOS tube M11, a twelfth MOS tube M12, a thirteenth MOS tube M13, a fourteenth MOS tube M14, a fifteenth MOS tube M15, a sixteenth MOS tube M16, a seventh resistor R7 and an eighth resistor R8; the source of the sixth MOS tube M6, the source of the ninth MOS tube M9 and the source of the tenth MOS tube M10 are all connected to a regulated power supply. The drain of the sixth MOS tube M6 is connected to the source of the seventh MOS tube M7 and the source of the eighth MOS tube M8, the gate of the seventh MOS tube M7 serves as the second connection terminal of the first-stage operational amplifier circuit S1, and the gate of the eighth MOS tube M8 serves as the first connection terminal of the first-stage operational amplifier circuit S1; the gate of the ninth MOS tube M9 is connected to the gate of the tenth MOS tube M10, the drain of the eleventh MOS tube M11 and one end of the seventh resistor R7; the drain of the ninth MOS tube M9 is connected to the source of the eleventh MOS tube M11, The drain of the tenth MOS tube M10 is connected to the source of the twelfth MOS tube M12, the gate of the eleventh MOS tube M11 is connected to the gate of the twelfth MOS tube M12, the other end of the seventh resistor R7 and the drain of the thirteenth MOS tube M13; the drain of the twelfth MOS tube M12 is connected to one end of the eighth resistor R8, and the connection point serves as the compensation connection end of the first-stage operational amplifier circuit S1; the other end of the eighth resistor R8 is connected to the drain of the fourteenth MOS tube M14, and the gate of the thirteenth MOS tube M13 is connected to the gate of the tenth MOS tube M12, the other end of the seventh resistor R7 and the drain of the thirteenth MOS tube M13. The gate of the fourth MOS tube M14; the source of the thirteenth MOS tube M13 is connected to the drain of the fifteenth MOS tube M15 and the drain of the seventh MOS tube M7, the source of the fourteenth MOS tube M14 is connected to the drain of the sixteenth MOS tube M16 and the drain of the eighth MOS tube M8; the gate of the fifteenth MOS tube M15 is connected to the gate of the sixteenth MOS tube M16, and the connection point serves as the third connection end of the first-stage operational amplifier circuit S1; the source of the fifteenth MOS tube M15 and the source of the sixteenth MOS tube M16 are both grounded.

[0063] In a more specific embodiment, the compensation circuit MC includes a fifteenth capacitor C15 and a ninth resistor R9 connected in series; an end of the fifteenth capacitor C15 that is not connected to the ninth resistor R9 serves as a first end of the compensation circuit MC, and an end of the ninth resistor R9 that is not connected to the fifteenth capacitor C15 serves as a second end of the compensation circuit MC.

[0064] The control circuit implemented in this application is as follows Figure 5As shown. The secondary operational amplifier circuit includes a pulse generator, a compensation circuit (Miller Compensation) and a Wheatstone bridge. The ratio of the first fixed resistor R1, the first fixed resistor R2 and the microheater Rh in the circuit is set to 5:1:5 to ensure that the microheater becomes the main energy consumption element in the bridge. off and voltage source V off Provided externally, it is used to control the startup of the circuit. The operational amplifier is designed with high gain to ensure that the feedback loop can accurately maintain the microheater Rh at a fixed overheat temperature ΔT h In order to reduce the impact of ambient temperature changes on sensor performance, Rr is designed as a temperature-sensitive resistor, whose sensitive material is consistent with the microheater (metal aluminum in this invention), but its resistance is 5 times that of the microheater, so as to monitor the ambient temperature T a And reduce the self-heating effect. In order to ensure the overheating temperature ΔT of the micro heater h Keep constant, the adjustable resistor Rc set outside the chip is set to: R c =αR r0 ΔT h ; Among them, R r0 is Rr at reference temperature T 0 The resistance value under this condition is α, and α is the temperature coefficient (TCR) of the micro heater Rh and the thermistor Rr.

[0065] When the fluid flows through the microheater, the cooling effect causes the temperature of the microheater and its resistance to drop, thereby causing the output voltage of the operational amplifier to increase. In order to maintain the overheat temperature set at a constant value, the microheater will consume more power, thereby achieving a dynamic balance of the bridge. In the present invention, the first stage of the operational amplifier adopts a folded common source and common gate structure, and the second stage is a common source stage with a Wheatstone bridge as a load. The design of the two-stage operational amplifier achieves high gain and high bandwidth.

[0066] like Figure 6 As shown in the test results, when the load is 500Ω, the DC open-loop gain of the operational amplifier is greater than 100dB, the unit gain bandwidth is greater than 4.4MHz, and the phase margin is greater than 62 degrees, which can ensure that the constant temperature difference control circuit can accurately control the overheating temperature of the microheater.

[0067] In order to reduce the power consumption of the sensor, the present invention also designs an on-chip clock pulse circuit to reduce energy consumption. This design adds a clock control function to the flow sensor, and the flow measurement is performed when the clock is at a high level, and the sensor enters a dormant state when the clock is at a low level.

[0068] In a more specific embodiment, the clock circuit includes a square wave generating circuit FB and a frequency dividing circuit FP; the output end of the square wave generating circuit FB is connected to the input end of the frequency dividing circuit FP, the output end of the frequency dividing circuit FP is used to output a clock signal, and the frequency dividing circuit FP is composed of multiple D flip-flops connected in series.

[0069] The clock pulse circuit is composed of a square wave generating circuit FB and a frequency dividing circuit FP. The specific circuit structure of the clock pulse circuit is as follows: Figure 7 shown.

[0070] The square wave generating circuit in this circuit is used to generate an initial clock signal. Its principle is that when the input voltage VI N+ of the in-phase input terminal of the operational amplifier is higher than VI N-, the operational amplifier outputs a high level to charge the RC network, and VI N- continues to rise until it exceeds VI N+. At this time, the operational amplifier outputs a low level, and the RC network discharges until VI N- is lower than VI N+ and then repeats the above process, thereby generating a periodically changing square wave. At this time, the period of the square wave can be described as: The frequency division circuit divides the square wave periodic signal through the D flip-flop to increase the clock period. In addition, the frequency division circuit also plays a role in shaping the square wave. It is worth noting that the duty cycle of CLK is 1 / 2. At this time, the square wave period after frequency division can be expressed as: T CLK =2 n T SW .

[0071] The frequency division circuit is composed of multiple D flip-flops in series. The specific structure of the D flip-flop is as follows: Figure 8 The clock circuit is designed using 0.18μm1P6M CMOS technology. The waveform test results of the clock pulse circuit are shown in Fig. 9 As shown, its wave period is about 500ms.

[0072] In a more specific embodiment, the reading circuit also includes a ripple suppression loop circuit RRL; the ripple suppression loop circuit RRL includes a first chopper CH1, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, a sixth capacitor C6, a seventh capacitor C7, an eighth capacitor C8, a third transconductor Gm3 and a fourth transconductor Gm4; the third capacitor C3 is arranged in series between an input terminal of the first chopper CH1 and an output terminal of the first transconductor Gm1, and the fourth capacitor C4 is arranged in series between the other input terminal of the first chopper CH1 and the other output terminal of the first transconductor Gm1; the fifth capacitor C5 is arranged in series between an output terminal of the first chopper CH1 and The sixth capacitor C6 is arranged in series between one input end of the third transconductor Gm3, the second output end of the third transconductor Gm3 is connected to the second input end of the fourth transconductor Gm4, and the second output end of the fourth transconductor Gm4 is connected to the second output end of the second transconductor Gm2. The seventh capacitor C7 is arranged in parallel between one output end of the first chopper CH1 and one input end of the fourth transconductor Gm4, and the eighth capacitor C8 is arranged in parallel between the second output end of the first chopper CH1 and the second input end of the fourth transconductor Gm4.

[0073] In a more specific embodiment, the reading circuit further includes a ninth capacitor C9, a tenth capacitor C10, an eleventh capacitor C11, a twelfth capacitor C12, a second chopper CH pf And feedback chopper CH fb One end of the ninth capacitor C9 is connected to the input chopper CH in One end of the tenth capacitor C10 is connected to the input chopper CH in The other end of the ninth capacitor C9 and the other end of the tenth capacitor C10 are respectively connected to the second chopper CH pf one end of the eleventh capacitor C11 is connected to one input end of the first transconductor Gm1; one end of the twelfth capacitor C12 is connected to the other input end of the first transconductor Gm1; the other end of the eleventh capacitor C11 and the other end of the twelfth capacitor C12 are respectively connected to the feedback chopper CH fb The two input terminals of the second chopper CH pf One output terminal of the feedback chopper CH fb The second chopper CH is connected to an output terminal thereof, and the connection point is connected to the negative output terminal; pf The other output terminal of the second chopper CH fbIn a more specific embodiment, the reading circuit further comprises a first series circuit and a second series circuit; the first series circuit is arranged in series between an input terminal and an output terminal of the second transconductor Gm2, and the second series circuit is arranged in series between the other input terminal and the other output terminal of the second transconductor Gm2; the first series circuit is composed of a third resistor R3 and a thirteenth capacitor C13 in series, and the second series circuit is composed of a fourth resistor R4 and a fourteenth capacitor C14 in series.

[0074] In a more specific embodiment, the reading circuit further includes a fifth resistor R5, a sixth resistor R6, a third MOS transistor M3, a fourth MOS transistor M4 and a fifth MOS transistor M5; one end of the fifth resistor R5 is connected to an input end of the first transconductor Gm1, and one end of the sixth resistor R6 is connected to the other input end of the first transconductor Gm1; the other end of the fifth resistor R5 is connected to the other end of the sixth resistor R6, the source of the fourth MOS transistor M4 and the source of the fifth MOS transistor M5; the gate of the fourth MOS transistor M4 is connected to the gate of the fifth MOS transistor M5, the drain of the fourth MOS transistor M4 and the drain of the third MOS transistor M3; the source of the third MOS transistor M3 is grounded; the gate of the third MOS transistor M3 is connected to the third connection end of the first-stage operational amplifier circuit S1; the drain of the fifth MOS transistor M5 is simultaneously connected to one end of the fifth resistor R5 and one end of the sixth resistor R6.

[0075] The noise sources of the sensor system are usually divided into external noise and inherent noise. Take the on-chip micro-thermal flow sensor designed in the present invention as an example. Among them, the external noise mainly comes from fluid disturbance, which is usually related to the packaging pipeline design, and will have a greater impact on the sensor system when the overheating temperature is large. When the overheating temperature of the sensor is not high, the inherent noise of the sensor system mainly comes from the electronic noise of the Wheatstone bridge and the readout circuit. For the 12-bit high-precision flow sensor SoC that needs to be implemented, when the maximum output of the sensor is 2mV, the noise at the input of the readout circuit needs to be less than 0.49μVpp, so the root mean square noise can be calculated as 61nVrms (±4σ). For a signal bandwidth of 10Hz, the noise at the input of the readout circuit is calculated to be 15.4nV / sqrt(Hz).

[0076] Generally, the resistance of the Wheatstone bridge in a pico flow sensor is determined by parameters such as the resistivity of the sensor's sensitive material and the sensor size. In addition, in order to reduce the self-heating effect, the thermistor in the Wheatstone bridge is often designed to have a larger resistance. Therefore, the inherent noise of the pico flow sensor is generally difficult to reduce by reducing the resistance of the thermistor.

[0077] Capacitor-coupled instrumentation amplifiers (CCIA) are very suitable for use as readout circuits in flow sensors because of their high noise efficiency, tolerance to rail-to-rail input common-mode levels, and the use of chopping technology to control the flicker noise angle at very low frequencies. Fig.10 The circuit structure diagram of the readout circuit in this application is shown. The flow signal is first converted into a voltage by a Wheatstone bridge and then amplified with low noise by a CCIA implemented with a two-stage topology. The two-stage structure achieves high gain to ensure sufficient gain accuracy at a closed-loop gain of 46dB. The first stage is chopped to separate the low-frequency sensor signal from the low-frequency flicker noise and DC offset. The output ripple caused by the chopping is reduced to a level that is negligible compared to the output signal by a ripple suppression loop (RRL). In addition, a positive feedback loop (PFL) is used to increase the input impedance, thereby suppressing the input impedance attenuation caused by chopping. The capacitor acts as an input coupling element to isolate the common mode level of the front-end bridge, so a pseudo-resistance is used to DC bias the input of the op amp. The closed-loop gain of the CCIA can be given as: G = C in / C fb The CCIA two-stage fully differential op amp transistor circuit used is as follows Fig.11 As shown, the transconductance Gm4 used to compensate for the offset current in the RRL is also shown. The folded common source and common gate stage is designed as the first stage, and a large-size PMOS input differential pair of 1440μm / 0.3μm is used to achieve a transconductance of 5.48mS to obtain the desired low thermal noise. The noise of the second-stage op amp will be divided by the gain of the first stage and equivalent to the first-stage input. Since the first stage achieves a gain of more than 80dB, the second-stage op amp uses NMOS as the input to obtain higher transconductance efficiency.

[0078] The offset of transconductance Gm1 will be modulated by the chopper and appear at the output in the form of ripple. RRL will sense the ripple and generate a compensation voltage, which is eventually converted into a compensation current through transconductance Gm4 to offset the offset current of transconductance Gm1, thereby suppressing the output ripple. The circuit diagram of transconductance Gm3 is shown in Fig.12 As shown, the transconductance Gm3 is the main component of the switched capacitor integrator in the RRL, and its gain is proportional to the ripple suppression coefficient. Therefore, the transconductance Gm3 is designed to have a DC gain of more than 80dB to obtain a better ripple suppression effect.

[0079] like Fig.13 As shown in the figure, when the gain is configured to 200 and the chopping frequency is 200kHz, the test results show that the designed CCIA equivalent input noise floor is 4.46nV / sqrt(Hz) and the 1 / f noise corner frequency is less than 0.1Hz, which well meets the requirements of the flow sensor for the readout circuit.

[0080] To ensure that the MEMS device is consistent with the expected effect, the integrated micro flow sensor obtained based on post-CMOS processing without photolithography can also verify the thermal performance of the CMOS-MEMS flow sensor. By studying the relationship between the resistance and temperature of the suspended micro heater, it is found that the resistance temperature coefficient of the top metal aluminum of two flow sensors of different sizes (130 type and 170 type, the opening size of the 130 type MEMS sensor is 130μm, and the opening size of the 170 type MEMS sensor is 170μm) in the CMOS process used is 0.00343 / K. Fig.14 Figures (a) and (b) further show the relationship between the overheating temperature and input power of the micro heater of the 130 and 170 flow sensors. Fig.14 This is a comparison chart of the relationship between the overheating temperature and power of the two sensor micro heaters. Fig.14 Figure (a) shows the test results of the 130 sensor. Fig.14 Figure (b) shows the test results of the 170-type sensor. It can be seen that the 130-type flow sensor can bring about a 14.1K increase in overheating temperature for every 1mW of power consumed, while the 170-type flow sensor only brings about a 13.5K increase in overheating temperature for every 1mW of power consumed due to the additional heat loss of the support column.

[0081] The CCIA circuit was also measured in this application using the same configuration as in the design phase. At a gain of 200 and a chopping frequency of 200kHz, the CCIA output noise spectral density (frequency range 10mHz to 3.125Hz) was measured as follows: Fig.15 As shown in Figure (a) in the figure. The calculated equivalent input reference noise is 5.86nV / √Hz, and the 1 / f noise corner frequency is less than 0.1Hz. The test results are in good agreement with the design results, proving that the designed reading circuit can ensure the sensor system's ability to detect ultra-low flow. Total harmonic distortion is used to reflect the nonlinearity of the system. When the input frequency is 10Hz and the peak-to-peak value is 14mV, CCIA exhibits a THD of about -63.7dB. Fig.15 As shown in Figure (b), such a low THD ensures that CCIA can achieve low-distortion amplification of the flow sensor signal.

[0082] For the successfully processed CMOS-MEMS integrated sensor, channel flow is used to evaluate the sensor performance. Its packaging pipeline and PCB base are prepared by 3D printing technology. First, the chip base is bonded to the hollow PCB board, and the chip is flush embedded in the hollow area of ​​the PCB. After the chip is fixed, it is connected to the peripheral signal lead through wire bonding. Finally, the PCB board with the chip is embedded in the 3D printed pipeline and sealed and fixed. During the test, the flow rate is adjusted by the flow valve, and the gas flow is monitored by a commercial flow meter.

[0083] Fig.16 The output response of the sensor chip system for two flow sensor designs (130 and 170) with nitrogen flow input within ±15m / s is shown. When the heater overheat temperature is 50℃, the interface circuit amplification factor G is 200, and the power supply voltage Vs is 0.5V, both sensors have high linearity in the range of -5 to 5m / s, and the maximum output at -15 and 15m / s can reach 270mV and 380mV respectively, and show good symmetry.

[0084] In addition, in order to demonstrate the high performance of the sensors, sensitivity analysis and noise tests were performed on the two sensors. Fig.17 As shown in Figure 130, the 130 sensor has a high sensitivity of 24.74mV / (m / s) in the linear flow range, while the 170 sensor has a higher sensitivity of 30.84mV / (m / s), an increase of 25%. Fig.18 As shown in the figure, under room temperature of 298K, the measured sensor system output noise density at zero flow rate is 1.93uV / sqrt(Hz). At this time, the root mean square voltage Vrms calculated from the output noise in the bandwidth of 0.1Hz to 10Hz is 6.23μVrms. Based on this, the minimum detection flow rate can be calculated by dividing the system output root mean square noise voltage by twice the sensitivity. After calculation, the minimum detection flow rate of the 130 type sensor can reach 0.5mm / s, while the minimum detection flow rate of the 170 type sensor can reach 0.4mm / s.

[0085] In addition, the dynamic response of the flow sensor system indicates the ability to capture rapid flow changes, which is very important for applications where the flow changes dramatically. Under a constant nitrogen flow input velocity of 5m / s, the response time of the sensor system chip was tested by applying a square wave with a frequency of 1Hz and a peak voltage of 1V to the microheater. The time from the moment the pulse changes to the time when the output signal drops or rises to 63.2% of its amplitude is defined as the response time of the flow sensor chip. Under the output low-pass filter cutoff frequency limit of 10Hz, the output of the flow sensor SoC is recorded Fig.18 In the figure, the response time of the sensor system chip is 19ms, corresponding to a system bandwidth of about 8.4Hz, indicating that the system bandwidth is mainly limited by the low-pass filter. For applications that need to measure higher frequency flow signals, the detection limit of the flow sensor SoC can be sacrificed to relax the restriction on signal bandwidth.

[0086] For power-sensitive applications, as mentioned above, a pulse operation mode is also designed in this application to reduce system power consumption (see Figure 4 The pulse voltage on the gate of the second MOS tube M2 in FIG. Fig.19As shown in Figure (a) in Figure 130, for the 130-type flow sensor, the entire CTD circuit can be periodically activated by a pulse signal generated on the chip, which can reduce the power consumption of the microheater to less than half of the original, while the output signal can remain unchanged when the pulse is activated, as shown in Figure 130. Fig.19 Therefore, after adopting the pulse heating method, the sensitivity of the sensor can be increased by more than double when the heating power is normalized.

[0087] The embodiment of the present invention provides a micro-flow sensor with an integrated interface circuit and a non-photolithography manufacturing method thereof, the manufacturing method comprising: determining the metal layer where the microstrip line component of the micro-flow sensor is located according to the layered structure set in the initial sensor chip containing the interface circuit; using wet etching to completely etch the metal sacrificial layer around the metal layer where the microstrip line component is located; using reactive ion etching to expose the top-layer plate electrode located on one side of the microstrip line component in the initial sensor chip; electrically connecting the top-layer plate electrode of the microstrip line component with the top-layer plate electrode of the interface circuit, and packaging the initial sensor chip to obtain the corresponding monolithic integrated micro-flow sensor. The above-mentioned manufacturing method of the micro-flow sensor, based on the non-photolithography post-CMOS processing technology, can efficiently perform the thinning and release of the MEMS structure, realize the integrated setting of the MEMS micro-suspension bridge of the micro-flow sensor and the CMOS interface circuit, and achieve the application effect of high sensitivity and low cost.

[0088] The above is only a specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any technician familiar with the technical field can easily think of various equivalent modifications or replacements within the technical scope disclosed by the present invention, and these modifications or replacements should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention shall be based on the protection scope of the claims.

Claims

1. A non-photolithography manufacturing method, characterized in that: The manufacturing method is used to manufacture a micro flow sensor integrated with a CMOS interface circuit, and the manufacturing method comprises: Determining the metal layer where the microstrip line component of the micro flow sensor is located according to the layered structure set in the initial sensor chip including the interface circuit; The metal sacrificial layer around the metal layer where the microstrip line component is located is completely etched away by wet etching to form a suspended MEMS structure and expose the silicon base at the bottom of the cavity; the metal sacrificial layer structure around the microstrip line is selected to adjust the thickness of the MEMS structure and control the sensor performance; Reactive ion etching is used to expose the top plate electrode located on one side of the microstrip line component in the initial sensor chip; The top-layer plate electrode of the microstrip line component is electrically connected to the top-layer plate electrode of the interface circuit, and the initial sensor chip is packaged to obtain the corresponding monolithic integrated micro flow sensor.

2. The photolithography-free manufacturing method according to claim 1, characterized in that: The method further comprises: after the metal sacrificial layer around the metal layer where the microstrip line component is located is completely etched away by wet etching to form a suspended MEMS structure and the silicon base is exposed at the bottom of the cavity, the method further comprises: The XeF2 silicon-based etching process is used to increase the etching depth of the MEMS bottom cavity to improve sensor performance.

3. The photolithography-free manufacturing method according to claim 1 or 2, characterized in that: The method of completely etching the metal sacrificial layer below the metal layer where the microstrip line component is located by wet etching includes: The initial sensor chip is placed in a piranha solution and heated to above 95° C. for 10-18 minutes to etch the metal sacrificial layer; wherein the piranha solution is a solution composed of a mixture of concentrated sulfuric acid and 30% hydrogen peroxide.

4. The photolithography-free manufacturing method according to claim 1 or 2, characterized in that: The method of using reactive ion etching to expose the top plate electrode located on one side of the microstrip line component in the initial sensor chip comprises: The initial sensor chip is placed in a flowing mixed atmosphere and ion-etched for 3-5 minutes; the flow rate of CHF3 gas in the flowing mixed atmosphere is 45 sccm, and the flow rate of O2 gas is 45 sccm; the pressure of the mixed atmosphere is 10 mTorr, the ion source power of ion etching is 500 W, and the base power is 100 W.

5. A micro flow sensor with integrated CMOS interface circuit, characterized in that: The micro flow sensor is manufactured by the non-photolithography manufacturing method according to any one of claims 1 to 4; the flow sensor comprises a microstrip line component and an interface circuit arranged on a substrate, and the interface circuit comprises a control circuit, a clock pulse circuit and a reading circuit; The microstrip line assembly is composed of a microheater and two pairs of thermistors, one pair of thermistors is arranged upstream of the microheater, and the other pair of thermistors is arranged downstream of the microheater; the two pairs of thermistors are spaced equidistant from the microheater; the microheater and the two pairs of thermistors are parallelly mounted on the bottom cavity of the substrate in the form of micro-suspension bridges; The control circuit comprises a primary operational amplifier circuit and a secondary operational amplifier circuit, wherein the secondary operational amplifier circuit comprises a pulse generator, a compensation circuit and a Wheatstone bridge; a first fixed value resistor, a second fixed value resistor and the micro heater are respectively arranged in series on the first bridge arm, the second bridge arm and the fourth bridge arm of the Wheatstone bridge; a temperature sensitive resistor and an adjustable resistor are connected in series and then arranged in series on the third bridge arm of the Wheatstone bridge; The connection point between the first bridge arm and the second bridge arm is connected to the second end of the compensation circuit and the drain of the first MOS tube, the gate of the first MOS tube is connected to the first end of the compensation circuit and the connection point is connected to the compensation connection end of the first-stage operational amplifier circuit, the source of the first MOS tube is connected to the drain of the second MOS tube, the gate of the second MOS tube is connected to the output end of the pulse generator, and the source of the second MOS tube is connected to the voltage-stabilizing power supply; the connection point between the first bridge arm and the third bridge arm is connected to the first connection end of the first-stage operational amplifier circuit, the connection point between the second bridge arm and the fourth bridge arm is connected to the second connection end of the first-stage operational amplifier circuit, and the connection point between the third bridge arm and the fourth bridge arm is grounded; The clock signal output terminal of the clock pulse circuit is connected to the gate of the second MOS tube; The read circuit includes an input chopper, a first capacitor, a second capacitor, a first transconductor, an output chopper and a second transconductor; The connection point between the first thermistor and the third thermistor in the microstrip line component is connected to the sensor bridge power supply, and the connection point between the second thermistor and the fourth thermistor in the microstrip line component is grounded; the connection point between the first thermistor and the fourth thermistor and the connection point between the second thermistor and the third thermistor are respectively connected to the two input ends of the input chopper, the two output ends of the input chopper are respectively connected to one end of the first capacitor and one end of the second capacitor, the other end of the first capacitor and the other end of the second capacitor are respectively connected to the two input ends of the first transconductor, the two output ends of the first transconductor are respectively connected to the two input ends of the output chopper, the two output ends of the output chopper are respectively connected to the two input ends of the second transconductor, and the two output ends of the second transconductor are respectively used as the positive output end and the negative output end to output voltage signals.

6. The micro flow sensor with integrated CMOS interface circuit according to claim 5, characterized in that: The reading circuit further includes a ripple suppression loop circuit; the ripple suppression loop circuit includes a first chopper, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a seventh capacitor, an eighth capacitor, a third transconductor and a fourth transconductor; The third capacitor is arranged in series between an input end of the first chopper and an output end of the first transconductor, and the fourth capacitor is arranged in series between the other input end of the first chopper and the other output end of the first transconductor; the fifth capacitor is arranged in series between an output end of the first chopper and an input end of the third transconductor, and the sixth capacitor is arranged in series between the other output end of the first chopper and the other input end of the third transconductor; The two output ends of the third transconductor are respectively connected to the two input ends of the fourth transconductor, and the two output ends of the fourth transconductor are respectively connected to the two output ends of the second transconductor; The seventh capacitor is arranged in parallel between an output terminal of the first chopper and an input terminal of the fourth transconductor, and the eighth capacitor is arranged in parallel between the other output terminal of the first chopper and the other input terminal of the fourth transconductor.

7. The micro flow sensor with integrated CMOS interface circuit according to claim 6, characterized in that: The reading circuit further includes a ninth capacitor, a tenth capacitor, an eleventh capacitor, a twelfth capacitor, a second chopper and a feedback chopper; One end of the ninth capacitor is connected to the other input end of the input chopper; one end of the tenth capacitor is connected to one input end of the input chopper; the other end of the ninth capacitor and the other end of the tenth capacitor are connected to the two input ends of the second chopper respectively; One end of the eleventh capacitor is connected to one input end of the first transconductor; one end of the twelfth capacitor is connected to the other input end of the first transconductor; the other end of the eleventh capacitor and the other end of the twelfth capacitor are respectively connected to two input ends of the feedback chopper; One output end of the second chopper is connected to one output end of the feedback chopper, and the connection point is connected to the negative output end; the other output end of the second chopper is connected to the other output end of the feedback chopper, and the connection point is connected to the positive output end.

8. The micro flow sensor with integrated CMOS interface circuit according to claim 7, characterized in that: The read circuit further includes a first series circuit and a second series circuit; the first series circuit is arranged in series between an input terminal and an output terminal of the second transconductor, and the second series circuit is arranged in series between another input terminal and another output terminal of the second transconductor; The first series circuit is composed of a third resistor and a thirteenth capacitor connected in series, and the second series circuit is composed of a fourth resistor and a fourteenth capacitor connected in series; the reading circuit also includes a fifth resistor and a sixth resistor; the fifth resistor and the sixth resistor are both implemented by PMOS transistors working in the subthreshold region, and the bias circuit of the MOS resistor is represented by the third MOS transistor, the fourth MOS transistor and the fifth MOS transistor; One end of the fifth resistor is connected to one input end of the first transconductor, and one end of the sixth resistor is connected to the other input end of the first transconductor; the other end of the fifth resistor is connected to the other end of the sixth resistor; The gate of the fourth MOS tube is connected to the gate of the fifth MOS tube, the drain of the fourth MOS tube and the drain of the third MOS tube; the source of the third MOS tube is grounded; The gate of the third MOS tube is connected to the third connection terminal of the first-stage operational amplifier circuit.

9. The micro flow sensor with integrated CMOS interface circuit according to claim 5, characterized in that: The compensation circuit includes a fifteenth capacitor and a ninth resistor connected in series; an end of the fifteenth capacitor not connected to the ninth resistor serves as a first end of the compensation circuit, and an end of the ninth resistor not connected to the fifteenth capacitor serves as a second end of the compensation circuit.

10. The micro flow sensor with integrated CMOS interface circuit according to claim 5, characterized in that: The clock circuit includes a square wave generating circuit and a frequency dividing circuit; The output end of the square wave generating circuit is connected to the input end of the frequency dividing circuit, the output end of the frequency dividing circuit is used to output a clock signal, and the frequency dividing circuit is composed of a plurality of D flip-flops connected in series.

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