Intelligent storage chip integrated with edge computing data processing system

Abstract

The invention provides an intelligent storage chip integrated with an edge computing data processing system, and relates to the field of electric digital data processing, the intelligent storage chip comprises a data acquisition module, an edge computing module, a data storage module and a chip management module, the edge calculation module is used for calculating, analyzing and processing the data, the data storage module is used for storing the processed data, and the chip management module is used for controlling and managing calculation and storage functions of a chip; according to the chip, the edge calculation module is added, edge tasks are processed through the calculation capacity, meanwhile, calculation management is conducted on data storage, and the retrieval efficiency and the calling rate of the stored data can be effectively improved.

Description

Technical Field

[0001] The present invention relates to the field of electronic digital data processing, and in particular to an intelligent storage chip integrated with an edge computing data processing system. Background Art

[0002] With the rapid development of big data and the Internet of Things, various devices and sensors continue to generate a large amount of data, which needs to be collected, processed, stored and managed quickly and efficiently. However, traditional data storage systems often cannot meet the needs of real-time processing of big data, especially in scenarios involving large amounts of data and high timeliness. They face many problems such as data transmission delays, insufficient storage space, and low data processing capabilities. Therefore, how to achieve efficient processing and intelligent storage of data on edge devices has become a key technical issue that needs to be solved urgently.

[0003] The foregoing discussion of the background art is intended only to facilitate an understanding of the present invention. This discussion does not acknowledge or admit that any of the material referred to is part of the common general knowledge.

[0004] Now many memory chips have been developed. After a lot of searching and reference, it is found that the existing memory chips are like the chip system disclosed in the publication number CN118802816B. These chip systems generally include: memory interaction module, header information processing module, data processing module and data output module; the memory interaction module reads the data header and each sub-data of the target data packet for the first time and sends it to the header information processing module; the header information processing module determines the first matching relationship between the data header and each sub-data and each downstream channel; the memory interaction module reads the target data packet for the second time and sends it to the data processing module; the data processing module determines the second matching relationship between the first-in-first-out cache sequence of the data output module and each downstream channel, and sends the data to the data output module based on the first and second matching relationships; the data output module sends the data to the corresponding downstream channel. However, this chip system does not use data processing capabilities to improve the efficiency of data storage, retrieval and call, and cannot meet the needs of big data scenarios. Summary of the invention

[0005] The purpose of the present invention is to propose an intelligent storage chip integrated with an edge computing data processing system to address the existing deficiencies.

[0006] The present invention adopts the following technical solution: An intelligent storage chip integrating an edge computing data processing system, comprising a data acquisition module, an edge computing module, a data storage module and a chip management module; The data acquisition module is used to receive external input information data, the edge computing module is used to perform computing and analysis on the data, the data storage module is used to save the processed data, and the chip management module is used to control and manage the computing and storage functions of the chip; The data acquisition module includes a data interface unit, a data filtering unit and a data cache unit, wherein the data interface unit is used to connect to an external device and directly receive external data, the data filtering unit is used to filter out redundant information in the received data, and the data cache unit is used to temporarily store the filtered data; The edge computing module includes a computing classification unit, a task execution unit and a storage optimization unit, wherein the computing classification unit is used to identify and classify the data in the data cache unit, the task execution unit is used to process the task data, and the storage optimization unit is used to process the data to be stored; The data storage module includes a data storage unit, a storage allocation unit and a retrieval calling unit, wherein the data storage unit is used to store data information, the storage allocation unit is used to allocate a storage area for data information, and the retrieval calling unit is used to retrieve and obtain stored data; The chip management module includes a function control unit, a transmission control unit and an area management unit. The function control unit is used to provide a control interface to operate the function of the edge computing module. The transmission control unit controls the transmission direction of data in the data cache unit based on the function on / off status. The area management unit is used to control and manage the storage area in the data storage unit.

[0007] Furthermore, the storage optimization unit includes a data compression processor, a state acquisition processor and an area calculation processor. The data compression processor is used to compress the received data to be stored, the state acquisition processor is used to obtain the storage state of each storage area, and the area calculation processor is used to select a storage area suitable for the data to be stored through calculation.

[0008] Furthermore, the process of selecting a storage area by the area calculation processor includes the following steps: S1. Extract label information from the data to be stored; S2, obtaining the call information of each tag information in the data storage module; S3. Calculate the call index P of the data to be stored according to the following formula: ; Where m(i) represents the number of data containing the i-th label, c(i) represents the number of times the data containing the i-th label is called, and n is the number of labels contained in the data to be stored; S4, calculating the call index of the data stored in each storage area, and obtaining the call index P(i) of each storage area after mean processing; S5, taking the storage area closest to the call index of the data to be stored as the target area; S6, determine whether the remaining space of the target area is larger than the size of the data to be stored, if so, send the target area and the data to be stored to the data storage module, if not, proceed to step S7; S7. Use the storage area at the lower level as the new target area and return to step S6.

[0009] Furthermore, the area management unit includes a setting interaction processor and a data migration processor, the setting interaction processor is used to set the hierarchical information of the storage area, and the data migration processor migrates the storage data between different storage areas according to the calling state of the storage data.

[0010] Furthermore, the data migration processor calculates the actual call value Q of the stored data according to the following formula: ; Among them, a is the protection value, m c is the actual number of calls to the stored data, t is the storage time of the stored data, and t0 is the starting time; The data migration processor compares the actual call values ​​of the storage data in two adjacent hierarchical storage areas. When the actual call value of the storage data in the lower-level storage area is greater than the actual call value of the storage data in the higher-level storage area, the two storage data are migrated to each other's storage area. If there is insufficient space in the storage area after the migration, only one of the storage data is migrated.

[0011] The beneficial effects achieved by the present invention are: By adding an edge computing module to the chip, this system can be used to process edge tasks, perform computational analysis on storage, and store data in appropriate areas. By dividing the storage areas into different levels and configuring different retrieval weights and communication resources for storage areas at different levels, this can effectively improve data retrieval efficiency and call speed, and meet the storage needs of big data.

[0012] To further understand the features and technical contents of the present invention, please refer to the following detailed description and drawings of the present invention. However, the drawings provided are only for reference and description and are not intended to limit the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 It is a schematic diagram of the overall structural framework of the present invention; Figure 2This is a schematic diagram of the data acquisition module of the present invention; Figure 3 This is a schematic diagram of the edge computing module of the present invention; Figure 4 This is a schematic diagram of the data storage module of the present invention; Figure 5 This is a schematic diagram of the chip management module of the present invention; Figure 6 This is a comparison chart of the test data of the present invention. DETAILED DESCRIPTION

[0014] The following is an explanation of the embodiments of the present invention through specific embodiments. Those skilled in the art can understand the advantages and effects of the present invention from the contents disclosed in this specification. The present invention can be implemented or applied through other different specific embodiments, and the details in this specification can also be modified and changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention. In addition, the drawings of the present invention are only simple schematic illustrations and are not depicted according to actual sizes. It is stated in advance. The following embodiments will further explain the relevant technical contents of the present invention in detail, but the disclosed contents are not intended to limit the scope of protection of the present invention.

[0015] Embodiment 1: This embodiment provides an intelligent storage chip integrating an edge computing data processing system, combined with Figure 1 , including data acquisition module, edge computing module, data storage module and chip management module.

[0016] The data acquisition module is used to receive external input information data, the edge computing module is used to perform calculation and analysis on the data, the data storage module is used to save the processed data, and the chip management module is used to control and manage the computing and storage functions of the chip.

[0017] The data acquisition module includes a data interface unit, a data filtering unit and a data cache unit. The data interface unit is used to connect to an external device and directly receive external data. The data filtering unit is used to filter out redundant information in the received data. The data cache unit is used to temporarily store the filtered data.

[0018] The edge computing module includes a computing classification unit, a task execution unit and a storage optimization unit. The computing classification unit is used to identify and classify data in the data cache unit, the task execution unit is used to process task data, and the storage optimization unit is used to process data to be stored.

[0019] The data storage module includes a data storage unit, a storage allocation unit and a retrieval calling unit. The data storage unit is used to store data information, the storage allocation unit is used to allocate a storage area for data information, and the retrieval calling unit is used to retrieve and obtain stored data.

[0020] The chip management module includes a function control unit, a transmission control unit and an area management unit. The function control unit is used to provide a control interface to operate the function of the edge computing module. The transmission control unit controls the transmission direction of data in the data cache unit based on the function on / off status. The area management unit is used to control and manage the storage area in the data storage unit.

[0021] The storage optimization unit includes a data compression processor, a state acquisition processor and an area calculation processor. The data compression processor is used to compress the received data to be stored, the state acquisition processor is used to obtain the storage state of each storage area, and the area calculation processor is used to select a storage area suitable for the data to be stored through calculation.

[0022] The process of selecting a storage area by the area calculation processor comprises the following steps: S1. Extract label information from the data to be stored.

[0023] S2. Obtain the call information of each tag information in the data storage module.

[0024] S3. Calculate the call index P of the data to be stored according to the following formula: .

[0025] Among them, m(i) represents the number of data containing the i-th label, c(i) represents the number of times the data containing the i-th label is called, and n is the number of labels contained in the data to be stored.

[0026] S4. Calculate the call index of the data stored in each storage area, and obtain the call index P(i) of each storage area after mean processing.

[0027] S5. Use the storage area that is closest to the call index of the data to be stored as the target area.

[0028] S6. Determine whether the remaining space of the target area is larger than the size of the data to be stored. If so, send the target area and the data to be stored to the data storage module. If not, proceed to step S7.

[0029] S7. Use the storage area at the lower level as the new target area and return to step S6.

[0030] The area management unit includes a setting interaction processor and a data migration processor. The setting interaction processor is used to set the hierarchical information of the storage area. The data migration processor migrates the storage data between different storage areas according to the calling state of the storage data.

[0031] The data migration processor calculates the actual call value Q of the stored data according to the following formula: .

[0032] Among them, a is the protection value, m c is the actual number of calls to the stored data, t is the storage time of the stored data, and t0 is the starting time.

[0033] The data migration processor compares the actual call values ​​of the storage data in two adjacent hierarchical storage areas. When the actual call value of the storage data in the lower-level storage area is greater than the actual call value of the storage data in the higher-level storage area, the two storage data are migrated to each other's storage area. If there is insufficient space in the storage area after the migration, only one of the storage data is migrated.

[0034] Embodiment 2: This embodiment includes all the contents of Embodiment 1 and provides an intelligent storage chip with an integrated edge computing data processing system, including a data acquisition module, an edge computing module, a data storage module and a chip management module.

[0035] The data acquisition module is used to receive external input information data, the edge computing module is used to perform calculation and analysis on the data, the data storage module is used to save the processed data, and the chip management module is used to control and manage the computing and storage functions of the chip.

[0036] Combination Figure 2 The data acquisition module includes a data interface unit, a data filtering unit and a data cache unit. The data interface unit is used to connect to an external device and directly receive external data. The data filtering unit is used to filter out redundant information in the received data. The data cache unit is used to temporarily store the filtered data.

[0037] Combination Figure 3 The edge computing module includes a computing classification unit, a task execution unit and a storage optimization unit. The computing classification unit is used to identify and classify the data in the data cache unit, the task execution unit is used to process the task data, and the storage optimization unit is used to process the data to be stored.

[0038] Combination Figure 4The data storage module includes a data storage unit, a storage allocation unit and a retrieval calling unit. The data storage unit is used to store data information, the storage allocation unit is used to allocate a storage area for data information, and the retrieval calling unit is used to retrieve and obtain stored data.

[0039] Combination Figure 5 The chip management module includes a function control unit, a transmission control unit and an area management unit. The function control unit is used to provide a control interface to operate the function of the edge computing module. The transmission control unit controls the transmission direction of the data in the data cache unit based on the function on / off status. The area management unit is used to control and manage the storage area in the data storage unit.

[0040] The data interface unit includes a high-speed transmission processor, a protocol conversion processor and a data verification processor. The high-speed transmission processor is used to transmit data between the chip and the external device, the protocol conversion processor is used to convert data between different protocols, and the data verification processor is used to verify the received data to ensure the integrity and accuracy of the data.

[0041] The data filtering unit includes a redundancy detection processor, a filtering and deletion processor, and a marking and restoration processor. The redundancy detection processor is used to detect redundant segments in the data, the filtering and deletion processor is used to delete redundant segments in the data, and the marking and restoration processor is used to mark the information of the redundant segments in order to restore the original data.

[0042] The data cache unit includes a high-speed information register, a data write processor and a data read processor. The high-speed information register is used to record received data information, the data write processor is used to write received data in the high-speed information register, and the data read processor is used to read data information in the high-speed information register.

[0043] The computational classification unit includes a classification feature register, a classification identification processor and a directional transmission processor. The classification feature register is used to store feature information of different data types. The classification identification processor performs type identification on the received data based on the feature information. The directional transmission processor transmits the received data to the task execution unit or the storage optimization unit based on the type identification result.

[0044] The types of received data are divided into task data and data to be stored.

[0045] The task execution unit includes a task analysis processor, an execution calculation processor and a data feedback processor. The task analysis processor is used to analyze and process the task data. The execution calculation processor performs calculation processing on the data based on the analysis results. The data feedback processor stores the calculation results in the data storage module or feeds them back to the external device based on the task requirements.

[0046] The storage optimization unit includes a data compression processor, a state acquisition processor and an area calculation processor. The data compression processor is used to compress the received data to be stored, the state acquisition processor is used to obtain the storage state of each storage area, and the area calculation processor is used to select a storage area suitable for the data to be stored through calculation.

[0047] The process of selecting a storage area by the area calculation processor comprises the following steps: S1. Extract label information from the data to be stored.

[0048] S2. Obtain the call information of each tag information in the data storage module.

[0049] S3. Calculate the call index P of the data to be stored according to the following formula: .

[0050] Among them, m(i) represents the number of data containing the i-th label, c(i) represents the number of times the data containing the i-th label is called, and n is the number of labels contained in the data to be stored.

[0051] It should be noted that the labels are sorted from large to small according to the number of data containing the labels, that is, m(i)>=m(i+1).

[0052] S4. Calculate the call index of the data stored in each storage area, and obtain the call index P(i) of each storage area after mean processing.

[0053] S5. Use the storage area that is closest to the call index of the data to be stored as the target area.

[0054] S6. Determine whether the remaining space of the target area is larger than the size of the data to be stored. If so, send the target area and the data to be stored to the data storage module. If not, proceed to step S7.

[0055] S7. Use the storage area at the lower level as the new target area and return to step S6.

[0056] The data storage unit includes a data information register and a regional hierarchical processor. The data information register is used to actually store data, and the regional hierarchical processor is used to divide the data information register into regions of multiple levels.

[0057] The storage allocation unit includes a region monitoring processor and a region writing processor. The region monitoring processor is used to monitor the storage status of each layer of storage area, and the region writing processor is used to write the data to be stored into the target area.

[0058] The retrieval calling unit includes a data retrieval processor and a call statistics processor. The data retrieval processor is used to retrieve content from the data storage unit, and the call statistics processor is used to call the retrieved data and perform statistics.

[0059] It should be noted that the higher the regional level, the higher the retrieval priority and the faster the call speed.

[0060] The function control unit includes an interface display processor and a setting reading processor. The interface display processor is used to output the interface code to an external device and display the setting interface. The setting reading processor is used to read the function parameters in the setting interface.

[0061] The transmission control unit includes a parameter change detection processor and a channel disabling processor. The parameter change detection processor is used to detect the change status of the functional parameters, and the channel disabling processor disables the corresponding data transmission channel based on the functional parameters.

[0062] The area management unit includes a setting interaction processor and a data migration processor. The setting interaction processor is used to set the hierarchical information of the storage area. The data migration processor migrates the storage data between different storage areas according to the calling state of the storage data.

[0063] The data migration processor calculates the actual call value Q of the stored data according to the following formula: .

[0064] Among them, a is the protection value, m c is the actual number of calls to the stored data, t is the storage time of the stored data, and t0 is the starting time.

[0065] The data migration processor compares the actual call values ​​of the storage data in two adjacent hierarchical storage areas. When the actual call value of the storage data in the lower-level storage area is greater than the actual call value of the storage data in the higher-level storage area, the two storage data are migrated to each other's storage area. If there is insufficient space in the storage area after the migration, only one of the storage data is migrated.

[0066] The i appearing in the above text is an ordinal number used to indicate a sequence number and has no actual meaning.

[0067] Some of the codes in this chip system are described as follows: # Data collection module class DataAcquisitionModule: def __init__(self): self.data_interface_unit = DataInterfaceUnit() self.data_filtering_unit = DataFilteringUnit() self.data_cache_unit = DataCacheUnit() def receive_data(self, external_data): # Process of receiving data data = self.data_interface_unit.connect_and_receive(external_data) filtered_data = self.data_filtering_unit.filter(data) self.data_cache_unit.cache_data(filtered_data) return filtered_data class DataInterfaceUnit: def connect_and_receive(self, external_data): # Simulate data reception print("Receive external data:", external_data) return external_data # Edge computing module class EdgeComputingModule: def __init__(self): self.computation_classification_unit =ComputationClassificationUnit() self.task_execution_unit = TaskExecutionUnit() self.storage_optimization_unit = StorageOptimizationUnit() class ComputationClassificationUnit: def classify(self, data): # Categorize data print("Classification data...") # Assume the classification result return {"classified_data": data} class TaskExecutionUnit: def execute(self, data): # Execute task processing print("Executing task processing...") # Assume the processed data return {"processed_data": data} class StorageOptimizationUnit: def optimize(self, data): # Optimize storage data print("Optimize storage data...") # Assume optimized data return {"optimized_data": data} # Data storage module class DataStorageUnit: def save_data(self, data): # Storing data print("Save data:", data) class StorageAllocationUnit: def allocate(self, data): # Allocate storage area print("Allocate storage area...") return {"allocated_data": data} class RetrievalCallUnit: def retrieve(self, query): # Retrieve data print("Retrieve data, query conditions:", query) return {"retrieved_data": query} # Chip Management Module class ChipManagementModule: def __init__(self): self.function_control_unit = FunctionControlUnit() self.transmission_control_unit = TransmissionControlUnit() self.area_management_unit = AreaManagementUnit() class AreaManagementUnit: def manage_area(self, storage_area): # Manage storage areas print("Manage storage area:", storage_area).

Claims

1. An intelligent storage chip integrated with an edge computing data processing system, characterized in that: It includes data acquisition module, edge computing module, data storage module and chip management module; The data acquisition module is used to receive external input information data, the edge computing module is used to perform computing and analysis on the data, the data storage module is used to save the processed data, and the chip management module is used to control and manage the computing and storage functions of the chip; The data acquisition module includes a data interface unit, a data filtering unit and a data cache unit, wherein the data interface unit is used to connect to an external device and directly receive external data, the data filtering unit is used to filter out redundant information in the received data, and the data cache unit is used to temporarily store the filtered data; The edge computing module includes a computing classification unit, a task execution unit and a storage optimization unit, wherein the computing classification unit is used to identify and classify the data in the data cache unit, the task execution unit is used to process the task data, and the storage optimization unit is used to process the data to be stored; The data storage module includes a data storage unit, a storage allocation unit and a retrieval calling unit, wherein the data storage unit is used to store data information, the storage allocation unit is used to allocate a storage area for data information, and the retrieval calling unit is used to retrieve and obtain stored data; The chip management module includes a function control unit, a transmission control unit and an area management unit. The function control unit is used to provide a control interface to operate the function on and off of the edge computing module. The transmission control unit controls the transmission direction of data in the data cache unit based on the function on and off status. The area management unit is used to control and manage the storage area in the data storage unit.

2. The intelligent storage chip integrated with the edge computing data processing system according to claim 1, characterized in that: The storage optimization unit includes a data compression processor, a state acquisition processor and an area calculation processor. The data compression processor is used to compress the received data to be stored, the state acquisition processor is used to obtain the storage state of each storage area, and the area calculation processor is used to select a storage area suitable for the data to be stored through calculation.

3. The intelligent storage chip integrated with the edge computing data processing system according to claim 2, characterized in that: The process of selecting a storage area by the area calculation processor comprises the following steps: S1. Extract label information from the data to be stored; S2, obtaining the call information of each tag information in the data storage module; S3. Calculate the call index P of the data to be stored according to the following formula: ； Where m(i) represents the number of data containing the i-th label, c(i) represents the number of times the data containing the i-th label is called, and n is the number of labels contained in the data to be stored; S4, calculating the call index of the data stored in each storage area, and obtaining the call index P(i) of each storage area after mean processing; S5, taking the storage area closest to the call index of the data to be stored as the target area; S6, determine whether the remaining space of the target area is larger than the size of the data to be stored, if so, send the target area and the data to be stored to the data storage module, if not, proceed to step S7; S7. Use the storage area at the lower level as the new target area and return to step S6.

4. The intelligent storage chip integrated with the edge computing data processing system according to claim 3, characterized in that: The area management unit includes a setting interaction processor and a data migration processor. The setting interaction processor is used to set the hierarchical information of the storage area. The data migration processor migrates the storage data between different storage areas according to the calling state of the storage data.

5. The intelligent storage chip integrated with the edge computing data processing system according to claim 4, characterized in that: The data migration processor calculates the actual call value Q of the stored data according to the following formula: ； Among them, a is the protection value, m c is the actual number of calls to the stored data, t is the storage time of the stored data, and t0 is the starting time; The data migration processor compares the actual call values ​​of the storage data in two adjacent hierarchical storage areas. When the actual call value of the storage data in the lower-level storage area is greater than the actual call value of the storage data in the higher-level storage area, the two storage data are migrated to each other's storage area. If there is insufficient space in the storage area after the migration, only one of the storage data is migrated.

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