Computing storage device and networking-based system

Abstract

The invention relates to a computing storage device and a networking-based system. Methods, systems, and devices related to computing storage devices are described. For example, an accelerator-accessible storage device may be shared between a host and the accelerator and may be accessed by either of the host and the accelerator. A computing storage system may include a storage device that provides a portion of a shared file system that is logically accessible by a host and by an accelerator of the computing storage system. Host interface logic may be configured to receive a storage command from the host to store data on the storage device when creating the data. The host interface logic may be further configured to receive a storage command from the host to cause the accelerator logic to perform a compute task using the stored data on the storage device. The accelerator logic may perform the compute task using the stored data on the storage device.

Description

[0001] Information about divisional applications

[0002] This case is a divisional application of the invention patent application with application date of March 27, 2020, application number 202080024826.5, and invention name "Computing storage device and network-based system".

[0003] CROSS REFERENCE TO RELATED APPLICATIONS

[0004] This application claims the benefit of an earlier filing date under 35 U.S.C. §119 to U.S. Provisional Application Serial No. 62 / 826,591, filed on March 29, 2019, the entire contents of which are hereby incorporated by reference in their entirety for any purpose. Technical Field

[0005] Examples described herein generally relate to computing storage devices and systems. Background Art

[0006] Heterogeneous computing units (often referred to as accelerators) typically have different architectures and instruction sets than general CPUs. Some accelerators may have floating-point computing cores that work in parallel, and some accelerators may have customized computing logic to accelerate certain applications. To incorporate an accelerator into an application, a programmer may profile the application and identify compute-intensive tasks, then divide the application into host code and accelerator code. During execution, the host application transmits input data to the accelerator, and the accelerator is programmed to perform operations on the input data and then write the results back to the host. Summary of the invention

[0007] Example apparatus are described herein. Some examples of apparatus include a host interface and logic configured to connect with a host via the host interface and to perform computing tasks communicated from the host. A storage controller coupled to the logic is configured to communicate with a storage device including non-volatile memory, wherein the storage device forms part of a shared file system between the logic and the host, and wherein data residing on the storage device is accessible by the logic for the computing tasks communicated from the host device.

[0008] In some examples, the data may be created in response to a command from the host, and the data may be stored on the storage device when the data is created.

[0009] In some examples, the shared file system may be further shared by one or more additional hosts.

[0010] In some examples, the logic may include an application specific integrated circuit (ASIC).

[0011] In some examples, the logic may include a field programmable gate array (FPGA), wherein the logic may be configured to receive instructions from the host to configure the logic to perform the computing tasks.

[0012] Some examples may further include a memory controller coupled to the host interface and the logic.

[0013] In some examples, the memory controller may be configured to receive additional data from the host and communicate the additional data to the logic.

[0014] In some examples, the logic may be further configured to write a result of the computing task to the storage device.

[0015] Some examples may further include a second storage device configured to provide a second portion of the shared file system accessible by the host and by the logic.

[0016] Examples of methods are described herein. Some example methods include receiving a computing task from a host at logic coupled to a storage controller, wherein the storage controller is configured to communicate with a storage device including a non-volatile memory, accessing data residing on the storage device, wherein the storage device forms part of a shared file system between the host and the logic, and performing the computing task using the data while accessing the data via the storage controller.

[0017] In some examples, a second storage device may form a second portion of the shared file system, and performing the computing task further includes using second data residing on the second storage device.

[0018] In some examples, the storage controller may be coupled to host interface logic to provide the host access to the storage device.

[0019] Some example methods may further include writing data generated as a result of the computing task to the storage device.

[0020] In some examples, the computing task received from the host may include instructions for customizing the logic for performing the computing task.

[0021] Examples of systems are described herein. Some example systems may include: a storage device including non-volatile memory, wherein the storage device is configured to provide a portion of a shared file system accessible by a host and by logic coupled to a storage controller configured to communicate with the storage device; a host interface coupled to the logic, wherein the host interface is configured to receive a storage command from the host to store the data on the storage device when the data is created, wherein the host interface is further configured to receive a task from the host to cause the logic to perform a computing task using the stored data on the storage device, wherein the logic is configured to perform the computing task using the stored data on the storage device.

[0022] In some examples, the logic may be further configured to write a result of the computing task to the storage device.

[0023] In some examples, the logic may be further configured to receive instructions from the host to configure the logic to perform the computing task.

[0024] Some example systems may further include a second storage device configured to provide a second portion of the shared file system accessible by the host and by the logic.

[0025] In some examples, the computing task may further use second data residing on the second storage device, and the logic is further configured to perform the computing task using the stored data on the storage device and the second data on the second storage device. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 is a schematic diagram of an environment 100 according to examples described herein.

[0027] Figure 2 is a schematic diagram of an acceleration architecture 200 according to examples described herein.

[0028] Figure 3 is a schematic diagram of a computing storage system 300 according to examples described herein.

[0029] Figure 4 A method 400 according to examples described herein is illustrated.

[0030] Figure 5 A method 500 according to examples described herein is illustrated.

[0031] Figure 6 A data packet 600 is illustrated according to examples described herein. DETAILED DESCRIPTION

[0032] As data analysis becomes more complex, including machine learning, artificial intelligence, and large data sets in general, computational speeds can be increased by using accelerators. An accelerator generally refers to hardware (e.g., circuitry) provided to perform a specified computing task. For example, an accelerator may include one or more field programmable gate arrays (FPGAs) and / or application specific circuits (ASICs) that can be designed to perform specific computations. Computationally intensive tasks can be offloaded from the host CPU and performed by the accelerator, so that the host CPU is free to continue to perform other tasks. However, offloading a computing task to an accelerator typically includes sending data used in the computing task (e.g., data analyzed by the task) from the host CPU to a temporary memory (e.g., a DRAM buffer) that can be accessed by the accelerator. The time and energy used to retrieve data from the host CPU and send the data to the accelerator memory has a significant impact on the time and energy savings achieved by using an accelerator instead of utilizing the host CPU to complete complex computing tasks.

[0033] The examples of computing storage systems described herein generally provide storage devices accessible by accelerators, which form part of a shared file system shared between a host and an accelerator. Because both the host and the accelerator can access data on the storage device, the host can store the data on the storage device when the data first enters the system (for example, by collecting or downloading from an external source, or by being generated by the host). To perform tasks using data on the storage device, the host can send one or more commands (for example, a series of API calls) to the accelerator to access the data on the storage device and perform computing tasks identified by the host. Because the data is part of a shared file system, the host can send a pointer to the data instead of sending the data itself through an interface between the host and the accelerator, thereby saving time and resources. The interface between the logic in the accelerator used to perform the task and the storage device may be different from the interface between the host and the accelerator, and in some instances may be faster than the interface between the host and the accelerator. In this way, accessing data using the interface between the accelerator logic and the storage device may be more desirable than receiving data for use by the accelerator logic through the host interface.

[0034] Figure 1 An example use of the computing storage system 100 is described. Figure 1, host 106 and server 102 are connected via network 104. Server 102 includes a computing storage system 300. For example, computing storage system 300 may be discrete hardware located in a rack of server 102, such that accelerator logic of computing storage system 300 and storage devices of computing storage system 300 may be physically connected. In other embodiments, components of computing storage system 300 may be located in separate portions of server 102, or at additional servers accessible via network 104. Figure 1 The components shown in the embodiment are exemplary only. Additional, fewer and / or different components may be used in other examples.

[0035] In various embodiments, the network 104 may be implemented using the Internet, a local area network (LAN), a wide area network (WAN), and / or other networks. In addition to traditional data networking protocols, in some embodiments, data may be communicated according to protocols and / or standards including near field communication (NFC), Bluetooth, cellular networks, and the like. In addition, the network 104 may include Figure 1 104. For example, host 106 may be connected to server 102 and computing storage system 300 via a WAN connection, to third-party storage device 110 via the Internet, and to data collection device 108 via a cellular network. Host 106, server 102, and other components may be connected to network 104 via physical connections, such as a Peripheral Component Interconnect Express (PCIe) interface.

[0036] The examples described herein may include and / or may be used with a host, such as host 106. Host 106 may be implemented using any number of computing devices, including, but not limited to, a computer, a laptop, a tablet, a mobile phone, a smart phone, a smart speaker, a vehicle (e.g., a car), or an appliance. In general, host 106 may include one or more processors, such as a central processing unit (CPU) and / or a graphics processing unit (GPU). Host 106 may generally perform operations by executing executable instructions (e.g., software) using a processor. As described herein, in some examples, host 106 may communicate with one or more servers and / or computing storage systems to obtain acceleration of certain computing tasks.

[0037] Examples described herein may include data collection devices, such as Figure 1 108. Although a single data collection device 108 is depicted, any number may be included in the systems described herein. Any number of devices may be used to implement the data collection device 108—including drones, smartphones, smart speakers, computers, sensors, video cameras, cameras, microphones, etc.

[0038] Examples described herein may include storage devices such as Figure 1 The third party storage device 110 may be, for example, a database, server, or other data repository accessible via the Internet or other network 104. The third party storage device 110 may include more than one physical device, and in some embodiments may include storage components and devices belonging to more than one different third party.

[0039] Examples herein may include or be utilized with a server, such as Figure 1 The server 102 includes a computing storage system, such as Figure 1 The computing storage system 300 of the present invention is a computer storage system 300. The computing storage system 300 broadly includes accelerator logic configured to perform computing tasks and storage. The storage device of the computing storage system 300 may be a non-volatile memory, and the storage system may include other volatile or non-volatile memory, which is configured to store various embodiments of computer readable data and instructions for implementing the processes described herein. The accelerator logic may include configurable logic (e.g., one or more FPGAs), or may be computer executable instructions stored on volatile or non-volatile memory within the computing storage system 300.

[0040] use Figure 1 In the system shown in FIG. 1 , the host 106 can initiate the collection of data by the data collection device 108 and direct the analysis of the collected data using the computing storage system 300. The host 106 can also access data for analysis from the third-party storage device 110 and direct the analysis of the data using the computing storage system 300.

[0041] exist Figure 1 In one example shown in FIG. 1 , host computer 106 directs the collection of data by data collection device 108 and the analysis of the collected data using computing storage system 300. Data collection device 108 is shown as an unmanned aerial vehicle (UAV) that collects image data, but other data collection devices may be directed by host computer 106, including, for example, satellites, other manned or unmanned aircraft, weather stations, medical sensors, medical imaging devices, genome sequencers, radio telescopes, or the like. In the example described herein, data collection device 108 captures aerial image data over a land area for use by host computer 106 in maximum likelihood classification (MLC) to determine land cover characteristics of the land area contained in the image data captured by data collection device 108.

[0042] The host 106 may direct the data collection device 108 to collect data by providing inputs such as, for example, coordinates of land cover, altitude, image resolution, etc. In other embodiments, the data collection device 108 may initiate data collection and communicate the collected data to the host 106. Once the data is collected by the data collection device 108, the host 106 may direct the data collection device 108 to store the data on the computing storage system 300 at the server 102. Since the storage devices of the computing storage system 300 can be directly addressed by the host 106, the host 106 can provide the data collection device 108 with a specific location within a shared file system to store data. For example, a shared file system may be a file system that includes data on the host's memory, data located on the storage devices of the computing storage system 300, and data stored in other physical locations in some embodiments. The data stored within the shared file system can be addressed by both the host and the accelerator logic of the computing storage system 300.

[0043] To run a computing task (e.g., MLC) using the data collected by the data collection device 108, the host 106 may send a series of commands (e.g., API calls) to the accelerator logic of the computing storage system 300 to perform MLC on the image data. For example, the host 106 may initialize the accelerator logic, pass parameters to the accelerator logic, and initiate a task at the accelerator logic. The parameters passed by the host 106 to the accelerator logic typically include a pointer to the data on the computing storage system 300 and the size of the data. In some embodiments, where the accelerator logic is reconfigurable, such as a field programmable gate array (FPGA), the host 106 may send configuration information to the accelerator logic. In other embodiments, where the accelerator logic is an application specific integrated circuit (ASIC), the host 106 may send compilation instructions for the task to the accelerator logic. When the host 106 sends an API call to the computing storage system 300 to initiate a task at the accelerator logic, the accelerator logic performs MLC for the image data by accessing data from a storage device on the computing storage system 300.

[0044] Once the accelerator logic has performed a task requested by the host 106, the results of the task may be stored on the computing storage system 300, transmitted back to the host 106, displayed on a display of the host 106, sent to a different storage location, or any combination of the previous options, as directed by the host 106.

[0045] The computing storage system 300 may similarly be used to analyze data originally stored on the third party storage device 110. For example, the host 106 may access a shared data repository of image data collected by various research entities or other parties, stored on the third party storage device 110 and accessible via the Internet or other network 104. To download the data on the third party storage device 110, the host 106 may initiate a download request that includes a download location within the shared file system of the computing storage system 300. For data collected by the data collection device 108, the downloaded data may be analyzed in the same manner as described above.

[0046] In some embodiments, more than one host 106 may be connected to the server 102 and share the computing storage system 300. In addition, the server 102 may include more than one computing storage system 300, and the storage components of multiple computing storage systems may together form a shared file system that can be accessed by multiple hosts performing analysis on the shared data. For example, the acceleration system may include one or more computing storage systems and other heterogeneous computing systems for use by hosts communicating with the server 102.

[0047] Host 106, data collection device 108, third party storage device 110 and other computing devices may use data packets (e.g. Figure 6 600) communicates with the computing storage system 300. The packet 600 includes routing information 602, a packet type 604, configuration information 606, and a payload 608. Depending on the type of packet, the packet may include additional or different information. The packet 600 is generally an example packet for communication between the host 106 or data collection device 108 and the computing storage system 300.

[0048] Routing information 602 identifies a computing storage device and may further include a source identifier or network flow control. In an exemplary embodiment, routing information 602 is an IP address including a specified port. Packet type 602 identifies the type or purpose of packet 600. For example, packet 600 may be a pure data packet, a control or command packet, or a configuration packet. In general, control and command packets do not include configuration 606 or payload 608.

[0049] The configuration packet includes a configuration 606, which may be, for example, information that configures the logic of the computing storage system 300 to perform a task. In the case where the logic of the computing storage system 300 includes an FPGA, the configuration 606 may be a bitstream. In the case where the logic of the computing storage system 300 includes an ASIC, the configuration 606 may be a compiled instruction. Pure data packets typically include a payload 608. The payload 608 is typically the data conveyed by the packet 600. Some packets 600 may be a combination of configuration packets and storage packets that include both a configuration 606 and a payload 608. In some implementations, the configuration 606 and the payload 608 may be pointers that point the computing storage system 300 to an external location (e.g., a third-party storage device 110), so that the computing storage system 300 can retrieve its configuration or payload data from the external location.

[0050] Figure 2 is a schematic diagram of an acceleration architecture 200 arranged according to examples described herein. Figure 2 A host 106 in communication with an acceleration system 202 is included. The host 106 includes a host CPU 204 coupled to a peripheral interface 240, a host memory 206, and a host storage device 208. The peripheral interface is coupled to a switch 210 of the acceleration system 202. The acceleration system 202 includes a heterogeneous computing system 212 coupled to the peripheral interface 242, a computing storage system 300, and a computing storage system 214. The heterogeneous computing system 212 includes a memory 218 coupled to a processor 216. The computing storage system 300 includes a storage device 224 coupled to a processor 220. The computing storage system 214 includes a storage device 226 coupled to the processor 222. Figure 2 The elements shown in the drawings are merely exemplary. Additional, different and / or fewer components may be used in other embodiments.

[0051] although Figure 2 The host 106 uses Figure 1 The same reference numerals are used to illustrate the host 106, but it should be understood that in some instances, Figure 1 The host 106 can be different from Figure 2 Similarly, although the use of Figure 1 The same reference numerals as those used to illustrate the computing storage system 300 are used to illustrate the computing storage system 300. Figure 2 300, but in some instances it should be understood that Figure 1 The computing storage system 300 may be different from Figure 2 The embodiments may be implemented by variations of the variations specifically shown in FIG.

[0052] Examples herein may include and / or be utilized with a host, such as host 106. Host 106 may be implemented using any number of computing devices, including, but not limited to, a computer, a laptop, a tablet, a mobile phone, a smart phone, a smart speaker, a vehicle (e.g., a car), or an appliance. In general, host 106 may include one or more processors, such as CPU 204 and / or a graphics processing unit (GPU). Host 106 may generally perform operations by executing executable instructions (e.g., software) using a processor. As described herein, in some examples, host 106 may communicate with one or more servers and / or computing storage systems to obtain acceleration of certain computing tasks.

[0053] The examples herein may include and / or be utilized with an acceleration system, such as acceleration system 202. Acceleration system 202 may be a single piece of hardware such that heterogeneous computing system 212, computing storage system 300, and computing storage system 214 are physically coupled, or heterogeneous computing system 212, computing storage system 214, and computing storage system 300 may be communicatively connected (e.g., as separate elements on a server or on separate servers linked via a network).

[0054] Examples of acceleration system 202 herein may include heterogeneous computing system 212, computing storage system 300, and computing storage system 214. In some implementations, heterogeneous computing system 212, computing storage system 214, and computing storage system 300 may have similar or identical hardware components and may function as a computing storage system or a heterogeneous computing system depending on commands received from host 106. For example, computing storage systems 300 and 212 may include memory similar to memory 218.

[0055] The example computing storage systems 300 and 212 and example heterogeneous computing systems described herein may include or utilize processors (e.g., Figure 2 Processors 216, 220, and 222 may be implemented as processing logic for performing computing tasks. For example, processors 216, 220, and 222 may be implemented by configurable logic, such as one or more FPGAs, or may be implemented as computer-readable instructions stored on volatile or non-volatile memory.

[0056] The example computing storage systems 300 and 212 may include or utilize storage devices, such as storage device 224 and storage device 226. Storage devices 224 and 226 may be non-volatile storage components, including but not limited to SSDs, NVMe SSDs, persistent memory, mechanical drives, and other types of non-volatile memory or non-volatile storage devices.

[0057] The host 106 is connected to the peripheral interface 240 and uses the peripheral interface 240 to send data and commands to the acceleration system 202. The peripheral interface 240 is communicatively connected (e.g., physically or wirelessly connected) to the switch 210 of the acceleration system 202, and the switch 210 switches data received from the peripheral interface 240 to the peripheral interface 242 of the acceleration system 202. The heterogeneous computing system 212, the computing storage system 214, and the computing storage system 300 are connected to the peripheral interface 242 to receive commands and data from the host 106. In some embodiments, the peripheral interface 240 and the peripheral interface 242 are PCIe interfaces, but other types of interfaces are considered.

[0058] Figure 2 The acceleration architecture 200 shown in FIG. 2 can support the analysis of data in several ways. The host CPU 204 can perform computing tasks for data stored on the host storage device 208. The processor 216 of the heterogeneous computing system 212 can also be used to perform computing tasks for data stored on the host storage device 208 by sending data to the heterogeneous computing system 212. The processor 220 of the computing storage system 300 can be used by the host storage device 208 to perform tasks for data stored on the storage device 224 of the computing storage system 300 or the storage device 226 of the computing storage system 214.

[0059] To analyze data stored on host storage device 208, the data is moved from host storage device 208 along path 228 to host memory 206 and from host memory 206 to host CPU 204 along path 230. Resulting data may be moved from host CPU 204 to host memory 206 along path 230 and from host memory 206 to host storage device 208 along path 228. Using host CPU 204 to analyze data on host storage device 208 eliminates the movement of data between host 106 and acceleration system 202. However, for computationally intensive tasks, the analysis may fully utilize host CPU 204 or may take a long time due to host CPU 204 performing other tasks in parallel.

[0060] The processor 216 of the heterogeneous computing system 212 may also be used to analyze data stored on the host storage device 208. Data is moved from the host storage device 208 to the host memory 206 along a path 228, and then moved from the host memory 206 to the memory 218 of the heterogeneous computing system 212 along a path 232 (typically through the peripheral interface 240, the switch 210, and the peripheral interface 242). Finally, the data is moved from the memory 218 of the heterogeneous computing system 212 to the processor 216 for processing. For some data-intensive tasks, this data movement cycle may occur more than once to execute a single command. For example, data used as input for a computing task may use more storage space than is available on the memory 218 of the heterogeneous computing system 212. Data movement between the host 106 and the heterogeneous computing system 212, especially repeated movement, may slow down the overall computing time for tasks with large amounts of input data.

[0061] As about Figure 1 2, the host 106 can use the storage device 224 of the computing storage system 300 and the storage device 226 of the computing storage system 214 as part of a shared file system when creating or collecting data for later analysis. In an example where data is stored on the storage device 224 of the computing storage system 300, the host 106 can send a series of API calls or other commands to instruct the processor 220 of the computing storage system 300 to execute the command to analyze the data. The data moves from the storage device 224 to the processor 220 along the path 236 so that the processor 220 executes the command. The data is not moved between the acceleration system 202 and the host 106, thereby saving time and data transfer resources.

[0062] In an example where data is stored on storage device 226 of computing storage system 214, host 106 may instruct processor 220 of computing storage system 300 to perform a task to analyze the data. Because both computing storage system 214 and computing storage system 300 are connected to peripheral interface 242, data from storage device 226 may be transferred from storage device 226 to processor 220 along path 238, thereby bypassing host 106 and minimizing data transfer. This may be particularly useful in instructing processor 220 to perform a computing task using more than one subset of data, some of which is stored on storage device 224 and some of which is stored on storage device 226.

[0063] For all embodiments, the resulting data may be transferred to the storage device using the same or different path as the input data. For example, the processor 216 of the heterogeneous computing system 212 may perform a computational task using the input data from the host storage device 208. If the user wishes to later use the heterogeneous computing system 212 as a computational storage system to run additional analysis on the resulting data, the resulting data may be stored on the storage device of the heterogeneous computing system 212 ( Figure 2 Alternatively, the result data may be stored on the storage device 224 of the computing storage system 300, the storage device 226 of the computing storage system 214, or transmitted back to the host 106 along the path 232 for storage at the host storage device 208. Similarly, the result data from the processor 220, the processor 222, or the host CPU 204 may be transmitted for storage on any storage component within the acceleration system 202.

[0064] Figure 3 The computing storage system 300 is described. Figure 1 and Figure 2 As described, the computing storage system 300 may be implemented individually in a server (e.g., server 102), as a distributed component, or as part of an acceleration system (e.g., acceleration system 202). Although the computing storage system 300 is shown to include a storage device 314, in some embodiments, the computing storage system 300 may include multiple storage components that form a shared file system between one or more hosts (e.g., host 106) and the accelerator logic 308 of the computing storage system 300. The computing storage system 300 may be implemented as a single piece of hardware (e.g., having all components on a single board), or may be implemented in which the storage device 314 is connected to other components of the computing storage system 300 through a storage peripheral interface 316 that is physically or wirelessly connected to the computing storage system 300.

[0065] Although using Figure 1 and 2 The same reference numerals as those used to illustrate the computing storage system 300 are used to illustrate the computing storage system 300. Figure 3 300, but in some instances it should be understood that Figure 1 and 2 The computing storage system 300 may be different from Figure 3 The embodiments may be implemented by variations of the variations specifically shown in FIG.

[0066] Examples herein may include and / or be utilized with host interface logic, such as Figure 3The host interface logic 302 of the computing storage system 300 is shown in FIG. 304. The host interface logic 302 can be implemented in various ways to provide direct memory access (DMA) capabilities to the host 106. For example, the host interface logic 302 can be implemented as a stream-based scatter-gather DMA engine. The host interface logic 302 can also be implemented as a network interface, thereby enabling the computing storage system 300 to be directly connected to the network. The host interface logic 302 can also be embedded in the accelerator logic 308 as a general logic of the computing storage system 300.

[0067] Examples herein may include and / or be utilized with accelerator logic, such as Figure 3 The accelerator logic 308 may be implemented as reconfigurable logic, such as an FPGA, which may be reconfigured by commands from a host (e.g., host 106) before executing a computing task. Reconfiguration allows the accelerator logic 308 to be used for various computing tasks by reconfiguring before the task is executed. In other embodiments, the accelerator logic 308 may be static logic configured to repeatedly perform a specific computing task.

[0068] Examples herein may include and / or be utilized with a memory controller, such as Figure 3 The memory controller 306 may be a double data rate (DDR) memory controller that provides access to DDR memory for the accelerator logic 308 and the host via the host interface logic 302.

[0069] Examples herein may include and / or be utilized with a storage device, such as Figure 3 The storage device 314 is composed of a storage controller (e.g. Figure 3 The computing storage system 300 is managed by a storage controller 304 of the accelerator logic 308. The storage controller 304 receives read and write operations and directs the read and write operations to the storage device 314. In one embodiment, the storage controller 304 is a non-volatile memory express (NVMe) controller, the storage peripheral interface 316 is a PCIe interface, and the storage device 314 is an NVMe SSD. In other embodiments, the storage device 314 may be another type of non-volatile memory. In some embodiments, the computing storage system 300 may include additional storage controllers and storage components that can be accessed by both the accelerator logic 308 and the host 106.

[0070] Commands (e.g., commands from the host 106) enter the computing storage system 300 through the peripheral interface 242. Commands from the host 106 (and any other host using the computing storage system 300) are typically formatted to access one or more of the storage controller 304, the accelerator logic 308, or the memory controller 306. For example, commands may be formatted from the host 106 as a stream that includes a dedicated stream ID and memory mapping of a specific resource in addition to the normal stream parameters. For example, a stream from the host 106 to store data on the storage device 314 will include a header within the stream that identifies the storage controller 304. For example, the AXI memory mapping protocol may be used to identify the storage controller 304.

[0071] The host interface logic 302 receives communications from the peripheral interface 242 and directs the communications to one or more of the storage controller 304, the accelerator logic 308, or the memory controller 306 by parsing the resource address embedded in the stream received from the host 106. The host interface logic 302 provides DMA capabilities to the host 106, allowing the host 106 to access the storage controller 304 (and accordingly access the storage device 314) by directing communications such as commands or data from the host interface logic 302 to the storage controller 304. The host interface logic 302 can be implemented in various ways to provide DMA capabilities to the host 106. In one embodiment, the host interface logic 302 is implemented as a stream-based scatter-gather DMA engine, allowing multiple streams to access the storage controller 304, the accelerator logic 308, and the memory controller 306 simultaneously. Based on the received stream, the host interface logic 302 directs the stream received from the host to the memory controller 306 via the host memory path 322 , to the accelerator logic 308 via the host accelerator path 320 , or to the storage controller 304 via the host storage path 318 .

[0072] The accelerator logic 308 may be coupled to the memory controller 306 via an accelerator memory path 326 and to the storage controller 304 via an accelerator memory path 324. Both the accelerator memory path 324 and the accelerator memory path 326 may be memory mapped interfaces (e.g., AXI memory mapped interfaces) to allow the accelerator logic 308 to directly access the storage device 314 and the DDR memory accessible via the memory controller 306. Because the accelerator logic 308 includes connections to both the memory controller 306 and the storage controller 304, the accelerator logic 308 may be used to analyze data stored on the storage device 314 (CSS mode) or data sent from the host and temporarily stored on the DDR memory accessible by the memory controller 306.

[0073] In an example, the computing storage system 300 receives data from a host (e.g., Figure 2The host 106) receives communications to use the computing storage system 300 to store and analyze data.

[0074] As described above, the host 106 may access the storage device 314 as part of a shared file system with the accelerator logic 308. The shared file system may support basic file operations such as Open(), Close(), Write(), and Read() through commands from the host 106 and the accelerator logic 308.

[0075] The host 106 may access the storage controller 304 to store data or to access data previously stored on the storage device 314. The host 106 may also use the storage controller 304 to access the shared file system to direct the storage of data (e.g., data retrieved from an external data source or collected using a data collection device) on the storage device 314. The host 106 typically sends a stream identifying the storage controller 304 to the host interface logic 302. The stream typically contains additional information, such as data for transfer to the storage device 314 or a pointer to a new file in the shared file system of the storage device 314. When the stream is received, the host interface logic 302 locates the storage controller 304 identification in the stream and transmits the stream to the storage controller 304. In one example, a new file is created within the shared file system on the storage device 314 so that the host 106 can direct the storage of data collected by the data collection device to the newly created file.

[0076] The host may further use the accelerator logic 308 to analyze the data stored on the storage device 314, wherein the analysis is initiated by the host 106. The host may send a request to the host interface logic 302, the request formatted as a stream with a pointer to the data on the storage device 314. The request may include an additional stream including reconfiguration information to reconfigure the accelerator logic 308 to perform the computing task requested by the host. The stream containing the reconfiguration information and identifying the data used as input for the computing task may include an identifier identifying the accelerator logic 308. The host interface logic 302 receives the communication 406, parses the identifier, and sends the stream to the accelerator logic. In some embodiments, the host interface logic 302 may simultaneously send other streams from the host 106 to, for example, the memory controller 306.

[0077] In the case where the request includes reconfiguration information for the accelerator logic 308, the accelerator logic 308 is reconfigured to perform the computing task. The accelerator logic 308 may send some information for task execution, including the reconfiguration information, to the memory controller 306 for temporary storage and access by the accelerator logic 308. The accelerator logic 308 sends a portion of the stream including a pointer to the data on the storage device 314 to the memory controller 304. The memory controller 304 retrieves the requested data and transmits the data back to the accelerator logic 308. After the accelerator logic 308 is reconfigured and when the accelerator logic 308 is accessing information about the computing task via the memory controller 306, the accelerator logic 308 may retrieve the requested data so that the accelerator logic 308 performs the computing task when the data is received.

[0078] After the computing task is performed by the accelerator logic 308, in some embodiments, the accelerator logic 308 may store the result on the shared file system by sending the result to the storage controller 304. The result of the computing task may be simultaneously transmitted back to the host 106 for display or storage on the host 106. In other embodiments, the result of the task may be directly transmitted back to the host 106 without communicating the result to the storage controller 304. Alternatively, the result may be stored on the storage device 314 by communicating with the storage controller 304 without transmitting the result back to the host 106. The result may also be stored on another storage component within or external to the computing storage system 300, or transmitted back to another host that can access the computing storage system 300.

[0079] Figure 4 The method according to the example described herein is described. Routine 400 is typically performed by accelerator logic (e.g., accelerator logic 308) that forms part of a computing storage system (e.g., computing storage system 300). In box 402, routine 400 accesses data residing on a storage device via an accelerator storage path that provides an interface between the accelerator and the storage controller that manages the storage device. In box 404, while accessing data via the accelerator storage path, routine 400 performs a computing task using the data. Box 402 and box 504 may occur in parallel. In box 406, routine 400 returns data generated as a result of the computing task to the storage device. In some embodiments, additional boxes may be added to routine 400.

[0080] In some embodiments, the accelerator logic is reconfigurable so that the computational storage system can be used to perform a number of different computational tasks. For example, the reconfigurable accelerator logic can be an FPGA. In these embodiments, the host can send configuration data to the accelerator logic to customize the accelerator logic for a specific computational task.

[0081] Box 402 accesses data residing on the storage device via an accelerator storage path that provides an interface between the accelerator and the storage controller that manages the storage device. The storage device forms part of a shared file system shared between the accelerator logic and a host (e.g., host 106) connected to the computing storage system. Therefore, box 402 can be executed in response to a command received by the accelerator logic from the host to perform a computing task using data stored on the storage device. The request from the host typically includes a pointer to the location of the data within the shared file system. The accelerator logic directly accesses the data via the accelerator storage path by providing a pointer to the storage controller. Directly accessing data via the accelerator storage path typically means that the accelerator logic does not move the data to another memory location before starting a computing task that uses the data as input. Instead, the accelerator logic can perform a computing task while accessing the data via the accelerator storage path.

[0082] In some embodiments, the computing storage system may be networked with other similar computing storage systems that may also be accessed by the host. Figure 2 As shown in FIG404 , multiple computing storage systems can be connected via a PCIe interface. Therefore, a shared file system can be implemented using multiple storage components on multiple computing storage systems connected via interfaces, and the accelerator logic can also access data residing on storage components of other computing storage systems via interfaces connected to the computing storage system in addition to the operation of block 402. In addition, in some embodiments, the computing storage system including the accelerator logic that performs the computing task can include several storage components, and the accelerator logic can access data on the additional storage components in parallel or sequentially with the operation of block 402.

[0083] Block 404 performs a computing task using the data while accessing the data via the accelerator storage path. When performing a computing task using the data while accessing the data via the accelerator storage path, the accelerator logic does not transfer the data to another storage location (e.g., storage DRAM storage) before performing the computing task using the data. Thus, the data is moved between the accelerator logic and the storage device (directed by the storage controller), and a copy, download, or similar operation requiring movement of the data may be bypassed.

[0084] Block 406 returns the data generated as a result of the computing task to the storage device. In some embodiments, a location on the storage device (e.g., within a shared file system) is received by the accelerator logic along with the initial computing task from the host. The accelerator logic may also return the generated data to the host for display, storage, or use in further computing tasks performed by the host CPU; to another computing storage system accessible by the host for storage or for performing further computing tasks; to another host that can access the shared file system of the computing storage system; or to other locations within or outside the network shared by the accelerator logic and the host. In some embodiments, the return to the alternative location described above may occur in lieu of returning the generated data to the storage device.

[0085] Figure 5 The method according to the example described herein is described. Routine 500 is typically performed by a host (e.g., host 106) using a computing storage system (e.g., computing storage system 300) to perform a computing intensive task. In box 502, routine 500 identifies external data for later analysis. In box 504, routine 500 initiates storage of data on a storage device of the computing storage system. In box 506, routine 500 generates commands to perform analysis on the data. In box 508, routine 500 transmits the generated commands to the host interface of the computing storage system. In box 510, routine 500 accesses the result data generated from the analysis. In some embodiments, additional blocks can be added to routine 500.

[0086] Block 502 identifies external data for later analysis. External data may be data collected using a data collection device (e.g., data collection device 108) at the direction of a host. External data may additionally be data stored in a third-party storage device (or other storage device outside the immediate network including the host) and accessible by the host via the Internet or other communication network. In some embodiments, the identified data may include both data collected at the data collection device at the direction of the host and data stored in a third-party storage device.

[0087] Frame 504 initiates the storage of data on the storage device of the computing storage system. In some embodiments, the operations of frame 502 and frame 504 may occur in parallel. For example, when guiding the data collection through the data collection device, the host may include instructions to the data collection device to export or otherwise transmit the collected data to the data storage device of the computing storage system. When collecting data from another storage location, the host will guide the download of data to the storage device of the computing storage system. In some embodiments, the host may request that data from more than one location be stored on the storage device. In addition, data may be stored on multiple storage devices that form part of a shared file system on the same or different computing storage systems. The host can access the shared file system and create objects, such as folders or directories within the shared file system for storing data.

[0088] Block 506 generates commands to perform analysis on the data. The commands may be generated as part of a larger program running on the host. Examples of analysis offloaded from the host to the accelerator logic of the computing storage system include, but are not limited to, maximum likelihood classification, natural language processing, machine learning algorithms, and other processor-intensive algorithms. The commands may be generated as a series of API calls to the accelerator logic and may include configuration information for the accelerator logic, an identifier for the storage device, a pointer to the data location within the shared file system, instructions on how to store or export the result data, and other information useful in performing the computing task.

[0089] Block 508 transmits the generated command to the host interface of the computing storage system. The generated command may be transmitted from the host to the host interface of the computing storage system as one or more streams. The transmission may occur over a network (e.g., network 104), a LAN, a WLAN, the Internet, or other network connecting the computing storage system to the host via a PCIe interface. In general, the host interface parses the command to determine which component or components of the computing storage system the command is intended for. Once the command is transmitted to the accelerator logic, the accelerator logic may use routine 400 or a similar process to analyze the data and transmit the results back to the host or other storage device.

[0090] Frame 510 accesses the result data generated from the analysis. In some embodiments, the result data is transmitted back to the host for further use in a program executed by the host or for storage on the host CPU. In other embodiments, the host can access the result data from a storage device or other location via a shared file system.

[0091] It will be appreciated from the foregoing that, although specific embodiments have been described herein for purposes of illustration, various modifications may be made while retaining the scope of the claimed technology. Certain details are set forth herein to provide an understanding of the described embodiments of the technology. However, other examples may be practiced without various of these specific details. In some examples, well-known circuits, control signals, timing protocols, memory devices, and / or software operations are not shown in detail to avoid unnecessarily obscuring the described embodiments. Other embodiments may be utilized, and other changes may be made, without departing from the spirit and scope of the subject matter presented herein.

[0092] The examples described herein may refer to various components as being "coupled," or to signals being "provided to" or "received from" certain components. It should be understood that in some examples, components are directly coupled to one another, while in other examples, the components are coupled with intermediate components disposed therebetween. Similarly, signals may be provided directly to and / or received directly from stated components without intermediary components, but may also be provided to and / or received from certain components through intermediate components.

Claims

1. A computing storage device system, comprising: a storage device configured to store data of the shared file system; as well as An accelerator logic is configured to perform a computing task using the stored data in response to a command received from a host, wherein the shared file system is accessible to the host and the computational storage device system, and wherein the accelerator logic is configured to access the stored data using a pointer received from the host. 2 . The computational storage device system of claim 1 , wherein the accelerator logic is further configured to access the stored data using a data size associated with the pointer. 3 . The computational storage device system of claim 1 , wherein the accelerator logic is configured to perform the computational task based at least in part on configuration information or compiled instructions received from the host.

4. The computational storage system of claim 1, wherein the shared file system is accessible by at least one other host.

5. The computational storage device system of claim 1, wherein the accelerator logic comprises an application specific integrated circuit (ASIC).

6. The computational storage device system of claim 1, wherein the accelerator logic comprises a field programmable gate array (FPGA).

7. The computational storage device system of claim 1, wherein the command comprises at least one application program interface (API) call.

8. The computing storage device system of claim 1, wherein the storage device is configured to receive the data from a data collection device, the data collection device being separate from the host at a location provided by the host.

9. The computational storage device system of claim 1, wherein the storage device is configured to store results of the computational task.

10. The computational storage system of claim 1, wherein the accelerator logic is configured to access other data directly from a different computational storage system via a data path that bypasses the host.

11. The computing storage device system of claim 1 , further comprising: Host interface logic configured to provide direct memory access (DMA) for the host.

12. The computing storage device system of claim 1, further comprising: A storage controller is configured to communicate with the storage device based on the command.

13. A method comprising: storing data at a storage device of a shared file system, wherein the shared file system is accessible by the host and the accelerator logic, receiving a command and a pointer to said stored data; using the pointer to access the stored data; as well as A computing task is performed in response to the command and using the stored data.

14. The method according to claim 13, further comprising: The result of the computing task is stored at the storage device of the shared file system.

15. The method according to claim 13, further comprising: A data size associated with the pointer is received, wherein the data size is further used to access the stored data.

16. The method of claim 13, further comprising: Configuration information or compilation instructions are received, wherein the computing task is performed based on the configuration information or the compilation instructions.

17. The method of claim 13, further comprising: The data is received from a data collection device separate from the host at a location provided by the host.

18. The method of claim 13, wherein the shared file system is accessible by at least one other host.

19. The method of claim 13, wherein the command comprises at least one Application Programming Interface (API) call.

20. The method of claim 13, further comprising: Different data stored at different storage device systems is accessed via a path that bypasses the host, wherein the different data is further used to perform the computing task.

21. A host, comprising: a memory configured to store instructions; a processor unit configured to execute the instructions to: Initiating storage of external data at a memory of a computing storage system; providing commands to the computing storage system to cause the computing storage system to perform analysis on the external data to provide result data; as well as The result data is retrieved from the computational storage system.

22. The host of claim 21, wherein the processor unit is further configured to execute the instructions to identify the external data for later analysis.

23. The host of claim 22, wherein the processor unit is further configured to execute the instructions to cause a data collection device to collect the external data.

24. The host of claim 23, wherein the processor unit is further configured to execute the instructions to cause a data collection device to provide the collected external data to the memory of the computing storage device system.

25. The host of claim 22, wherein the processor unit is further configured to execute the instructions to identify the external data at a third party storage device via the Internet.

26. The host of claim 25, wherein the processor unit is further configured to execute the instructions to cause the third party storage device to provide the external data to the memory of the computing storage device system.

27. The host of claim 22, wherein the processor unit is further configured to execute the instructions to cause storage of the external data across a plurality of computing storage systems, the plurality of computing storage systems forming a shared file system including the computing storage systems.

28. The host of claim 21, wherein the processor unit is further configured to execute the instructions to generate the command to perform analysis of the external data.

29. The host of claim 27, wherein the processor unit is further configured to execute the instructions to select a type of analysis to be performed on the external data from maximum likelihood classification, natural language processing, or a machine learning algorithm.

30. The host of claim 21, wherein the processor unit is further configured to execute the instructions to provide the commands to a host interface of the computational storage system.

31. A method comprising: Initiating, by the host, storage of external data at a memory of the computing storage device system; providing commands to the computing storage system to cause the computing storage system to perform analysis on the external data to provide result data; as well as The result data is retrieved from the computational storage system.

32. The method of claim 31 , further comprising identifying the external data for later analysis.

33. The method of claim 32, further comprising causing a data collection device to collect the external data.

34. The method of claim 33, further comprising causing a data collection device to provide the collected external data to the memory of the computing storage device system.

35. The method of claim 32, further comprising identifying the external data at a third party storage device via the Internet.

36. The method of claim 35, further comprising causing the third party storage to provide the external data to the memory of the computing storage system.

37. The method of claim 32, further comprising causing storage of the external data across a plurality of computing storage systems, the plurality of computing storage systems forming a shared file system including the computing storage systems.

38. The method of claim 31, further comprising generating the command to perform analysis of the external data.

39. The method of claim 37, further comprising selecting the type of analysis performed on the external data from maximum likelihood classification, natural language processing, or a machine learning algorithm.

40. The method of claim 31 , further comprising providing the command to a host interface of the computational storage system.

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