Radio frequency power amplifier and method of feedback network based on harmonic suppression

Abstract

The invention provides a radio frequency power amplifier and method of a feedback network based on harmonic suppression, and belongs to the technical field of signal transmission equipment.The radio frequency power amplifier of the feedback network based on harmonic suppression comprises a transistor, the feedback network, a biasing circuit and a stabilizing network, and the transistor is used for amplifying input radio frequency signals; the feedback network is connected with a grid electrode and a drain electrode of the transistor, the feedback network presents low impedance for a fundamental frequency signal and presents high impedance for a second harmonic signal and a third harmonic signal, the biasing circuit is connected with the grid electrode and the drain electrode of the transistor and is used for controlling a quiescent working point of the transistor, and the stabilizing network is connected with the grid electrode of the transistor and is used for stabilizing the quiescent working point of the transistor. A stabilization network is used to prevent oscillations due to changes in internal feedback or external conditions of the transistors. The invention provides a radio frequency power amplifier of a feedback network based on harmonic suppression. The radio frequency power amplifier aims at efficiently amplifying input signals and optimizing output power and efficiency.

Description

Technical Field

[0001] The present invention relates to the technical field of signal transmission equipment, and in particular to a radio frequency power amplifier and method based on a feedback network for harmonic suppression. Background Art

[0002] The RF power amplifier is an indispensable key component of the RF front end. Its main function is to amplify the low-power RF signal generated by the modulated oscillation circuit to a sufficiently high power to ensure reliable signal transmission. High power output, high efficiency, wide operating bandwidth, and high linearity are the four major target indicators pursued in the design of RF power amplifiers. These indicators are directly related to the performance indicators of the RF front end, such as signal strength, coverage, stability, and power consumption.

[0003] The transistor itself has a high gain characteristic, which makes it easy to oscillate and affect stable operation. In the relevant technology, the commonly used stabilization measures mainly reduce the gain of the RF signal by introducing RC negative feedback or RC parallel stabilization network; RC negative feedback compares the output signal with the input signal and returns the comparison result to the input end of the transistor to reduce the gain of the amplifier and improve its stability; RC parallel stabilization network reduces the gain of the RF signal by introducing a resistor element in the RF path, thereby achieving the purpose of stabilizing the RF power amplifier. However, the essence of these stabilization measures is to improve stability by reducing the gain of the power amplifier. While reducing the gain, it also leads to a decrease in output power, reduces the efficiency of the power amplifier, and increases power consumption, becoming the main bottleneck restricting the performance development of RF power amplifiers. Summary of the invention

[0004] In view of the above problems, in the first aspect, an embodiment of the present invention provides a radio frequency power amplifier based on a feedback network for harmonic suppression, wherein the radio frequency power amplifier based on a feedback network for harmonic suppression includes: a transistor, a feedback network, a bias circuit and a stabilization network, wherein the transistor is used to amplify the input radio frequency signal; the feedback network is connected to the gate and drain of the transistor, the feedback network presents low impedance to the fundamental frequency signal, and presents high impedance to the second harmonic and third harmonic signals, the bias circuit is connected to the gate and drain of the transistor, the bias circuit is used to control the static operating point of the transistor, the stabilization network is connected to the gate of the transistor, and the stabilization network is used to prevent oscillation caused by internal feedback of the transistor or changes in external conditions.

[0005] In one embodiment, the RF power amplifier based on the harmonic suppression feedback network also includes: an input matching network and an output matching network, the input matching network is connected to the input end of the stabilization network, the output end of the stabilization network is connected to the gate of the transistor, the input matching network is used to conjugate match the source impedance with the input impedance of the transistor; the output matching network is connected to the drain of the transistor, and the output matching network is used to conjugate match the load impedance with the output impedance of the transistor.

[0006] In one embodiment, the bias circuit includes a gate bias circuit and a drain bias circuit, the gate bias circuit is connected to the gate of the transistor, and the gate bias circuit is used to provide a bias voltage for the gate of the transistor; the drain bias circuit is connected to the drain of the transistor, and the drain bias circuit is used to provide a bias voltage for the drain of the transistor.

[0007] In one embodiment, the input matching network includes a capacitor C0, a capacitor C1, an inductor L0 and a capacitor C2, the capacitor C0, the inductor L0 and the capacitor C2 are connected in series in sequence, the input end of the series combination of the capacitor C0, the inductor L0 and the capacitor C2 is connected to the RF signal input end, the output end of the series combination of the capacitor C0, the inductor L0 and the capacitor C2 is connected to the gate of the transistor, the first end of the capacitor C1 is connected between the inductor L0 and the capacitor C2, and the second end of the capacitor C1 is grounded.

[0008] In one embodiment, the stabilization network includes a capacitor C4 and a resistor R1, the capacitor C4 is connected in parallel with the resistor R1, and the input matching network and the gate of the transistor are connected to a common node of the parallel combination of the capacitor C4 and the resistor R1.

[0009] In one embodiment, the output matching network includes a capacitor C7, a capacitor C9, an inductor L5 and a capacitor C10, wherein the capacitor C10, the inductor L5 and the capacitor C7 are connected in series in sequence, an input end of the series combination of the capacitor C10, the inductor L5 and the capacitor C7 is connected to the drain of the transistor, an output end of the series combination of the capacitor C10, the inductor L5 and the capacitor C7 is connected to the load end, a first end of the capacitor C9 is connected between the inductor L5 and the capacitor C7, and a second end of the capacitor C9 is grounded.

[0010] In one embodiment, the feedback network includes a capacitor C5, an inductor L2, a capacitor C6 and an inductor L3, the capacitor C5 and the inductor L2 are connected in series, the capacitor C6 and the inductor L3 are connected in parallel, a first end of the series combination of the capacitor C5 and the inductor L2 is connected to the gate of the transistor, a second end of the series combination of the capacitor C5 and the inductor L2 is connected to a first common end of the parallel combination of the capacitor C6 and the inductor L3, and a second common end of the parallel combination of the capacitor C6 and the inductor L3 is connected to the drain of the transistor.

[0011] In one embodiment, the gate bias circuit includes a resistor R0, an inductor L1 and a capacitor C3, the first end of the inductor L1 is connected to the gate voltage, the second end of the inductor L1 is connected to the first end of the resistor R0, the second end of the resistor R0 is connected to the gate of the transistor, the first end of the capacitor C3 is connected to the first end of the inductor L1, and the second end of the capacitor C3 is grounded.

[0012] In one embodiment, the drain bias circuit includes an inductor L4 and a capacitor C8, the first end of the inductor L4 is connected to the drain voltage, the second end of the inductor L4 is connected to the drain of the transistor, the first end of the capacitor C8 is connected to the first end of the inductor L4, and the second end of the capacitor C8 is grounded.

[0013] A second aspect of the present application further provides a method for radio frequency power amplification based on a feedback network with harmonic suppression, the method being applied to the radio frequency power amplifier based on a feedback network with harmonic suppression as described in the above aspect, the method comprising:

[0014] A feedback network is connected to the gate and drain of the transistor, the feedback network presents low impedance to the fundamental frequency signal and high impedance to the second harmonic and third harmonic signals, and the feedback network returns a part of the fundamental frequency component from the output end of the transistor to the input end to improve the output power and efficiency.

[0015] The above one or more technical solutions in the embodiments of the present application have at least one or more of the following technical effects:

[0016] The present invention proposes a radio frequency power amplifier based on a feedback network with harmonic suppression, aiming to achieve efficient amplification of the input signal and optimize the output power and efficiency. The technology designs a feedback network so that the network presents low impedance characteristics to the main fundamental frequency components in the radio frequency signal, ensuring that it can pass smoothly and be amplified, while showing high impedance characteristics to high-order frequency components such as the second harmonic and the third harmonic that need to be managed, effectively preventing them from interfering with the performance of the amplifier. In addition, the technology also integrates a bias circuit to regulate the static operating point of the transistor, so that the radio frequency power amplifier is in the class AB working mode; and the stabilization network can prevent oscillations caused by internal feedback of the transistor or changes in external conditions, ensuring the stability of the overall system operation. By adding a feedback network between the gate and drain of the transistor, a part of the fundamental frequency component can be fed back from the output end of the transistor to the input end of the transistor. This process cleverly increases the energy of the output signal while maintaining the stable operation of the radio frequency power amplifier, and improves the power gain and energy efficiency ratio of the radio frequency power amplifier, showing significant technical effects and innovative features.

[0017] The above description is only an overview of the technical solution of the present invention. In order to more clearly understand the technical means of the present invention, it can be implemented according to the contents of the specification. In order to make the above and other purposes, features and advantages of the present invention more obvious and easy to understand, the specific implementation methods of the present invention are listed below. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0019] Figure 1 It is a circuit module schematic diagram of a radio frequency power amplifier based on a feedback network for harmonic suppression in an embodiment of the present invention;

[0020] Figure 2 It is a schematic diagram of the circuit principle of a radio frequency power amplifier based on a feedback network for harmonic suppression in an embodiment of the present invention;

[0021] Figure 3 A comparison diagram of the output power (Pout) of a conventional RF power amplifier and a RF power amplifier based on a feedback network for harmonic suppression provided by the present application;

[0022] Figure 4 A comparison diagram of the power added efficiency (PAE) of a conventional RF power amplifier and a RF power amplifier with a feedback network based on harmonic suppression provided by the present application;

[0023] Figure 5 A comparison diagram of the input reflection coefficient (S11) of a conventional RF power amplifier and a RF power amplifier with a feedback network based on harmonic suppression provided by the present application;

[0024] Figure 6 The figure is a comparison chart of the output reflection coefficient (S22) of a traditional RF power amplifier and a RF power amplifier with a feedback network based on harmonic suppression provided in the present application.

[0025] Explanation of reference numerals: 100, transistor; 200, input matching network; 300, output matching network; 400, feedback network; 500, bias circuit; 600, stabilization network. DETAILED DESCRIPTION

[0026] The overall idea of ​​the technical solution provided by the present invention is as follows:

[0027] See also Figure 1 , a radio frequency power amplifier based on a feedback network for harmonic suppression comprises: a transistor 100, a feedback network 400, a bias circuit 500 and a stabilization network 600, wherein the transistor 100 is used to amplify an input radio frequency signal;

[0028] The feedback network 400 is connected to the gate and drain of the transistor 100. The feedback network 400 presents low impedance to the baseband signal and high impedance to the second harmonic and third harmonic signals. By designing the feedback network 400 to present low impedance to the baseband signal, it is ensured that the baseband signal can pass smoothly. The feedback network 400 presents high impedance characteristics to high-order frequency components such as the second harmonic and the third harmonic, effectively preventing these unwanted frequency components from passing;

[0029] The bias circuit 500 is connected to the gate and drain of the transistor 100. The bias circuit 500 is used to control the static operating point of the transistor 100, which can make the RF power amplifier work in the class AB mode. Specifically, the class AB mode is between the class A (full cycle conduction) and the class B (half cycle conduction). In the class AB mode, the transistor 100 is partially turned on in both the positive and negative half cycles of the signal, which improves efficiency while maintaining good linearity. The bias circuit 500 ensures that the transistor 100 is at an appropriate DC operating point, that is, the static operating point, when there is no input signal. This point is usually located in the linear amplification region of the transistor 100, but not completely turned on to reduce static power consumption;

[0030] The stabilization network 600 is connected to the gate of the transistor 100 and is used to prevent oscillation caused by internal feedback or external condition changes of the transistor 100. The stabilization network 600 is usually composed of resistors, capacitors and / or inductors, which work together at a specific frequency to suppress feedback signals that may cause oscillation.

[0031] By designing a feedback network 400, the network presents low impedance characteristics to the main fundamental frequency component in the RF signal, ensuring that it can pass smoothly and be amplified, while showing high impedance characteristics to high-order frequency components such as the second harmonic and third harmonic that need to be managed, effectively preventing them from interfering with the performance of the amplifier. In addition, the technology also integrates a bias circuit 500 to regulate the static operating point of the transistor 100, so that the RF power amplifier works in the class AB mode; and the stabilization network 600 can prevent oscillations caused by internal feedback of the transistor 100 or changes in external conditions, ensuring the stability of the overall system operation. By adding a feedback network 400 between the gate and drain of the transistor 100, a part of the fundamental frequency component can be fed back from the output end of the transistor 100 to the input end of the transistor 100. This process cleverly increases the energy of the output signal while maintaining the stable operation of the RF power amplifier, and improves the power gain and energy efficiency ratio of the RF power amplifier, showing significant technical effects and innovative features.

[0032] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0033] See also Figure 1, the RF power amplifier based on the feedback network of harmonic suppression also includes: an input matching network 200 and an output matching network 300, the input matching network 200 is connected to the input end of the stabilizing network 600, the output end of the stabilizing network 600 is connected to the gate of the transistor 100, and the input matching network 200 is used to conjugate match the source impedance with the input impedance of the transistor 100; the output matching network 300 is connected to the drain of the transistor 100, and the output matching network 300 is used to conjugate match the load impedance with the output impedance of the transistor 100. Specifically, the main function of the input matching network 200 is to conjugate match the source impedance (usually the output impedance of the signal source) with the input impedance of the transistor 100. Conjugate matching means that the real part and the imaginary part of the impedance are as close as possible, so as to achieve maximum power transmission. This matching reduces the reflection of the signal at the input end and improves the efficiency and stability of the amplifier. The main function of the output matching network 300 is to conjugate match the load impedance (usually the impedance of the load or antenna connected to the output end of the amplifier) ​​with the output impedance of the transistor 100. Similar to the input matching network 200, the output matching network 500 ensures maximum power transmission from the transistor 100 to the load by reducing signal reflection at the load end. Impedance matching can ensure that the power transmission from the source to the load is maximized and reduce power loss caused by impedance mismatch.

[0034] Further, the bias circuit 500 includes a gate bias circuit and a drain bias circuit. The gate bias circuit is connected to the gate of the transistor 100, and the gate bias circuit is used to provide a bias voltage for the gate of the transistor 100; the drain bias circuit is connected to the drain of the transistor 100, and the drain bias circuit is used to provide a bias voltage for the drain of the transistor 100. Specifically, the main function of the gate bias circuit is to provide a stable bias voltage for the gate of the transistor 100. This bias voltage determines the static operating point of the transistor 100, that is, the DC operating state of the transistor 100 when there is no input signal. By accurately controlling the gate voltage, it can be ensured that the transistor 100 operates in the desired amplification area, while reducing crossover distortion and improving the linearity of the amplifier. The drain bias circuit provides a bias voltage for the drain of the transistor 100, which helps to set the DC operating point of the drain of the transistor 100. The drain bias usually works together with the gate bias to ensure the linearity and efficiency of the transistor 100 when amplifying the signal.

[0035] See also Figure 2The input matching network 200 includes a capacitor C0, a capacitor C1, an inductor L0 and a capacitor C2, wherein the capacitor C0, the inductor L0 and the capacitor C2 are connected in series in sequence, the input end of the series combination of the capacitor C0, the inductor L0 and the capacitor C2 is connected to the RF signal input end, the output end of the series combination of the capacitor C0, the inductor L0 and the capacitor C2 is connected to the gate of the transistor M1, the first end of the capacitor C1 is connected between the inductor L0 and the capacitor C2, and the second end of the capacitor C1 is grounded. Specifically, the capacitor C0, the inductor L0 and the capacitor C2 are connected in series in sequence to form a resonant circuit, which exhibits a low impedance characteristic at a specific frequency, which is conducive to the transmission of the signal. By adjusting the values ​​of these components, a conjugate matching with the input impedance of the transistor M1 can be achieved. The function of the capacitor C1 is to provide a low impedance path, which is conducive to stabilizing the performance of the entire network, and the frequency response of the matching network can be further adjusted to ensure the best impedance matching within the operating frequency range.

[0036] See also Figure 2 The stabilization network 600 includes a capacitor C4 and a resistor R1, the capacitor C4 is connected in parallel with the resistor R1, and the input matching network 200 and the gate of the transistor M1 are connected to the common node of the parallel combination of the capacitor C4 and the resistor R1. Specifically, the capacitor C4 and the resistor R1 are connected in parallel to form a parallel RC network, which provides a frequency-dependent impedance through the RC network, which helps to suppress the oscillation that may be generated by the amplifier. The capacitor C4 presents a low impedance at high frequencies, which helps the transmission of signals; while the resistor R1 provides a stable impedance, which helps to consume energy, thereby reducing the possibility of oscillation.

[0037] See also Figure 2 , the output matching network 300 includes a capacitor C7, a capacitor C9, an inductor L5 and a capacitor C10, the capacitor C10, the inductor L5 and the capacitor C7 are connected in series in sequence, the input end of the series combination of the capacitor C10, the inductor L5 and the capacitor C7 is connected to the drain of the transistor M1, the output end of the series combination of the capacitor C10, the inductor L5 and the capacitor C7 is connected to the load end, the first end of the capacitor C9 is connected between the inductor L5 and the capacitor C7, and the second end of the capacitor C9 is grounded. Specifically, the series combination of the capacitor C10, the inductor L5 and the capacitor C7 forms a resonant circuit, which presents a low impedance characteristic at a specific frequency, which is helpful for the transmission of the signal, and by adjusting the values ​​of these components, a conjugate matching with the load impedance can be achieved. The role of the capacitor C9 is to provide a low impedance path, which helps to stabilize the performance of the entire network, and can further adjust the frequency response of the matching network to ensure the best impedance matching within the operating frequency range.

[0038] See also Figure 2The feedback network 400 includes a capacitor C5, an inductor L2, a capacitor C6, and an inductor L3. The capacitor C5 and the inductor L2 are connected in series, the capacitor C6 and the inductor L3 are connected in parallel, the first end of the series combination of the capacitor C5 and the inductor L2 is connected to the gate of the transistor M1, the second end of the series combination of the capacitor C5 and the inductor L2 is connected to the first common end of the parallel combination of the capacitor C6 and the inductor L3, and the second common end of the parallel combination of the capacitor C6 and the inductor L3 is connected to the drain of the transistor M1. For example, the capacitor C5 and the inductor L2 are connected in series to form an LC series resonant circuit. At the resonant frequency, the impedance of the LC series combination is the smallest and close to zero. For signals with frequencies lower than or higher than the resonant frequency, the impedance of the LC combination will increase. If the resonant frequency of the series combination of the capacitor C5 and the inductor L2 is set to the base frequency of the amplifier, then at the base frequency, the impedance of the LC combination will be very low, allowing the base frequency signal to pass smoothly. For harmonic signals (such as second or third harmonics), if the resonant frequency of the series combination of capacitor C5 and inductor L2 does not match these harmonic frequencies, then the impedance of the LC combination will increase significantly at these harmonic frequencies, which means that the harmonic signals will encounter higher impedance and thus be suppressed.

[0039] Capacitor C6 and inductor L3 are connected in parallel to form an LC parallel resonant circuit. The parallel LC circuit will present high impedance at the resonant frequency and low impedance at frequencies outside the resonant frequency. This characteristic allows the parallel combination to be designed to suppress signals of specific frequencies, such as second and third harmonic signals. If the resonant frequency of the parallel combination of capacitor C6 and inductor L3 is designed to be the second and third harmonic frequencies of the amplifier operating frequency, then at these harmonic frequencies, the impedance of the LC combination will be very high, which means that the harmonic signal will encounter great obstacles when passing through this parallel combination, and thus be suppressed. For the fundamental frequency signal, if its frequency is far away from the resonant frequency of the parallel combination, then the impedance of the LC combination is low, and the fundamental frequency signal can pass smoothly.

[0040] Furthermore, after the drain output signal of the transistor 100 suppresses harmonics through the feedback network 400, a portion of the baseband signal can continue to be transmitted to the gate of the transistor 100, realizing negative feedback, which helps to stabilize the working state of the transistor 100. This negative feedback mechanism can reduce the gain fluctuation of the transistor 100, so that the transistor 100 maintains linear amplification within a wider dynamic range, thereby improving the overall output power. Suppressing harmonic signals means reducing the loss of energy at harmonic frequencies, and this energy can be more effectively used to amplify the baseband signal, thereby improving the efficiency of the amplifier.

[0041] For further information, see Figure 3 and Figure 4Among them, the common RF power amplifier is called the traditional type, and the RF power amplifier based on the feedback network of harmonic suppression is called the improved type. The common RF power amplifier has a structure without the feedback network 400, and the RF power amplifier based on the feedback network of harmonic suppression has a structure with the feedback network 400 added. The following will make the most intuitive comparison of the simulation performance of the RF power amplifiers of these two structures, from Figure 3 and Figure 4 It can be seen intuitively that at the center frequency of 10 GHz, when the output powers of the traditional RF power amplifier and the improved RF power amplifier are almost the same, the power added efficiency (PAE) of the improved RF power amplifier is higher than that of the traditional RF power amplifier, which means that the improved RF power amplifier has the advantages of higher efficiency and lower power consumption.

[0042] Furthermore, the input and output reflection coefficients (S11 and S22) are important parameters to measure the degree of impedance matching. They represent the reflection at the input and output ends respectively, usually expressed in decibels (dB). The lower the reflection coefficient, the better the impedance matching, the less signal reflection, and the higher the transmission efficiency. Please refer to Figure 5 and Figure 6 It can be seen that at the center frequency of 10GHz, although the input reflection coefficient (S11) of the traditional RF power amplifier is better than that of the improved RF power amplifier, the S11 of the improved RF power amplifier is still at a relatively good level. For the output reflection coefficient (S22), the improved RF power amplifier is better than the traditional RF power amplifier, which makes the output matching higher and can avoid the signal reflection caused by factors such as impedance mismatch in the signal transmission process to a greater extent.

[0043] See also Figure 2 The gate bias circuit includes a resistor R0, an inductor L1 and a capacitor C3. The first end of the inductor L1 is connected to the gate voltage, which is usually provided by an external power supply or a voltage source. The second end of the inductor L1 is connected to the first end of the resistor R0. The role of the inductor L1 here is to provide a low-pass filter to prevent high-frequency signals from passing through and ensure the stability of the gate bias voltage. The second end of the resistor R0 is connected to the gate of the transistor M1. The resistor R0 and the inductor L1 together form a voltage divider network to provide a stable bias voltage for the gate of the transistor M1. The first end of the capacitor C3 is connected to the first end of the inductor L1, and the second end of the capacitor C3 is grounded. The role of the capacitor C3 here is to provide a high-frequency bypass to allow high-frequency signals to pass through, thereby stabilizing the gate voltage and reducing high-frequency noise.

[0044] See also Figure 2The drain bias circuit includes an inductor L4 and a capacitor C8. The first end of the inductor L4 is connected to the drain voltage, which is usually provided by an external power supply or a voltage source. The second end of the inductor L4 is connected to the drain of the transistor M1. The role of the inductor L4 here is to provide a low-pass filter to prevent high-frequency signals from passing through and ensure the stability of the drain bias voltage. The first end of the capacitor C8 is connected to the first end of the inductor L4, and the second end of the capacitor C8 is grounded. The role of the capacitor C8 here is to provide a high-frequency bypass to allow high-frequency signals to pass through, thereby stabilizing the drain voltage and reducing high-frequency noise.

[0045] The present invention also provides a method for radio frequency power amplification based on a feedback network for harmonic suppression, the method specifically comprising the following steps:

[0046] The feedback network is connected to the gate and drain of the transistor. The feedback network presents low impedance to the fundamental frequency signal and high impedance to the second harmonic and third harmonic signals. The feedback network returns a part of the fundamental frequency component from the output end of the transistor to the input end to improve the output power and efficiency.

[0047] Specifically, this feedback network is the core of the method, which has different impedance characteristics for the fundamental frequency signal and specific harmonic signals. The feedback network is designed to present low impedance to the fundamental frequency signal, which means that the fundamental frequency signal can pass through the feedback network smoothly. At the same time, the feedback network presents high impedance to the second harmonic and third harmonic signals, which helps to suppress the feedback of these harmonic signals and reduce harmonic distortion. The feedback network returns a part of the fundamental frequency component from the output end of the transistor to the input end. This negative feedback mechanism helps to provide the output power and efficiency of the transistor.

[0048] Although the preferred embodiments of the present invention have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the present invention.

[0049] Obviously, those skilled in the art can make various changes and modifications to the embodiments of the present invention without departing from the spirit and scope of the embodiments of the present invention. Thus, if these modifications and variations of the embodiments of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include these modifications and variations.

Claims

1. A radio frequency power amplifier based on a feedback network for harmonic suppression, characterized in that: include: A transistor, a feedback network, a bias circuit and a stabilization network, wherein the transistor is used to amplify an input radio frequency signal; The feedback network is connected to the gate and drain of the transistor, the feedback network presents low impedance to the fundamental frequency signal and high impedance to the second harmonic and third harmonic signals, the bias circuit is connected to the gate and drain of the transistor, the bias circuit is used to control the static operating point of the transistor, and the stabilization network is connected to the gate of the transistor, the stabilization network is used to prevent oscillation caused by internal feedback of the transistor or changes in external conditions.

2. The RF power amplifier based on the feedback network of harmonic suppression according to claim 1, characterized in that: Also includes: An input matching network and an output matching network, wherein the input matching network is connected to the input end of the stabilizing network, the output end of the stabilizing network is connected to the gate of the transistor, and the input matching network is used to conjugate match the source impedance with the input impedance of the transistor; the output matching network is connected to the drain of the transistor, and the output matching network is used to conjugate match the load impedance with the output impedance of the transistor.

3. The RF power amplifier based on the feedback network of harmonic suppression according to claim 1, characterized in that: The bias circuit includes a gate bias circuit and a drain bias circuit, wherein the gate bias circuit is connected to the gate of the transistor and is used to provide a bias voltage for the gate of the transistor; the drain bias circuit is connected to the drain of the transistor and is used to provide a bias voltage for the drain of the transistor.

4. The RF power amplifier based on the feedback network of harmonic suppression according to claim 2, characterized in that: The input matching network includes a capacitor C0, a capacitor C1, an inductor L0 and a capacitor C2, wherein the capacitor C0, the inductor L0 and the capacitor C2 are connected in series in sequence, an input end of the series combination of the capacitor C0, the inductor L0 and the capacitor C2 is connected to a radio frequency signal input end, an output end of the series combination of the capacitor C0, the inductor L0 and the capacitor C2 is connected to a gate of the transistor, a first end of the capacitor C1 is connected between the inductor L0 and the capacitor C2, and a second end of the capacitor C1 is grounded.

5. The radio frequency power amplifier based on the feedback network of harmonic suppression according to claim 4, characterized in that: The stabilizing network includes a capacitor C4 and a resistor R1 , wherein the capacitor C4 is connected in parallel with the resistor R1 , and the input matching network and the gate of the transistor are connected to a common node of the parallel combination of the capacitor C4 and the resistor R1 .

6. The radio frequency power amplifier with a feedback network for harmonic suppression according to claim 2, characterized in that: The output matching network includes a capacitor C7, a capacitor C9, an inductor L5 and a capacitor C10, wherein the capacitor C10, the inductor L5 and the capacitor C7 are connected in series in sequence, an input end of the series combination of the capacitor C10, the inductor L5 and the capacitor C7 is connected to the drain of the transistor, an output end of the series combination of the capacitor C10, the inductor L5 and the capacitor C7 is connected to the load end, a first end of the capacitor C9 is connected between the inductor L5 and the capacitor C7, and a second end of the capacitor C9 is grounded.

7. The radio frequency power amplifier with a feedback network for harmonic suppression according to claim 1, characterized in that: The feedback network includes a capacitor C5, an inductor L2, a capacitor C6 and an inductor L3, the capacitor C5 and the inductor L2 are connected in series, the capacitor C6 and the inductor L3 are connected in parallel, a first end of the series combination of the capacitor C5 and the inductor L2 is connected to the gate of the transistor, a second end of the series combination of the capacitor C5 and the inductor L2 is connected to a first common end of the parallel combination of the capacitor C6 and the inductor L3, and a second common end of the parallel combination of the capacitor C6 and the inductor L3 is connected to the drain of the transistor.

8. The radio frequency power amplifier with a feedback network for harmonic suppression according to claim 3, characterized in that: The gate bias circuit includes a resistor R0, an inductor L1 and a capacitor C3, wherein a first end of the inductor L1 is connected to a gate voltage, a second end of the inductor L1 is connected to a first end of the resistor R0, a second end of the resistor R0 is connected to a gate of the transistor, a first end of the capacitor C3 is connected to a first end of the inductor L1, and a second end of the capacitor C3 is grounded.

9. The radio frequency power amplifier with a feedback network for harmonic suppression according to claim 3, characterized in that: The drain bias circuit includes an inductor L4 and a capacitor C8, wherein a first end of the inductor L4 is connected to a drain voltage, a second end of the inductor L4 is connected to the drain of the transistor, a first end of the capacitor C8 is connected to a first end of the inductor L4, and a second end of the capacitor C8 is grounded.

10. A radio frequency power amplification method based on a feedback network with harmonic suppression, characterized in that: The method is applied to a radio frequency power amplifier based on a feedback network for harmonic suppression according to any one of claims 1 to 9, and the method comprises: A feedback network is connected to the gate and drain of the transistor, the feedback network presents low impedance to the fundamental frequency signal and high impedance to the second harmonic and third harmonic signals, and the feedback network returns a portion of the fundamental frequency component from the output end of the transistor to the input end to improve the output power and efficiency.

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