Ethernet error code test method and system

Abstract

The invention provides a method for testing Ethernet error codes. The method comprises the following steps: a sending step: sending randomized Ethernet frame data to a receiver through the Ethernet; a receiving step: receiving Ethernet frame data, recovering the received data, and generating expected byte sequence data at the same time; and a comparison step: comparing the recovered data with the expected byte sequence data bit by bit to obtain an error rate. Under the condition that the physical layer chip does not support the PRBS error code test, the Ethernet frame with the structure is used for achieving the error code test effect similar to the PRBS test, namely, an equivalent means for the error code test is provided.

Description

Technical Field

[0001] The present invention relates to the field of testing instruments, and in particular to a method and system for Ethernet bit error testing. Background Art

[0002] like Figure 2 As shown in the figure, error code testing is a common method for testing the integrity of network transmission. Ethernet frames transmitted on the network contain a four-byte checksum (FCS) to determine the integrity of the data. The sender calculates the entire content of the Ethernet frame according to the cyclic redundancy check (CRC) method, and adds the calculated 4-byte checksum to the end of the Ethernet frame, which is called the frame check sequence (FCS). After receiving the Ethernet frame, the receiver performs the same CRC calculation on the other data except the last four bytes, and compares the result with the received FCS. If they are the same, the received packet is considered to be complete. If they are not equal, it is considered that an error occurred during the packet transmission. The FCS integrity detection method can only qualitatively indicate whether an error has occurred in the packet transmission, but cannot quantitatively indicate how many bits have been erroneous.

[0003] Another method of bit error detection is to use a physical layer chip. For example, MARVELL's Ethernet physical layer chip Alaska 88E1510 can perform bit error rate testing. This method has a drawback, which is that both the sender and the receiver need to have physical layer chips that support bit error testing. In some cases, this condition cannot be met.

[0004] The patent document with publication number CN106375151A discloses an Ethernet bit error test method and system, wherein the Ethernet bit error test method includes: transmitting the data of the sending end through the structure of the Ethernet frame itself, and generating the expected data at the receiving end according to the rules agreed by the system, and then comparing the expected data with the received data bit by bit, so as to obtain the bit error rate information. The present invention performs bit error rate test through the data structure and content of the Ethernet frame itself, and can quantitatively test the bit error rate information. In addition, the present invention is not limited by the physical layer chip, and can run in the MAC layer or above layers of the Ethernet hierarchical structure, and has a wide range of applications. However, the patent cannot randomly distribute the control blocks, resulting in large test errors.

[0005] Therefore, a more accurate Ethernet bit error testing method and system is needed. Summary of the invention

[0006] In view of the defects in the prior art, the object of the present invention is to provide a method and system for Ethernet bit error testing.

[0007] A method for Ethernet bit error testing, comprising:

[0008] Sending step: sending randomized Ethernet frame data to the receiver via Ethernet;

[0009] Receiving step: receiving Ethernet frame data and recovering the received data, while generating the expected byte sequence data;

[0010] Comparison step: Compare the recovered data with the expected byte sequence data bit by bit to obtain the bit error rate.

[0011] Preferably, including:

[0012] The structure of an Ethernet frame is 6 bytes of destination MAC, 6 bytes of source MAC, 2 bytes of type, and payload. The payload includes a control block, where the control block and type are non-randomized data.

[0013] The control block contains additional information about the random data, the starting value of the random number generator, and the verification value;

[0014] Both the sender and the receiver contain an identical random number generator, so that the starting value of the random number generator can trigger the random number generator to work and start the bit error test;

[0015] When the received data does not correspond to the checksum value, it means that the transmission of the Ethernet frame control block is incomplete and will be discarded without the need for a bit error rate test.

[0016] Preferably, the sending step includes:

[0017] Randomization step: randomize the destination MAC, source MAC, and randomizable payload in the Ethernet frame;

[0018] Dispersion step: By using bit interleaving technology, the control block is cut according to a preset rule, and the cut control blocks are dispersed into the randomized payload;

[0019] Sending step: Send the processed Ethernet frame data to the receiver.

[0020] Preferably, the receiving step includes:

[0021] Data receiving step: receiving Ethernet frame data;

[0022] Generation step: Generate the expected byte sequence according to the predetermined rules;

[0023] Restoration step: restore the correct original value of the randomized Ethernet frame according to the additional information of the random data carried by the received control block;

[0024] Flooding step: The receiver also includes an Ethernet forwarding device. When the destination MAC and source MAC address tables are not in the receiver's MAC address table, the forwarding device will flood the received data across multiple ports;

[0025] Verification steps: Verify the flooding capability of the receiver through testing.

[0026] Preferably, it also includes:

[0027] When the Ethernet frame does not contain the data type information used for error testing, the sender and receiver registers are configured so that the sender and receiver reach an agreement on the data type.

[0028] A system for Ethernet bit error testing, comprising:

[0029] Sending module: Sending randomized Ethernet frame data to the receiving module via Ethernet;

[0030] Receiving module: receives Ethernet frame data and recovers the received data, while generating the expected byte sequence data;

[0031] Comparison module: compares the recovered data with the expected byte sequence data bit by bit to obtain the bit error rate.

[0032] Preferably, including:

[0033] The structure of an Ethernet frame is 6 bytes of destination MAC, 6 bytes of source MAC, 2 bytes of type, and payload. The payload includes a control block, where the control block and type are non-randomized data.

[0034] The control block contains additional information about the random data, the starting value of the random number generator, and the verification value;

[0035] The sending module and the receiving module both contain an identical random number generator, so that the starting value of the random number generator can trigger the random number generator to work and start the bit error test;

[0036] When the received data does not correspond to the checksum value, it means that the transmission of the Ethernet frame control block is incomplete and will be discarded without the need for a bit error rate test.

[0037] Preferably, the sending module includes:

[0038] Randomization module: randomizes the destination MAC, source MAC, and randomizable payload in the Ethernet frame;

[0039] Dispersion module: Through bit interleaving technology, the control block is cut according to the preset rules, and the cut control blocks are dispersed into the randomized payload;

[0040] Sending module: sends the processed Ethernet frame data to the receiving module.

[0041] Preferably, the receiving module includes:

[0042] Receiving data module: receiving Ethernet frame data;

[0043] Generation module: generates expected byte sequences according to predetermined rules;

[0044] Recovery module: restores the correct original value of the randomized Ethernet frame according to the additional information of the random data carried in the received control block;

[0045] Flooding module: The receiving module also includes an Ethernet forwarding device. When the destination MAC and source MAC address tables are not in the MAC address table of the receiving module, the forwarding device will flood the received data to multiple ports;

[0046] Verify module: Verify the flooding capability of the receiving module through testing.

[0047] Preferably, it also includes:

[0048] When the Ethernet frame does not contain the data type information used for error testing, the system configures the registers of the sending module and the receiving module so that the sending and receiving sides reach an agreement on the data type.

[0049] Compared with the prior art, the present invention has the following beneficial effects:

[0050] 1. The beneficial effect of the present invention is that when the physical layer chip does not support PRBS bit error test, a bit error test effect similar to that of PRBS test can be achieved by using a structured Ethernet frame, that is, an equivalent means of bit error test is provided;

[0051] 2. Since MAC address randomization will cause the problem that the MAC address table cannot be stably established, the present invention can also be used to test the flooding processing capability of the forwarding device;

[0052] 3. The present invention cuts the non-randomized data control block and distributes it into the randomized payload, thereby achieving the randomization of network data to the maximum extent and improving the accuracy of error code testing. BRIEF DESCRIPTION OF THE DRAWINGS

[0053] Other features, objects and advantages of the present invention will become more apparent from the detailed description of non-limiting embodiments made with reference to the following drawings:

[0054] Figure 1 A flowchart of a method for Ethernet bit error testing of the present invention;

[0055] Figure 2The schematic diagram of FCS checking the entire Ethernet frame;

[0056] Figure 3 This is a schematic diagram of the layered structure of Ethernet frame transmission;

[0057] Figure 4 This is an example diagram of the data frame structure for bit error rate testing using Ethernet frames;

[0058] Figure 5 Schematic diagram of the data frame structure after randomization and bit interleaving;

[0059] Figure 6 This is a structural diagram of a method for performing bit error testing using Ethernet frames according to Example 2. DETAILED DESCRIPTION

[0060] The present invention is described in detail below in conjunction with specific embodiments. The following embodiments will help those skilled in the art to further understand the present invention, but are not intended to limit the present invention in any form. It should be noted that, for those of ordinary skill in the art, several changes and improvements can also be made without departing from the concept of the present invention. These all belong to the protection scope of the present invention.

[0061] In Ethernet testing, sometimes it is necessary to detect the number of error bits introduced by the transmission process to judge the quality of the switching link (including physical lines and intermediate switching equipment). For example, the sender sends a byte stream, and wants to detect how many bits in the received byte stream have errors at the receiving end. This is usually called bit error rate testing.

[0062] like Figure 3 As shown in the figure, in network transmission, data transmission must pass through the MAC layer to reach the physical layer, and then from the physical layer to the physical layer of the receiving end through the transmission line. The physical layer of the receiving end then sends the data to the MAC, and then to the upper layer for processing.

[0063] Theoretically, Ethernet bit error testing is most intuitive and complete when implemented by physical layer chips. For example, the physical layer chip at the transmitting end sends a pseudo-random byte sequence (PRBS) that complies with specific specifications, and the receiving end generates the expected byte sequence according to the same rules and compares it bit by bit with the received byte sequence to obtain the bit error rate. However, not all physical layer chips support bit error rate testing, or when implementing bit error testing on FPGA, the third-party physical layer IP does not contain the bit error test function. In this case, using structured network frames to perform bit error rate detection can be used as an approximate alternative.

[0064] Example 1

[0065] The basic principle and method of the present invention are described below through one of the implementations. Figure 4 In the example shown, the method operates at the MAC layer, that is, the data frame in this example is at layer 2 of the network hierarchy. Figure 4 As shown in the figure, the structure of the Ethernet frame is 6 bytes of destination MAC, 6 bytes of source MAC, 2 bytes of type, and then the payload of the Ethernet frame. The payload contains a small custom structure called a control block. This control block contains additional information about the random data. The receiver can restore the correct original value of the random data through this control block.

[0066] It should be made clear that the bit error test is generally a separate test mode, that is, if this test is turned on, the sender and receiver of the data will have the same random number generator by default, and the control block can carry the starting value of the random number generator or other random number generation information agreed upon by both parties. In this way, the receiver can generate the expected random number byte sequence according to the predetermined rules and compare it bit by bit. In other words, the information in the control block should ensure that the receiver can correctly generate the expected byte sequence for bit-by-bit comparison. The predetermined rule refers to the data type information contained in the Ethernet frame control block information, and the rule for the receiver to decode the expected data from the received Ethernet frame.

[0067] Theoretically, it is ideal that all bytes of a data frame are random numbers, but in practice, because at least an Ethernet structure must be formed, a data frame at least includes the following fields: a 6-byte destination MAC, a 6-byte source MAC, a 2-byte type byte, a control block of several bytes, a payload of several bytes, and a 4-byte FCS. In the present invention, the destination MAC and the source MAC are randomized together, and a bit interleaving technique is introduced to disperse the indispensable non-randomized control block part in the randomized data.

[0068] like Figure 5Take an example, where the destination MAC, source MAC, and payload of the data frame have been randomized. What cannot be randomized is the type part. In order to correctly identify Ethernet, the position and value of this field are fixed. Depending on different situations, the length of the control block, that is, the number of bits, will be different. For example, if the control block is 32 bits, then 32 bits are fixed and non-random. In the PRBS mode of the error test, any bit is randomized. Therefore, in order to minimize the number of continuous fixed bits, so that the bit sequence of the present invention is as close to the effect of PRBS as possible, and taking into account that the shortest length of the Ethernet frame is 64 bytes, the control block part can be distributed to the random payload according to certain cutting rules. For example: cut once by 4 bits. If the control block is 32 bits, then cut 8 times. Considering the shortest length of the Ethernet frame, it is recommended that the number of cuts should not exceed 32 times. Figure 4 In the example, the first 4 bits are placed in the first 4 bits of the first byte of the first four bytes of the payload, the second 4 bits are placed in the first 4 bits of the second byte of the second four bytes of the payload, and so on. In this way, the randomization of network data is achieved to the maximum extent. The bit interleaving scheme here is only an example, and any other suitable scheme can be used.

[0069] It should be noted that, in the present invention, if the control block is transmitted incorrectly and is not detected by the receiving party, the bit error rate test will be incorrect, so the control block should include a certain verification method to ensure the transmission integrity of the control block. If the check value of the control block is incorrect, the data frame will be discarded and the bit error rate test will not be performed.

[0070] The Ethernet forwarding device implements forwarding based on the MAC address table. The MAC is stored in the internal memory of the switch. Since the space of the MAC address table is limited, and the MAC address of the present invention is random, that is, it can be considered as an infinite MAC address, the MAC address table cannot be stably established in the forwarding device. When the forwarding rule is not found in the MAC address table, flooding is performed. In this case, the forwarding device will perform multi-port flooding on the received data packets. Therefore, another purpose of the present invention is to test the flooding processing capability of the forwarding device. First, test under a smaller flow rate (such as 1% flow rate), and gradually increase the flow rate without packet loss to verify the flooding implementation capability of the forwarding device.

[0071] This method is not limited to the use of Layer 2 Ethernet frames, other Layer 3 or higher level network packets can also be used, but Layer 2 Ethernet frames are a preferred solution as test frames, especially when random bytes are sent and the length of the Ethernet frame is also random, the best test effect will be achieved.

[0072] Example 2

[0073] like Figure 6 In another optional implementation, the Ethernet frame itself does not contain the data type information used for error testing, but relies on the system to configure the registers of the sender and the receiver so that the sender and the receiver can reach an agreement on the data type. The advantage of this is that the Ethernet frame structure is not occupied to transmit control information. Similarly, this method is not limited to Layer 2 Ethernet frames, and other Layer 3 or higher network packets can also be used.

[0074] The present invention also provides a system for Ethernet bit error testing, which can be implemented by executing the process steps of the method for Ethernet bit error testing, that is, those skilled in the art can understand the method for Ethernet bit error testing as a preferred implementation of the system for Ethernet bit error testing.

[0075] A system for Ethernet bit error testing comprises: a sending module: sending randomized Ethernet frame data to a receiving module via Ethernet; a receiving module: receiving the Ethernet frame data and recovering the received data, while generating expected byte sequence data; a comparing module: comparing the recovered data with the expected byte sequence data bit by bit to obtain a bit error rate.

[0076] Specifically, it includes: the structure of the Ethernet frame is a 6-byte destination MAC, a 6-byte source MAC, a 2-byte type and a payload; the payload includes a control block, wherein the control block and the type part are non-randomized data; the control block contains additional information of the random data, a starting value of the random number generator, and a check value; the sending module and the receiving module both contain an identical random number generator, so that the starting value of the random number generator can trigger the random number generator to work and start the bit error test; when the received data does not correspond to the check value, it means that the transmission of the Ethernet frame control block is incomplete and will be discarded, and there is no need to perform a bit error rate test.

[0077] Specifically, the sending module includes: a randomization module: randomizing the destination MAC, source MAC, and randomizable partial payload of the Ethernet frame; a dispersion module: cutting the control block according to preset rules through bit interleaving technology, and dispersing the cut control block into the randomized payload; a sending module: sending the processed Ethernet frame data to the receiving module.

[0078] Specifically, the receiving module includes: a generation module: generating an expected byte sequence according to a predetermined rule; a data receiving module: receiving Ethernet frame data; a recovery module: restoring the correct original value of the randomized Ethernet frame according to the additional information of the random data carried by the received control block; a flooding module: the receiving module also includes an Ethernet forwarding device. When the destination MAC and source MAC address tables are not in the MAC address table of the receiving module, the forwarding device will perform multi-port flooding on the received data; a testing module: testing the flooding capability of the receiving module through testing.

[0079] Specifically, it also includes: when the Ethernet frame does not contain the data type information used for error code testing, the system configures the registers of the sending module and the receiving module so that the sending and receiving parties reach an agreement on the data type.

[0080] Those skilled in the art know that, in addition to realizing the system and its various devices, modules, and units provided by the present invention in a purely computer-readable program code, it is entirely possible to realize the same functions in the form of logic gates, switches, application-specific integrated circuits, programmable logic controllers, and embedded microcontrollers by logically programming the method steps. Therefore, the system and its various devices, modules, and units provided by the present invention can be considered as a hardware component, and the devices, modules, and units included therein for realizing various functions can also be regarded as structures within the hardware component; the devices, modules, and units for realizing various functions can also be regarded as both software modules for realizing the method and structures within the hardware component.

[0081] The above describes the specific embodiments of the present invention. It should be understood that the present invention is not limited to the above specific embodiments, and those skilled in the art can make various changes or modifications within the scope of the claims, which does not affect the essence of the present invention. In the absence of conflict, the embodiments of the present application and the features in the embodiments can be combined with each other arbitrarily.

Claims

1. A method for Ethernet bit error testing, characterized in that: include: Sending step: sending randomized Ethernet frame data to the receiver via Ethernet; Receiving step: receiving Ethernet frame data and recovering the received data, while generating the expected byte sequence data; Comparison step: Compare the recovered data with the expected byte sequence data bit by bit to obtain the bit error rate.

2. The method for Ethernet bit error testing according to claim 1, characterized in that: include: The structure of the Ethernet frame is 6 bytes of destination MAC, 6 bytes of source MAC, 2 bytes of type and payload; the payload includes a control block, wherein the control block and the type part are non-randomized data; The control block contains additional information of random data, a starting value of a random number generator, and a check value; Both the sender and the receiver contain an identical random number generator, so that the starting value of the random number generator can trigger the random number generator to work and start the bit error test; When the received data does not correspond to the checksum value, it means that the transmission of the Ethernet frame control block is incomplete and will be discarded without the need for a bit error rate test.

3. The method for Ethernet bit error testing according to claim 2, characterized in that: The sending step comprises: Randomization step: randomize the destination MAC, source MAC, and randomizable payload in the Ethernet frame; Dispersion step: By using bit interleaving technology, the control block is cut according to a preset rule, and the cut control blocks are dispersed into the randomized payload; Sending step: Send the processed Ethernet frame data to the receiver.

4. The method for Ethernet bit error testing according to claim 2, characterized in that: The receiving step comprises: Data receiving step: receiving Ethernet frame data; Generation step: Generate the expected byte sequence according to the predetermined rules; Restoration step: restore the correct original value of the randomized Ethernet frame according to the additional information of the random data carried by the received control block; Flooding step: The receiver also includes an Ethernet forwarding device. When the destination MAC and source MAC address tables are not in the receiver's MAC address table, the forwarding device will flood the received data across multiple ports; Verification steps: Verify the flooding capability of the receiver through testing.

5. The method for Ethernet bit error testing according to claim 2, characterized in that: Also includes: When the Ethernet frame does not contain the data type information used for error testing, the sender and receiver registers are configured so that the sender and receiver reach an agreement on the data type.

6. A system for Ethernet bit error testing, characterized in that: include: Sending module: Sending randomized Ethernet frame data to the receiving module via Ethernet; Receiving module: receives Ethernet frame data and recovers the received data, while generating the expected byte sequence data; Comparison module: compares the recovered data with the expected byte sequence data bit by bit to obtain the bit error rate.

7. The Ethernet bit error test system according to claim 6, characterized in that: include: The structure of the Ethernet frame is 6 bytes of destination MAC, 6 bytes of source MAC, 2 bytes of type and payload; the payload includes a control block, wherein the control block and the type part are non-randomized data; The control block contains additional information of random data, a starting value of a random number generator, and a check value; The sending module and the receiving module both contain an identical random number generator, so that the starting value of the random number generator can trigger the random number generator to work and start the bit error test; When the received data does not correspond to the checksum value, it means that the transmission of the Ethernet frame control block is incomplete and will be discarded without the need for a bit error rate test.

8. The Ethernet bit error test system according to claim 7, characterized in that: The sending module comprises: Randomization module: randomizes the destination MAC, source MAC, and randomizable payload in the Ethernet frame; Dispersion module: Through bit interleaving technology, the control block is cut according to the preset rules, and the cut control blocks are dispersed into the randomized payload; Sending module: sends the processed Ethernet frame data to the receiving module.

9. The Ethernet bit error test system according to claim 7, characterized in that: The receiving module comprises: Receiving data module: receiving Ethernet frame data; Generation module: generates expected byte sequences according to predetermined rules; Recovery module: restores the correct original value of the randomized Ethernet frame according to the additional information of the random data carried in the received control block; Flooding module: The receiving module also includes an Ethernet forwarding device. When the destination MAC and source MAC address tables are not in the MAC address table of the receiving module, the forwarding device will flood the received data to multiple ports; Verify module: Verify the flooding capability of the receiving module through testing.

10. The Ethernet bit error test system according to claim 7, characterized in that: Also includes: When the Ethernet frame does not contain the data type information used for error testing, the system configures the registers of the sending module and the receiving module so that the sending and receiving sides reach an agreement on the data type.

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