Data processing method and device and storage medium

Abstract

The embodiment of the invention provides a data processing method and device and a storage medium, relates to the technical field of communication, is applied to an FPGA in Ethernet equipment, and comprises the following steps: receiving input data through an input interface, and determining a target data type of the input data; and processing the input data by adopting the target processing mode, and sending the processed data through a sending interface corresponding to the data type of the processed data under the condition that the processed data has a sending requirement. By applying the scheme provided by the embodiment of the invention, the processing process of the data in the overhead frame can be simplified.

Description

Technical Field

[0001] The present application relates to the field of communication technology, and in particular to a data processing method, device and storage medium. Background Art

[0002] The overhead frame of the FlexE (Flexible Ethernet) protocol is information transmitted between Ethernet devices such as switches and routers. Each overhead frame is composed of a series of overhead blocks. The overhead blocks are divided into configuration overhead blocks and general overhead blocks. The configuration overhead blocks contain configuration information, and the general overhead blocks contain messages, etc. Ethernet devices often contain multiple interfaces, and each interface can be connected to other Ethernet devices. Every two interconnected Ethernet devices need to transmit overhead frames to each other. In other words, for each interface on the Ethernet device, the Ethernet device needs to process the overhead frames sent and received on the interface.

[0003] When there are a large number of overhead blocks and interfaces on an Ethernet device, the Ethernet device needs to process a large number of overhead blocks. In addition, different interfaces may use different protocols for data transmission, which means that the Ethernet device needs to process overhead blocks of different protocols in different ways. Therefore, different overhead block processing units need to be configured for different protocols in the Ethernet device, which makes the overhead block processing process more complicated.

[0004] Therefore, it is necessary to provide a data processing method to simplify the data processing process in the overhead frame. Summary of the invention

[0005] The purpose of the embodiments of the present application is to provide a data processing method, device and storage medium to simplify the processing of data in an overhead frame. The specific technical solution is as follows:

[0006] In a first aspect of an embodiment of the present application, a data processing method is first provided, which is applied to a field programmable gate array FPGA in an Ethernet device, and the method comprises:

[0007] receiving input data through an input interface, and determining a target data type of the input data;

[0008] The input interface is a control input interface, a message input interface or an overhead input interface; the control input interface is connected to the central processor of the Ethernet device and is used to input configuration information, the message input interface is connected to the network processor of the Ethernet device and is used to input messages, and the overhead input interface is used to input overhead blocks received by the Ethernet device;

[0009] Processing the input data in a target processing manner, and sending the processed data through a sending interface corresponding to the data type of the processed data when there is a need to send the processed data;

[0010] The target processing method corresponds to the target data type.

[0011] In a possible embodiment, receiving input data through an input interface and determining a target data type of the input data includes:

[0012] receiving configuration information through a control input interface, and determining that a target data type of the configuration information is configuration information;

[0013] The process of processing the input data in a target processing manner includes:

[0014] Parsing the configuration information to determine the subtype of the configuration information;

[0015] If the subtype of the configuration information is an overhead configuration subtype, converting the configuration information into a first overhead block, and storing the first overhead block in a storage space;

[0016] If the subtype of the configuration information is an on-chip CPU configuration subtype, then the local configuration of the on-chip CPU is updated according to the configuration information.

[0017] In a possible embodiment, receiving input data through an input interface and determining a target data type of the input data includes:

[0018] Receive a message through a message input interface, and determine that the target data type of the message is a message;

[0019] The input data is processed in a target processing manner, including:

[0020] Parsing the message to determine a first protocol corresponding to the message;

[0021] Processing the message based on a preset processing method matching the first protocol to generate a second overhead block;

[0022] The second overhead block is stored in a storage space.

[0023] In a possible embodiment, different storage spaces correspond to different orders of overhead blocks in an overhead frame;

[0024] The received target overhead block is stored in the storage space in the following manner:

[0025] According to the first order of the target overhead block in the first overhead frame, the target overhead block is stored in a first storage space corresponding to the first order.

[0026] In a possible embodiment, the method further includes:

[0027] An overhead block request is received, a third overhead block indicated by the overhead block request is read from the storage space, the third overhead block is inserted into a second overhead frame, and the second overhead frame is transmitted to other Ethernet devices.

[0028] In a possible embodiment, different storage spaces correspond to different orders of the overhead blocks in the overhead frame, and the order of the overhead blocks stored in each storage space in the overhead frame is: the order corresponding to the storage space;

[0029] The receiving the overhead block request and reading the third overhead block indicated by the overhead block request from the storage space comprises:

[0030] An overhead request carrying a sequence value is received, and a third overhead block is read from a target storage space, wherein the target storage space is a storage space corresponding to the sequence indicated by the sequence value.

[0031] In a possible embodiment, receiving input data through an input interface and determining a target data type of the input data includes:

[0032] receiving a fourth overhead block through an overhead input interface, and determining that a target data type of the fourth overhead block is an overhead block;

[0033] The process of processing the input data in a target processing manner includes:

[0034] In the case where the fourth overhead block is a configuration overhead block, extracting target configuration information in the configuration overhead block, and in the case where the target configuration information is for the on-chip CPU, performing a local configuration update operation, and in the case where the target configuration information is not for the on-chip CPU, sending the target configuration information to the central processing unit;

[0035] If the fourth overhead block is a general overhead block, the target message in the general overhead block is extracted, and if the on-chip CPU supports processing the target message, the target message is processed according to the processing method corresponding to the second protocol corresponding to the target message; if the on-chip CPU does not support processing the target message, the target message is sent to the network processor.

[0036] In a possible embodiment, the receiving the fourth overhead block through the overhead input interface includes:

[0037] Obtaining a fourth overhead block received by the Ethernet device through an overhead input interface, and storing the fourth overhead block in a storage space;

[0038] The fourth overhead block is read from the storage space.

[0039] In a possible embodiment, different storage spaces correspond to different orders of overhead blocks in an overhead frame;

[0040] The storing the fourth overhead block in the storage space includes:

[0041] The fourth overhead block is stored in a storage space corresponding to a second order, wherein the second order is the order of the fourth overhead block in the overhead frame.

[0042] In a possible embodiment, the sending interface is a control output interface, a message output interface or an overhead output interface; the control output interface is connected to the central processor of the Ethernet device and is used to send configuration information; the message output interface is connected to the network processor of the Ethernet device and is used to send messages; the overhead output interface is used to send overhead blocks to other Ethernet devices.

[0043] In a second aspect of the embodiment of the present application, a data processing device is further provided, which is applied to a field programmable gate array FPGA in an Ethernet device, and the device includes:

[0044] A type determination module, used for receiving input data through an input interface and determining a target data type of the input data;

[0045] The input interface is a control input interface, a message input interface or an overhead input interface; the control input interface is connected to the central processor of the Ethernet device and is used to input configuration information, the message input interface is connected to the network processor of the Ethernet device and is used to input messages, and the overhead input interface is used to input overhead blocks received by the Ethernet device;

[0046] A data processing module, used to process the input data in a target processing manner, and when there is a need to send the processed data, send the processed data through a sending interface corresponding to the data type of the processed data;

[0047] The target processing method corresponds to the target data type.

[0048] In a possible embodiment, the type determination module is specifically used to:

[0049] receiving configuration information through a control input interface, and determining that a target data type of the configuration information is configuration information;

[0050] The data processing module is specifically used for:

[0051] Parsing the configuration information to determine the subtype of the configuration information;

[0052] If the subtype of the configuration information is an overhead configuration subtype, converting the configuration information into a first overhead block, and storing the first overhead block in a storage space;

[0053] If the subtype of the configuration information is an on-chip CPU configuration subtype, then the local configuration of the on-chip CPU is updated according to the configuration information.

[0054] In a possible embodiment, the type determination module is specifically used to:

[0055] Receive a message through a message input interface, and determine that the target data type of the message is a message;

[0056] The data processing module is specifically used for:

[0057] Parsing the message to determine a first protocol corresponding to the message;

[0058] Processing the message based on a preset processing method matching the first protocol to generate a second overhead block;

[0059] The second overhead block is stored in a storage space.

[0060] In a possible embodiment, different storage spaces correspond to different orders of overhead blocks in an overhead frame;

[0061] The received target overhead block is stored in the storage space in the following manner:

[0062] According to the first order of the target overhead block in the first overhead frame, the target overhead block is stored in a first storage space corresponding to the first order.

[0063] In a possible embodiment, the device further includes:

[0064] The request receiving module is used to receive an overhead block request, read the third overhead block indicated by the overhead block request from the storage space, insert the third overhead block into the second overhead frame, and transmit the second overhead frame to other Ethernet devices.

[0065] In a possible embodiment, different storage spaces correspond to different orders of the overhead blocks in the overhead frame, and the order of the overhead blocks stored in each storage space in the overhead frame is: the order corresponding to the storage space;

[0066] The request receiving module is specifically used for:

[0067] An overhead request carrying a sequence value is received, and a third overhead block is read from a target storage space, wherein the target storage space is a storage space corresponding to the sequence indicated by the sequence value.

[0068] In a possible embodiment, the type determination module is specifically used to:

[0069] receiving a fourth overhead block through an overhead input interface, and determining that a target data type of the fourth overhead block is an overhead block;

[0070] The data processing module is specifically used for:

[0071] In the case where the fourth overhead block is a configuration overhead block, extracting target configuration information in the configuration overhead block, and in the case where the target configuration information is for the on-chip CPU, performing a local configuration update operation, and in the case where the target configuration information is not for the on-chip CPU, sending the target configuration information to the central processing unit;

[0072] If the fourth overhead block is a general overhead block, the target message in the general overhead block is extracted, and if the on-chip CPU supports processing the target message, the target message is processed according to the processing method corresponding to the second protocol corresponding to the target message; if the on-chip CPU does not support processing the target message, the target message is sent to the network processor.

[0073] In a possible embodiment, the type determination module is specifically used to:

[0074] Obtaining a fourth overhead block received by the Ethernet device through an overhead input interface, and storing the fourth overhead block in a storage space;

[0075] The fourth overhead block is read from the storage space.

[0076] In a possible embodiment, different storage spaces correspond to different orders of overhead blocks in an overhead frame;

[0077] The type determination module is specifically used for:

[0078] The fourth overhead block is stored in a storage space corresponding to a second order, wherein the second order is the order of the fourth overhead block in the overhead frame.

[0079] In a possible embodiment, the sending interface is a control output interface, a message output interface or an overhead output interface; the control output interface is connected to the central processor of the Ethernet device and is used to send configuration information; the message output interface is connected to the network processor of the Ethernet device and is used to send messages; the overhead output interface is used to send overhead blocks to other Ethernet devices.

[0080] In another aspect of the implementation of the present application, a computer-readable storage medium is provided, wherein the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, any method step described in the first aspect is implemented.

[0081] Beneficial effects of the embodiments of the present application:

[0082] In the data processing method provided by the embodiment of the present application, after the FPGA in the Ethernet device receives the input data through the input interface, it can determine the target data type of the input data, and determine whether the target data type of the input data is configuration information, a message, or an overhead block. The FPGA can process the input data according to the target data type and adopt a target processing method corresponding to the target data type, and send the processed data through a sending interface corresponding to the data type of the processed data when there is a need to send the processed data, thereby completing the data processing process.

[0083] In addition, since the input interface is a control input interface, a message input interface or an overhead input interface, input data of different data types can be processed by the FPGA. Moreover, since the control input interface is connected to the central processor of the Ethernet device, the message input interface is connected to the network processor of the Ethernet device, and the overhead input interface can input the externally sent overhead block received by the Ethernet device. That is, whether the configuration information and message sent to the FPGA from the inside of the Ethernet device, or the overhead block sent from the outside of the Ethernet device, can be processed by the FPGA. The FPGA can complete the processing of various types of data. There is no need to configure different overhead block processing units as in the related art, thereby simplifying the processing process of data in the overhead frame.

[0084] Of course, implementing any product or method of the present application does not necessarily require achieving all of the advantages described above at the same time. BRIEF DESCRIPTION OF THE DRAWINGS

[0085] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application, and for ordinary technicians in this field, other embodiments can also be obtained based on these drawings.

[0086] Figure 1 A schematic diagram of a flow chart of a first data processing method provided in an embodiment of the present application;

[0087] Figure 2 A schematic diagram of a second data processing method provided in an embodiment of the present application;

[0088] Figure 3 A schematic diagram of a third data processing method provided in an embodiment of the present application;

[0089] Figure 4 A flowchart of a fourth data processing method provided in an embodiment of the present application;

[0090] Figure 5 A flowchart of a fifth data processing method provided in an embodiment of the present application;

[0091] Figure 6 A flowchart of a sixth data processing method provided in an embodiment of the present application;

[0092] Figure 7 A schematic diagram of a storage space provided in an embodiment of the present application;

[0093] Figure 8 A flowchart of a seventh data processing method provided in an embodiment of the present application;

[0094] Fig. 9 A flowchart of an eighth data processing method provided in an embodiment of the present application;

[0095] Fig.10 A flowchart of a ninth data processing method provided in an embodiment of the present application;

[0096] Fig.11 A flowchart of a tenth data processing method provided in an embodiment of the present application;

[0097] Fig.12 A schematic diagram of the connection between the first data processing system and the interface provided in the embodiment of the present application;

[0098] Fig.13 A schematic diagram of the connection between the second data processing system and the interface provided in the embodiment of the present application;

[0099] Fig.14 An interaction diagram of a storage space, an overhead distribution module, and an overhead request processing module provided in an embodiment of the present application;

[0100] Fig.15 A schematic diagram of the structure of a data processing device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0101] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field based on the present application belong to the scope of protection of the present application.

[0102] The present application embodiment provides a data processing method, which is applied to FPGA (Field Programmable Gate Array) in Ethernet equipment, see Figure 1 , is a flow chart of the first data processing method provided in an embodiment of the present application, and the above method includes S101-S102.

[0103] S101, receiving input data through an input interface, and determining a target data type of the input data.

[0104] Among them, the input interface is a control input interface, a message input interface or an overhead input interface; the control input interface is connected to the central processor of the Ethernet device and is used to input configuration information, the message input interface is connected to the network processor of the Ethernet device and is used to input messages, and the overhead input interface is used to input overhead blocks received by the Ethernet device.

[0105] Among them, the configuration information and messages are sent from the internal components of the Ethernet device to the FPGA, and the overhead block is sent from other Ethernet devices connected to the Ethernet device outside the Ethernet device. The overhead block includes the configuration information and messages sent by other Ethernet devices.

[0106] In S101, the target data type includes a configuration information type, a message type, and an overhead block type.

[0107] The configuration information is transmitted through the control input interface. The control input interface can verify the configuration information sent by the central processor of the Ethernet device, and send the verified configuration information to the FPGA. The processor is the upper central processor in the Ethernet device, which is used to control the entire Ethernet device. For example, the configuration information sent by the upper central processor carries a first check code, and the control input interface can verify the length of the configuration information, data correctness and other contents according to the first check code. The physical form of the control input interface can be PCIE (peripheral component interconnectexpress, peripheral component interconnect express bus), LVDS (Low-Voltage DifferentialSignaling, low voltage differential signal), LocalBus (local bus) and other forms.

[0108] The message is transmitted through the message input interface. The message input interface can verify the message sent by the network processor of the Ethernet device and send the verified message to the FPGA. For example, the message sent by the network processor carries a second check code, and the message input interface can verify the length of the message, data correctness and other contents according to the second check code. The physical form of the message input interface can be an Ethernet interface, or it can be Interlaken, PCIE and other forms. Among them, Interlaken is a chip-level protocol for high-speed networks.

[0109] The overhead block is transmitted through the overhead input interface. The overhead input interface can identify and process the overhead block, remove invalid IDLE code blocks in the overhead block, and send the overhead block containing the remaining overhead data to the FPGA.

[0110] S102, processing the input data in a target processing manner, and sending the processed data through a sending interface corresponding to the data type of the processed data when there is a need to send the processed data.

[0111] Among them, the target processing method corresponds to the target data type.

[0112] In S102, the data types of the input data are different, and the corresponding processing methods are different. If the target data type is configuration information, the configuration information processing flow is performed. If the target data type is a message, the message processing flow is performed. If the target data type is an overhead block, the overhead receiving processing flow is performed.

[0113] In a possible embodiment, the sending interface is a control output interface, a message output interface or an overhead output interface; the control output interface is connected to the central processor of the Ethernet device and is used to send configuration information; the message output interface is connected to the network processor of the Ethernet device and is used to send messages; the overhead output interface is used to send overhead blocks to other Ethernet devices.

[0114] In the above embodiment, since the sending interface is a control output interface, a message output interface or an overhead output interface, after the input data of different data types are processed by the FPGA, the sending interface corresponding to the data type of the processed data can be selected according to the data type of the processed data to send the processed data.

[0115] Among them, the above-mentioned input interface and output interface are both physical interfaces of entities.

[0116] For the specific configuration information processing process, see Figure 3 For the embodiment shown, the message configuration process is shown in Figure 5 For the embodiment shown in FIG. 1 , the overhead receiving process flow is shown in FIG. Figure 8 The illustrated embodiment will not be described in detail here.

[0117] See also Figure 2 , is a flow chart of a second data processing method provided in an embodiment of the present application, the method includes S201-S206.

[0118] S201, checking whether input data is received.

[0119] If yes, execute S202; if no, continue to execute S201;

[0120] S202, read input data.

[0121] S203, determining the target data type of the input data.

[0122] If the target data type is configuration information, execute S204; if the target data type is a message, execute S205; if the target data type is an overhead block, execute S206.

[0123] S204, executing the configuration information processing flow.

[0124] S205, executing the message processing flow.

[0125] S206, execute the overhead receiving process flow.

[0126] After the above steps are executed, return to execute S201 and wait for the next data input.

[0127] By selecting the above embodiment, after receiving input data through the input interface, the FPGA in the Ethernet device can determine the target data type of the input data, and determine whether the target data type of the input data is configuration information, a message, or an overhead block. The FPGA can process the input data according to the target data type in a target processing method corresponding to the target data type, and send the processed data through a sending interface corresponding to the data type of the processed data when there is a need to send the processed data, thereby completing the data processing process.

[0128] In addition, since the input interface is a control input interface, a message input interface or an overhead input interface, input data of different data types can be processed by the FPGA. Moreover, since the control input interface is connected to the central processor of the Ethernet device, the message input interface is connected to the network processor of the Ethernet device, and the overhead input interface can input the externally sent overhead block received by the Ethernet device. That is, whether the configuration information and message sent to the FPGA from the inside of the Ethernet device, or the overhead block sent from the outside of the Ethernet device, can be processed by the FPGA. The FPGA can complete the processing of various types of data. There is no need to configure different overhead block processing units as in the related art, thereby simplifying the processing process of data in the overhead frame.

[0129] In one possible embodiment, see Figure 3 , is a flow chart of a third data processing method provided in an embodiment of the present application, and Figure 1 Compared with the embodiment shown, the above S101 can be implemented by S101A, and S102 can be implemented by S102A-S102C.

[0130] S101A, receiving configuration information through a control input interface, and determining that a target data type of the configuration information is configuration information.

[0131] S102A, parse the configuration information to determine the subtype of the configuration information.

[0132] In S102A, the subtype of the configuration information may be an overhead configuration subtype or an on-chip CPU (Central Processing Unit) configuration subtype. The subtype of the configuration information is an overhead configuration subtype, which means that the configuration information is information related to other Ethernet devices and ultimately needs to be sent to other Ethernet devices; the subtype of the configuration information is an on-chip CPU configuration subtype, which means that the configuration information is information related to the on-chip CPU of the Ethernet device that is the execution subject of the embodiment of the present application.

[0133] S102B: If the subtype of the configuration information is an overhead configuration subtype, convert the configuration information into a first overhead block, and store the first overhead block in a storage space.

[0134] In S102B, the subtype of the configuration information is the overhead configuration subtype, indicating that the configuration information is related to the sending and receiving of the overhead block and involves other Ethernet devices. Therefore, the FPGA converts the configuration information into a first overhead block and stores the first overhead block in a storage space, then inserts the first overhead block into the overhead frame and sends the overhead frame to other Ethernet devices.

[0135] S102C: If the subtype of the configuration information is an on-chip CPU configuration subtype, update the local configuration of the on-chip CPU according to the configuration information.

[0136] In S102C, the subtype of the configuration information is the on-chip CPU configuration subtype, indicating that the configuration information is related to the on-chip CPU and only involves the local configuration of the on-chip CPU, not other Ethernet devices. Therefore, the FPGA directly updates the local configuration of the on-chip CPU according to the configuration information.

[0137] When the FPGA updates the local configuration of the on-chip CPU according to the configuration information, if the configuration information is the same as the local configuration information of the on-chip CPU, the local configuration of the on-chip CPU is not processed; if the configuration information is different from the local configuration information of the on-chip CPU, the local configuration of the on-chip CPU is updated according to the configuration information.

[0138] By selecting the above embodiment, when the FPGA receives configuration information through the control input interface and determines that the target data type of the configuration information is configuration information, if the subtype of the configuration information is an overhead configuration subtype, it means that the configuration information is information related to other Ethernet devices and ultimately needs to be sent to other Ethernet devices. Then, the FPGA can convert the configuration information into a first overhead block, store the first overhead block in a storage space, and then send it to other Ethernet devices. If the subtype of the configuration information is an on-chip CPU configuration subtype, it means that the configuration information is information related to the on-chip CPU of the Ethernet device that is the execution subject of the embodiment of the present application. If the configuration information is different from the local configuration information of the on-chip CPU, the FPGA can update the local configuration of the on-chip CPU according to the configuration information.

[0139] See also Figure 4 , which is a flow chart of the fourth data processing method provided in an embodiment of the present application, and the above method includes S401-S405.

[0140] S401, receiving configuration information through a control input interface.

[0141] S402: Parse the configuration information to determine the subtype of the configuration information.

[0142] If the type of the configuration information is an overhead configuration subtype, S403 - S404 are executed; if the subtype of the configuration information is an on-chip CPU configuration subtype, S405 is executed.

[0143] S403: Convert the configuration information into a first overhead block.

[0144] S404, after the overhead frame is inserted into the first overhead block, it is sent to other Ethernet devices through the overhead output interface.

[0145] S405, updating the local configuration of the on-chip CPU according to the configuration information.

[0146] In one possible embodiment, see Figure 5 , is a flow chart of a fifth data processing method provided in an embodiment of the present application, and Figure 1 Compared with the embodiment shown, the above S101 can be implemented through S101B, and S102 can be implemented through S102D-S102F.

[0147] S101B, receiving a message through a message input interface, and determining that the target data type of the message is a message.

[0148] S102D: parse the message to determine a first protocol corresponding to the message.

[0149] In S102D, the message is transmitted from the source address to the destination via a first protocol. The first protocol may be UDP (User Datagram Protocol), TCP (Transmission Control Protocol), HTTP (Hypertext Transfer Protocol), FTP (File Transfer Protocol), etc. Exemplarily, if the message is transmitted via the UDP protocol, the first protocol is the UDP protocol.

[0150] S102E: Process the message based on a preset processing method that matches the first protocol to generate a second overhead block.

[0151] In S102E, the FPGA is pre-configured with message processing programs for different first protocols, which are used to process messages of different first protocols in different ways. After the FPGA processes the message based on the preset processing method matching the first protocol, it calculates the CPC (Cyclic Redundancy Check) of the message, and encapsulates the processed message into a PCS (Physical Coding Sublayer) code stream to generate a second overhead block.

[0152] S102F, store the second overhead block in the storage space.

[0153] In S102F, the FPGA stores the second overhead block in the storage space, and then sends the overhead frame including the second overhead block to other Ethernet devices.

[0154] In a possible embodiment, after the FPGA sends the overhead frame including the second overhead block to other Ethernet devices through the overhead output interface, it counts relevant information of the message, such as the length of the message, the sending time, and the number of messages corresponding to different protocols.

[0155] By selecting the above embodiment, when the FPGA receives a message through the message input interface and determines that the target data type of the message is a message, the FPGA parses the message, determines the first protocol corresponding to the message, and processes the message based on a preset processing method that matches the first protocol, generates a second overhead block, and then sends it to other Ethernet devices, thereby completing the message sending process. In addition, since messages for different protocols can be processed in different ways, different protocols can be adapted by updating the processing method configured in the FPGA, making message processing more flexible.

[0156] See also Figure 6 , which is a flow chart of the sixth data processing method provided in an embodiment of the present application, and the above method includes S601-S607.

[0157] S601, receiving a message through a message input interface, and determining that the target data type of the message is a message.

[0158] S602, parsing the message to determine a first protocol corresponding to the message;

[0159] S603: Process the message based on a preset processing method that matches the first protocol.

[0160] S604: Calculate the CRC of the message.

[0161] S605: Encapsulate the processed message into a PCS code stream to generate a second overhead block.

[0162] S606: Send the second overhead block to other Ethernet devices through the overhead output interface.

[0163] S607, collect relevant information of the statistics message.

[0164] In a possible embodiment, different storage spaces correspond to different orders of overhead blocks in the overhead frame; the FPGA stores the received target overhead block in the storage space through step A:

[0165] Step A: according to the first order of the target overhead block in the first overhead frame, the target overhead block is stored in a first storage space corresponding to the first order.

[0166] Exemplarily, it is assumed that there are 8 storage spaces, namely the 1st storage space, the 2nd storage space, the 3rd storage space, the 4th storage space, the 5th storage space, the 6th storage space, the 7th storage space, and the 8th storage space, and the aforementioned 8 storage spaces correspond to the order 1 to 8 in sequence. The first order of the target overhead block in the first overhead frame is 3, and the target overhead block is stored in the 3rd storage space.

[0167] It should be noted that the number of storage spaces described above indicates a possible implementation example, and the embodiments of the present application do not impose any specific limitation on the number of storage spaces.

[0168] In addition, one storage space can correspond to one sequence or multiple sequences.

[0169] If a storage space corresponds to an order, then the first storage space corresponds to order 1, the second storage space corresponds to order 2, the third storage space corresponds to order 3, the fourth storage space corresponds to order 4, the fifth storage space corresponds to order 5, the sixth storage space corresponds to order 6, the seventh storage space corresponds to order 7, and the eighth storage space corresponds to order 8.

[0170] If one storage space corresponds to multiple orders, the correspondence between the storage space and the order can be divided into the following cases.

[0171] In one case, the first storage space corresponds to multiple orders, and the other storage spaces correspond to one order. For example, the first storage space corresponds to orders 1-3, the second storage space corresponds to order 4, the third storage space corresponds to order 5, the fourth storage space corresponds to order 6, the fifth storage space corresponds to order 7, and the sixth storage space corresponds to order 8.

[0172] In another case, each storage space corresponds to multiple sequences. Each storage space is divided into multiple regions, and different regions in a storage space correspond to different sequences. For example, the first storage space corresponds to sequences 1-3, the second storage space corresponds to sequences 4-6, and the third storage space corresponds to sequences 7-8. Alternatively, the first storage space corresponds to sequences 1-3, the second storage space corresponds to sequences 4-5, and the third storage space corresponds to sequences 6-8.

[0173] By selecting the above embodiment, since different storage spaces correspond to different orders of overhead blocks in the overhead frame, the FPGA stores the target overhead block in the first storage space corresponding to the first order of the target overhead block in the first overhead frame, which makes it convenient for the FPGA to read the overhead block from the storage space, thereby improving the reading speed of the overhead block.

[0174] In a possible embodiment, the above data processing method also includes step B.

[0175] Step B: receiving an overhead block request, reading a third overhead block indicated by the overhead block request from a storage space, inserting the third overhead block into a second overhead frame, and transmitting the second overhead frame to other Ethernet devices.

[0176] In step B, after receiving the overhead block request, the FPGA may read the third overhead block indicated by the overhead block request from the storage space in a sequential order or a priority order.

[0177] Exemplarily, assuming that there are 8 storage spaces, one storage space corresponds to an order, namely the 1st storage space, the 2nd storage space, the 3rd storage space, the 4th storage space, the 5th storage space, the 6th storage space, the 7th storage space, and the 8th storage space, then when the FPGA receives the overhead block request for the first time, it reads the overhead block from the 1st storage space as the third overhead block; when it receives the overhead block request for the second time, it reads the overhead block from the 2nd storage space as the third overhead block; when it receives the overhead block request for the third time, it reads the overhead block from the 3rd storage space as the third overhead block, and so on.

[0178] Alternatively, assuming that there are 8 storage spaces, one storage space corresponds to an order, and the priority order of the 8 storage spaces is the 8th storage space, the 1st storage space, the 2nd storage space, the 3rd storage space, the 4th storage space, the 5th storage space, the 6th storage space, and the 7th storage space. When the FPGA receives the overhead block request for the first time, it reads the overhead block from the 8th storage space as the third overhead block; when it receives the overhead block request for the second time, it reads the overhead block from the 1st storage space as the third overhead block; when it receives the overhead block request for the third time, it reads the overhead block from the 2nd storage space as the third overhead block, and so on.

[0179] When the FPGA reads the overhead block from a certain storage space, the overhead block can be read from the storage space according to the storage time order of the overhead blocks in the storage space. For example, the FPGA reads the earliest stored overhead block in the third storage space from the third storage space as the third overhead block. Alternatively, when the FPGA reads the overhead block from a certain storage space, the overhead block can be read from the storage space according to the priority order of the overhead blocks in the storage space. For example, the FPGA reads the overhead block with the highest priority from the third storage space as the third overhead block.

[0180] In a possible embodiment, after receiving the overhead block request, the FPGA may randomly read an overhead block from a certain storage space as the third overhead block.

[0181] By selecting the above embodiment, the FPGA receives an overhead block request and can read the third overhead block indicated by the overhead block request from the storage space, insert the third overhead block into the second overhead frame, and transmit the second overhead frame to other Ethernet devices, thereby completing the overhead block insertion and transmission process.

[0182] In a possible embodiment, different storage spaces correspond to different orders of overhead blocks in the overhead frame, and the order of the overhead blocks stored in each storage space in the overhead frame is: the order corresponding to the storage space. The process of FPGA reading the third overhead block in the above step B can be implemented by step C.

[0183] Step C, receiving an overhead request carrying a sequence value, and reading a third overhead block from the target storage space.

[0184] The target storage space is the storage space corresponding to the order indicated by the order value.

[0185] For example, still taking the existence of 8 storage spaces as an example, assuming that the FPGA receives an overhead request carrying an order value of 3, the FPGA reads the earliest stored overhead block in the 3rd storage space from the 3rd storage space in the order in which the overhead blocks are stored in the 3rd storage space as the third overhead block; or, the FPGA reads the highest priority overhead block from the 3rd storage space in order of priority as the third overhead block.

[0186] If a storage space corresponds to an order, the first storage space corresponds to order 1, the second storage space corresponds to order 2, the third storage space corresponds to order 3, the fourth storage space corresponds to order 4, the fifth storage space corresponds to order 5, the sixth storage space corresponds to order 6, the seventh storage space corresponds to order 7, and the eighth storage space corresponds to order 8. Assuming that the FPGA receives an overhead request with an order value of 3, the FPGA reads the earliest stored overhead block in the third storage space from the third storage space according to the order in which the overhead blocks are stored in the third storage space as the third overhead block; or, the FPGA reads the highest priority overhead block from the third storage space according to the priority order as the third overhead block.

[0187] If a storage space corresponds to multiple orders. The first storage space corresponds to order 1-3, the second storage space corresponds to order 4, the third storage space corresponds to order 5, the fourth storage space corresponds to order 6, the fifth storage space corresponds to order 7, and the sixth storage space corresponds to order 8, wherein the first storage space is divided into three areas, the first area corresponds to order 1, the second area corresponds to order 2, and the third area corresponds to order 3. Assuming that the FPGA receives an overhead request with an order value of 3, the FPGA reads the earliest stored overhead block from the third area in the first storage space as the third overhead block; or, the FPGA reads the highest priority overhead block from the third area in the first storage space according to the priority order as the third overhead block.

[0188] By selecting the above embodiment, since different storage spaces correspond to different orders of overhead blocks in the overhead frame, the order of the overhead blocks stored in each storage space in the overhead frame is: the order corresponding to the storage space. After the FPGA receives the overhead request carrying the order value, the target storage space corresponding to the overhead block can be determined by the order value, thereby quickly reading the third overhead block from the target storage space, thereby improving the reading speed of the overhead block.

[0189] See also Figure 7 , which is a schematic diagram of a storage space provided in an embodiment of the present application.

[0190] from Figure 7 It can be seen that the storage space includes RAM (Random Access Memory), FIFO (First Input First Output) (channel 4), FIFO (channel 5), FIFO (channel 6), FIFO (channel 7), and FIFO (channel 8).

[0191] In an Ethernet device, an overhead frame may include 8 overhead blocks, which are overhead block 1, overhead block 2, overhead block 3, overhead block 4, overhead block 5, overhead block 6, overhead block 7, and overhead block 8 in order.

[0192] Overhead block 1 to overhead block 3 contain configuration information, the content of which is usually fixed and generally stored in RAM. Overhead block 4 to overhead block 8 contain messages, the content of which is usually dynamic and generally stored in FIFO mode.

[0193] Among them, the RAM corresponds to the order 1-3, that is, the RAM is divided into three areas, namely the first area, the second area, and the third area. The first area stores overhead block 1, the first area stores overhead block 2, and the first area stores overhead block 3. The channel number of the FIFO is the corresponding order of the FIFO.

[0194] In one possible embodiment, see Figure 8 , is a flow chart of a seventh data processing method provided in an embodiment of the present application, and Figure 1 Compared with the embodiment shown, the above S101 can be implemented by S101C, and S102 can be implemented by S102G-S102H.

[0195] S101C, receiving a fourth overhead block through an overhead input interface, and determining that a target data type of the fourth overhead block is an overhead block.

[0196] In a possible embodiment, the FPGA receives a fourth overhead block including remaining overhead data through an overhead input interface, and determines that a target data type of the fourth overhead block including remaining overhead data is an overhead block.

[0197] S102G, when the fourth overhead block is a configuration overhead block, extract the target configuration information in the configuration overhead block, and when the target configuration information is for the on-chip CPU, perform a local configuration update operation; when the target configuration information is not for the on-chip CPU, send the target configuration information to the central processing unit.

[0198] In S102G, if the fourth overhead block is a configuration overhead block, the FPGA extracts the target configuration information in the configuration overhead block. When the target configuration information is for the on-chip CPU, if the target configuration information is the same as the current configuration information of the on-chip CPU, no processing is performed; if the target configuration information is different from the current configuration information of the on-chip CPU, the local configuration update operation is performed according to the target configuration information.

[0199] When the target configuration information is not for the on-chip CPU, the target configuration information needs to be reported to the central processing unit. The FPGA sends the target configuration information to the central processing unit through the control output interface, and the central processing unit updates the relevant configuration according to the target configuration information.

[0200] S102H, if the fourth overhead block is a general overhead block, extract the target message in the general overhead block, and if the on-chip CPU supports processing the target message, process the target message according to the processing method corresponding to the second protocol corresponding to the target message; if the on-chip CPU does not support processing the target message, send the target message to the network processor.

[0201] In S102H, if the fourth overhead block is a general overhead block, the FPGA performs PCS code stream analysis on the general overhead block, extracts the target message in the general overhead block, and verifies the CRC of the target message. If the verification fails, the target message is discarded; if the verification passes, the target message is processed according to the processing method corresponding to the second protocol corresponding to the target message if the on-chip CPU supports processing the target message. The FPGA is pre-configured with message processing programs for different second protocols, which are used to process messages of different second protocols in different ways.

[0202] After processing the target message according to the processing method corresponding to the second protocol corresponding to the target message, the FPGA calculates the CPC of the target message, and encapsulates the processed target message into a PCS code stream to generate a fifth overhead block.

[0203] When the on-chip CPU does not support processing the target message, the target message needs to be reported to the network processor, and the FPGA sends the target message to the network processor through the message output interface.

[0204] By selecting the above embodiment, when the FPGA receives the fourth overhead block through the overhead input interface and determines that the target data type of the fourth overhead block is an overhead block, if the fourth overhead block is a configuration overhead block, it means that the information of the fourth overhead block is configuration information. The FPGA extracts the target configuration information in the configuration overhead block, and when the target configuration information is for the on-chip CPU, performs a local configuration update operation. When the target configuration information is not for the on-chip CPU, the target configuration information is sent to the central processing unit.

[0205] If the fourth overhead block is a general overhead block, it means that the information of the fourth overhead block is a message. The FPGA extracts the target message in the general overhead block, and if the on-chip CPU supports processing the target message, the FPGA processes the target message according to the processing method corresponding to the second protocol corresponding to the target message; if the on-chip CPU does not support processing the target message, the target message is sent to the network processor, thereby completing the processing process of the overhead block.

[0206] See also Fig. 9 , which is a flow chart of the eighth data processing method provided in an embodiment of the present application, and the above method includes S901-S914.

[0207] S901, receiving a fourth overhead block through an overhead input interface, and determining that a target data type of the fourth overhead block is an overhead block.

[0208] S902: Determine whether the fourth overhead block is a configuration overhead block or a general overhead block.

[0209] If it is a configuration overhead block, execute S903; if it is a general overhead block, execute S909.

[0210] S903: Extract target configuration information in the configuration overhead block.

[0211] S904, determining whether the target configuration information is the same as the local configuration information of the on-chip CPU.

[0212] If not, execute S905, and if so, end.

[0213] S905, determining whether it is necessary to update the local configuration of the on-chip CPU according to the target configuration information;

[0214] If yes, execute S906; if no, execute S907.

[0215] S906, updating the local configuration of the on-chip CPU according to the target configuration information.

[0216] S907, determining whether the target configuration information needs to be processed by the central processing unit.

[0217] If yes, execute S908; if no, end.

[0218] S908, sending target configuration information to the central processing unit via the control output interface.

[0219] S909, performing PCS code stream parsing on the general overhead block to extract the target message in the general overhead block.

[0220] S910, verify the CRC of the target message.

[0221] S911, parse the target message that has passed the verification, and determine whether the target message needs to be reported to the network processor.

[0222] If yes, execute S912, if no, execute S913.

[0223] S912: Send the target message to the network processor through the message output interface.

[0224] S913: Process the target message according to a processing method corresponding to the protocol corresponding to the target message.

[0225] S914, record the statistical information of the target message.

[0226] The above S901-S914 are all executed by FPGA.

[0227] In one possible embodiment, see Fig.10 , is a flow chart of a ninth data processing method provided in an embodiment of the present application, and Figure 8Compared with the embodiment shown, the above S101C can be implemented by S101C1 - S101C2 .

[0228] S101C1. Obtain a fourth overhead block received by the Ethernet device through an overhead input interface, and store the fourth overhead block in a storage space.

[0229] In S101C1, the Ethernet device receives an overhead frame sent by another Ethernet device. The overhead frame includes a fourth overhead block. The storage position of the fourth overhead block is related to the order of the fourth overhead block in the overhead frame.

[0230] Exemplarily, if the order of the fourth overhead block in the overhead frame is X, the FPGA stores the fourth overhead block in the Xth storage space. For example, if the order of the fourth overhead block in the overhead frame is 3, the FPGA stores the fourth overhead block in the 3rd storage space.

[0231] S101C2, read the fourth overhead block from the storage space, and determine that the target data type of the fourth overhead block is an overhead block.

[0232] In S101C2, the FPGA reads the fourth overhead block from the storage space. The fourth overhead block may be read from the storage space in a front-to-back order or in a priority order.

[0233] By selecting the above embodiment, the FPGA obtains the fourth overhead block received by the Ethernet device through the overhead input interface, and stores the fourth overhead block in the storage space, thereby completing the storage process of the overhead block. The FPGA reads the fourth overhead block from the storage space, and determines that the target data type of the fourth overhead block is an overhead block, thereby completing the reading process of the overhead block.

[0234] In a possible embodiment, different storage spaces correspond to different orders of overhead blocks in the overhead frame, see Fig.11 , is a flowchart of the tenth data processing method provided in an embodiment of the present application, and Fig.10 Compared with the illustrated embodiment, the step of storing the fourth overhead block in the storage space in the above S101C1 can be implemented by S1101.

[0235] S1101, store the fourth overhead block into the storage space corresponding to the second order.

[0236] The second order is the order of the fourth overhead block in the overhead frame.

[0237] For example, assuming that there are 5 storage spaces, namely the 1st storage space, the 2nd storage space, the 3rd storage space, the 4th storage space, and the 5th storage space, if the Ethernet device receives an overhead frame, and the order of the fourth overhead block in the overhead frame is 3, the FPGA stores the fourth overhead block in the 3rd storage space.

[0238] By selecting the above embodiment, since different storage spaces correspond to different orders of overhead blocks in the overhead frame, after determining the second order representing the order of the fourth overhead block in the overhead frame, the FPGA can store the fourth overhead block in the storage space corresponding to the second order, thereby facilitating the FPGA to read the overhead block from the corresponding storage space and improving the reading speed of the overhead block.

[0239] See also Fig.12 , which is a connection diagram of the first data processing system and interface provided in an embodiment of the present application.

[0240] from Fig.12 It can be seen that one end of the data processing system is connected to the central processing unit interface and the network processor interface respectively.

[0241] The data processing system also includes an overhead processing module, an overhead request processing module and an overhead storage module. The overhead processing module is used to process the overhead block, the overhead request processing module is used to request the overhead block to be inserted into the overhead frame, and the overhead storage module is used to receive the overhead block extracted from the overhead frame.

[0242] It should be noted that the other end of the central processing unit interface is connected to the central processing unit, and the other end of the network processing unit interface is connected to the network processor.

[0243] See also Fig.13 , is a connection diagram of the second data processing system and interface provided in an embodiment of the present application.

[0244] from Fig.13 It can be seen that one end of the data processing system is connected to the control input interface, the message input interface, and the overhead input interface respectively, and the other end is connected to the control output interface, the message output interface, and the overhead output interface respectively.

[0245] The data processing system also includes an input scheduling module, an overhead processing module and an overhead distribution module. The input scheduling module is used to schedule the input data transmitted by the control input interface, the message input interface, and the overhead input interface. The overhead processing module is used to process the input data scheduled by the input scheduling module and send the processed input data to the overhead distribution module. The overhead distribution module is used to send overhead blocks to the control output interface, the message output interface, and the overhead output interface.

[0246] in, Figure 12-13The data processing system in the Ethernet device is configured on the FPGA.

[0247] The following takes the configuration information processing flow, message processing flow, and overhead receiving processing flow as examples. Figure 12-13 The functions of the overhead request processing module, overhead distribution module, overhead insertion module, overhead request processing module, and overhead storage module mentioned in the specification are described in detail.

[0248] In the configuration information processing flow, the overhead request processing module receives the configuration information through the control input interface, and determines that the target data type of the configuration information is the configuration information;

[0249] If the subtype of the configuration information is an overhead configuration subtype, the overhead processing module converts the configuration information into a first overhead block and sends the first overhead block to the overhead distribution module; the overhead distribution module stores the first overhead block in the storage space;

[0250] If the subtype of the configuration information is an on-chip CPU configuration subtype, the overhead processing module updates the local configuration of the on-chip CPU according to the configuration information.

[0251] In the message processing flow, the overhead request processing module receives the message through the message input interface and determines that the target data type of the message is a message;

[0252] The overhead processing module parses the message and determines the first protocol corresponding to the message;

[0253] The overhead processing module processes the message based on a preset processing method matching the first protocol to generate a second overhead block; and sends the second overhead block to the overhead distribution module;

[0254] The overhead distribution module stores the second overhead block in the storage space.

[0255] Among them, in the above configuration information processing flow and message processing flow, different storage spaces correspond to different orders of overhead blocks in the overhead frame, and the overhead distribution module stores the received target overhead blocks in the storage space in the following manner:

[0256] The overhead distribution module stores the target overhead blocks in a first storage space corresponding to the first sequence of the target overhead blocks in the first overhead frame.

[0257] In addition, the overhead request processing module receives the overhead block request sent by the overhead insertion module, reads the third overhead block indicated by the overhead block request from the storage space, and sends the third overhead block to the overhead insertion module so that the overhead insertion module inserts the third overhead block into the second overhead frame and transmits the second overhead frame to other Ethernet devices.

[0258] In one case, different storage spaces correspond to different orders of overhead blocks in the overhead frame, and the order of overhead blocks stored in each storage space in the overhead frame is: the order corresponding to the storage space;

[0259] The overhead request processing module receives the overhead request carrying the sequence value sent by the overhead insertion module, and reads the third overhead block from the target storage space, wherein the target storage space is: the storage space corresponding to the order indicated by the sequence value.

[0260] In the overhead receiving processing flow, the overhead processing module receives the fourth overhead block through the overhead input interface, and determines that the target data type of the fourth overhead block is an overhead block;

[0261] The overhead processing module extracts target configuration information from the configuration overhead block when the fourth overhead block is a configuration overhead block, performs a local configuration update operation when the target configuration information is for the on-chip CPU, and sends the target configuration information to the central processing unit when the target configuration information is not for the on-chip CPU;

[0262] If the fourth overhead block is a general overhead block, the overhead processing module extracts the target message in the general overhead block, and if the on-chip CPU supports processing the target message, the target message is processed according to the processing method corresponding to the second protocol corresponding to the target message; if the on-chip CPU does not support processing the target message, the target message is sent to the network processor.

[0263] In one case, the overhead storage module obtains the fourth overhead block received by the Ethernet device through the overhead input interface, and stores the fourth overhead block in the storage space;

[0264] The overhead distribution module reads the fourth overhead block from the storage space and sends the fourth overhead block to the overhead processing module.

[0265] In another case, different storage spaces correspond to different orders of overhead blocks in the overhead frame, and the overhead storage module stores the fourth overhead block in the storage space corresponding to the second order, wherein the second order is the order of the fourth overhead block in the overhead frame.

[0266] See also Fig.14 , which is an interaction diagram of a storage space, an overhead distribution module, and an overhead request processing module provided in an embodiment of the present application.

[0267] from Fig.14 It can be seen that the storage space includes RAM, FIFO (channel 4), FIFO (channel 5), FIFO (channel 6), FIFO (channel 7), and FIFO (channel 8). The overhead distribution module stores the overhead block in the storage space, and the overhead request processing module reads the overhead block from the storage space.

[0268] In an Ethernet device, an overhead frame may include 8 overhead blocks, which are overhead block 1, overhead block 2, overhead block 3, overhead block 4, overhead block 5, overhead block 6, overhead block 7, and overhead block 8 in order.

[0269] Overhead block 1 to overhead block 3 contain configuration information, the content of which is usually fixed and generally stored in RAM. Overhead block 4 to overhead block 8 contain messages, the content of which is usually dynamic and generally stored in FIFO mode.

[0270] Among them, the RAM corresponds to the order 1-3, that is, the RAM is divided into three areas, namely the first area, the second area, and the third area. The first area stores overhead block 1, the first area stores overhead block 2, and the first area stores overhead block 3. The channel number of the FIFO is the corresponding order of the FIFO.

[0271] Corresponding to the aforementioned data processing method, the embodiment of the present application further provides a data processing device, which is applied to the FPGA in the Ethernet device, see Fig.15 , is a schematic diagram of the structure of a data processing device provided in an embodiment of the present application, the device comprising:

[0272] The type determination module 1501 is used to receive input data through the input interface and determine the target data type of the input data;

[0273] The input interface is a control input interface, a message input interface or an overhead input interface; the control input interface is connected to the central processor of the Ethernet device and is used to input configuration information, the message input interface is connected to the network processor of the Ethernet device and is used to input messages, and the overhead input interface is used to input overhead blocks received by the Ethernet device;

[0274] The data processing module 1502 is used to process the input data in a target processing manner, and when there is a need to send the processed data, send the processed data through a sending interface corresponding to the data type of the processed data;

[0275] Among them, the target processing method corresponds to the target data type.

[0276] By selecting the above embodiment, after receiving input data through the input interface, the FPGA in the Ethernet device can determine the target data type of the input data, and determine whether the target data type of the input data is configuration information, a message, or an overhead block. The FPGA can process the input data according to the target data type in a target processing method corresponding to the target data type, and send the processed data through a sending interface corresponding to the data type of the processed data when there is a need to send the processed data, thereby completing the data processing process.

[0277] In addition, since the input interface is a control input interface, a message input interface or an overhead input interface, input data of different data types can be processed by the FPGA. Moreover, since the control input interface is connected to the central processor of the Ethernet device, the message input interface is connected to the network processor of the Ethernet device, and the overhead input interface can input the externally sent overhead block received by the Ethernet device. That is, whether the configuration information and message sent to the FPGA from the inside of the Ethernet device, or the overhead block sent from the outside of the Ethernet device, can be processed by the FPGA. The FPGA can complete the processing of various types of data. There is no need to configure different overhead block processing units as in the related art, thereby simplifying the processing process of data in the overhead frame.

[0278] In a possible embodiment, the type determination module 1501 is specifically configured to:

[0279] receiving configuration information through a control input interface, and determining that a target data type of the configuration information is configuration information;

[0280] The data processing module 1502 is specifically used for:

[0281] Parse the configuration information to determine the subtype of the configuration information;

[0282] If the subtype of the configuration information is an overhead configuration subtype, converting the configuration information into a first overhead block, and storing the first overhead block in the storage space;

[0283] If the subtype of the configuration information is an on-chip CPU configuration subtype, the local configuration of the on-chip CPU is updated according to the configuration information.

[0284] By selecting the above embodiment, when the FPGA receives configuration information through the control input interface and determines that the target data type of the configuration information is configuration information, if the subtype of the configuration information is an overhead configuration subtype, it means that the configuration information is information related to other Ethernet devices and ultimately needs to be sent to other Ethernet devices. Then, the FPGA can convert the configuration information into a first overhead block, store the first overhead block in a storage space, and then send it to other Ethernet devices. If the subtype of the configuration information is an on-chip CPU configuration subtype, it means that the configuration information is information related to the on-chip CPU of the Ethernet device that is the execution subject of the embodiment of the present application. If the configuration information is different from the local configuration information of the on-chip CPU, the FPGA can update the local configuration of the on-chip CPU according to the configuration information.

[0285] In a possible embodiment, the type determination module 1501 is specifically configured to:

[0286] receiving a message through a message input interface, and determining that a target data type of the message is a message;

[0287] The data processing module 1502 is specifically used for:

[0288] Parsing the message to determine a first protocol corresponding to the message;

[0289] Processing the message based on a preset processing method matching the first protocol to generate a second overhead block;

[0290] The second overhead block is stored in the storage space.

[0291] By selecting the above embodiment, when the FPGA receives a message through the message input interface and determines that the target data type of the message is a message, the FPGA parses the message, determines the first protocol corresponding to the message, and processes the message based on a preset processing method that matches the first protocol, generates a second overhead block, and then sends it to other Ethernet devices, thereby completing the message sending process. In addition, since messages for different protocols can be processed in different ways, different protocols can be adapted by updating the processing method configured in the FPGA, making message processing more flexible.

[0292] In a possible embodiment, different storage spaces correspond to different orders of overhead blocks in an overhead frame;

[0293] The received target overhead block is stored in the storage space in the following manner:

[0294] According to the first order of the target overhead block in the first overhead frame, the target overhead block is stored in a first storage space corresponding to the first order.

[0295] By selecting the above embodiment, since different storage spaces correspond to different orders of overhead blocks in the overhead frame, the FPGA stores the target overhead block in the first storage space corresponding to the first order of the target overhead block in the first overhead frame, which makes it convenient for the FPGA to read the overhead block from the storage space, thereby improving the reading speed of the overhead block.

[0296] In a possible embodiment, the above device further includes:

[0297] The request receiving module is used to receive an overhead block request, read the third overhead block indicated by the overhead block request from the storage space, insert the third overhead block into the second overhead frame, and transmit the second overhead frame to other Ethernet devices.

[0298] By selecting the above embodiment, the FPGA receives an overhead block request and can read the third overhead block indicated by the overhead block request from the storage space, insert the third overhead block into the second overhead frame, and transmit the second overhead frame to other Ethernet devices, thereby completing the overhead block insertion and transmission process.

[0299] In a possible embodiment, different storage spaces correspond to different orders of the overhead blocks in the overhead frame, and the order of the overhead blocks stored in each storage space in the overhead frame is: the order corresponding to the storage space;

[0300] The request receiving module is specifically used for:

[0301] An overhead request carrying a sequence value is received, and a third overhead block is read from a target storage space, wherein the target storage space is a storage space corresponding to the sequence indicated by the sequence value.

[0302] By selecting the above embodiment, since different storage spaces correspond to different orders of overhead blocks in the overhead frame, the order of the overhead blocks stored in each storage space in the overhead frame is: the order corresponding to the storage space. After the FPGA receives the overhead request carrying the order value, the target storage space corresponding to the overhead block can be determined by the order value, thereby quickly reading the third overhead block from the target storage space, thereby improving the reading speed of the overhead block.

[0303] In a possible embodiment, the type determination module 1501 is specifically configured to:

[0304] receiving a fourth overhead block through the overhead input interface, and determining that a target data type of the fourth overhead block is an overhead block;

[0305] The data processing module 1502 is specifically used for:

[0306] In the case where the fourth overhead block is a configuration overhead block, extracting target configuration information in the configuration overhead block, and in the case where the target configuration information is for an on-chip CPU, performing a local configuration update operation, and in the case where the target configuration information is not for an on-chip CPU, sending the target configuration information to a central processing unit;

[0307] If the fourth overhead block is a general overhead block, the target message in the general overhead block is extracted, and if the on-chip CPU supports processing the target message, the target message is processed according to the processing method corresponding to the second protocol corresponding to the target message; if the on-chip CPU does not support processing the target message, the target message is sent to the network processor.

[0308] By selecting the above embodiment, when the FPGA receives the fourth overhead block through the overhead input interface and determines that the target data type of the fourth overhead block is an overhead block, if the fourth overhead block is a configuration overhead block, it means that the information of the fourth overhead block is configuration information. The FPGA extracts the target configuration information in the configuration overhead block, and when the target configuration information is for the on-chip CPU, performs a local configuration update operation. When the target configuration information is not for the on-chip CPU, the target configuration information is sent to the central processing unit.

[0309] In a possible embodiment, the type determination module 1501 is specifically configured to:

[0310] Obtaining a fourth overhead block received by the Ethernet device through the overhead input interface, and storing the fourth overhead block in the storage space;

[0311] A fourth overhead block is read from the storage space.

[0312] By selecting the above embodiment, the FPGA obtains the fourth overhead block received by the Ethernet device through the overhead input interface, and stores the fourth overhead block in the storage space, thereby completing the storage process of the overhead block. The FPGA reads the fourth overhead block from the storage space, and determines that the target data type of the fourth overhead block is an overhead block, thereby completing the reading process of the overhead block.

[0313] In a possible embodiment, different storage spaces correspond to different orders of overhead blocks in an overhead frame;

[0314] The type determination module 1501 is specifically used for:

[0315] The fourth overhead block is stored in a storage space corresponding to a second order, wherein the second order is the order of the fourth overhead block in the overhead frame.

[0316] By selecting the above embodiment, since different storage spaces correspond to different orders of overhead blocks in the overhead frame, after determining the second order representing the order of the fourth overhead block in the overhead frame, the FPGA can store the fourth overhead block in the storage space corresponding to the second order, thereby facilitating the FPGA to read the overhead block from the corresponding storage space and improving the reading speed of the overhead block.

[0317] In a possible embodiment, the sending interface is a control output interface, a message output interface or an overhead output interface; the control output interface is connected to the central processor of the Ethernet device and is used to send configuration information; the message output interface is connected to the network processor of the Ethernet device and is used to send messages; the overhead output interface is used to send overhead blocks to other Ethernet devices.

[0318] In the above embodiment, since the sending interface is a control output interface, a message output interface or an overhead output interface, after the input data of different data types are processed by the FPGA, the sending interface corresponding to the data type of the processed data can be selected according to the data type of the processed data to send the processed data.

[0319] In another embodiment provided in the present application, a computer-readable storage medium is provided, in which a computer program is stored. When the computer program is executed by a processor, the steps of any of the above-mentioned data processing methods are implemented.

[0320] By selecting the above embodiment, after receiving input data through the input interface, the FPGA in the Ethernet device can determine the target data type of the input data, and determine whether the target data type of the input data is configuration information, a message, or an overhead block. The FPGA can process the input data according to the target data type in a target processing method corresponding to the target data type, and send the processed data through a sending interface corresponding to the data type of the processed data when there is a need to send the processed data, thereby completing the data processing process.

[0321] In addition, since the input interface is a control input interface, a message input interface or an overhead input interface, input data of different data types can be processed by the FPGA. Moreover, since the control input interface is connected to the central processor of the Ethernet device, the message input interface is connected to the network processor of the Ethernet device, and the overhead input interface can input the externally sent overhead block received by the Ethernet device. That is, whether the configuration information and message sent to the FPGA from the inside of the Ethernet device, or the overhead block sent from the outside of the Ethernet device, can be processed by the FPGA. The FPGA can complete the processing of various types of data. There is no need to configure different overhead block processing units as in the related art, thereby simplifying the processing process of data in the overhead frame.

[0322] In another embodiment provided in the present application, a computer program product including instructions is also provided, which, when executed on a computer, enables the computer to execute any of the data processing methods in the above embodiments.

[0323] By selecting the above embodiment, after receiving input data through the input interface, the FPGA in the Ethernet device can determine the target data type of the input data, and determine whether the target data type of the input data is configuration information, a message, or an overhead block. The FPGA can process the input data according to the target data type in a target processing method corresponding to the target data type, and send the processed data through a sending interface corresponding to the data type of the processed data when there is a need to send the processed data, thereby completing the data processing process.

[0324] In addition, since the input interface is a control input interface, a message input interface or an overhead input interface, input data of different data types can be processed by the FPGA. Moreover, since the control input interface is connected to the central processor of the Ethernet device, the message input interface is connected to the network processor of the Ethernet device, and the overhead input interface can input the externally sent overhead block received by the Ethernet device. That is, whether the configuration information and message sent to the FPGA from the inside of the Ethernet device, or the overhead block sent from the outside of the Ethernet device, can be processed by the FPGA. The FPGA can complete the processing of various types of data. There is no need to configure different overhead block processing units as in the related art, thereby simplifying the processing process of data in the overhead frame.

[0325] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware or any combination thereof. When implemented using software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the process or function described in the embodiment of the present application is generated in whole or in part. The computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions may be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium, for example, the computer instructions may be transmitted from a website site, computer, server or data center by wired (e.g., coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) mode to another website site, computer, server or data center. The computer-readable storage medium may be any available medium that a computer can access or a data storage device such as a server or data center that includes one or more available media integrated. The available medium may be a magnetic medium, (e.g., a floppy disk, a hard disk, a tape), an optical medium (e.g., a DVD), or a semiconductor medium (e.g., a solid-state drive Solid State Disk (SSD)), etc.

[0326] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.

[0327] Each embodiment in this specification is described in a related manner, and the same or similar parts between the embodiments can be referred to each other, and each embodiment focuses on the differences from other embodiments. In particular, for the system, on-chip CPU, and storage medium embodiments, since they are basically similar to the method embodiments, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiments.

[0328] The above description is only a preferred embodiment of the present application and is not intended to limit the protection scope of the present application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application are included in the protection scope of the present application.

Claims

1. A data processing method, characterized in that: A field programmable gate array FPGA applied to an Ethernet device, the method comprising: receiving input data through an input interface, and determining a target data type of the input data; The input interface is a control input interface, a message input interface or an overhead input interface; the control input interface is connected to the central processor of the Ethernet device and is used to input configuration information, the message input interface is connected to the network processor of the Ethernet device and is used to input messages, and the overhead input interface is used to input overhead blocks received by the Ethernet device; Processing the input data in a target processing manner, and sending the processed data through a sending interface corresponding to the data type of the processed data when there is a need to send the processed data; The target processing method corresponds to the target data type.

2. The method according to claim 1, characterized in that The step of receiving input data through an input interface and determining a target data type of the input data includes: receiving configuration information through a control input interface, and determining that a target data type of the configuration information is configuration information; The process of processing the input data in a target processing manner includes: Parsing the configuration information to determine the subtype of the configuration information; If the subtype of the configuration information is an overhead configuration subtype, converting the configuration information into a first overhead block, and storing the first overhead block in a storage space; If the subtype of the configuration information is an on-chip CPU configuration subtype, then the local configuration of the on-chip CPU is updated according to the configuration information.

3. The method according to claim 1, characterized in that The step of receiving input data through an input interface and determining a target data type of the input data includes: Receive a message through a message input interface, and determine that the target data type of the message is a message; The input data is processed in a target processing manner, including: Parsing the message to determine a first protocol corresponding to the message; Processing the message based on a preset processing method matching the first protocol to generate a second overhead block; The second overhead block is stored in a storage space.

4. The method according to claim 2 or 3, characterized in that: Different storage spaces correspond to different orders of overhead blocks in the overhead frame; The received target overhead block is stored in the storage space in the following manner: According to the first order of the target overhead block in the first overhead frame, the target overhead block is stored in a first storage space corresponding to the first order.

5. The method according to claim 2 or 3, characterized in that: The method further comprises: An overhead block request is received, a third overhead block indicated by the overhead block request is read from the storage space, the third overhead block is inserted into a second overhead frame, and the second overhead frame is transmitted to other Ethernet devices.

6. The method according to claim 5, characterized in that Different storage spaces correspond to different orders of overhead blocks in the overhead frame, and the order of overhead blocks stored in each storage space in the overhead frame is: the order corresponding to the storage space; The receiving the overhead block request and reading the third overhead block indicated by the overhead block request from the storage space comprises: An overhead request carrying a sequence value is received, and a third overhead block is read from a target storage space, wherein the target storage space is a storage space corresponding to the sequence indicated by the sequence value.

7. The method according to claim 1, characterized in that The step of receiving input data through an input interface and determining a target data type of the input data includes: receiving a fourth overhead block through an overhead input interface, and determining that a target data type of the fourth overhead block is an overhead block; The process of processing the input data in a target processing manner includes: In the case where the fourth overhead block is a configuration overhead block, extracting target configuration information in the configuration overhead block, and in the case where the target configuration information is for the on-chip CPU, performing a local configuration update operation, and in the case where the target configuration information is not for the on-chip CPU, sending the target configuration information to the central processing unit; If the fourth overhead block is a general overhead block, the target message in the general overhead block is extracted, and if the on-chip CPU supports processing the target message, the target message is processed according to the processing method corresponding to the second protocol corresponding to the target message; if the on-chip CPU does not support processing the target message, the target message is sent to the network processor.

8. The method according to claim 7, characterized in that The receiving a fourth overhead block through the overhead input interface includes: Obtaining a fourth overhead block received by the Ethernet device through an overhead input interface, and storing the fourth overhead block in a storage space; The fourth overhead block is read from the storage space.

9. The method according to claim 8, characterized in that Different storage spaces correspond to different orders of overhead blocks in the overhead frame; The storing the fourth overhead block in the storage space includes: The fourth overhead block is stored in a storage space corresponding to a second order, wherein the second order is the order of the fourth overhead block in the overhead frame.

10. The method according to any one of claims 1 to 9, characterized in that The sending interface is a control output interface, a message output interface or an overhead output interface; the control output interface is connected to the central processor of the Ethernet device and is used to send configuration information; the message output interface is connected to the network processor of the Ethernet device and is used to send messages; The overhead output interface is used to send overhead blocks to other Ethernet devices.

11. A data processing device, characterized in that: A field programmable gate array FPGA applied to Ethernet equipment, the device comprising: A type determination module, used for receiving input data through an input interface and determining a target data type of the input data; The input interface is a control input interface, a message input interface or an overhead input interface; the control input interface is connected to the central processor of the Ethernet device and is used to input configuration information, the message input interface is connected to the network processor of the Ethernet device and is used to input messages, and the overhead input interface is used to input overhead blocks received by the Ethernet device; A data processing module, used to process the input data in a target processing manner, and when there is a need to send the processed data, send the processed data through a sending interface corresponding to the data type of the processed data; The target processing method corresponds to the target data type.

12. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the method steps described in any one of claims 1 to 10 are implemented.

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