Method for manufacturing a circuit board with thick copper fine lines and blind vias, and circuit board

Abstract

The application relates to the field of circuit board manufacturing, and discloses a circuit board manufacturing method of thick copper fine circuit with blind holes and a circuit board. The circuit board manufacturing method comprises the following steps: providing a substrate, the substrate comprising a base material and two conductive circuit layers, the substrate being provided with blind holes, and the base thickness of the conductive circuit layer being D; obtaining the total design thickness A of the conductive circuit layer, and splitting the total design thickness A into a first design thickness B and a second design thickness C; electroplating hole filling on the substrate, so that the increased thickness of the conductive circuit layer is the first design thickness B; and electroplating thickening on the substrate, so that the increased thickness of the conductive circuit layer is the second design thickness C. The circuit board manufacturing method and the circuit board provided by the application can improve the problem that, when the total design thickness of the conductive circuit layer is large in the related art, the thickness range of the conductive circuit layer of the manufactured circuit board is large, the uniformity is poor, and then the problems of incomplete etching and line thinning are prone to occur during subsequent etching.

Description

Technical Field

[0001] This application relates to the field of circuit board manufacturing, and more particularly to a method for manufacturing a circuit board with dense thick copper lines and blind vias, and the circuit board itself. Background Technology

[0002] The electromagnetic inductance of a buried magnetic circuit board is related to factors such as the geometry of the conductor (coil), conductor material, conductor length, and conductor cross-sectional area. With other factors remaining constant, the electromagnetic inductance can only be increased to the maximum extent possible by increasing the conductor cross-sectional area and conductor length (number of turns) in terms of copper thickness and linewidth. Therefore, buried magnetic circuit boards are generally designed with thick copper, with a copper thickness of 50μm or more.

[0003] A standard 50μm copper thickness circuit board corresponds to a line width / spacing of 100μm / 100μm. Because buried magnetic circuit boards need to maximize the number of turns within a certain space, their line width and spacing are designed to be fine. However, when the copper thickness is large, the design of finer line width and spacing exceeds the current manufacturing capabilities. This results in a large variation in the copper thickness of the electroplated circuit board and poor uniformity, which in turn leads to problems such as incomplete etching and thin lines during subsequent etching. Summary of the Invention

[0004] This application provides a method for manufacturing a circuit board with thick copper fine lines and blind vias, and the circuit board itself. This method can improve the problem that when the copper thickness is designed to be large, the electroplated copper thickness of the manufactured circuit board varies greatly and the uniformity is poor, which leads to problems such as incomplete etching and fine lines during subsequent etching.

[0005] In a first aspect, embodiments of this application provide a method for manufacturing a circuit board with dense thick copper lines and blind vias, comprising:

[0006] A substrate is provided, the substrate comprising a substrate and two conductive circuit layers, the two conductive circuit layers being disposed on opposite sides of the substrate, the substrate having a blind via penetrating one of the conductive circuit layers, the other conductive circuit layer defining the bottom surface of the blind via, and the base thickness of the conductive circuit layers being D.

[0007] The total design thickness A of the conductive circuit layer is obtained, and the total design thickness A is divided into a first design thickness B and a second design thickness C. Both the first design thickness B and the second design thickness C are greater than the base thickness D. The first design thickness B is the increase in thickness of the conductive circuit layer when the blind holes are filled by electroplating the substrate. The total design thickness A is the sum of the first design thickness B, the second design thickness C and the base thickness D.

[0008] The substrate is electroplated to fill the holes, so that the blind holes are filled with the electroplated layer, and the thickness of the conductive line layer is increased to the first design thickness B.

[0009] The substrate is electroplated to thicken it, so that the thickness of the conductive circuit layer is increased to the second design thickness C.

[0010] In some embodiments, the electroplating of the substrate to fill the blind vias with the electroplated layer and to increase the conductive circuit layer by the first design thickness B includes:

[0011] Determine whether the first design thickness B is greater than 20 μm;

[0012] If the first design thickness B is less than 20 μm, the substrate is electroplated once to fill the holes, so that the blind holes are filled with the electroplated layer, and the thickness of the conductive line layer is increased to the first design thickness B.

[0013] If the first design thickness B is greater than or equal to 20 μm, the substrate is electroplated N times to fill the holes, so that the blind holes are filled with the electroplated layer, and the thickness of the conductive line layer is increased by the first design thickness B, where N is a positive integer greater than or equal to 2.

[0014] In some embodiments, during the N electroplating filling process of the substrate, the thickness of the conductive line layer increases by d1 each time the substrate is electroplated to fill the holes, where 10μm≤d1<20μm.

[0015] In some embodiments, the step of performing N electroplating cycles to fill the holes on the substrate includes:

[0016] Two electroplating clamps are respectively clamped to the first corner of the substrate and the second corner diagonally opposite to the first corner, and the substrate is electroplated for the N-1th time.

[0017] Two electroplating clips are respectively clamped at the third corner and the fourth corner diagonally opposite the third corner of the substrate to perform the Nth electroplating on the substrate. The projection of the line connecting the third corner and the fourth corner on the substrate and the projection of the line connecting the first corner and the second corner on the substrate intersect.

[0018] In some embodiments, the electroplating thickening of the substrate, such that the conductive circuit layer is increased in thickness to the second design thickness C, includes:

[0019] Determine whether the second design thickness C is greater than 20 μm;

[0020] If the second design thickness C is less than 20 μm, the substrate is electroplated once to thicken it, so that the thickness of the conductive line layer is increased to the second design thickness C.

[0021] If the second design thickness C is greater than or equal to 20 μm, the substrate is electroplated M times to thicken it, so that the thickness of the conductive line layer is increased by the second design thickness C, where M is a positive integer greater than or equal to 2.

[0022] In some embodiments, during the process of electroplating the substrate M times to thicken it, the thickness of the conductive line layer increases by d2 each time the substrate is electroplated to thicken it, where 10μm≤d2<20μm.

[0023] In some embodiments, when electroplating the substrate to fill holes, two electroplating clips are used to clamp the opposite ends of the substrate respectively;

[0024] And / or, when electroplating the substrate to thicken it, two electroplating clips are used to clamp the opposite ends of the substrate respectively.

[0025] In some embodiments, after the substrate is thickened by electroplating, the method for manufacturing the circuit board further includes:

[0026] A transfer film is applied to the thickened conductive circuit layer;

[0027] The transfer film is exposed according to the preset circuit data, which extends along a circular path. The preset circuit data is set in correspondence with the design circuit, and the inner circle of the preset circuit data is recessed relative to the inner circle of the design circuit and has a first pre-compensation amount.

[0028] The unexposed transfer film is then developed.

[0029] Etching removes the unexposed conductive layer covered by the transfer film, so that the remaining conductive layer forms the designed circuit.

[0030] In some embodiments, the outer ring of the preset line data is expanded relative to the outer ring of the designed line and has a second pre-compensation amount; and / or, the sidewall of the end of the preset line data is expanded relative to the sidewall of the end of the designed line and has a third pre-compensation amount.

[0031] Secondly, embodiments of this application provide a circuit board, which is manufactured by the circuit board manufacturing method described in the first aspect.

[0032] The method for fabricating a circuit board with dense thick copper lines and blind vias provided in this application has the following advantages: First, the total design thickness A of the conductive line layer is obtained, and then the total design thickness A is divided into a first design thickness B and a second design thickness C. Both the first design thickness B and the second design thickness C are greater than the base thickness D. The first design thickness B is the increase in thickness of the conductive line layer when the substrate is electroplated to fill the blind vias. The total design thickness A is the sum of the first design thickness B, the second design thickness C, and the base thickness D. Then, the substrate is electroplated to fill the vias. This process ensures that the blind vias are filled with the electroplated layer, and increases the thickness of the conductive circuit layer to the first design thickness B. Furthermore, the substrate is electroplated to thicken the conductive circuit layer, increasing its thickness to the second design thickness C. Therefore, while ensuring the blind vias are filled with the electroplated layer, the variation in the conductive circuit layer thickness after electroplating the substrate is reduced, and its uniformity is improved. This addresses the issue in related technologies where a large total design thickness A of the conductive circuit layer results in a large variation in the thickness of the conductive circuit layer, poor uniformity, and consequently, problems such as incomplete etching and fine lines during subsequent etching.

[0033] The advantages of the circuit board provided in this application compared to the prior art can be seen in the description of the advantages of the circuit board manufacturing method with thick copper fine lines and blind vias provided in this application compared to the prior art, which will not be repeated here. Attached Figure Description

[0034] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0035] Figure 1 This is a flowchart of a method for manufacturing a circuit board with thick copper fine lines and blind vias in one embodiment of this application;

[0036] Figure 2 This is a schematic diagram of the substrate structure in one embodiment of this application;

[0037] Figure 3 Is Figure 2 A schematic diagram showing a deposited layer on the bottom copper of the substrate;

[0038] Figure 4 Yes Figure 3 A schematic diagram of the substrate undergoing its first electroplating process to fill the holes;

[0039] Figure 5 Yes Figure 3 A schematic diagram showing the substrate undergoing a second electroplating process to fill the holes;

[0040] Figure 6 Yes Figure 5 The diagram shows the substrate undergoing its first electroplating thickening process.

[0041] Figure 7 Yes Figure 5 The diagram shows a substrate undergoing a second electroplating thickening process.

[0042] Figure 8 This is a schematic diagram of applying a transfer film to the thickened conductive line layer in the substrate after electroplating thickening the substrate in one embodiment of this application.

[0043] Figure 9 Yes Figure 8 The diagram shows the exposure and development of the transfer film.

[0044] Figure 10 It is the part removed by etching. Figure 9 A schematic diagram of the thickened conductive circuit layer is shown.

[0045] Figure 11 yes Figure 10 A partial structural diagram of the circuit design;

[0046] Figure 12 This is a schematic diagram of a single electroplating process for filling holes in a substrate, as described in another embodiment of this application.

[0047] Figure 13 This is a schematic diagram of a substrate being thickened by electroplating in another embodiment of this application;

[0048] Figure 14 This is a compensation rule for the circuit design in one embodiment of this application.

[0049] The markings in the diagram mean:

[0050] 10. Substrate;

[0051] 11. Substrate; 12. Conductive circuit layer; 120. Design circuit; 121. Bottom copper; 122. Deposited layer; 123. End; 124. Outer ring of circuit; 125. Inner ring of circuit; 13. Blind via; 20. Transfer film. Detailed Implementation

[0052] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0053] It should be noted that when a component is referred to as being "fixed to" or "set on" another component, it can be directly on or indirectly on that other component. When a component is referred to as being "connected to" another component, it can be directly connected to or indirectly connected to that other component.

[0054] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0055] In this specification, references to "one embodiment," "some embodiments," or simply "embodiment" mean that one or more embodiments of this application include a specific feature, structure, or characteristic described in connection with that embodiment. Therefore, the phrases "in one embodiment," "in some embodiments," "in other embodiments," "in still other embodiments," etc., appearing in different parts of this specification do not necessarily refer to the same embodiment, but rather mean "one or more, but not all, embodiments," unless otherwise specifically emphasized. Furthermore, in one or more embodiments, specific features, structures, or characteristics may be combined in any suitable manner.

[0056] To illustrate the technical solution of this application, the following description is provided in conjunction with specific accompanying drawings and embodiments.

[0057] A standard 50μm copper thickness circuit board corresponds to a line width / spacing of 100μm / 100μm. Buried magnetic circuit boards, in order to maximize the number of turns within a certain space, have finer line widths and spacings. However, when the copper thickness is larger, a finer line width and spacing design, such as a 50μm copper thickness corresponding to a line width / spacing of 75 / 75μm, exceeds the current manufacturing capabilities. This results in circuit boards with large variations in the thickness of the electroplated copper and poor uniformity, which in turn leads to problems such as incomplete etching and thin lines during subsequent etching.

[0058] In view of this, this application provides a method for manufacturing a circuit board with thick copper fine lines and blind vias, and the circuit board itself. This method can improve the problem that when the copper thickness is designed to be large in the related technology, the electroplated copper thickness of the manufactured circuit board varies greatly and the uniformity is poor, which leads to problems such as unclean etching and fine lines during subsequent etching.

[0059] Please refer to Figures 1 to 7 In a first aspect, embodiments of this application provide a method for manufacturing a circuit board with dense thick copper lines and blind vias 13, comprising:

[0060] S100: A substrate 10 is provided. The substrate 10 includes a base material 11 and two conductive line layers 12. The two conductive line layers 12 are respectively disposed on opposite sides of the base material 11. The substrate 10 is provided with a blind hole 13. The blind hole 13 penetrates one of the conductive line layers 12, and the other conductive line layer 12 defines the bottom surface of the blind hole 13. The basic thickness of the conductive line layer 12 is D.

[0061] Specifically, the conductive circuit layer 12 may include a base copper 121 and a deposition layer 122 disposed on the base copper 121. Part of the deposition layer 122 is located on the bottom wall and sidewall of the blind via 13. Both the base copper 121 and the deposition layer 122 may be copper or silver layers. The blind via 13 can be first processed on a process board including the substrate 10 and the base copper 121 by laser drilling. Then, the deposition layer 122 is deposited on the bottom wall and sidewall of the blind via 13 by chemical deposition or electroless copper plating for electroplating conductivity in the process. At the same time, the deposition layer 122 can also be deposited on the base copper 121 to obtain the substrate 10.

[0062] For example, the thickness of both the base copper 121 and the deposition layer 122 can be 5μm-7μm. The base copper 121 can be thinned to 5μm-7μm through copper reduction and browning. This avoids the risk of incomplete laser drilling during drilling if the base copper 121 thickness is greater than 7μm, and also prevents the base copper 121 from being too thin and being etched away. Browning involves forming a brown film on the surface of the base copper 121 to protect the copper surface.

[0063] When laser drilling, adjust the laser parameters, laser process the blind hole 13 on one side of the substrate 10, check whether the hole shape of the blind hole 13 is OK, and measure the roundness of the lower hole diameter / upper hole diameter > 90%.

[0064] S200: Obtain the total design thickness A of the conductive circuit layer 12, and divide the total design thickness A into a first design thickness B and a second design thickness C. Both the first design thickness B and the second design thickness C are greater than the base thickness D. The first design thickness B is the increase in thickness of the conductive circuit layer 12 when the blind via 13 is filled by electroplating the substrate 10. The total design thickness A is the sum of the first design thickness B, the second design thickness C and the base thickness D.

[0065] Specifically, the first design thickness B and the second design thickness C can be calculated based on parameters such as the electroplating equipment, the chemical system, and the chemical concentration. Alternatively, a first-piece test can be performed to obtain the first design thickness B and the second design thickness C.

[0066] It is understandable that ABD = C.

[0067] It should be noted that in actual production, the value of the first design thickness B can be determined according to the diameter of the blind hole 13. For a blind hole 13 with a conventional diameter of 0.1mm, the first design thickness B is about 20μm, and for a blind hole 13 with a conventional diameter of 0.15mm, the first design thickness B is about 25μm.

[0068] S300: Electroplating is performed on the substrate 10 to fill the blind holes 13 with the electroplated layer, and the thickness of the conductive line layer 12 is increased to the first design thickness B.

[0069] Specifically, the substrate 10 can be electroplated to fill vias using either horizontal continuous electroplating or VCP (Vertical Conveyor Plating). A long-duration, low-current electroplating method can be used to improve the uniformity of the thickened conductive layer 12. For example, when electroplating to fill vias in the substrate 10, the current density is 12 ASF-16 ASF, and the time is 45-60 minutes.

[0070] It should be noted that when the current density exceeds 16 ASF, the current density is high and the electroplating efficiency is high, but the thickened conductive circuit layer 12 is uneven, the current density is lower than 12 ASF, the electroplating time is too long, and the production efficiency is too low.

[0071] For example, when electroplating the substrate 10 to fill holes, two electroplating clamps are used to hold the opposite ends of the substrate 10 respectively, so that the substrate 10 will not float in the copper tank containing the electroplating solution, thereby improving the uniformity of electroplating.

[0072] S400: Electroplating is performed on the substrate 10 to thicken it, so that the thickness of the conductive line layer 12 is increased to the second design thickness C.

[0073] Specifically, VCP electroplating can be used to thicken the substrate 10. A long-duration, low-current electroplating method can be used to improve the uniformity of the thickened conductive layer 12. Generally, the minimum current density for VCP electroplating is 5 ASF, but considering production efficiency and uniformity, the current density can be between 12 ASF and 18 ASF, resulting in better uniformity. Current densities exceeding 18 ASF are high, leading to high electroplating efficiency, but the thickened conductive layer 12 becomes uneven. Current densities below 12 ASF result in long electroplating times and low production efficiency.

[0074] It is understandable that after the substrate 10 is thickened by electroplating, the thickness of the conductive circuit layer 12 is the total design thickness A, which can be greater than 50 μm.

[0075] For example, when electroplating the substrate 10 to thicken it, two electroplating clamps are used to hold the opposite ends of the substrate 10 respectively, so that the substrate 10 will not float in the copper tank containing the electroplating solution, thereby improving the uniformity of electroplating.

[0076] As can be seen from the above, the method for manufacturing a circuit board with thick copper fine lines and blind vias 13 provided in this application embodiment first obtains the total design thickness A of the conductive line layer 12, and then divides the total design thickness A into a first design thickness B and a second design thickness C. Both the first design thickness B and the second design thickness C are greater than the base thickness D. The first design thickness B is the increase in thickness of the conductive line layer 12 when the substrate 10 is electroplated to fill the vias so that the blind vias 13 are filled with the electroplated layer. The total design thickness A is the sum of the first design thickness B, the second design thickness C, and the base thickness D. Then, the substrate 10 is electroplated to fill the vias so that the blind vias 13 are filled with the electroplated layer. The hole 13 is filled with the electroplated layer, which increases the thickness of the conductive line layer 12 to the first design thickness B. The substrate 10 is also electroplated to thicken the conductive line layer 12, which increases the thickness of the conductive line layer 12 to the second design thickness C. Therefore, while ensuring that the blind hole 13 is filled with the electroplated layer, the difference in the conductive line layer 12 after electroplating the substrate 10 is reduced and its uniformity is improved. This can improve the situation in related technologies where the total design thickness A of the conductive line layer 12 is large, resulting in a large difference in the thickness of the conductive line layer 12 of the manufactured circuit board and poor uniformity, which in turn leads to problems such as incomplete etching and fine lines during subsequent etching.

[0077] Optionally, C ≥ 10μm. This setting can prevent problems such as poor browning and board breakage caused by excessively small C.

[0078] Specifically, before browning, there are processes such as circuit pretreatment and resin grinding. The conductive circuit layer 12 on the surface will be etched. There are connecting lines between the electroplated layers when the electroplating is done at different times. When the etching reaches the connecting position, the browning solution will enter, resulting in poor browning.

[0079] Optionally, after electroplating, a copper thickness measuring instrument can be used to check whether the thickness of the conductive line layer 12 meets the requirements and whether the range is controlled within ±5μm.

[0080] In addition, the float plate serves to fix and position the substrate 10. The design of the float plate allows for volume adjustment, thereby adjusting buoyancy. Therefore, the height deviation of the float plate during each production run will affect uniformity. It is typically tested once a month and adjusted along with the electroplating uniformity test. When producing this type of substrate 10 with special thick copper and narrow spacing, the copper thickness uniformity is tested on a test board before production. Uniformity is improved by adjusting the height of the float plate. For example, for a certain part number of substrate 10 with a height of 616mm, testing showed that a deviation setting of 4mm resulted in the best uniformity. Therefore, 616 + 4 = 620mm. Additionally, the equipment itself has a built-in 1mm deviation, so the actual float plate height is 621mm. Optimal uniformity is achieved by adjusting the float plate's deviation setting.

[0081] Specifically, the substrate 10 is electroplated to fill the blind vias 13, thereby increasing the conductive circuit layer 12 by a first design thickness B, including:

[0082] First, determine whether the thickness B of the first design is greater than 20μm.

[0083] Secondly, if the initial design thickness B is less than 20 μm, please refer to... Figure 12 Then, the substrate 10 is electroplated once to fill the holes, so that the blind holes 13 are filled with the electroplated layer, and the thickness of the conductive line layer 12 is increased to the first design thickness B.

[0084] If the first design thickness B is greater than or equal to 20 μm, the substrate 10 is electroplated N times to fill the holes, so that the blind holes 13 are filled with the electroplated layer, and the thickness of the conductive line layer 12 is increased to the first design thickness B, where N is a positive integer greater than or equal to 2.

[0085] By adopting the above scheme, the substrate 10 can be electroplated to fill the holes, so that the blind holes 13 are filled with the electroplated layer, and the conductive line layer 12 is increased by the first design thickness B, so that the difference of the thickened conductive line layer 12 is smaller and the uniformity is better.

[0086] It should be noted that the value of N is related to the uniformity accuracy requirements of the conductive layer 12, as well as the equipment and chemicals used. For example, when the first design thickness B is within 20 μm, the range can be within ±2 μm; if the first design thickness B is 25 μm, the range is within ±2.5 μm.

[0087] Considering factors such as electroplating equipment and chemicals, if the increase in thickness d1 of the conductive line layer 12 during each electroplating and hole filling operation on the substrate 10 is between 5 μm and 10 μm, the uniformity of the thickened conductive line layer 12 is optimal, then 5 ≤ d1 ≤ 10 μm. If the increase in thickness d1 of the conductive line layer 12 during each electroplating and hole filling operation on the substrate 10 is between 8 and 15 μm, the thickened conductive line layer 12 is optimal, then 8 ≤ d1 ≤ 15 μm. Other cases can be deduced similarly.

[0088] In this embodiment, during the N electroplating filling process of the substrate 10, the thickness of the conductive line layer 12 increases by d1 each time the substrate 10 is electroplated to fill the holes, where 10μm≤d1<20μm. This setting ensures both good uniformity of the thickness of the thickened conductive line layer 12 and sufficiently high production efficiency.

[0089] For example, when the first design thickness B is 25μm, N=2. When the substrate 10 is electroplated for the first time to fill the holes, the thickness of the conductive line layer 12 increases by B1. When the substrate 10 is electroplated for the second time to fill the holes, the thickness of the conductive line layer 12 increases by B2. B1 / B2 can be 12.5μm / 12.5μm, or 10μm / 15μm or 12 / 13μm, respectively. That is, B1 / B2 can be within the range of 10μm≤B1<20μm and 10μm≤B2<20μm.

[0090] Specifically, the substrate 10 undergoes N electroplating filling processes, including:

[0091] First, two electroplating clips are clamped at the first corner of the substrate 10 and the second corner diagonally opposite to the first corner, respectively, to perform the N-1th electroplating on the substrate 10.

[0092] Next, two electroplating clamps are respectively clamped at the third corner and the fourth corner diagonally opposite to the third corner of the substrate 10 to perform the Nth electroplating on the substrate 10. The projection of the line connecting the third corner and the fourth corner on the substrate 10 and the projection of the line connecting the first corner and the second corner on the substrate 10 intersect.

[0093] By adopting the above scheme, the thickness uniformity of the conductive line layer 12 after the substrate 10 is thickened by N electroplating and hole filling can be improved.

[0094] For example, when the substrate 10 is a cuboid, the first corner, the third corner, the second corner, and the fourth corner are four corners arranged sequentially along the edge of the substrate 10.

[0095] It should be noted that the current in the electroplating clip position is usually in a high potential region with a large current density and a thicker copper plating thickness. The lower half of the region is a low potential region with a slightly thinner copper plating thickness. Therefore, when performing N electroplating filling operations on the substrate 10, the copper thickness difference can be minimized by using a diagonal clamping method, resulting in better electroplating uniformity.

[0096] Specifically, the substrate 10 is thickened by electroplating, resulting in an increase in the thickness of the conductive circuit layer 12 to a second design thickness C, including:

[0097] First, determine whether the thickness C of the second design is greater than 20μm.

[0098] Secondly, if the second design thickness C is less than 20μm, please refer to... Figure 13 Then, the substrate 10 is electroplated to thicken it, so that the thickness of the conductive line layer 12 is increased to the second design thickness C.

[0099] If the second design thickness C is greater than or equal to 20 μm, the substrate 10 is thickened by M electroplating cycles, so that the thickness of the conductive line layer 12 is increased by the second design thickness C, where M is a positive integer greater than or equal to 2.

[0100] By adopting the above scheme, after electroplating the substrate 10 to thicken it so that the thickness of the conductive line layer 12 is increased to the second design thickness C, the difference of the thickened conductive line layer 12 is smaller and the uniformity is better.

[0101] In this embodiment, during the M-times of electroplating thickening of the substrate 10, the thickness of the conductive line layer 12 increases by d2 each time the substrate 10 is thickened by electroplating, where 10μm≤d2<20μm. This setting ensures both good uniformity of the thickness of the thickened conductive line layer 12 and sufficiently high production efficiency.

[0102] Please refer to Figures 8 to 11 In some embodiments, after electroplating to thicken the substrate 10, the method for manufacturing the circuit board further includes:

[0103] First, a transfer film 20 is applied to the thickened conductive circuit layer 12.

[0104] Specifically, the transfer film 20 can be a dry film.

[0105] Next, the transfer film 20 is exposed according to the preset line data. The preset line data extends along a circular path. The preset line data is set in correspondence with the design line 120. The inner circle of the preset line data is recessed relative to the inner circle 125 of the design line 120 and has a first pre-compensation amount.

[0106] The transfer film 20 can be exposed using a film or DI (Direct Imaging) exposure machine according to the preset circuit data. The exposure scale is set to 16±2 divisions, and the exposure uniformity is controlled to be >95%. Exposure is performed according to the preset circuit data.

[0107] Next, the unexposed transfer film 20 is developed.

[0108] Finally, the conductive circuit layer 12 covered by the unexposed transfer film 20 is etched away so that the remaining conductive circuit layer 12 forms the designed circuit 120.

[0109] Specifically, the conductive circuit layer 12 covered by the unexposed transfer film 20 can be removed by etching with an etching solution.

[0110] By adopting the above solution, the problem of excessive etching amount can be avoided when etching away the conductive circuit layer 12 covered by the unexposed transfer film 20, where the conductive circuit layer 12 corresponding to the inner circle 125 of the circuit 120 is easily attacked by the etching solution.

[0111] Optionally, when etching away the conductive circuit layer 12 covered by the unexposed transfer film 20, a long-side entry method can be used to improve etching uniformity. After etching away the conductive circuit layer 12 covered by the unexposed transfer film 20, AOI (Automated Optical Inspection) can be used to check whether the designed circuit 120 has problems such as thin lines or incomplete etching, and a linewidth measuring instrument can be used to measure whether the linewidth of the designed circuit 120 is within the required range.

[0112] Optionally, the outer ring of the preset circuit data is expanded relative to the outer ring 124 of the designed circuit 120 and has a second pre-compensation amount; and / or, the sidewall of the end of the preset circuit data is expanded relative to the sidewall of the end 123 of the designed circuit 120 and has a third pre-compensation amount. This can avoid the problem that the conductive circuit layer 12 corresponding to the outer ring 124 of the designed circuit 120 and the conductive circuit layer 12 corresponding to the end 123 (line head position) of the designed circuit 120 are easily attacked by etching solution, resulting in excessive etching.

[0113] For example, both the first and second pre-compensation amounts can compensate an additional 5μm on top of the normal compensation amount. The designed circuit 120 can be a coil.

[0114] The design circuit 120 can be optimized through pre-compensation and dynamic compensation to obtain a first pre-compensation amount, a second pre-compensation amount, and a third pre-compensation amount. Pre-compensation refers to the pre-compensation adjustment of the line width during the circuit board design process based on expected manufacturing tolerances and circuit performance requirements. Dynamic compensation refers to the dynamic compensation adjustment of the line width based on production data (etching hardness, line width variation). Pre-compensation is pre-compensation performed during the design phase, while dynamic compensation is real-time compensation performed during the manufacturing process. The compensation rules can be based on... Figure 14 As shown, the average copper thickness is the average thickness of different parts of the conductive circuit layer 12 after the substrate 10 is thickened by electroplating.

[0115] For example, in this embodiment, the line width / spacing of the designed circuit 120 is required to be 75μm / 75μm. During etching, the inner and outer rings of the designed circuit 120 are easily attacked by the etching solution, resulting in a large amount of etching. Therefore, a dynamic compensation of 40μm is applied. The circuits in the middle of the designed circuit 120 are relatively dense, and the exchangeability of the etching solution is poor, making them less susceptible to attack. Therefore, under the premise of ensuring a minimum pre-compensation spacing of 40μm for the line width, the pre-compensation is changed to 35μm. The ends 123 (line heads) of the designed circuit 120 are easily attacked by the etching solution on both sides due to the independent line design. Therefore, an additional 15μm is applied. In terms of process, the conventional approach is to feed the board along the long side to improve board placement efficiency. In this embodiment, the board is fed along the short side during production, resulting in more uniform solution distribution and better etching uniformity.

[0116] The method for manufacturing a circuit board with thick copper fine lines and blind vias 13 provided in this application improves the uniformity and range of electroplating by controlling the thickness d1 of the via filling and the thickness d2 of the thickening in each electroplating. It also solves the problems of poor electroplating uniformity, large range and etching line width by optimizing the line width compensation parameters and changing the board laying method.

[0117] Secondly, embodiments of this application provide a circuit board, which is manufactured by the circuit board manufacturing method of the first aspect.

[0118] The circuit board with thick copper fine lines and blind vias 13 provided in this application embodiment first obtains the total design thickness A of the conductive line layer 12, and then divides the total design thickness A into a first design thickness B and a second design thickness C. Both the first design thickness B and the second design thickness C are greater than the base thickness D. The first design thickness B is the increase in thickness of the conductive line layer 12 when the substrate 10 is electroplated to fill the blind vias 13. The total design thickness A is the sum of the first design thickness B, the second design thickness C, and the base thickness D. Then, the substrate 10 is electroplated to fill the blind vias 13. An electroplating layer is applied to the substrate 10, increasing the thickness of the conductive circuit layer 12 to a first design thickness B. The substrate 10 is also electroplated to thicken the conductive circuit layer 12 to a second design thickness C. This ensures that the blind vias 13 are filled with the electroplating layer while reducing the variation in the conductive circuit layer 12 after electroplating the substrate 10 and improving its uniformity. This addresses the issue in related technologies where a large total design thickness A of the conductive circuit layer 12 results in a large variation in the thickness of the conductive circuit layer 12, poor uniformity, and consequently, problems such as incomplete etching and fine lines during subsequent etching.

[0119] The above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.

Claims

1. A method of manufacturing a circuit board with thick copper fine lines and blind vias, characterized by, The application relates to a substrate and a method for manufacturing the substrate. The substrate comprises a substrate and two conductive circuit layers, the two conductive circuit layers are respectively arranged on the opposite sides of the substrate, the substrate is provided with a blind hole, the blind hole penetrates through one of the conductive circuit layers, and the other conductive circuit layer defines a hole bottom surface of the blind hole, the basic thickness of the conductive circuit layer is D; The total design thickness A of the conductive circuit layer is obtained, and the total design thickness A is split into a first design thickness B and a second design thickness C, the first design thickness B and the second design thickness C are both greater than the basic thickness D, the first design thickness B is the thickness of the conductive circuit layer increased when the blind hole is filled with an electroplated layer through electroplating filling of the substrate, and the total design thickness A is the sum of the first design thickness B, the second design thickness C and the basic thickness D; It is judged whether the first design thickness B is greater than 20 mu m; If the first design thickness B is less than 20 mu m, the substrate is subjected to one-time electroplating filling, so that the blind hole is filled with an electroplated layer, and the thickness of the conductive circuit layer is increased by the first design thickness B; if the first design thickness B is greater than or equal to 20 mu m, the substrate is subjected to N-time electroplating filling, so that the blind hole is filled with an electroplated layer, and the thickness of the conductive circuit layer is increased by the first design thickness B, and N is a positive integer greater than or equal to 2; The substrate is subjected to electroplating thickening, so that the thickness of the conductive circuit layer is increased by the second design thickness C.

2. The method of manufacturing a circuit board according to claim 1, wherein In the process of the N-time electroplating filling of the substrate, the thickness of the conductive circuit layer is increased by d1 each time the substrate is subjected to electroplating filling, and 10 mu m <= d1 < 20 mu m.

3. The method of manufacturing a circuit board according to claim 1, wherein The N-time electroplating filling of the substrate comprises the following steps: Two electroplating clamps are respectively clamped at a first corner and a second corner diagonally opposite to the first corner of the substrate, and the substrate is subjected to (N-1)-time electroplating; Two electroplating clamps are respectively clamped at a third corner and a fourth corner diagonally opposite to the third corner of the substrate, and the substrate is subjected to N-time electroplating, and the projection of the line connecting the third corner and the fourth corner on the substrate intersects the projection of the line connecting the first corner and the second corner on the substrate.

4. The method of manufacturing a circuit board according to claim 1, wherein The electroplating thickening of the substrate, so that the thickness of the conductive circuit layer is increased by the second design thickness C, comprises the following steps: It is judged whether the second design thickness C is greater than 20 mu m; If the second design thickness C is less than 20 mu m, the substrate is subjected to one-time electroplating thickening, so that the thickness of the conductive circuit layer is increased by the second design thickness C; If the second design thickness C is greater than or equal to 20 mu m, the substrate is subjected to M-time electroplating thickening, so that the thickness of the conductive circuit layer is increased by the second design thickness C, and M is a positive integer greater than or equal to 2.

5. The method of manufacturing a circuit board according to claim 4, wherein In the process of the M-time electroplating thickening of the substrate, the thickness of the conductive circuit layer is increased by d2 each time the substrate is subjected to electroplating thickening, and 10 mu m <= d2 < 20 mu m.

6. The method of manufacturing a circuit board according to claim 1, wherein The two electroplating clamps are used to clamp opposite ends of the substrate during the electroplating filling hole process. The two electroplating clamps are used to clamp opposite ends of the substrate during the electroplating thickening process.

7. The method of manufacturing a circuit board according to any one of claims 1 to 6, wherein After the electroplating thickening process, the circuit board manufacturing method further comprises: applying a transfer film to the thickened conductive circuit layer; exposing the transfer film according to preset circuit data, the preset circuit data extending along a circular path, wherein the preset circuit data is arranged corresponding to the design circuit, an inner circle of the preset circuit data is inwardly recessed relative to an inner circle of the design circuit and has a first preset compensation amount; developing the unexposed transfer film; etching to remove the conductive circuit layer not covered by the unexposed transfer film, so that the remaining conductive circuit layer forms the design circuit.

8. The method of manufacturing a circuit board according to claim 7, wherein An outer circle of the preset circuit data is outwardly expanded relative to an outer circle of the design circuit and has a second preset compensation amount; and / or, a side wall of an end portion of the preset circuit data is outwardly expanded relative to a side wall of an end portion of the design circuit and has a third preset compensation amount.

9. A wiring board, characterized by The circuit board is manufactured by the circuit board manufacturing method of any one of claims 1 to 8.

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