Stepped thick copper embedded heat dissipation substrate and processing method thereof

Abstract

The present invention discloses a stepped thick copper embedded heat dissipation substrate and its processing method. The processing method includes: processing the outer thick copper foil of the substrate into a stepped structure consisting of a thin copper region and a thick copper region, and forming an inner layer circuit on the thin copper region; applying a first photosensitive insulating layer to the stepped structure, and then exposing and developing the layer to form first and second holes with an inner wall roughness of no more than 5μm in the first photosensitive insulating layer; fixing a chip to a portion of the thick copper region exposed outside the first hole; applying a second photosensitive insulating layer to the first photosensitive insulating layer and the chip, forming an outer layer circuit connected to the chip pins on the second photosensitive insulating layer, and forming a first connecting copper body connected to the inner layer circuit and the outer layer circuit in the second hole, thereby producing a stepped thick copper embedded heat dissipation substrate. This processing method has high processing efficiency and precision, low processing cost, and the resulting heat dissipation substrate has high heat dissipation performance, high circuit pattern fineness, and low signal loss, meeting production requirements.

Description

Technical Field

[0001] The present invention relates to the technical field of circuit boards, and in particular to a stepped thick copper embedded heat dissipation substrate and a processing method thereof. Background Art

[0002] Copper-based printed circuit boards (PCBs) are widely used in high-power, high-heat dissipation products due to their excellent heat dissipation performance. In conventional PCB structures, the copper thickness of the circuit layer is uniform, with variations less than 5μm. Furthermore, the copper thickness of the circuit layer is directly proportional to its minimum line width and line spacing. In other words, as the copper thickness increases, the minimum line width and line spacing of the circuit layer also increase.

[0003] With the rapid development of artificial intelligence and the Internet of Things (IoT) technologies, chip computing speeds have increased significantly, exacerbating the heat dissipation challenges faced by electronic devices. This necessitates increasing the local copper thickness of circuit layers to improve their heat dissipation performance. However, circuit board production requires ensuring high heat dissipation performance while also meeting technical requirements such as minimum line width and spacing, high product precision, and minimal signal transmission loss. However, existing circuit board production processes are unable to meet these requirements.

[0004] In view of this, the present invention is proposed. Summary of the Invention

[0005] In order to overcome the above-mentioned defects, the present invention provides a stepped thick copper embedded heat dissipation substrate and a processing method thereof. The processing method is simple and reasonable, with high processing efficiency / precision and low processing cost. The obtained heat dissipation substrate has high heat dissipation performance, high circuit pattern fineness, and low signal loss, which well meets the production requirements of circuit boards.

[0006] The technical solution adopted by the present invention to solve the technical problem is: a method for processing a stepped thick copper embedded heat dissipation substrate, comprising:

[0007] Providing a substrate having an outer layer of thick copper foil; processing the outer layer of thick copper foil into a step structure consisting of a thin copper area and a thick copper area, and producing an inner layer circuit on the thin copper area;

[0008] Laying a first photosensitive insulating layer on the stepped structure provided with the inner layer circuit, and then exposing and developing the first photosensitive insulating layer to form a first hole capable of exposing at least a portion of the thick copper area and a second hole capable of exposing a portion of the inner layer circuit in the first photosensitive insulating layer, wherein the inner wall roughness of the first hole and the second hole is no greater than 5 μm;

[0009] Fixing the chip on the portion of the thick copper area exposed outside the first hole;

[0010] Covering the first photosensitive insulating layer and the chip with a second photosensitive insulating layer, while the pins of the chip and the second hole are exposed outside the second photosensitive insulating layer;

[0011] An outer layer circuit connected to and communicated with the pins of the chip is formed on the second photosensitive insulating layer, and a first connecting copper body connected to and communicated with the inner layer circuit and the outer layer circuit respectively is formed in the second hole; thus, the stepped thick copper embedded heat dissipation substrate is obtained.

[0012] As a further improvement of the present invention, the specific parameters for the exposure treatment of the first photosensitive insulating layer are: using a 41-grid exposure ruler, the number of exposure grids is 6 to 9 grids, and the exposure energy is 200 to 500 mJ / cm 2 , the exposure alignment accuracy is controlled within 7μm;

[0013] The specific parameters of the development process for the first photosensitive insulating layer are: the development window accuracy is controlled within ±10 μm, the development point is controlled at 40% to 50%, and the development line speed is controlled at 3 to 5 m / min;

[0014] In addition, after the development process is completed on the first photosensitive insulating layer, the first photosensitive insulating layer needs to be subjected to a heat curing process with a heat curing rate of ≥90% and a UV curing process with a light curing rate of ≥85%.

[0015] As a further improvement of the present invention, the depth of the first hole is not less than the height of the chip; when the chip is fixed on the thick copper area, there is a gap between the chip and the inner wall of the first hole for the second photosensitive insulating layer to fill.

[0016] As a further improvement of the present invention, the processing method for fixing the chip on the portion of the thick copper area exposed outside the first hole is: first, a glue layer is set on the portion of the thick copper area exposed outside the first hole through a glue dispensing process, and then the chip is mounted on the portion of the thick copper area exposed outside the first hole with its pins facing away from the thick copper area through SMT surface mounting technology, and then a curing treatment is performed to achieve the chip being fixed on the thick copper area.

[0017] As a further improvement of the present invention, the second photosensitive insulating layer is exposed and developed to form a third hole on the second photosensitive insulating layer that is connected to the second hole and arranged with the same central axis, and a fourth hole that can expose the pins of the chip, and the inner wall roughness of the third hole and the fourth hole is also not greater than 5μm.

[0018] As a further improvement of the present invention, specific parameters for exposing and developing the second photosensitive insulating layer are the same as those for exposing and developing the first photosensitive insulating layer;

[0019] In addition, after the development operation is completed on the second photosensitive insulating layer, the second photosensitive insulating layer also needs to be subjected to a heat curing treatment with a heat curing rate of ≥90% and a UV curing treatment with a light curing rate of ≥85%.

[0020] As a further improvement of the present invention, the inner diameter of the third hole is larger than the inner diameter of the second hole; the fourth hole is used to form a second connecting copper body connected and communicated with the outer layer circuit and the pins of the chip respectively.

[0021] As a further improvement of the present invention, the inner layer circuit is produced using circuit pattern production process A; and the circuit pattern production process A and the processing of the step structure both include sequentially performing pre-coating treatment, coating with a resist photosensitive film, exposure, development, etching, and film stripping.

[0022] In addition, the copper thickness of the thin copper area is 15-40 μm, and the copper thickness of the thick copper area is 35-100 μm; the minimum line width and minimum line spacing of the inner layer circuit are both 50 μm.

[0023] As a further improvement of the present invention, the outer layer circuit, the first connecting copper body and the second connecting copper body are manufactured using circuit pattern manufacturing process B;

[0024] The circuit pattern production process B includes pretreatment, seed layer production, lamination pretreatment, resist plating photosensitive film coating, exposure, development, pattern electroplating, film stripping and flash etching.

[0025] The present invention also provides a stepped thick copper embedded heat dissipation substrate, which is manufactured using the processing method of the stepped thick copper embedded heat dissipation substrate described in the present invention.

[0026] The beneficial effects of the present invention are as follows: ① Compared with the prior art inner layer circuit fabrication method, the present invention adopts a processing method of "first machining a stepped structure consisting of a thin copper area and a thick copper area, and then fabricating the inner layer circuit on the thin copper area", which not only meets the requirements of high heat dissipation performance of the circuit board product, but also meets the requirements of fine circuit pattern fabrication. The present invention can produce the inner layer circuit with a minimum line width and minimum line spacing of 50μm; in addition, the above processing method can better save processing costs and facilitate production implementation. ② Compared with the prior art method of fabricating holes and grooves by laser processing or machining, the present invention adopts a hole processing method of "attaching a photosensitive insulating layer, exposing and developing the photosensitive insulating layer" to fabricate the second hole, etc., which not only has a simple process, high processing efficiency (can realize batch production of holes), low processing cost, but also high processing precision and high product quality. In particular, the roughness of the inner wall of the second hole, etc., can be made no greater than 5μm, thereby achieving ultra-low surface roughness of the surface of the first connecting copper body, etc. formed in the hole, thereby greatly reducing the signal transmission loss of the circuit board product. In summary, the processing method of the stepped thick copper embedded heat dissipation substrate of the present invention is simple and reasonable, with high processing efficiency / precision and low processing cost. In addition, the obtained heat dissipation substrate has high heat dissipation performance, high circuit pattern fineness, and low signal loss, which well meets the production requirements of circuit boards. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 This is a flow chart of the method for processing the stepped thick copper embedded heat dissipation substrate according to Example 1 of the present invention;

[0028] Figure 2 Schematic diagram of the cross-sectional structure of the substrate in Example 1 of the present invention;

[0029] Figure 3 for Figure 2 A simplified schematic diagram of the cross-sectional structure of the substrate shown;

[0030] Figure 4 Schematic diagram of the cross-sectional structure after the outer thick copper foil of the substrate is processed into a step structure in Example 1 of the present invention;

[0031] Figure 5 Schematic diagram of the cross-sectional structure of the first intermediate plate obtained in Example 1 of the present invention;

[0032] Figure 6 Schematic diagram of the cross-sectional structure of the second intermediate plate obtained in Example 1 of the present invention;

[0033] Figure 7 Schematic diagram of the cross-sectional structure of the third intermediate plate obtained in Example 1 of the present invention;

[0034] Figure 8Schematic diagram of the cross-sectional structure of the fourth intermediate plate obtained in Example 1 of the present invention;

[0035] Figure 9 This is a schematic diagram of the cross-sectional structure of the stepped thick copper embedded heat dissipation substrate obtained in Example 1 of the present invention.

[0036] The following description is made with reference to the accompanying drawings:

[0037] 1. Substrate; 10. Outer thick copper foil; 100. Thin copper area; 101. Thick copper area; 102. Inner circuit; 10a. Inner copper foil; 11. Support unit; 12. Insulation layer; 2. First photosensitive insulation layer; 21. First hole; 22. Second hole; 3. Chip; 4. Second photosensitive insulation layer; 40. Third hole; 41. Fourth hole; 5. Outer circuit; 6. First connecting copper body; 7. Second connecting copper body. DETAILED DESCRIPTION

[0038] The preferred embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0039] Example 1:

[0040] Please see the attached Figures 1 to 9 As shown, this embodiment 1 provides a method for processing a stepped thick copper embedded heat dissipation substrate, which mainly includes the following processing steps:

[0041] S1: providing a substrate 1 having an outer thick copper foil 10 ; processing the outer thick copper foil 10 into a step structure consisting of a thin copper area 100 and a thick copper area 101 , and fabricating an inner layer circuit 102 on the thin copper area 100 .

[0042] For details, please refer to the attached Figure 2 As shown, in this embodiment 1, the substrate 1 preferably adopts a multi-layer board structure composed of multiple insulating layers 12 and multiple copper foil layers alternately stacked in sequence, wherein the insulating layer 12 is preferably a prepreg or an insulating film, and the thickness of the multiple insulating layers 12 is preferably designed to be the same, but the specific thickness value is determined according to the design requirements of the heat dissipation substrate; among the multiple copper foil layers, the thickness of the two outermost copper foil layers is greater than the thickness of the other copper foil layers located between them, that is, if the two outermost copper foil layers are defined as "outer thick copper foil 10" and the other copper foil layers located between the two outer thick copper foil layers 10 are defined as "inner copper foil 10a", then the thickness of the outer thick copper foil 10 (or can be called "copper thickness") is greater than the thickness of the inner copper foil 10a; further, according to the design requirements of the heat dissipation substrate, this embodiment 1 also optimizes the thickness of the outer thick copper foil 10 / copper thickness to be 35-100 μm.

[0043] In addition, according to the design requirements of the heat dissipation substrate, at least one of the two layers of the outer thick copper foil 10 can be subjected to subsequent processing (such as the following: step structure processing; inner layer circuit production; first photosensitive insulation layer coating and processing; chip mounting; second photosensitive insulation layer coating and processing; outer layer circuit production, etc.). This embodiment 1 is described by taking the subsequent processing of one of the layers of the outer thick copper foil 10 as an example. It is understandable that when only one of the layers of the outer thick copper foil 10 is subjected to subsequent processing, the other structures in the substrate 1 (such as the attached Figure 2 The multiple layers of insulating layers 12, multiple layers of inner copper foil 10a, and the remaining outer thick copper foil 10 (enclosed by the red box) will play a supporting role as a whole. Therefore, for the sake of simplicity and clarity, this embodiment 1 simplifies the structure of the substrate 1, that is, the multiple layers of insulating layers 12, multiple layers of inner copper foil 10a, and the remaining outer thick copper foil 10 in the substrate 1 are collectively referred to as the supporting unit 11. Figure 3 shown.

[0044] Based on the above structure of the substrate 1, the processing method of this embodiment 1 for processing the outer thick copper foil 10 into a step structure is as follows: the outer thick copper foil 10 is sequentially subjected to pre-coating treatment (such as cleaning and heating and drying treatment), coated with a photosensitive film (preferably a photosensitive dry film), exposed, developed, alkaline etched and stripped, so that the outer thick copper foil 10 is processed into a step structure consisting of the thin copper area 100 and the thick copper area 101. For details, please refer to the attached Figure 4 Note: The above-mentioned "pre-coating treatment, coating with photoresist, exposure, development, alkaline etching and film stripping" are all conventional technical means in the field of circuit board processing, so they will not be described in detail here.

[0045] Furthermore, in this embodiment 1, by controlling the depth and control of alkaline etching, the copper thickness h1 of the thin copper area 100 is optimized to be 15-40 μm, and the copper thickness h2 of the thick copper area 101 is optimized to be 35-100 μm. It can be understood that part of the area on the outer thick copper foil 10 does not need to be etched to form the thick copper area 101, which meets the high heat dissipation performance requirements of circuit board products (such as heat dissipation substrates); part of the area on the outer thick copper foil 10 needs to be deeply etched to form the thin copper area 100, which meets the fine circuit production requirements of circuit board products; and the copper thickness tolerance of the thin copper area 100 is controlled within ±1 to ±3 μm.

[0046] Based on the obtained step structure, in this embodiment 1, the inner layer circuit 102 is produced on the thin copper area 100 by using the circuit pattern production process A (ie, the inner layer circuit 102 is integrally formed on the thin copper area 100). Figure 5 The circuit pattern production process A includes, in sequence, pre-coating treatment (such as cleaning and heating and drying), coating with a photosensitive resist film (preferably a photosensitive dry film), exposure, development, alkaline etching, and film stripping. These processes are conventional techniques in the field of circuit board processing and are therefore not described in detail here.

[0047] It is understandable that, ① compared to the prior art method of producing circuit patterns on thick copper areas, this embodiment 1 produces the inner layer circuit 102 on the thin copper area 100, which can make the inner layer circuit 102 more refined, and achieve a minimum line width and minimum line spacing of 50μm for the inner layer circuit 102. ② compared to the prior art method of first producing circuit patterns on the thin copper area and then performing electroplating layer addition processing, this embodiment 1 adopts the method of "first processing a step structure consisting of a thin copper area and a thick copper area, and then producing the inner layer circuit on the thin copper area", which not only meets the requirements of high heat dissipation performance of circuit board products, but also meets the requirements of producing fine circuit patterns, and can also better save processing costs and facilitate production implementation.

[0048] For the convenience of description, in this embodiment 1, the board formed after the inner layer circuit 102 is manufactured in the above S1 is also defined as a first intermediate board.

[0049] S2: A first photosensitive insulating layer 2 is attached to the step structure provided with the inner layer circuit 102, and then the first photosensitive insulating layer 2 is exposed and developed to form a first hole 21 capable of exposing at least a portion of the thick copper area 101 and a second hole 22 capable of exposing a portion of the inner layer circuit 102 on the first photosensitive insulating layer 2, and the inner wall roughness of the first hole 21 and the second hole 22 is not greater than 5μm.

[0050] Specifically, the specific processing method of the above S2 is:

[0051] S21: Cleaning and roughening the first intermediate plate to enhance the flatness and bonding strength of the first photosensitive insulating layer 2 attached to the first intermediate plate in a subsequent process.

[0052] S22: Utilize a vacuum lamination process to laminate the first photosensitive insulating layer 2 onto the step structure of the first intermediate plate; wherein, the first photosensitive insulating layer 2 can preferably be a photosensitive dry film, such as a photosensitive modified epoxy resin film or an acrylic resin type photosensitive film.

[0053] S23: Expose and develop the first photosensitive insulating layer 2. The specific parameters of the exposure process are: using a 41-grid exposure ruler, 6 to 9 exposure grids, and an exposure energy of 200 to 500 mJ / cm 2 , the exposure alignment accuracy is controlled within 7 μm; the specific parameters of the development process are: the development window accuracy is controlled within ±10 μm, the development point is controlled at 40% to 50%, and the development line speed is controlled at 3 to 5 m / min; so as to realize processing on the first photosensitive insulating layer 2 to expose at least part of the thick copper area 101 and the second hole 22 to expose part of the inner layer circuit 102. For details, please refer to the attached Figure 6 As shown. It can be understood that based on the material properties of the first photosensitive insulating layer 2 and the optimal control of the specific processing parameters during the exposure and development treatments, the first hole 21 and the second hole 22 can be precisely formed, and the inner wall roughness of the first hole 21 and the second hole 22 can be made no greater than 5 μm, which is conducive to achieving ultra-low surface roughness of the surface of the first connecting copper body 6 in the subsequent process, thereby greatly reducing the loss during signal transmission.

[0054] Furthermore, according to the design requirements of the heat dissipation substrate, the depth of the first hole 21 is designed to be no less than the height of the chip 3 (preferably slightly greater in this embodiment), and the aperture of the first hole 21 is designed to be greater than the width of the chip 3, that is, when the chip 3 is fixedly set on the thick copper area 101 in the post-process, there is a gap between the chip 3 and the inner wall of the first hole 21 (see the attached FIG. Figure 7 This is beneficial and convenient for installing the chip 3 in the first hole 21, and can also allow the second photosensitive insulating layer 4 in the subsequent process to be filled between the chip 3 and the first hole 21, insulating and tightly wrapping the chip 3 (see the attached Figure 8 As shown), the performance of the chip 3 is effectively improved. It is understandable that the control design of the first hole 21 also reflects the control requirements of the thickness of the first photosensitive insulating layer 2 in this embodiment 1.

[0055] As for the size of the second hole 22 , this embodiment 1 does not impose any restrictions, and the size is determined according to the design requirements of the heat dissipation substrate.

[0056] S24: After the first photosensitive insulating layer 2 is exposed and developed, the first photosensitive insulating layer 2 is also cured. Furthermore, the curing treatment method preferably adopts a composite curing treatment method consisting of a baking heat curing treatment with a thermal curing rate ≥ 90% and a UV light curing treatment with a light curing rate ≥ 85%. The order and treatment time of the baking heat curing treatment and the UV light curing treatment are mainly determined by the specific material of the first photosensitive insulating layer 2, and this embodiment does not impose any restrictions. Based on the above curing treatment method, while achieving a firm bond between the first photosensitive insulating layer 2 and the step structure of the first intermediate plate, the inner wall roughness of the first hole 21 and the second hole 22 can also be further optimized, that is, further ensuring that the inner wall roughness of the first hole 21 and the second hole 22 is no greater than 5μm, thereby further reducing the surface roughness of the first connecting copper body 6.

[0057] In summary, compared with the prior art of making holes and grooves by laser processing or machining, the above-mentioned hole processing method used in this embodiment 1 is not only simple in process, high in processing efficiency (batch processing of the first and second holes can be achieved), and low in processing cost, but also has high processing accuracy (achieved based on high exposure alignment accuracy and high development window opening accuracy), and in particular, the roughness of the inner wall of the hole can be made no greater than 5μm, which greatly reduces the surface roughness of the first connecting copper body 6.

[0058] For the convenience of description, this embodiment 1 also defines the board formed by firmly combining the first photosensitive insulating layer 2 and the first intermediate board as a second intermediate board.

[0059] S3 : fixing the chip 3 on the portion of the thick copper area 101 exposed outside the first hole 21 .

[0060] Specifically, the specific processing method of the above S3 is:

[0061] S31 : Based on the second intermediate board, a glue layer is provided on the portion of the thick copper area 101 exposed outside the first hole 21 by a glue dispensing process.

[0062] S32: Using SMT surface mounting technology, mount the chip 3 on the portion of the thick copper area 101 exposed outside the first hole 21 with its pins facing away from the thick copper area 101; Figure 7 shown.

[0063] S33 : performing a heating and curing process to achieve a firm bond between the chip 3 and the thick copper area 101 , that is, to achieve a fixed arrangement of the chip 3 on the thick copper area 101 .

[0064] Note: This embodiment 1 does not impose any restrictions on the specific type and model of the chip 3, which is determined based on the design requirements of the heat dissipation substrate.

[0065] For the convenience of description, in this embodiment 1, the board formed by firmly combining the chip 3 and the second intermediate board is also defined as a third intermediate board.

[0066] S4 : covering the first photosensitive insulating layer 2 and the chip 3 with a second photosensitive insulating layer 4 , while the pins of the chip 3 and the second holes 22 are exposed outside the second photosensitive insulating layer 4 .

[0067] Specifically, the specific processing method of the above S4 is:

[0068] S41: Cleaning and roughening the third intermediate plate to enhance the flatness and bonding strength of the second photosensitive insulating layer 4 attached to the third intermediate plate in a subsequent process.

[0069] S42: Using a vacuum lamination process, the second photosensitive insulating layer 4 is laminated onto the first photosensitive insulating layer 2 and the chip 3; wherein, the second photosensitive insulating layer 4 is made of the same material as the first photosensitive insulating layer 2, but has a different thickness. Specifically, the second photosensitive insulating layer 4 is thinner, but the specific thickness is determined according to the design requirements of the heat dissipation substrate. Figure 8 It can be seen that the second photosensitive insulating layer 4 is filled between the chip 3 and the first hole 21 .

[0070] S43: Expose and develop the second photosensitive insulating layer 4 to form a third hole 40 penetrating the second hole 22 and arranged coaxially with the second hole 22, and a fourth hole 41 capable of exposing the pins of the chip 3. For details, please refer to the attached Figure 8 As shown. The specific parameters for the exposure and development of the second photosensitive insulating layer 4 in this embodiment 1 are the same as the specific parameters for the exposure and development of the first photosensitive insulating layer 2 described above, and are therefore not described in detail here. However, it is understandable that the inner wall roughness of the third hole 40 and the fourth hole 41 in this embodiment 1 can also be no greater than 5 μm, thereby facilitating the ultra-low surface roughness of the surfaces of the first connecting copper body 6 and the second connecting copper body 7 in subsequent processes, thereby significantly reducing signal transmission losses.

[0071] Furthermore, according to the design requirements of the heat dissipation substrate, the inner diameter of the third hole 40 is designed to be larger than the inner diameter of the second hole 22, so as to ensure that the third hole 40 and the second hole 22 are arranged with the same central axis; there is no restriction on the inner diameter of the fourth hole 41, as long as the pins of the chip 3 can be exposed; it is understandable that the fourth hole 41 is used to form a second connecting copper body 7 that is connected and communicated with the outer layer circuit 5 and the pins of the chip 3 respectively.

[0072] S44: After the exposure and development operations are completed on the second photosensitive insulating layer 4, the second photosensitive insulating layer 4 is also cured. Similar to the above-mentioned S24, the curing treatment method used in this step can also preferably adopt a composite curing treatment method consisting of a baking heat curing treatment with a heat curing rate ≥ 90% and a UV light curing treatment with a light curing rate ≥ 85%. It can be understood that the above-mentioned curing treatment method not only ensures a firm bond between the second photosensitive insulating layer 4 and the third intermediate plate, but also further optimizes the inner wall roughness of the third hole 40 and the fourth hole 41, further ensuring that the inner wall roughness of the third hole 40 and the fourth hole 41 is no greater than 5μm.

[0073] For the convenience of description, in this embodiment 1, the board formed by firmly combining the second photosensitive insulating layer 4 and the third intermediate board is also defined as a fourth intermediate board.

[0074] S5: Using the circuit pattern production process B, an outer layer circuit 5 connected to and communicated with the pins of the chip 3 is formed on the second photosensitive insulating layer 4, and a first connecting copper body 6 connected to and communicated with the inner layer circuit 102 and the outer layer circuit 5 is formed in the second hole 22; that is, the stepped thick copper embedded heat dissipation substrate is obtained.

[0075] Specifically, the specific processing method of the above-mentioned circuit pattern production process B is:

[0076] S51: Pre-treating the second photosensitive insulating layer 4 of the fourth intermediate plate, such as roughening or degumming (which can be understood as thinning the second photosensitive insulating layer 4) to enhance the bonding strength of the outer layer circuit 5, the first connecting copper body 6 and the second connecting copper body 7 during molding in the subsequent process.

[0077] S52 : forming seed layers on the surface of the second photosensitive insulating layer 4 and the inner walls of the second hole 22 , the third hole 40 and the fourth hole 41 respectively by using a copper plating process.

[0078] S53: performing pre-coating treatments such as cleaning, heating and drying on the fourth intermediate plate with the seed layer to facilitate subsequent processes.

[0079] S54 : applying a plating resist photosensitive dry film to the surface of the second photosensitive insulating layer 4 , while covering the third hole 40 and the fourth hole 41 .

[0080] S55: The anti-plating photosensitive dry film is exposed and developed so that the second hole 22, the third hole 40 and the fourth hole 41 are exposed outside the anti-plating photosensitive dry film, and a local area of ​​the seed layer located on the surface of the second photosensitive insulating layer 4 is exposed outside the anti-plating photosensitive dry film to form an outer layer circuit forming area.

[0081] S56: Using a graphic electroplating process, the first connecting copper body 6 is electroplated in the second hole 22 and the third hole 40 that intersect each other, the second connecting copper body 7 is electroplated in the fourth hole 41, and the outer layer circuit 5 that is respectively connected and communicated with the first connecting copper body 6 and the second connecting copper body 7 is electroplated on the outer layer circuit forming area.

[0082] S57: After removing the anti-plating photosensitive dry film by using a film stripping solution, the exposed seed layer (i.e., the seed layer previously covered by the anti-plating photosensitive dry film) is removed by a flash etching process to obtain the step-thick copper embedded heat dissipation substrate; for details, please refer to the attached Figure 9 shown.

[0083] S6: performing conventional surface treatment, molding, electrical testing, finished product inspection, packaging and shipment on the stepped thick copper embedded heat dissipation substrate in sequence, thus completing the production of the subsequent required finished stepped thick copper embedded heat dissipation substrate.

[0084] From the above content, it can be seen that ① compared with the inner layer circuit manufacturing method in the prior art, this embodiment 1 adopts the processing method of "first processing a step structure consisting of a thin copper area and a thick copper area, and then manufacturing the inner layer circuit on the thin copper area", which not only meets the high heat dissipation performance requirements of the circuit board product, but also meets the production requirements of fine circuit patterns. This embodiment 1 can produce the inner layer circuit with a minimum line width and a minimum line spacing of 50μm; in addition, the above processing method can also better save processing costs and facilitate production implementation. ② Compared with the prior art of making holes and grooves by laser processing or machining, this embodiment 1 adopts a hole processing method that combines "attaching a photosensitive insulating layer, exposing and developing the photosensitive insulating layer" to produce the second hole, etc., which not only has a simple process, high processing efficiency (mass production of holes can be achieved), and low processing cost, but also has high processing accuracy and high product quality. In particular, the roughness of the inner wall of the second hole and other holes can be made no more than 5μm, so that the surface of the first connecting copper body, etc. formed in the above-mentioned hole can achieve ultra-low surface roughness, thereby greatly reducing the loss of circuit board product signals during transmission.

[0085] Example 2:

[0086] This embodiment 2 provides a stepped thick copper embedded heat dissipation substrate, which is manufactured using the processing method of the stepped thick copper embedded heat dissipation substrate described in the above embodiment 1.

[0087] Specifically, the specific structure of the step-thick copper embedded heat dissipation substrate described in this embodiment 2 is as follows: Figure 9 As shown, the heat dissipation substrate includes a board body, a first photosensitive insulating layer 2, a chip 3 and a second photosensitive insulating layer 4, wherein the board body is provided with a support unit 11 and a step structure fixedly arranged on the support unit 11, the step structure is composed of a thin copper area 100 and a thick copper area 101, and an inner layer circuit 102 is integrally formed on the thin copper area 100; the first photosensitive insulating layer 2 is fixedly attached to the step structure, and the first photosensitive insulating layer 2 is provided with a first hole 21 capable of exposing at least part of the thick copper area 101 and a second hole 22 capable of exposing part of the inner layer circuit 102; the chip 3 is fixedly arranged on the portion of the thick copper area 101 exposed outside the first hole 21, That is, the chip 3 is built into the first hole 21 and is fixedly connected to the thick copper area 101 at the same time; the second photosensitive insulating layer 4 is fixedly attached to the first photosensitive insulating layer 2 and the chip 3, and the second photosensitive insulating layer 4 is provided with a third hole 40 that is connected to the second hole 22 and is arranged with the same center axis, and a fourth hole 41 that can expose the pins of the chip 3. In addition, a first connecting copper body 6 is electroplated in the second hole 22 and the third hole 40 that are connected to each other, a second connecting copper body 7 is electroplated in the fourth hole 41, and an outer layer circuit 5 that is connected and communicated with the first connecting copper body 6 and the second connecting copper body 7 respectively is electroplated on the second photosensitive insulating layer 4.

[0088] From the above, it can be seen that the stepped thick copper embedded heat dissipation substrate described in this embodiment 2 has many advantages such as high heat dissipation performance, high circuit pattern fineness, low signal loss, and low processing cost, which well meets the production requirements of circuit boards.

[0089] Finally, the prefixes "first", "second", etc. of the component names in this application specification (such as the first photosensitive insulating layer, the second photosensitive insulating layer, etc.) and the suffixes "A", "B", etc. of the component names (such as circuit pattern production process A, circuit pattern production process B, etc.) are only for the convenience of description and are not used to limit the scope of the implementation of the patent of this invention.

[0090] In the above description, many specific details are set forth in order to fully understand the present invention. However, the above description is only a preferred embodiment of the present invention. The present invention can be implemented in many other ways different from those described herein, so the present invention is not limited to the specific implementation disclosed above. At the same time, any person skilled in the art can make many possible changes and modifications to the technical solution of the present invention using the methods and technical contents disclosed above without departing from the scope of the technical solution of the present invention, or modify it into an equivalent embodiment of equivalent changes. Any simple modification, equivalent change and modification made to the above embodiment based on the technical essence of the present invention without departing from the content of the technical solution of the present invention still falls within the scope of protection of the technical solution of the present invention.

Claims

1. A method for processing a stepped thick copper embedded heat dissipation substrate, characterized by: include: Providing a substrate (1) having an outer thick copper foil (10); processing the outer thick copper foil (10) into a step structure consisting of a thin copper area (100) and a thick copper area (101), and producing an inner layer circuit (102) on the thin copper area (100); A first photosensitive insulating layer (2) is applied to the step structure provided with the inner layer circuit (102), and then the first photosensitive insulating layer (2) is exposed and developed to form a first hole (21) capable of exposing at least a portion of the thick copper area (101) and a second hole (22) capable of exposing a portion of the inner layer circuit (102) on the first photosensitive insulating layer (2), wherein the inner wall roughness of the first hole (21) and the second hole (22) is not greater than 5 μm; The chip (3) is fixedly arranged on a portion of the thick copper area (101) exposed outside the first hole (21); A second photosensitive insulating layer (4) is provided on the first photosensitive insulating layer (2) and the chip (3), and the pins of the chip (3) and the second hole (22) are exposed outside the second photosensitive insulating layer (4); An outer layer circuit (5) connected to and in communication with the pins of the chip (3) is formed on the second photosensitive insulating layer (4), and a first connecting copper body (6) connected to and in communication with the inner layer circuit (102) and the outer layer circuit (5) is formed in the second hole (22); thus, the stepped thick copper embedded heat dissipation substrate is obtained.

2. The processing method of the stepped thick copper embedded heat dissipation substrate according to claim 1, characterized in that: The specific parameters for the exposure treatment of the first photosensitive insulating layer (2) are: using a 41-grid exposure ruler, the number of exposure grids is 6 to 9 grids, and the exposure energy is 200 to 500 mJ / cm 2 , the exposure alignment accuracy is controlled within 7μm; The specific parameters for developing the first photosensitive insulating layer (2) are: the development window accuracy is controlled within ±10 μm, the development point is controlled at 40% to 50%, and the development line speed is controlled at 3 to 5 m / min; In addition, after the development process is completed on the first photosensitive insulating layer (2), the first photosensitive insulating layer (2) needs to be subjected to a heat curing process with a heat curing rate of ≥90% and a UV curing process with a light curing rate of ≥85%.

3. The method for processing a stepped thick copper embedded heat dissipation substrate according to claim 1, characterized in that: The depth of the first hole (21) is not less than the height of the chip (3); When the chip (3) is fixedly disposed on the thick copper area (101), a gap is provided between the chip (3) and the inner wall of the first hole (21) for the second photosensitive insulating layer (4) to fill.

4. The method for processing a stepped thick copper embedded heat dissipation substrate according to claim 1, wherein: The processing method for fixing the chip (3) on the portion of the thick copper area (101) exposed outside the first hole (21) is as follows: first, a glue layer is provided on the portion of the thick copper area (101) exposed outside the first hole (21) by a glue dispensing process, and then the chip (3) is mounted on the portion of the thick copper area (101) exposed outside the first hole (21) by SMT surface mounting technology in a manner in which its pins face away from the thick copper area (101), and then a curing process is performed to achieve the fixing of the chip (3) on the thick copper area (101).

5. The method for processing a stepped thick copper embedded heat dissipation substrate according to claim 2, characterized in that: The second photosensitive insulating layer (4) is exposed and developed to form a third hole (40) penetrating the second hole (22) and arranged coaxially with the second hole (22), and a fourth hole (41) capable of exposing the pins of the chip (3) on the second photosensitive insulating layer (4), and the inner wall roughness of the third hole (40) and the fourth hole (41) is also not greater than 5μm.

6. The method for processing a stepped thick copper embedded heat dissipation substrate according to claim 5, characterized in that: The specific parameters for the exposure and development process of the second photosensitive insulating layer (4) are the same as the specific parameters for the exposure and development process of the first photosensitive insulating layer (2); In addition, after the development operation is completed on the second photosensitive insulating layer (4), the second photosensitive insulating layer (4) also needs to be subjected to a heat curing treatment with a heat curing rate of ≥90% and a UV light curing treatment with a light curing rate of ≥85%.

7. The method for processing a stepped thick copper embedded heat dissipation substrate according to claim 5, characterized in that: The inner diameter of the third hole (40) is larger than the inner diameter of the second hole (22); the fourth hole (41) is used to form a second connecting copper body (7) connected and communicating with the outer layer circuit (5) and the pins of the chip (3).

8. The method for processing a stepped thick copper embedded heat dissipation substrate according to claim 1, wherein: The inner layer circuit (102) is produced by using a circuit pattern production process A; and the circuit pattern production process A and the processing technology of the step structure both include sequentially performing pre-filming treatment, coating with an anti-corrosion photosensitive film, exposure, development, etching, and film stripping processing; In addition, the copper thickness of the thin copper area (100) is 15 to 40 μm, and the copper thickness of the thick copper area (101) is 35 to 100 μm; the minimum line width and minimum line spacing of the inner layer circuit (102) are both 50 μm.

9. The method for processing a stepped thick copper embedded heat dissipation substrate according to claim 7, wherein: The outer layer circuit (5), the first connecting copper body (6) and the second connecting copper body (7) are manufactured using circuit pattern manufacturing process B; The circuit pattern production process B includes pretreatment, seed layer production, lamination pretreatment, resist plating photosensitive film coating, exposure, development, pattern electroplating, film stripping and flash etching.

10. A stepped thick copper embedded heat dissipation substrate, characterized by: The step-thick copper embedded heat dissipation substrate is manufactured by the processing method of any one of claims 1 to 9.

Images