Silicon wafer morphology adjustment method, device and equipment

By obtaining the silicon wafer topography image and generating topography parameters, and adjusting the processing parameters of the silicon wafer grinding equipment, the problem of inaccurate control of the silicon wafer micromorphology in the double-sided vertical grinding equipment is solved, and precise adjustment of the silicon wafer micromorphology is achieved.

CN119260480BActive Publication Date: 2025-10-03XIAN ESWIN MATERIAL TECHNOLOGY CO LTD +1
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Patent Information

Application Number
CN202411700316.1
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-11-26
Publication Date
2025-10-03
Estimated Expiration
2044-11-26

AI Technical Summary

Technical Problem

In the prior art, double-sided vertical grinding equipment has difficulty in accurately controlling the microscopic morphology characteristics of silicon wafers, and is unable to make precise adjustments to silicon wafers that do not meet the requirements.

Method used

By obtaining the topography image of the silicon wafer after grinding, the topography parameters are generated, and the processing parameters of the silicon wafer grinding equipment are adjusted according to the topography parameters to achieve precise control of the silicon wafer micromorphology.

Benefits of technology

It realizes intuitive, convenient and accurate detection and adjustment of the microscopic morphological features of silicon wafers, ensuring that the silicon wafers meet the preset requirements.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention provides a method, device and equipment for adjusting the morphology of a silicon wafer, which relates to the field of semiconductor technology. The method for adjusting the morphology of a silicon wafer comprises: obtaining a morphology image of a first silicon wafer processed by a silicon wafer grinding device, obtaining morphology parameters of the first silicon wafer based on the morphology image, wherein the morphology parameters are used to indicate the microscopic morphology characteristics of the surface of the first silicon wafer, and adjusting the processing parameters of the silicon wafer grinding device based on the morphology parameters. In the present invention, the microscopic geometric characteristics of the silicon wafer are characterized by the morphology parameters, so that it can be intuitively, conveniently and accurately determined whether the microscopic morphology characteristics of the silicon wafer are qualified. When the morphology parameters indicate that the microscopic morphology characteristics are unqualified or do not meet the preset requirements, the processing parameters of the silicon wafer grinding device are adjusted so that the microscopic morphology characteristics of the silicon wafer processed by the adjusted silicon wafer grinding device are accurately adjusted, thereby being qualified or meeting the preset requirements.
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Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a method, device and equipment for adjusting silicon wafer morphology. Background Art

[0002] When processing silicon wafers using double-disk surface grinding (DDSG) equipment, the wafer and the grinding wheels on both sides of the wafer are placed upright in the grinding chamber. The rotation of the grinding wheels on the left and right sides of the wafer thins the wafer. Because the diameter of the grinding wheels in DDSG equipment is half that of the wafer, it is difficult to control the microscopic topography of the processed wafer (including surface topography, warpage, and bow).

[0003] The geometric features of silicon wafers processed by double-sided vertical grinding equipment mainly rely on the topography of the silicon wafers obtained by detection equipment. On-site personnel judge whether the microscopic topography of the processed silicon wafers is qualified based on the topography and experience. However, this inspection method cannot accurately obtain the microscopic topography of the processed silicon wafers, nor can it make precise adjustments for silicon wafers whose microscopic topography does not meet the requirements. Summary of the Invention

[0004] The embodiments of the present invention provide a silicon wafer morphology adjustment method, device and equipment to solve the problems in the prior art of accurately obtaining the microscopic morphological characteristics of silicon wafers processed by double-sided vertical grinding equipment and being unable to accurately adjust silicon wafers whose microscopic morphological characteristics do not meet the requirements.

[0005] To solve the above technical problems, the embodiments of the present invention provide the following technical solutions:

[0006] An embodiment of the present invention provides a method for adjusting silicon wafer morphology, the method comprising:

[0007] Obtaining a topography image of the first silicon wafer after being processed by the silicon wafer grinding equipment;

[0008] Obtaining, according to the topography image, topography parameters of the first silicon wafer, wherein the topography parameters are used to indicate microscopic topography features of a surface of the first silicon wafer;

[0009] According to the morphology parameters, the processing parameters of the silicon wafer grinding equipment are adjusted.

[0010] Optionally, obtaining a topography image of the first silicon wafer after being processed by a silicon wafer grinding device includes:

[0011] detecting a concave-convex condition of a measuring point passing through a first diameter on the first silicon wafer to obtain a concave-convex value of the measuring point on the first diameter;

[0012] Obtaining a topography image of the first silicon wafer according to the concave-convex values ​​of the measurement points on the first diameter;

[0013] The first diameter is at least one diameter on the first silicon wafer.

[0014] Optionally, obtaining a topography image of the first silicon wafer according to the concave-convex value of the measurement point of the first diameter includes:

[0015] A topography image of the first silicon wafer is generated by taking the distance between the measuring point and the center of the first silicon wafer as the abscissa and the concave-convex value of the measuring point as the ordinate.

[0016] Optionally, obtaining the morphology parameters of the first silicon wafer according to the morphology image includes:

[0017] generating a two-dimensional curve corresponding to each first diameter on the first silicon wafer according to the topography image;

[0018] For each measuring point on the first diameter, deriving each measuring point on the two-dimensional curve corresponding to the first diameter to obtain a curvature value corresponding to the measuring point;

[0019] The topography parameters of the first silicon wafer are obtained according to the curvature value.

[0020] Optionally, obtaining the topography parameters of the first silicon wafer according to the curvature value includes:

[0021] Obtain the absolute value of the curvature value corresponding to each measurement point;

[0022] The maximum value of the absolute value is used as the morphology parameter of the first silicon wafer.

[0023] Optionally, adjusting processing parameters of the silicon wafer grinding equipment according to the topography parameters includes:

[0024] When the morphology parameter is greater than the morphology threshold, the processing parameters of the silicon wafer grinding equipment are adjusted.

[0025] Optionally, the method further includes:

[0026] Obtaining historical morphology parameters of a second silicon wafer processed historically and a historical nano-morphology NT value of the second silicon wafer;

[0027] generating a linear relationship between the historical topography parameter and the historical nanotopography NT value according to the historical topography parameter and the historical nanotopography NT value;

[0028] The morphology threshold is obtained according to the preset morphology nanometer value qualified rate and the linear relationship.

[0029] Optionally, the silicon wafer grinding device includes a first grinding wheel and a second grinding wheel;

[0030] The first grinding wheel is used to grind the first surface of the first silicon wafer, and the second grinding wheel is used to grind the second surface of the first silicon wafer; the first surface and the second surface are two opposite surfaces of the first silicon wafer;

[0031] When the first grinding wheel grinds the first surface, the second diameter on the first grinding wheel covers the radius of the first surface; the second diameter is any diameter on the first grinding wheel;

[0032] When the second grinding wheel grinds the second surface, the third diameter on the second grinding wheel covers the radius of the second surface; the third diameter is any diameter on the second grinding wheel;

[0033] The processing parameters include at least one of the following:

[0034] An angle between the first grinding wheel and the horizontal plane;

[0035] An angle between the second grinding wheel and the horizontal plane;

[0036] a distance between a first end of the second diameter and a first end of the third diameter;

[0037] a distance between the second end of the second diameter and the second end of the third diameter;

[0038] The first end of the second diameter is an end of the second diameter covering the center of the first surface, and the first end of the third diameter is an end of the third diameter covering the center of the second surface;

[0039] The second end of the second diameter is the other end of the edge of the second diameter covering the first surface, and the second end of the third diameter is the other end of the edge of the third diameter covering the second surface.

[0040] An embodiment of the present invention further provides a silicon wafer profile adjustment device, comprising:

[0041] A first acquisition module is used to acquire a topography image of the first silicon wafer after being processed by the silicon wafer grinding equipment;

[0042] a first processing module, configured to obtain topographic parameters of the first silicon wafer according to the topographic image, wherein the topographic parameters are used to indicate a microscopic topographic quality of a surface of the first silicon wafer;

[0043] The second processing module is used to adjust the processing parameters of the silicon wafer grinding equipment according to the morphology parameters.

[0044] An embodiment of the present invention also provides a silicon wafer morphology adjustment device, comprising: a processor, a memory, and a program stored in the memory and runnable on the processor, wherein when the program is executed by the processor, the steps in the silicon wafer morphology adjustment method as described above are implemented.

[0045] The embodiments of the present invention have the following beneficial effects:

[0046] The silicon wafer morphology adjustment method provided in an embodiment of the present invention utilizes a silicon wafer grinding device to process a first silicon wafer, obtains a morphology image of the processed first silicon wafer, and obtains morphology parameters for indicating the micro-geometric features of the surface of the first silicon wafer based on the morphology image, that is, by generating a morphology parameter to characterize the micro-geometric features of the silicon wafer, through the morphology parameter, it is possible to intuitively, conveniently and accurately determine whether the micro-morphology features of the silicon wafer are qualified. Thereafter, according to the morphology parameter, the processing parameters of the silicon wafer grinding device are adjusted. That is, when the morphology parameters indicate that the micro-morphology features are unqualified or do not meet the preset requirements, by adjusting the processing parameters of the silicon wafer grinding device, the micro-morphology features of the silicon wafer processed by the adjusted silicon wafer grinding device are accurately adjusted, and thus qualified or meet the preset requirements. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] Figure 1 A flow chart showing a method for adjusting silicon wafer profile provided by an embodiment of the present invention;

[0048] Figure 2 shows one of the 3D topography images of the first silicon wafer provided by an embodiment of the present invention;

[0049] Figure 3 One of the schematic diagrams showing a two-dimensional curve corresponding to the diameter at the vertical coordinate provided by an embodiment of the present invention;

[0050] Figure 4 One of the schematic diagrams showing a two-dimensional curve corresponding to the diameter at the vertical coordinate provided by an embodiment of the present invention;

[0051] Figure 5 One of the schematic diagrams showing a two-dimensional curve corresponding to the diameter at a positive 45-degree angle provided by an embodiment of the present invention;

[0052] Figure 6 One of the schematic diagrams showing a two-dimensional curve corresponding to a diameter at minus 45 degrees provided by an embodiment of the present invention;

[0053] Figure 7 The second 3D topography image drawn from the first silicon wafer provided by an embodiment of the present invention is shown;

[0054] Figure 8 A second schematic diagram showing a two-dimensional curve corresponding to a diameter at a vertical coordinate provided by an embodiment of the present invention;

[0055] Figure 9 A second schematic diagram showing a two-dimensional curve corresponding to a diameter at a vertical coordinate provided by an embodiment of the present invention;

[0056] Figure 10 A second schematic diagram showing a two-dimensional curve corresponding to a diameter at a positive angle of 45 degrees provided by an embodiment of the present invention;

[0057] Figure 11 A second schematic diagram showing a two-dimensional curve corresponding to a diameter at a negative 45-degree angle provided by an embodiment of the present invention;

[0058] Figure 12 A linear relationship diagram showing the relationship between the PV value and the NT value provided by an embodiment of the present invention;

[0059] Figure 13 A specific flow chart showing a method for adjusting silicon wafer profile provided by an embodiment of the present invention;

[0060] Figure 14 A schematic diagram showing the structure of a silicon wafer profile adjustment device provided by an embodiment of the present invention;

[0061] Figure 15 A schematic diagram showing the structure of a silicon wafer profile adjustment device provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0062] In order to make the technical problems, technical solutions and advantages to be solved by the embodiments of the present invention clearer, they will be described in detail below with reference to the accompanying drawings and specific embodiments.

[0063] To make the objectives, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions of the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the described embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field are within the scope of protection of the present invention.

[0064] In order to solve the problems in the prior art of accurately obtaining the microscopic morphology characteristics of silicon wafers processed by double-sided vertical grinding equipment and being unable to accurately adjust silicon wafers whose microscopic morphology characteristics do not meet the requirements, the embodiments of the present invention provide a silicon wafer morphology adjustment method, device and equipment.

[0065] like Figure 1 As shown, an embodiment of the present invention provides a method for adjusting silicon wafer morphology, the method comprising:

[0066] Step 101: Obtain a topography image of a first silicon wafer processed by a silicon wafer grinding device.

[0067] The silicon wafer grinding equipment may be a double-disc grinder, a single-side grinder, etc. In this embodiment, the silicon wafer grinding equipment is described as a double-disc grinder as an example.

[0068] In this step, a first silicon wafer is ground using a silicon wafer grinding device to obtain a processed first silicon wafer, and a topography image of the processed first silicon wafer is obtained.

[0069] The topography image may be a 2D topography image or a 3D topography image.

[0070] The first silicon wafer may be any silicon wafer, or may be the first silicon wafers in a batch of silicon wafers or a box of silicon wafers, or the first silicon wafer may be a trial-processed silicon wafer.

[0071] Step 102: Obtaining morphological parameters of the first silicon wafer according to the morphological image, wherein the morphological parameters are used to indicate microscopic morphological features of the surface of the first silicon wafer.

[0072] In this step, after the topography image is generated, the topography image is processed to obtain topography parameters for characterizing microscopic topography features of the surface of the first silicon wafer.

[0073] Through this morphological parameter, it is possible to intuitively, conveniently and accurately determine whether the microscopic morphological characteristics of the silicon wafer are qualified or meet the preset requirements.

[0074] Step 103: Adjusting processing parameters of the silicon wafer grinding equipment according to the morphology parameters.

[0075] In this step, if the micromorphological characteristics of the first silicon wafer are determined to be unsatisfactory or unqualified based on the morphological parameters, the processing parameters of the silicon wafer grinding equipment used to process the silicon wafer are adjusted. The silicon wafer is then reprocessed using the adjusted silicon wafer grinding equipment to precisely adjust the micromorphological characteristics of the silicon wafer, ensuring that the micromorphological characteristics of the reprocessed silicon wafer are qualified or meet preset requirements.

[0076] In an optional embodiment, obtaining a topography image of a first silicon wafer after being processed by a silicon wafer grinding device includes:

[0077] The concave-convex condition of a measuring point passing through a first diameter on the first silicon wafer is detected to obtain a concave-convex value of the measuring point on the first diameter, wherein the first diameter is at least one diameter on the first silicon wafer.

[0078] That is, in this optional embodiment, at least one first diameter on the first silicon wafer is obtained, and for each first diameter, a plurality of measurement points are respectively set on the first diameter, and for each measurement point on each diameter, the concave-convex value of the measurement point is detected.

[0079] Specifically, a wafer flatness measurement system is used to detect the concave-convex value of the measurement point.

[0080] Optionally, the number of the first diameters is four, and a cross coordinate axis is divided on the surface of the first silicon wafer, and the diameter where the horizontal coordinate is located, the diameter where the vertical coordinate is located, the diameter where the positive 45 degrees is located, and the diameter where the negative 45 degrees is located are selected as the first diameters.

[0081] A topography image of the first silicon wafer is obtained according to the concavo-convex values ​​of the measurement points on the first diameter.

[0082] After detecting the concavo-convex values ​​of all measuring points on the first diameter using the LBW device, a 2D or 3D topography image of the first silicon wafer is drawn according to the concavo-convex values ​​of the measuring points on all the diameters.

[0083] In this embodiment, taking the drawing of the 3D topography of the first silicon wafer as an example, the 3D topography of the first silicon wafer drawn according to the concave-convex values ​​of all the measurement points on the first diameter is as follows: Figure 2 shown.

[0084] Optionally, obtaining a topography image of the first silicon wafer according to the concave-convex value of the measurement point of the first diameter includes:

[0085] A topography image of the first silicon wafer is generated by taking the distance between the measuring point and the center of the first silicon wafer as the abscissa and the concave-convex value of the measuring point as the ordinate.

[0086] It should be noted that the center point of the first silicon wafer can be used as a reference, and the thickness values ​​of different measurement points relative to the reference can be detected as the concave-convex values ​​of the reference.

[0087] The midpoint of the line connecting the center of the upper surface of the first silicon wafer and the center of the lower surface of the first silicon wafer may be selected as the center point of the first silicon wafer.

[0088] In an optional embodiment, obtaining the topography parameters of the first silicon wafer according to the topography image includes:

[0089] A two-dimensional curve corresponding to each first diameter on the first silicon wafer is generated according to the topography image.

[0090] When generating a two-dimensional curve based on the topography image, a two-dimensional curve is generated for each first diameter. When there are four first diameters, four two-dimensional curves are generated.

[0091] The two-dimensional curve is reflected in a cross coordinate system. For each first diameter, when generating the two-dimensional curve, the distance between the measuring point on the first diameter and one end of the first diameter is used as the horizontal coordinate, and the concave and convex value of the measuring point is used as the vertical coordinate to obtain the coordinate point in the cross coordinate system. The coordinate points are connected and smoothed to generate the two-dimensional curve corresponding to the first diameter.

[0092] For example, according to Figure 2 The 3D topography of the first silicon wafer is shown in FIG. 1 , and the schematic diagrams of the four first diameters on the first silicon wafer are respectively shown in FIG. Figure 3 、 Figure 4 、 Figure 5 and Figure 6 As shown, Figure 3 It is a schematic diagram of the two-dimensional curve corresponding to the diameter where the ordinate is located. Figure 4 It is a schematic diagram of the two-dimensional curve corresponding to the diameter where the ordinate is located. Figure 5 This is a schematic diagram of the two-dimensional curve corresponding to the diameter at positive 45 degrees. Figure 6 This is a schematic diagram of the two-dimensional curve corresponding to the diameter at negative 45 degrees.

[0093] For each measuring point on the first diameter, a derivative is taken for each measuring point on the two-dimensional curve corresponding to the first diameter to obtain a curvature value corresponding to the measuring point.

[0094] After the above processing flow, the two-dimensional curve is a smooth curve. The first-order inverse of the smooth curve is calculated for each measuring point along the corresponding first diameter direction, and the concave-convex value of the topography of the first silicon wafer reflected at each measuring point is converted into the curvature value corresponding to the measuring point.

[0095] The larger the absolute value of the curvature value is, the more dramatic the change in the microscopic morphology of the silicon wafer at the measurement point is, and the larger the difference in the concave-convex values ​​of the silicon wafer at adjacent measurement points is.

[0096] In this embodiment, the curvature value is a parameter reflecting the topography of the silicon wafer, and the curvature value is defined as Profile Value (PV).

[0097] The 3D topography of the first silicon wafer is drawn according to the curvature value corresponding to the measurement point on the first diameter. Figure 7 As shown. Figure 7 The 3D topography of the first silicon wafer is shown in FIG. 1 , and the schematic diagrams of the four first diameters on the first silicon wafer are respectively shown in FIG. Figure 8 、 Figure 9 、 Figure 10 and Figure 11 As shown, Figure 8 It is a schematic diagram of the two-dimensional curve corresponding to the diameter where the ordinate is located. Figure 9 It is a schematic diagram of the two-dimensional curve corresponding to the diameter where the ordinate is located. Figure 10 This is a schematic diagram of the two-dimensional curve corresponding to the diameter at positive 45 degrees. Figure 11 This is a schematic diagram of the two-dimensional curve corresponding to the diameter at negative 45 degrees.

[0098] The topography parameters of the first silicon wafer are obtained according to the curvature value.

[0099] That is, the topography parameters of the first silicon wafer are obtained according to the curvature value corresponding to each measuring point on the first silicon wafer.

[0100] Specifically, obtaining the topography parameters of the first silicon wafer according to the curvature value includes:

[0101] Obtain the absolute value of the curvature value corresponding to each measurement point, that is, for a first silicon wafer, obtain the curvature value of each measurement point on the first silicon wafer, and calculate the absolute value to obtain the PV of all measurement points of the first silicon wafer.

[0102] The maximum absolute value is used as the topographic parameter of the first silicon wafer. That is, the maximum curvature value corresponding to all measurement points on the silicon wafer is used as a unique value to represent the microscopic topographic characteristics of the silicon wafer. The maximum absolute value of the curvature value can clearly and intuitively indicate whether the microscopic topographic characteristics of the first silicon wafer are qualified or meet preset requirements.

[0103] In an optional embodiment, adjusting the processing parameters of the silicon wafer grinding equipment according to the topography parameters includes:

[0104] When the morphology parameter is greater than the morphology threshold, the processing parameters of the silicon wafer grinding equipment are adjusted.

[0105] Optionally, the morphology threshold is 0.4.

[0106] That is, when the morphology parameter is greater than 0.4, it is determined that the morphology of the first silicon wafer is abnormal (does not meet the preset requirements or is unqualified), and the processing parameters of the silicon wafer grinding equipment for processing the first silicon wafer need to be adjusted to ensure that the microscopic morphology of the silicon wafer subsequently processed by the adjusted silicon wafer grinding equipment meets the preset requirements or is qualified.

[0107] Optionally, the method further includes:

[0108] Obtaining historical morphological parameters of a historically processed second silicon wafer and historical nanotopography (NT) values ​​of the second silicon wafer;

[0109] Here, the second silicon wafer is a historical silicon wafer processed by silicon wafer grinding equipment, and there are multiple second silicon wafers.

[0110] According to the above-mentioned process of obtaining the morphological parameters of the first silicon wafer, the morphological parameters of the second silicon wafer (i.e., the historical morphological parameters) are obtained, and the NT value of the second silicon wafer is measured after double-sided polishing of the second silicon wafer, and the morphological parameter (PV) value and NT value corresponding to each second silicon wafer are obtained.

[0111] Among them, the NT value is a measurement value that characterizes the tiny ups and downs of the surface profile of the silicon wafer.

[0112] According to the historical morphology parameters and the historical nano-morphology NT value, a linear relationship between the historical morphology parameters and the historical nano-morphology NT value is generated.

[0113] Specifically, after accumulating a large amount of data on the morphological parameter (PV) values ​​and NT (THA10*10) values ​​of the second silicon wafer, a linear correlation analysis is performed on the PV values ​​and the corresponding NT values ​​to obtain a linear relationship between the PV values ​​and the corresponding NT values. The linear relationship between the PV values ​​and the NT values ​​of the second silicon wafer is shown in FIG. Figure 12 shown.

[0114] The morphology threshold is obtained according to the preset nano-morphology NT value qualified rate and the linear relationship.

[0115] Specifically, the NT value is set to be less than or equal to 23nm (THA10*10≤23nm) to indicate that the second silicon wafer is qualified or meets the preset requirements, and the qualified rate of the one-nanometer morphology NT value is set to be 99%. Figure 12 The linear relationship shown in Figure 1 shows that when the PV value is less than or equal to 0.4, the NT (THA10*10≤23nm) pass rate of the polished second silicon wafer is 99.8%. Therefore, in this embodiment, 0.4 is defined as the morphology threshold. This morphology threshold is used to determine whether the microscopic morphology characteristics of the silicon wafer are qualified or meet the requirements, and whether the processing parameters of the silicon wafer grinding equipment need to be adjusted.

[0116] In an optional embodiment, the silicon wafer grinding device is a double-disc grinder, and the silicon wafer grinding device includes a first grinding wheel and a second grinding wheel; wherein the first grinding wheel and the second grinding wheel are respectively positioned on both sides of the silicon wafer for processing;

[0117] The first grinding wheel is used to grind the first surface of the first silicon wafer, and the second grinding wheel is used to grind the second surface of the first silicon wafer; the first surface and the second surface are two opposite surfaces of the first silicon wafer;

[0118] When the first grinding wheel grinds the first surface, the second diameter on the first grinding wheel covers the radius of the first surface; the second diameter is any diameter on the first grinding wheel;

[0119] When the second grinding wheel grinds the second surface, the third diameter on the second grinding wheel covers the radius of the second surface; the third diameter is any diameter on the second grinding wheel.

[0120] That is, when grinding a silicon wafer with a grinding wheel, for each surface of the silicon wafer, after the corresponding grinding wheel covers any radius of its surface, the silicon wafer is controlled to rotate relative to the grinding wheel to achieve grinding of the silicon wafer surface.

[0121] The processing parameters include at least one of the following:

[0122] An angle between the first grinding wheel and the horizontal plane;

[0123] An angle between the second grinding wheel and the horizontal plane;

[0124] the distance between a first end of the second diameter and a first end of the third diameter, wherein the first end of the second diameter is an end of the second diameter covering the center of the first surface, and the first end of the third diameter is an end of the third diameter covering the center of the second surface;

[0125] The distance between the second end of the second diameter and the second end of the third diameter, wherein the second end of the second diameter is the other end of the edge of the second diameter covering the first surface, and the second end of the third diameter is the other end of the edge of the third diameter covering the second surface.

[0126] The following combination Figure 13 , specifically describes the specific process of the silicon wafer morphology adjustment method provided by an embodiment of the present invention.

[0127] Obtain the first silicon wafer after processing (or trial processing) by the silicon wafer grinding equipment, detect the topography of the silicon wafer through the detection equipment, and calculate the PV value of the measuring point based on the topography. If the PV is less than or equal to 0.4, it is judged to be qualified, and the silicon wafer grinding equipment can formally process the silicon wafer. If the PV is greater than 0.4, it is judged to be unqualified. After adjusting the processing parameters of the silicon wafer grinding equipment, continue to trial process the silicon wafer until the measured PV is less than or equal to 0.4. After being judged to be qualified, the silicon wafer can be formally processed.

[0128] like Figure 14 As shown, an embodiment of the present invention further provides a silicon wafer morphology adjustment device, the device comprising:

[0129] A first acquisition module 1401 is configured to acquire a topography image of a first silicon wafer after being processed by a silicon wafer grinding device;

[0130] A first processing module 1402 is configured to obtain topographic parameters of the first silicon wafer according to the topographic image, wherein the topographic parameters are used to indicate the microscopic topographic quality of the surface of the first silicon wafer;

[0131] The second processing module 1403 is configured to adjust processing parameters of the silicon wafer grinding equipment according to the topography parameters.

[0132] Optionally, the first obtaining module 1401 includes:

[0133] a first processing unit, configured to detect a concave-convex condition of a measuring point passing through a first diameter on the first silicon wafer, and obtain a concave-convex value of the measuring point on the first diameter;

[0134] a second processing unit, configured to obtain a topography image of the first silicon wafer according to the concave-convex values ​​of the measurement points on the first diameter;

[0135] The first diameter is at least one diameter on the first silicon wafer.

[0136] Optionally, the second processing unit is specifically configured to:

[0137] A topography image of the first silicon wafer is generated by taking the distance between the measuring point and the center of the first silicon wafer as the abscissa and the concave-convex value of the measuring point as the ordinate.

[0138] Optionally, the first processing module 1402 includes:

[0139] a third processing unit, configured to generate a two-dimensional curve corresponding to each first diameter on the first silicon wafer according to the topography image;

[0140] a fourth processing unit, configured to, for each measuring point on the first diameter, derive a derivative of each measuring point on the two-dimensional curve corresponding to the first diameter to obtain a curvature value corresponding to the measuring point;

[0141] A fifth processing unit is configured to obtain a topography parameter of the first silicon wafer according to the curvature value.

[0142] Optionally, the fifth processing unit is specifically configured to:

[0143] Obtain the absolute value of the curvature value corresponding to each measurement point;

[0144] The maximum value of the absolute value is used as the morphology parameter of the first silicon wafer.

[0145] Optionally, the second processing module 1403 includes:

[0146] The sixth processing unit is configured to adjust the processing parameters of the silicon wafer grinding equipment when the morphology parameter is greater than the morphology threshold.

[0147] Optionally, the transposition further includes:

[0148] A second acquisition module is used to obtain historical morphological parameters of a second silicon wafer processed in history and a historical nano-morphology NT value of the second silicon wafer;

[0149] A third processing module is used to generate a linear relationship between the historical topography parameter and the historical nanotopography NT value according to the historical topography parameter and the historical nanotopography NT value;

[0150] The fourth processing module is used to obtain the morphology threshold value according to the preset morphology nanometer value qualified rate and the linear relationship.

[0151] Optionally, the silicon wafer grinding device includes a first grinding wheel and a second grinding wheel;

[0152] The first grinding wheel is used to grind the first surface of the first silicon wafer, and the second grinding wheel is used to grind the second surface of the first silicon wafer; the first surface and the second surface are two opposite surfaces of the first silicon wafer;

[0153] When the first grinding wheel grinds the first surface, the second diameter on the first grinding wheel covers the radius of the first surface; the second diameter is any diameter on the first grinding wheel;

[0154] When the second grinding wheel grinds the second surface, the third diameter on the second grinding wheel covers the radius of the second surface; the third diameter is any diameter on the second grinding wheel;

[0155] The processing parameters include at least one of the following:

[0156] An angle between the first grinding wheel and the horizontal plane;

[0157] An angle between the second grinding wheel and the horizontal plane;

[0158] a distance between a first end of the second diameter and a first end of the third diameter;

[0159] a distance between the second end of the second diameter and the second end of the third diameter;

[0160] The first end of the second diameter is an end of the second diameter covering the center of the first surface, and the first end of the third diameter is an end of the third diameter covering the center of the second surface;

[0161] The second end of the second diameter is the other end of the edge of the second diameter covering the first surface, and the second end of the third diameter is the other end of the edge of the third diameter covering the second surface.

[0162] It should be noted that the silicon wafer morphology adjustment device provided in the embodiment of the present invention is a device capable of executing the above-mentioned silicon wafer morphology adjustment method. All embodiments of the above-mentioned silicon wafer morphology adjustment method are applicable to this device and can achieve the same or similar technical effects.

[0163] like Figure 15 As shown, an embodiment of the present invention also provides a silicon wafer morphology adjustment device, including: a processor 1501; and a memory 1503 connected to the processor 1501 through a bus interface 1502, the memory 1503 is used to store programs and data used by the processor 1501 when performing operations, and the processor 1501 calls and executes the programs and data stored in the memory 1503.

[0164] The transceiver 1504 is connected to the bus interface 1502 and is configured to receive and send data under the control of the processor 1501. Specifically, the processor 1501 is configured to read the program in the memory 1503 and to perform the following process:

[0165] Obtaining a topography image of the first silicon wafer after being processed by the silicon wafer grinding equipment;

[0166] Obtaining, according to the topography image, topography parameters of the first silicon wafer, wherein the topography parameters are used to indicate microscopic topography features of a surface of the first silicon wafer;

[0167] According to the morphology parameters, the processing parameters of the silicon wafer grinding equipment are adjusted.

[0168] Optionally, the processor 1501 is configured to:

[0169] detecting a concave-convex condition of a measuring point passing through a first diameter on the first silicon wafer to obtain a concave-convex value of the measuring point on the first diameter;

[0170] Obtaining a topography image of the first silicon wafer according to the concave-convex values ​​of the measurement points on the first diameter;

[0171] The first diameter is at least one diameter on the first silicon wafer.

[0172] Optionally, the processor 1501 is specifically configured to:

[0173] A topography image of the first silicon wafer is generated by taking the distance between the measuring point and the center of the first silicon wafer as the abscissa and the concave-convex value of the measuring point as the ordinate.

[0174] Optionally, the processor 1501 is configured to:

[0175] generating a two-dimensional curve corresponding to each first diameter on the first silicon wafer according to the topography image;

[0176] For each measuring point on the first diameter, deriving each measuring point on the two-dimensional curve corresponding to the first diameter to obtain a curvature value corresponding to the measuring point;

[0177] The topography parameters of the first silicon wafer are obtained according to the curvature value.

[0178] Optionally, the processor 1501 is specifically configured to:

[0179] Obtain the absolute value of the curvature value corresponding to each measurement point;

[0180] The maximum value of the absolute value is used as the morphology parameter of the first silicon wafer.

[0181] Optionally, the processor 1501 is configured to:

[0182] When the morphology parameter is greater than the morphology threshold, the processing parameters of the silicon wafer grinding equipment are adjusted.

[0183] Optionally, the processor 1501 is further configured to:

[0184] Obtaining historical morphology parameters of a second silicon wafer processed historically and a historical nano-morphology NT value of the second silicon wafer;

[0185] generating a linear relationship between the historical topography parameter and the historical nanotopography NT value according to the historical topography parameter and the historical nanotopography NT value;

[0186] The morphology threshold is obtained according to the preset morphology nanometer value qualified rate and the linear relationship.

[0187] Optionally, the silicon wafer grinding device includes a first grinding wheel and a second grinding wheel;

[0188] The first grinding wheel is used to grind the first surface of the first silicon wafer, and the second grinding wheel is used to grind the second surface of the first silicon wafer; the first surface and the second surface are two opposite surfaces of the first silicon wafer;

[0189] When the first grinding wheel grinds the first surface, the second diameter on the first grinding wheel covers the radius of the first surface; the second diameter is any diameter on the first grinding wheel;

[0190] When the second grinding wheel grinds the second surface, the third diameter on the second grinding wheel covers the radius of the second surface; the third diameter is any diameter on the second grinding wheel;

[0191] The processing parameters include at least one of the following:

[0192] An angle between the first grinding wheel and the horizontal plane;

[0193] An angle between the second grinding wheel and the horizontal plane;

[0194] a distance between a first end of the second diameter and a first end of the third diameter;

[0195] a distance between the second end of the second diameter and the second end of the third diameter;

[0196] The first end of the second diameter is an end of the second diameter covering the center of the first surface, and the first end of the third diameter is an end of the third diameter covering the center of the second surface;

[0197] The second end of the second diameter is the other end of the edge of the second diameter covering the first surface, and the second end of the third diameter is the other end of the edge of the third diameter covering the second surface.

[0198] Among them, Figure 15 In the embodiment, the bus architecture may include any number of interconnected buses and bridges, specifically linking together various circuits of one or more processors represented by processor 1501 and memory represented by memory 1503. The bus architecture may also link together various other circuits such as peripheral devices, voltage regulators, and power management circuits, which are all well known in the art and therefore will not be described further herein. The bus interface provides a user interface 1505. The transceiver 1504 may be a plurality of components, i.e., including a transmitter and a receiver, providing a unit for communicating with various other devices over a transmission medium. The processor 1501 is responsible for managing the bus architecture and general processing, and the memory 1503 may store data used by the processor 1501 when performing operations.

[0199] In addition, a specific embodiment of the present invention further provides a readable storage medium having a computer program stored thereon, wherein the program, when executed by a processor, implements the steps in any one of the above-described methods for adjusting the silicon wafer morphology.

[0200] In the several embodiments provided in this application, it should be understood that the disclosed methods and devices can be implemented in other ways. For example, the device embodiments described above are merely schematic. For example, the division of the units is merely a logical function division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection of some interfaces, devices or units, which can be electrical, mechanical or other forms.

[0201] In addition, the functional units in various embodiments of the present invention may be integrated into a single processing unit, each unit may be physically included separately, or two or more units may be integrated into a single unit. The aforementioned integrated units may be implemented in the form of hardware or hardware plus software functional units.

[0202] The above-mentioned integrated unit implemented in the form of a software functional unit can be stored in a computer-readable storage medium. The above-mentioned software functional unit is stored in a storage medium and includes a number of instructions for causing a computer device (which can be a personal computer, server, or network device, etc.) to perform some steps of the resource selection method described in various embodiments of the present invention, or to perform some steps of the information sending method described in various embodiments of the present invention. The aforementioned storage medium includes: a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, an optical disk, and other media that can store program code.

[0203] A specific embodiment of the present invention further provides a computer program product, including computer instructions, which, when executed by a processor, implement the above Figure 1 The various processes of the method embodiment shown can achieve the same technical effect, and to avoid repetition, they will not be described here.

[0204] The above is a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present invention. These improvements and modifications should also be regarded as within the scope of protection of the present invention.

Claims

1. A method for adjusting silicon wafer morphology, characterized in that: The method comprises: Obtaining a topography image of the first silicon wafer after being processed by the silicon wafer grinding equipment; Obtaining, according to the topography image, topography parameters of the first silicon wafer, wherein the topography parameters are used to indicate microscopic topography features of a surface of the first silicon wafer; adjusting processing parameters of the silicon wafer grinding equipment according to the topography parameters; The step of obtaining a topography image of the first silicon wafer after being processed by the silicon wafer grinding equipment includes: detecting a concave-convex condition of a measuring point passing through a first diameter on the first silicon wafer to obtain a concave-convex value of the measuring point on the first diameter; Obtaining a topography image of the first silicon wafer based on the concave-convex values ​​of the measurement points on the first diameter; wherein the first diameter is at least one diameter on the first silicon wafer; Wherein, obtaining the morphology parameters of the first silicon wafer according to the morphology image includes: generating a two-dimensional curve corresponding to each first diameter on the first silicon wafer according to the topography image; For each measuring point on the first diameter, deriving each measuring point on the two-dimensional curve corresponding to the first diameter to obtain a curvature value corresponding to the measuring point; The topography parameters of the first silicon wafer are obtained according to the curvature value.

2. The method according to claim 1, characterized in that Obtaining a topography image of the first silicon wafer according to the concavo-convex value of the measurement point of the first diameter, including: A topography image of the first silicon wafer is generated by taking the distance between the measuring point and the center of the first silicon wafer as the abscissa and the concave-convex value of the measuring point as the ordinate.

3. The method according to claim 1, characterized in that Obtaining, according to the curvature value, a morphology parameter of the first silicon wafer, including: Obtain the absolute value of the curvature value corresponding to each measurement point; The maximum value of the absolute value is used as the morphology parameter of the first silicon wafer.

4. The method according to claim 1, wherein Adjusting processing parameters of the silicon wafer grinding equipment according to the morphology parameters includes: When the morphology parameter is greater than the morphology threshold, the processing parameters of the silicon wafer grinding equipment are adjusted.

5. The method according to claim 4, characterized in that The method further comprises: Obtaining historical morphology parameters of a second silicon wafer processed historically and a historical nano-morphology NT value of the second silicon wafer; generating a linear relationship between the historical morphology parameters and the historical nanomorphology NT value according to the historical morphology parameters and the historical nanomorphology NT value; The morphology threshold is obtained according to the preset morphology nanometer value qualified rate and the linear relationship.

6. The method according to claim 1, characterized in that The silicon wafer grinding device includes a first grinding wheel and a second grinding wheel; The first grinding wheel is used to grind the first surface of the first silicon wafer, and the second grinding wheel is used to grind the second surface of the first silicon wafer; the first surface and the second surface are two opposite surfaces of the first silicon wafer; When the first grinding wheel grinds the first surface, the second diameter on the first grinding wheel covers the radius of the first surface; the second diameter is any diameter on the first grinding wheel; When the second grinding wheel grinds the second surface, the third diameter on the second grinding wheel covers the radius of the second surface; the third diameter is any diameter on the second grinding wheel; The processing parameters include at least one of the following: An angle between the first grinding wheel and the horizontal plane; An angle between the second grinding wheel and the horizontal plane; a distance between a first end of the second diameter and a first end of the third diameter; a distance between the second end of the second diameter and the second end of the third diameter; The first end of the second diameter is an end of the second diameter covering the center of the first surface, and the first end of the third diameter is an end of the third diameter covering the center of the second surface; The second end of the second diameter is the other end of the edge of the second diameter covering the first surface, and the second end of the third diameter is the other end of the edge of the third diameter covering the second surface.

7. A silicon wafer profile adjustment device, characterized in that: The method for adjusting silicon wafer morphology according to any one of claims 1 to 6, wherein the device comprises: A first acquisition module is used to acquire a topography image of the first silicon wafer after being processed by the silicon wafer grinding equipment; a first processing module, configured to obtain topographic parameters of the first silicon wafer according to the topographic image, wherein the topographic parameters are used to indicate a microscopic topographic quality of a surface of the first silicon wafer; A second processing module, configured to adjust processing parameters of the silicon wafer polishing equipment according to the topography parameters; The first acquisition module includes: a first processing unit, configured to detect a concave-convex condition of a measuring point passing through a first diameter on the first silicon wafer, and obtain a concave-convex value of the measuring point on the first diameter; a second processing unit, configured to obtain a topography image of the first silicon wafer based on the concave-convex values ​​of the measurement points on the first diameter; wherein the first diameter is at least one diameter on the first silicon wafer; Wherein, the first processing module includes: a third processing unit, configured to generate a two-dimensional curve corresponding to each first diameter on the first silicon wafer according to the topography image; a fourth processing unit, configured to, for each measuring point on the first diameter, derive a derivative of each measuring point on the two-dimensional curve corresponding to the first diameter to obtain a curvature value corresponding to the measuring point; A fifth processing unit is configured to obtain a topography parameter of the first silicon wafer according to the curvature value.

8. A silicon wafer profile adjustment device, characterized in that: include: A processor, a memory, and a program stored in the memory and executable on the processor, wherein when the program is executed by the processor, the steps of the silicon wafer profile adjustment method according to any one of claims 1 to 6 are implemented.

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