Impedance detection circuit, method and system

Abstract

The invention discloses an impedance detection circuit, method and system, and relates to the field of circuit detection. The impedance detection circuit comprises an electrified body, a positive load circuit and a negative load circuit; the anode of the electrified body is connected with the anode load circuit, the cathode of the electrified body is connected with the cathode load circuit, and the series node of the anode load circuit and the cathode load circuit is grounded; the positive load circuit comprises a first capacitor and a first load, and the negative load circuit comprises a second capacitor and a second load; in the charging or discharging process of the first capacitor, the first capacitor is used for providing first voltages corresponding to at least three time nodes respectively; in the charging or discharging process of the second capacitor, the second capacitor is used for providing second voltages corresponding to at least three time nodes respectively; the first voltage and the second voltage are used for determining an insulation resistance detection result of the electrified body to the ground. The circuit can improve the result accuracy when the insulation resistance of a charged body to the ground is detected through a capacitor under the condition of low circuit cost.

Description

Technical Field

[0001] The present application relates to the field of circuit detection, and in particular to an impedance detection circuit, method and system. Background Art

[0002] Insulation resistance measurement is an electrical test used to evaluate the insulation performance of electrical equipment, circuits or systems. Insulation resistance is a key parameter to measure the insulation performance of electrical equipment or circuits to ground.

[0003] In the related art, when an equivalent capacitor is introduced to realize insulation impedance measurement, V0 is set as the initial voltage value of the capacitor at time t=0, V u is the capacitor charging termination voltage, V t is the capacitor voltage value at any time t, then the capacitor charging time calculation formula is Among them, τ is the time constant of the resistor-capacitor circuit (RC circuit). It can be seen that because the exponential value can only be infinitely close to 0, but will never be equal to 0, it takes infinite time for the capacitor to be fully charged.

[0004] Therefore, when the insulation impedance of an electrical device or circuit is tested through capacitance, the measured insulation impedance has the problem of low accuracy or too long test time. Summary of the invention

[0005] The embodiment of the present application provides an impedance detection circuit, method and system. The technical solution is as follows:

[0006] In one aspect, an impedance detection circuit is provided, the circuit comprising a charged body, a positive load circuit and a negative load circuit;

[0007] The positive electrode of the charged body is connected to the positive load circuit, the negative electrode of the charged body is connected to the negative load circuit, and the series node of the positive load circuit and the negative load circuit is grounded;

[0008] The positive load circuit includes a first capacitor and a first load, and the negative load circuit includes a second capacitor and a second load;

[0009] During the charging or discharging process of the first capacitor, the first capacitor is used to provide first voltages corresponding to at least three time nodes respectively;

[0010] During the charging or discharging process of the second capacitor, the second capacitor is used to provide the second voltages corresponding to the at least three time nodes respectively;

[0011] The first voltage and the second voltage are used to determine the insulation impedance detection result of the charged body to the ground.

[0012] In some embodiments, the first voltages corresponding to the at least three time nodes are used to determine a first stable voltage when the first capacitor is in a first stable state, where the first stable state is a state of the first capacitor after being charged or discharged;

[0013] The second voltages corresponding to the at least three time nodes are used to determine a second stable voltage when the second capacitor is in a second stable state, where the second stable state is a state of the second capacitor after being charged or discharged;

[0014] The first stable voltage and the second stable voltage are used to determine the insulation impedance detection result of the charged body to the ground.

[0015] In some embodiments, the first load is connected in parallel with the first capacitor;

[0016] The second load is connected in parallel with the second capacitor;

[0017] The first stable voltage and the second stable voltage are used to determine a first load impedance of the first load and a second load impedance of the second load;

[0018] The first load impedance and the second load impedance are used to determine the insulation impedance detection result of the charged body to the ground.

[0019] In some embodiments, the positive load circuit further includes a third load connected in parallel with the first capacitor and a first switch, and the third load is connected in series with the first switch;

[0020] The negative load circuit further includes a fourth load connected in parallel with the second capacitor and a second switch, and the fourth load is connected in series with the second switch;

[0021] When the first switch is turned on and the second switch is turned off, during the charging or discharging process of the first capacitor, the third load is used to provide the first load voltages corresponding to the at least three time nodes respectively, and the first load voltages corresponding to the at least three time nodes respectively are used to determine the first voltages of the first capacitor corresponding to the at least three time nodes respectively, wherein the first load voltage at the i-th time node is used to determine the first voltage at the i-th time node, and i is a positive integer;

[0022] When the second switch is turned on and the first switch is turned off, during the charging or discharging process of the second capacitor, the fourth load is used to provide the second load voltages corresponding to the at least three time nodes respectively, and the second load voltages corresponding to the at least three time nodes respectively are used to determine the second voltages of the second capacitor corresponding to the at least three time nodes respectively, wherein the second load voltage at the jth time node is used to determine the second voltage at the jth time node, and j is a positive integer.

[0023] In some embodiments, the third load includes a plurality of first sub-loads, the plurality of first sub-loads are in a series relationship, the first load voltage is a voltage of an mth first sub-load among the plurality of first sub-loads, and m is a positive integer;

[0024] The fourth load includes a plurality of second sub-loads, the plurality of second sub-loads are connected in series, the second load voltage is a voltage of an nth second sub-load among the plurality of second sub-loads, and n is a positive integer.

[0025] On the other hand, an impedance detection method is provided, which is applied to the impedance detection circuit as described above, and the method comprises:

[0026] During the charging or discharging process of the first capacitor, obtaining the first voltages of the first capacitor corresponding to the at least three time nodes respectively;

[0027] During the charging or discharging process of the second capacitor, obtaining the second voltage corresponding to the second capacitor at the at least three time nodes respectively;

[0028] Based on the first voltage and the second voltage, a detection result of the insulation impedance of the charged body to the ground is determined.

[0029] In another aspect, an impedance detection device is provided, the device comprising:

[0030] A first acquisition module, configured to acquire, during a charging or discharging process of the first capacitor, the first voltages corresponding to the first capacitor at the at least three time nodes;

[0031] A second acquisition module, configured to acquire the second voltage corresponding to the second capacitor at the at least three time nodes respectively during the charging or discharging process of the second capacitor;

[0032] A determination module is used to determine the insulation impedance detection result of the charged body to the ground based on the first voltage and the second voltage.

[0033] On the other hand, an impedance detection system is provided, wherein the impedance detection system comprises the impedance detection circuit as described above, and the impedance detection system is used to execute the impedance detection method as described above.

[0034] On the other hand, a computer device is provided, which includes a processor and a memory, wherein the memory stores at least one instruction, at least one program, a code set or an instruction set, and the at least one instruction, the at least one program, the code set or the instruction set is loaded and executed by the processor to implement the impedance detection method as described in any of the above-mentioned embodiments of the present application.

[0035] On the other hand, a computer-readable storage medium is provided, in which at least one instruction, at least one program, a code set or an instruction set is stored, and the at least one instruction, the at least one program, the code set or the instruction set is loaded and executed by a processor to implement the impedance detection method as described in any of the above-mentioned embodiments of the present application.

[0036] On the other hand, a computer program product or a computer program is provided, the computer program product or the computer program comprising computer instructions, the computer instructions being stored in a computer-readable storage medium. A processor of a computer device reads the computer instructions from the computer-readable storage medium, and the processor executes the computer instructions, so that the computer device performs the impedance detection method described in any of the above embodiments.

[0037] The technical solution provided by this application includes at least the following beneficial effects:

[0038] An impedance detection circuit is designed, in which a positive load circuit and a negative load circuit are connected in series to the positive and negative ends of a charged body, and are grounded at the series node of the positive load circuit and the negative load circuit. Capacitors are respectively set in the positive load circuit and the negative load circuit to be equivalent to the insulation parasitic capacitance of the charged body to the ground, and loads are set to be equivalent to the insulation impedance of the charged body to the ground. A first voltage corresponding to the first capacitor in the positive load circuit is collected at at least three time nodes, and a second voltage corresponding to the second capacitor in the negative load circuit is collected at at least three time nodes to determine the insulation impedance detection result of the charged body to the ground. Since the accurate voltages of the first capacitor and the second capacitor in a stable state can be obtained based on the first voltage and the second voltage at the above-mentioned at least three time nodes, the accuracy of the results when the insulation impedance of the charged body to the ground is detected by the capacitor can be improved. At the same time, since there is no need to eliminate the voltage of the first capacitor and the second capacitor in a stable state when determining the voltage of the first capacitor and the second capacitor in a stable state. The introduction of the natural logarithm function can reduce the calculation efficiency of the equipment when detecting the insulation impedance of the charged body to the ground, thereby improving the efficiency of impedance detection. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0040] Figure 1 is a structural schematic diagram of an impedance detection circuit provided by an exemplary embodiment of the present application;

[0041] Figure 2 is a structural schematic diagram of an impedance detection circuit provided by another exemplary embodiment of the present application;

[0042] Figure 3 is a schematic diagram of the structure of a switch provided by an exemplary embodiment of the present application;

[0043] Figure 4 is a structural schematic diagram of an impedance detection circuit provided by another exemplary embodiment of the present application;

[0044] Figure 5 is a flow chart of an impedance detection method provided by an exemplary embodiment of the present application;

[0045] Figure 6 Schematic diagram of the system architecture of an impedance detection system provided by an exemplary embodiment of the present application. DETAILED DESCRIPTION

[0046] In order to make the purpose, technical solution and advantages of the present application clearer, the implementation mode of the present application will be further described in detail below in conjunction with the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present application.

[0047] In this application, the terms "first", "second", etc. are used to distinguish identical items or similar items with substantially the same effects and functions. It should be understood that there is no logical or temporal dependency between "first" and "second", nor are there any limitations on quantity and execution order.

[0048] First, the impedance detection circuit provided in the embodiment of the present application is introduced.

[0049] Figure 1 is a schematic diagram of the structure of an impedance detection circuit provided in an embodiment of the present application. Figure 1 As shown, the impedance detection circuit 100 includes: a charged body 110 , a positive load circuit 120 and a negative load circuit 130 .

[0050] The positive electrode of the charged body 110 is connected to the positive load circuit 120, the negative electrode of the charged body 110 is connected to the negative load circuit 130, and the series node of the positive load circuit 120 and the negative load circuit 130 is grounded (GND); the positive load circuit 120 includes a first capacitor C p and the first load R p The negative load circuit 130 includes a second capacitor C n and the second load R n .

[0051] The charged body 110 is a target of insulation impedance to be detected in the impedance detection circuit and is a power source in the impedance detection circuit. Optionally, the charged body 110 can be implemented as an electrical device, a circuit, a system, etc.

[0052] GND (Ground) stands for ground or grounding. In a circuit, GND is usually used as a reference potential point to define the reference benchmark for voltage and current. GND includes virtual ground, where virtual ground refers to a node in a circuit that is maintained at a stable reference potential but is not directly connected to the physical ground or reference potential.

[0053] Optionally, the first load R p and the second load R n It can be a resistor, a heater, an electric lamp, etc., which is not limited in the present embodiment. p The first resistor R p , the second load R n Implemented as a second resistor R n For example.

[0054] In some embodiments, the first load R p With the first capacitor C p Parallel connection; second load R n With the second capacitor C n in parallel.

[0055] Combine the following Figure 1 The connection relationship of each component in the impedance detection circuit 100 is described as follows:

[0056] In the positive load circuit 120, the first capacitor C p The first end a1 of the first capacitor C is connected to the positive electrode of the charged body 110. p The second end b1 of the negative load circuit 130 is grounded; in the negative load circuit 130, the second capacitor C n The first end a2 is grounded, and the second capacitor C n The second end b2 is connected to the negative electrode of the charged body 110.

[0057] In the positive load circuit 120, the first load R p The first end a3 is connected to the positive electrode of the charged body 110, and the first load R p The second end b3 of is grounded; in the negative load circuit 130, the second load R n The first end a4 is grounded, and the first load R p The second end b4 is connected to the negative electrode of the charged body 110.

[0058] A capacitor is an electronic component that can store electric charge. It consists of two conductive plates (called electrodes) and an insulating material (called a dielectric) in between. The basic function of a capacitor is to store and release electrical energy. These processes are called charging and discharging, respectively. That is, a capacitor has charging and discharging characteristics. In the impedance detection circuit 100, the first capacitor C p and the second capacitor C n The charged body 110 is used to charge or discharge the battery.

[0059] The charging process of a capacitor refers to: when a capacitor is connected to a voltage source (such as a charged body 110), the voltage source will generate a potential difference between the two electrodes. Due to the existence of the potential difference, positive charges will accumulate on the electrode connected to the positive electrode of the voltage source, while negative charges will accumulate on the electrode connected to the negative electrode of the voltage source. An electric field is formed between the two electrodes. This electric field attempts to prevent more charges from moving. As the charges accumulate, the electric field strength increases, causing the current to gradually decrease until the current is zero. At this time, the capacitor is considered to be fully charged. The fully charged capacitor stores electric field energy, which can be released when needed.

[0060] The discharge process of a capacitor means that when the capacitor is fully charged, if the voltage source is removed, the potential difference between the two electrodes still exists. Due to the potential difference, the charge begins to flow from the high potential electrode to the low potential electrode. The movement of the charge forms a current, which flows through the circuit connected to the capacitor. As the charge flows, the electric field strength between the two electrodes gradually weakens, and the energy stored in the electric field is released to drive other components in the circuit (for example, resistors). Eventually, the charges on the two electrodes are neutralized, the potential difference disappears, the current stops, and the capacitor is discharged.

[0061] Optionally, the first capacitor C p and the second capacitor C n Can be implemented as a fixed capacitor or a variable capacitor.

[0062] In the impedance detection circuit provided in the embodiment of the present application, the first capacitor C p During the charging or discharging process, the first capacitor C p Used to provide a first voltage U corresponding to at least three time nodes respectively px ; In the second capacitor Cn During the charging or discharging process, the second capacitor C n Used to provide a second voltage U corresponding to at least three time nodes respectively nx ; The first voltage U px and the second voltage U nx Used to determine the insulation impedance detection result of the charged body 110 to the ground.

[0063] Among them, at least three time nodes are time nodes sampled at equal time intervals.

[0064] In some embodiments, the first voltage U corresponding to at least three time nodes is px To determine the first capacitance C p The first stable voltage U in the first stable state p1 , the first stable state is the first capacitor C p After charging or discharging; at least three time nodes respectively correspond to the second voltage U nx To determine the second capacitance C n The second stable voltage U in the second stable state n2 , the second stable state is the second capacitor C n After charging or discharging; the first stable voltage U p1 and the second stable voltage U n2 Used to determine the insulation impedance detection result of the charged body 110 to the ground.

[0065] Optionally, the insulation impedance detection result is used to indicate at least one of the insulation impedance of the positive electrode of the charged body 110 to the ground and the insulation impedance of the negative electrode of the charged body 110 to the ground. p It is used to indicate the equivalent insulation resistance of the positive electrode of the charged body 110 to the ground, and the second load R n It is used to indicate the equivalent insulation resistance of the positive and negative electrodes of the charged body 110 to the ground.

[0066] In some embodiments, the first stable voltage U p1 and the second stable voltage U n2 To determine the first load R p The first load impedance and the second load R n the first load impedance and the second load impedance are used to determine the insulation impedance detection result of the charged body 110 to the ground.

[0067] Illustratively, the first load impedance is equivalent to the insulation impedance of the positive electrode of the charged body 110 to the ground, and the second load impedance is equivalent to the insulation impedance of the negative electrode of the charged body 110 to the ground.

[0068] In some embodiments, the impedance detection circuit 100 further includes an external controller, which is used to collect the voltage and current in the impedance detection circuit 100 and control the switches in the impedance detection circuit 100 .

[0069] Optionally, Figure 2 A schematic diagram of another impedance detection circuit provided in an embodiment of the present application. Figure 2 As shown, the positive load circuit 120 also includes a first capacitor C p The third load R1 and the first switch K1 are connected in parallel, and the third load R1 is connected in series with the first switch K1; the negative load circuit 130 also includes a second capacitor C n The fourth load R2 and the second switch K2 are connected in parallel, and the fourth load R2 and the second switch K2 are connected in series.

[0070] The third load R1 and the fourth load R2 may be resistors, heaters, lamps, etc., which are not limited in the present embodiment. In an example, the third load R1 is implemented as a third resistor R1 and the fourth load R2 is implemented as a fourth resistor R2.

[0071] The first switch K1 and the second switch K2 can be implemented as at least one of a mechanical switch and an electronic switch, which are not limited here. A mechanical switch realizes the on-off of a circuit through physical contact; an electronic switch realizes the on-off of a circuit through electronic components (such as transistors, etc.).

[0072] In the positive load circuit 120, optionally, the first end a5 of the third load R1 is connected to the positive electrode of the charged body 110, and the second end b5 of the third load R1 is connected to the first switch K1, that is, the current flows from the third load R1 to the first switch K1; or, in the positive load circuit 120, the first switch K1 is connected to the positive electrode of the charged body 110, the first switch K1 is connected to the first end a5 of the third load R1, and the second end b5 of the third load R1 is grounded, that is, the current flows from the first switch K1 to the third load R1.

[0073] In the negative load circuit 130, optionally, the first end a6 of the fourth load R2 is grounded, the second end b6 of the fourth load R2 is connected to the second switch K2, and the second switch K2 is connected to the negative electrode of the charged body 110, that is, the current flows from the fourth load R2 to the second switch K2; or, the second switch K2 is grounded, the second switch K2 is connected to the first end a6 of the fourth load R2, and the second end b6 of the fourth load R2 is connected to the negative electrode of the charged body 110, that is, the current flows from the second switch K2 to the fourth load R2.

[0074] In some embodiments, when the first switch K1 is turned on and the second switch K2 is turned off, the first capacitor C pDuring the charging or discharging process, the third load R1 is used to provide the first load voltage U corresponding to at least three time nodes. 1x , the first load voltage U corresponding to at least three time nodes 1x To determine the first capacitance C p The first voltage U corresponding to at least three time nodes px , where the first load voltage U at the i-th time node is 1i For determining the first voltage U at the i-th time node pi , i is a positive integer; when the second switch K2 is turned on and the first switch K1 is turned off, the second capacitor C n During the charging or discharging process, the fourth load R2 is used to provide a second load voltage U corresponding to at least three time nodes. 2x , the second load voltage U corresponding to at least three time nodes 2x To determine the second capacitance C n The second voltage U corresponding to at least three time nodes nx , where the second load voltage U at the jth time node is 2j For determining the second voltage U at the jth time node nj , j is a positive integer.

[0075] Among them, at least three time nodes are time nodes sampled at equal time intervals.

[0076] Among them, conduction means that current can flow through the switch, for example, the first switch K1 is conducted, which means that current can flow through the first switch K1; disconnection means that current cannot flow through the switch, for example, the first switch K1 is disconnected, which means that current cannot flow through the first switch K1.

[0077] For the first switch K1 and the second switch K2:

[0078] 1. The first switch K1 and the second switch K2 are implemented as mechanical switches.

[0079] like Figure 2 As shown, the second end b5 of the third load R1 is connected to the first static contact e1 of the first switch K1, and the first moving contact e2 of the first switch K1 is grounded; the first static contact e3 of the second switch K2 is grounded, and the first end a6 of the fourth load R2 is connected to the first moving contact e4 of the second switch K2.

[0080] Schematically, the first switch K1 is turned on by controlling the first static contact e1 and the first moving contact e2 to be connected, and the first switch K1 is turned off by controlling the first static contact e1 and the first moving contact e2 to be disconnected. The second switch K2 is turned on by controlling the first static contact e3 and the first moving contact e4 of the second switch K2 to be connected, and the second switch K2 is turned off by controlling the first static contact e3 and the first moving contact e4 of the second switch K2 to be disconnected.

[0081] 2. The first switch K1 and the second switch K2 are implemented as electronic switches.

[0082] Optionally, in the disclosed embodiment, the transistor may be a triode (Bipolar Transistor, also known as a bipolar junction transistor), or a field effect transistor (such as a metal oxide semiconductor tube, Metal-Oxide-Semiconductor Field-Effect Transistor, MOSFET), and the application does not limit the type of transistor. The following mainly takes the first switch K1 and the second switch K2 as a triode as an example for explanation, and the three electrodes of the triode are a base (Base, B), an emitter (Emitter, E) and a collector (Collector, C).

[0083] Among them, transistors can be divided into N-type transistors and P-type transistors. For triodes, N-type transistors are also called NPN-type transistors. When NPN-type transistors are used as switches: when the base voltage reaches or exceeds a certain threshold, the transistor is turned on (that is, the switch is turned on); when the base voltage is lower than the threshold, the transistor is cut off (that is, the switch is turned off). P-type transistors are also called PNP-type transistors. When PNP-type transistors are used as switches: when the base voltage drops below a certain threshold, the transistor is turned on (that is, the switch is turned on); when the base voltage is higher than the threshold, the transistor is cut off (that is, the switch is turned off).

[0084] In some embodiments, the first switch K1 may be implemented as an N-type transistor or a P-type transistor; the second switch K2 may be implemented as an N-type transistor or a P-type transistor, which is not limited in the present application.

[0085] Schematically, the first switch K1 and the second switch K2 are both NPN transistors. Figure 3 As shown, Figure 2 The first switch K1 shown can also be implemented as Figure 3 An NPN transistor 300 is shown.

[0086] The first electrode (i.e., base electrode B) of the first switch K1 is connected to the external controller, the second electrode (i.e., collector electrode C) of the first switch K1 is connected to the second end b5 of the third load R1, and the third electrode (i.e., emitter electrode E) of the first switch K1 is connected to the GND end. The current flows from the positive electrode of the charged body 110 through the third load R1 and then flows to the second electrode (i.e., collector electrode C) of the first switch K1.

[0087] The external controller controls the first switch K1 to be turned on by controlling the voltage of the first pole of the first switch K1 to be greater than or equal to the first threshold, and controls the first switch K1 to be turned off by controlling the voltage of the first pole of the first switch K1 to be less than the first threshold.

[0088] Figure 2 The second switch K2 shown can also be implemented as Figure 3 An NPN transistor 300 is shown.

[0089] The first electrode (i.e., base electrode B) of the second switch K2 is connected to the external controller, the second electrode (i.e., collector electrode C) of the second switch K2 is connected to the GND terminal, and the third electrode (i.e., emitter electrode E) of the second switch K2 is connected to the first terminal a6 of the fourth load R2. The current flows from the third electrode (i.e., emitter electrode E) of the second switch K2 to the negative electrode of the charged body 110.

[0090] The external controller controls the voltage of the first electrode of the second switch K2 to be greater than or equal to the second threshold value to turn on the second switch K2, and controls the voltage of the first electrode of the second switch K2 to be less than the second threshold value through the third control terminal c3 to turn off the second switch K2. The first threshold value and the second threshold value may be the same or different.

[0091] It should be noted that the above examples of the first switch K1 and the second switch K2 are only for illustrative purposes, and are not limited in the embodiments of the present application.

[0092] In summary, the embodiment of the present application designs an impedance detection circuit, wherein a positive load circuit and a negative load circuit are connected in series to the positive and negative ends of a charged body, and are grounded at the series node of the positive load circuit and the negative load circuit, by respectively setting capacitors in the positive load circuit and the negative load circuit to equalize the insulation parasitic capacitance of the charged body to the ground, and setting loads to equalize the insulation impedance of the charged body to the ground, by respectively collecting a first voltage corresponding to the first capacitor in the positive load circuit at at least three time nodes, and respectively collecting a second voltage corresponding to the second capacitor in the negative load circuit at at least three time nodes, to determine the insulation impedance detection result of the charged body to the ground, because the accurate voltages of the first capacitor and the second capacitor in a stable state can be obtained based on the first voltage and the second voltage at the above-mentioned at least three time nodes, therefore, the accuracy of the result when the insulation impedance of the charged body to the ground is detected by the capacitor can be improved, and at the same time, because there is no need to eliminate the voltages of the first capacitor and the second capacitor in a stable state when determining the voltages of the first capacitor and the second capacitor in a stable state. The introduction of the natural logarithm function can reduce the calculation efficiency of the equipment when detecting the insulation impedance of the charged body to the ground, thereby improving the efficiency of impedance detection.

[0093] Optionally, Figure 4 A schematic diagram of another impedance detection circuit provided by an embodiment of the present disclosure. The third load R1 includes a plurality of first sub-loads r 1x , multiple first sub-loads r 1x is a series relationship, the first load voltage U 1x For multiple first sub-loads r 1x The first sub-load r in the mth 1m The fourth load R2 includes a plurality of second sub-loads r 2x , multiple second sub-loads r 2x is a series relationship, the second load voltage U 2x For multiple second sub-loads r 2x The nth second subload r 2n voltage, n is a positive integer.

[0094] In one example, if Figure 4 As shown, the third load R1 includes two first sub-loads r 11 and r 12 For example, the first sub-load r 11 、r 12 and the first switch K1 are connected in series in sequence, or the first switch K1 is connected in series with the first sub-load r 11 and r 12 The fourth load R2 includes two second sub-loads r 21 and r 22 For example, the second sub-load r 21 、r 22The second switch K2 is connected in series in sequence, or the second switch K2 is connected in series with the first sub-load r 11 and r 12 between.

[0095] The first sub-load r 11 、r 12 and the second subload r 21 、r 22 It can be a resistor, a heater, an electric lamp, etc., which is not limited in the present embodiment. In one example, the first sub-load r 11 、r 12 The fifth resistor r 11 and the sixth resistor r 12 , the second sub-load r 21 、r 22 The seventh resistor r 21 and the eighth resistor r 22 For example.

[0096] Take the example of connecting the switch in series between sub-loads, such as Figure 4 As shown, in the positive load circuit 120, the first sub-load r 11 The first end a5 of the first sub-load is connected to the positive electrode of the charged body 110. 11 The second end b5 of the first load is connected to the first switch K1. 12 The first end a7 of the first load is connected to the first switch K1, and the first sub-load r 12 The second end b7 of is grounded, that is, the current flows through the first sub-load r 11 , the first switch K1 and the first sub-load r 12 ; The second sub-load r 22 The first end a8 is grounded, and the second sub-load r 22 The second end b8 of the second sub-load is connected to the second switch K2. 21 The first end a6 of the second switch K2 is connected to the second sub-load r 21 The second end b6 of the second sub-load is connected to the negative electrode of the charged body 110, that is, the current flows through the second sub-load r 22 , the second switch K2 and the second sub-load r 21 .

[0097] In some embodiments, when the first switch K1 is turned on and the second switch K2 is turned off, the first capacitor C p During the charging or discharging process, the first sub-load r 12 Used to provide a first load voltage U corresponding to at least three time nodes respectively 1x , the first load voltage U corresponding to at least three time nodes 1x To determine the first capacitance C pThe first voltage U corresponding to at least three time nodes px , where the first load voltage U at the i-th time node is 1i For determining the first voltage U at the i-th time node pi , i is a positive integer; when the second switch K2 is turned on and the first switch K1 is turned off, the second capacitor C n During the charging or discharging process, the second sub-load r 22 Used to provide a second load voltage U corresponding to at least three time nodes respectively 2x , the second load voltage U corresponding to at least three time nodes 2x To determine the second capacitance C n The second voltage U corresponding to at least three time nodes nx , where the second load voltage U at the jth time node is 2j For determining the second voltage U at the jth time node nj , j is a positive integer.

[0098] Among them, at least three time nodes are time nodes sampled at equal time intervals.

[0099] For the first switch K1 and the second switch K2:

[0100] 1. The first switch K1 and the second switch K2 are implemented as mechanical switches.

[0101] like Figure 4 As shown, the first sub-load r 11 The second end b5 of the first load is connected to the first static contact e1 of the first switch K1, and the first moving contact e2 of the first switch K1 is connected to the first sub-load r 12 The first end a7 of the second switch K2 is connected to the first static contact e3 and the second sub-load r 22 The second end b8 is connected to the second sub-load r 21 The first end a6 of is connected to the first moving contact e4 of the second switch K2.

[0102] Schematically, the first switch K1 is turned on by controlling the first stationary contact e1 and the first moving contact e2 of the first switch K1 to be connected, and the first switch K1 is turned off by controlling the first stationary contact e1 and the first moving contact e2 of the first switch K1 to be disconnected. The second switch K2 is turned on by controlling the first stationary contact e3 and the first moving contact e4 of the second switch K2 to be connected, and the second switch K2 is turned off by controlling the first stationary contact e3 and the first moving contact e4 of the second switch K2 to be disconnected.

[0103] 2. The first switch K1 and the second switch K2 are implemented as electronic switches.

[0104] Optionally, in the disclosed embodiment, the transistor may be a triode (Bipolar Transistor, also known as a bipolar junction transistor), or a field effect transistor (such as a metal oxide semiconductor tube, Metal-Oxide-Semiconductor Field-Effect Transistor, MOSFET), and the application does not limit the type of transistor. The following mainly takes the first switch K1 and the second switch K2 as a triode as an example for explanation, and the three electrodes of the triode are a base (Base, B), an emitter (Emitter, E) and a collector (Collector, C).

[0105] Among them, transistors can be divided into N-type transistors and P-type transistors. For triodes, N-type transistors are also called NPN-type transistors. When NPN-type transistors are used as switches: when the base voltage reaches or exceeds a certain threshold, the transistor is turned on (that is, the switch is turned on); when the base voltage is lower than the threshold, the transistor is cut off (that is, the switch is turned off). P-type transistors are also called PNP-type transistors. When PNP-type transistors are used as switches: when the base voltage drops below a certain threshold, the transistor is turned on (that is, the switch is turned on); when the base voltage is higher than the threshold, the transistor is cut off (that is, the switch is turned off).

[0106] In some embodiments, the first switch K1 may be implemented as an N-type transistor or a P-type transistor; the second switch K2 may be implemented as an N-type transistor or a P-type transistor, which is not limited in the present application.

[0107] Schematically, the first switch K1 and the second switch K2 are both NPN transistors. Figure 3 As shown, Figure 4 The first switch K1 shown can also be implemented as Figure 3 An NPN transistor 300 is shown.

[0108] The first electrode (ie, base electrode B) of the first switch K1 is connected to the external controller, and the second electrode (ie, collector electrode C) of the first switch K1 is connected to the first sub-load r 11 The third pole (ie, emitter E) of the first switch K1 is connected to the first sub-load r 12 The current flows from the positive electrode of the charged body 110 through the first sub-load r 11 Then it flows to the second electrode (ie, collector C) of the first switch K1.

[0109] The external controller controls the first switch K1 to be turned on by controlling the voltage of the first pole of the first switch K1 to be greater than or equal to the first threshold, and controls the first switch K1 to be turned off by controlling the voltage of the first pole of the first switch K1 to be less than the first threshold.

[0110] Figure 4 The second switch K2 shown can also be implemented as Figure 3 An NPN transistor 300 is shown.

[0111] The first electrode (ie, base electrode B) of the second switch K2 is connected to the external controller, and the second electrode (ie, collector electrode C) of the second switch K2 is connected to the second sub-load r 22 The third pole (ie, emitter E) of the second switch K2 is connected to the second sub-load r 21 The current flows from the third electrode (ie, the emitter E) of the second switch K2 to the negative electrode of the charged body 110 .

[0112] The external controller controls the voltage of the first electrode of the second switch K2 to be greater than or equal to the second threshold value to turn on the second switch K2, and controls the voltage of the first electrode of the second switch K2 to be less than the second threshold value through the third control terminal c3 to turn off the second switch K2. The first threshold value and the second threshold value may be the same or different.

[0113] It should be noted that the above examples of the first switch K1 and the second switch K2 are only for illustrative purposes, and are not limited in the embodiments of the present application.

[0114] The impedance detection circuit provided in the present application can provide efficient and accurate impedance detection function based on a low-cost circuit.

[0115] In some embodiments, the impedance detection circuit 100 further includes at least one of a filtering circuit, a charge discharge circuit, and a voltage division acquisition circuit.

[0116] Among them, the filter circuit is a circuit used for signal processing, and its basic function is to extract the desired signal from various signals and filter out the unwanted interference signal. The filter can be divided into analog filters and digital filters, where the analog filter is used to process analog signals or continuous signals, and the digital filter is used to process discrete digital signals.

[0117] Optionally, the filter circuit includes a low-pass filter circuit, a high-pass filter circuit, a band-pass filter circuit, a band-stop filter circuit, a Butterworth filter circuit, a Chebyshev filter circuit, an LC (Inductance-Capacitance) resonant filter circuit, an RC filter circuit, a digital filter circuit, etc.

[0118] In one example, when there are too many external radio signals or the frequency is almost close to the frequency of the impedance detection circuit 100 (ie, close to the common frequency), an LC resonant filter circuit of the corresponding frequency is added to the impedance detection circuit 100 .

[0119] A charge discharge circuit is a circuit used to quickly release the charge stored on an energy storage element (such as a capacitor) in a circuit to ensure circuit safety and prevent circuit reset problems.

[0120] Optionally, the charge discharge circuit includes a discharge resistor basic circuit, a discharge resistor circuit in a capacitor step-down circuit, a discharge resistor circuit at both ends of a filter capacitor, a discharge resistor circuit of an X capacitor in a power supply circuit, and the like.

[0121] In one example, when the impedance detection circuit 100 is in a high temperature and high humidity environment, a charge discharge circuit is provided in the impedance detection circuit 100 to ensure that the residual charge can be quickly released.

[0122] The voltage divider circuit is used to convert a higher input voltage into a lower output voltage for subsequent circuit processing. The voltage divider circuit is usually composed of two resistors (R1 and R2) in series. in When applied across these two resistors, the output voltage That is, the output voltage is a ratio of the input voltage, depending on the ratio of the two resistor values. By choosing different resistor values, the desired output voltage can be achieved.

[0123] In one example, when the charged body voltage of the charged body 110 of the impedance detection circuit 100 is high, a voltage division acquisition circuit is provided in the impedance detection circuit 100 to perform impedance detection.

[0124] Secondly, the impedance detection method provided in this application is introduced.

[0125] Figure 5 This is a flow chart of an impedance detection method provided in an embodiment of the present application. The method is described by taking the application of the method to an impedance detection circuit 100 as any one of the above-mentioned examples, and the method is schematically described by taking the execution of the method by a control device externally connected to the circuit as an example. The method includes steps 510 to 530.

[0126] Step 510 , during the charging or discharging process of the first capacitor, obtaining first voltages of the first capacitor corresponding to at least three time nodes respectively.

[0127] A capacitor is an electronic component that can store electric charge. It consists of two conductive plates (called electrodes) and an insulating material (called a dielectric) in between. The basic function of a capacitor is to store and release electrical energy, a process called charging and discharging, respectively. That is, a capacitor has charging and discharging characteristics. Figure 1 In the impedance detection circuit 100 shown in FIG. P and the second capacitor C n The charged body 110 is used to charge or discharge the battery.

[0128] When the capacitor is charged, the charge stored in the capacitor increases, and the potential difference between the two ends of the capacitor increases. Let V0 be the initial voltage value of the capacitor at t=0, V u is the capacitor charging termination voltage, V t is the capacitor voltage value at any time t, then the capacitor charging time calculation formula is as shown in Formula 1.

[0129] Formula 1:

[0130] Wherein, τ is the time constant of the resistor-capacitor circuit (RC circuit).

[0131] When the capacitor is discharged, the charge stored in the capacitor decreases, and the potential difference between the two ends of the capacitor decreases. At this time, V u =0, then the capacitor discharge time calculation formula is shown in Formula 2.

[0132] Formula 2:

[0133] In the embodiment of the present application, the control device is in the first capacitor C p During the charging or discharging process, the first capacitor C is obtained. p The first voltage U corresponding to at least three time nodes px .

[0134] Among them, at least three time nodes are time nodes sampled at equal time intervals.

[0135] In one example, taking three time nodes t0, t1, and t2 as examples, the control device obtains the first capacitor C p At the time node t0, the first voltage U p11 , the first voltage U at time node t1 p12 and the first voltage U at time node t2 p13 .

[0136] Step 520 : During the charging or discharging process of the second capacitor, obtain second voltages of the second capacitor corresponding to the at least three time nodes.

[0137] In the embodiment of the present application, the control device is in the second capacitor C n During the charging or discharging process, the second capacitor C n The second voltage U corresponding to at least three time nodes nx .

[0138] Among them, at least three time nodes are time nodes sampled at equal time intervals.

[0139] In one example, taking three time nodes t0, t1, and t2 as examples, the control device obtains the second capacitor C n The second voltage U at time node t0 n21 , the second voltage U at time node t1 n22 and the second voltage U at time node t2 n23 .

[0140] Step 530: Determine the insulation impedance detection result of the charged body to the ground based on the first voltage and the second voltage.

[0141] Optionally, the insulation impedance detection result is used to indicate at least one of the insulation impedance of the positive electrode of the charged body 110 to the ground and the insulation impedance of the negative electrode of the charged body 110 to the ground. p It is used to indicate the equivalent insulation resistance of the positive electrode of the charged body 110 to the ground, and the second load R m It is used to indicate the equivalent insulation resistance of the positive and negative electrodes of the charged body 110 to the ground.

[0142] In some embodiments, based on the first voltage U corresponding to at least three time nodes respectively px , determine the first capacitor C in the first stable state p The corresponding first stable voltage U p1 Based on the second voltage U corresponding to at least three time nodes nx , determine the second capacitance C in the second stable state n The corresponding second stable voltage U n2 Based on the first stable voltage U p1 and the second stable voltage U n2 , determine the insulation impedance test results of the charged body to the ground.

[0143] Among them, the first stable state is the first capacitor C p The second stable state is the second capacitor C n The stable state reached after the charging or discharging process, for example, fully charged or discharged.

[0144] Exemplarily, the capacitor voltage obtained at three time nodes during the charging process is used as an example to illustrate the process of determining the stable voltage of the capacitor. At time node t0, the capacitor voltage V1 is as shown in formula 3, at time node t0+Δt, the capacitor voltage V1 is as shown in formula 4, and at time node t0+2Δt, the capacitor voltage V1 is as shown in formula 5.

[0145] Formula 3:

[0146] Formula 4:

[0147] Formula 5:

[0148] After eliminating the variables in formulas 3 to 5, we can get formula 6. The capacitor voltage at three time nodes can be used to determine the final stable voltage value V after the capacitor is charged through formula 6. u .

[0149] Formula 6:

[0150] The specific elimination process can be realized as follows: transform formula 3 into formula 7, transform formula 4 into formula 8, and transform formula 5 into formula 9.

[0151] Formula 7: Right now,

[0152] Formula 8: Right now,

[0153] Formula 9: Right now,

[0154] Substituting formula 7 into formula 8, Eliminate the variables and get formula 10.

[0155] Formula 10: Right now,

[0156] Substituting Formula 7 and Formula 10 into Formula 9, we get Eliminate the variables and get formula 11.

[0157] Formula 11: That is, (V u -V3)·(V u -V1)=(V u -V2) 2

[0158] Formula 11 can be converted into Formula 6.

[0159] From formula 6, we can know that through the first voltage U p11 , the first voltage U p12 and the first voltage U p13 It can be known that the first capacitor C p The first stable voltage U p1 for And through the second voltage U n21 , the second voltage U n22 and the second voltage U n23 It can be known that the second capacitor C nThe second stable voltage U n2 for

[0160] In some embodiments, based on the first stable voltage U p1 and the second stable voltage U n2 , determine the first load R p The first load impedance and the second load R n the first load impedance and the second load impedance are used to determine the insulation impedance detection result of the charged body 110 to the ground.

[0161] Illustratively, the first load impedance is equivalent to the insulation impedance of the positive electrode of the charged body 110 to the ground, and the second load impedance is equivalent to the insulation impedance of the negative electrode of the charged body 110 to the ground.

[0162] In some embodiments, the control device obtains the charged body voltage E of the charged body 110, based on the first stable voltage U p1 and the charged body voltage E, determine the second capacitance C in the first stable state n The corresponding third stable voltage U n1 Based on the second stable voltage U n2 and the charged body voltage E, determine the first capacitance C in the second stable state p The corresponding fourth stable voltage U p2 ; Based on the first stable voltage U p1 , the second stable voltage U n2 , the third stable voltage U n1 and the fourth stable voltage U p2 , determine the insulation impedance test results of the charged body to the ground.

[0163] Among them, due to the first capacitor C p The positive load circuit and the second capacitor C n The negative load circuit is connected in series to the positive and negative ends of the charged body 110. Therefore, in the first stable state, the first capacitor C p The corresponding first stable voltage U p1 and the second capacitor C n The corresponding third stable voltage U n1 The sum of the potential difference of the charged body is equal to the charged body voltage E, so the third stable voltage U n1 As shown in Formula 12.

[0164] Formula 12: U n1 =EU p1

[0165] In the second stable state, the first capacitor C p The corresponding fourth stable voltage U p2 and the second capacitor Cn The corresponding second stable voltage U n2 The sum of the potential difference of the charged body is equal to the charged body voltage E, so the fourth stable voltage U p2 As shown in Formula 13.

[0166] Formula 13: U p2 =EU n2

[0167] In some embodiments, the first stable voltage U in the first stable state is determined by measuring the charged body voltage E of the charged body 110. p1 and the third stable voltage U n1 , and the second stable voltage U in the second stable state n2 and the fourth stable voltage U p2 After that, based on the first stable voltage U p1 , the second stable voltage U n2 , the third stable voltage U n1 and the fourth stable voltage U p2 , determine the first load R p The first load impedance and the second load R n based on the first load impedance and the second load impedance, determine the insulation impedance detection result of the charged body to the ground.

[0168] Optionally, the charged body voltage E can be directly measured by an ammeter and a voltmeter; or, the charged body voltage E can be measured by connecting an AFE (Analog Front End) acquisition circuit. In one example, the control device is a device integrated with an AFE acquisition chip, and the control device measures the charged body voltage E of the charged body by connecting the positive and negative electrodes of the charged body and calling the AFE acquisition chip.

[0169] In some embodiments, Figure 2 As shown, the positive load circuit 120 also includes a first capacitor C p The third load R1 and the first switch K1 are connected in parallel, and the third load R1 is connected in series with the first switch K1; the negative load circuit 130 also includes a second capacitor C n The fourth load R2 and the second switch K2 are connected in parallel, and the fourth load R2 and the second switch K2 are connected in series.

[0170] The third load R1 and the fourth load R2 are loads with known impedances.

[0171] In an illustrative manner, by obtaining the first load voltage U corresponding to the third load R1 at at least three time nodes, 1x To determine the first capacitance C p The first voltage U corresponding to at least three time nodespx : Control the first switch to be turned on, and control the second switch to be turned off; p During the charging or discharging process, the first load voltage U corresponding to the third load at at least three time nodes is obtained. 1x Based on at least three time nodes respectively corresponding to the first load voltage U 1x , determine the first capacitor C p The first voltage U corresponding to at least three time nodes px , where the first load voltage U at the i-th time node is 1i For determining the first voltage U at the i-th time node pi , i is a positive integer.

[0172] Since the third load R1 and the first capacitor C p is a parallel relationship, therefore, the first load voltage U 1x and the first voltage U px The same, that is, by measuring the first load voltage U corresponding to the third load R1 with known impedance at at least three time nodes. 1x , we can know the first capacitance C p The first voltage U corresponding to at least three time nodes px .

[0173] Similarly, by obtaining the second load voltage U corresponding to the fourth load R2 at at least three time nodes respectively 2x To determine the second capacitor C n The second voltage U corresponding to at least three time nodes nx : Control the second switch to be turned on, and control the first switch to be turned off; at the second capacitor C n During the charging or discharging process, the second load voltage U corresponding to the fourth load at at least three time nodes is obtained. 2x Based on at least three time nodes respectively corresponding to the second load voltage U 2x , determine the second capacitor C n The second voltage U corresponding to at least three time nodes nx , where the second load voltage U at the jth time node is 2j For determining the second voltage U at the jth time node nj , j is a positive integer.

[0174] Due to the fourth load R2 and the second capacitor C n is a parallel relationship, therefore, the second load voltage U 2x and the second voltage U nx The same, that is, by measuring the second load voltage U corresponding to the fourth load R2 with known impedance at at least three time nodes.2x , we can know the second capacitance C n The second voltage U corresponding to at least three time nodes nx .

[0175] Since the positive load circuit and the negative load circuit are in series, in the first stable state, since the first switch K1 is turned on and the second switch K2 is turned off, the loads through which current flows in the positive load circuit include the first load R p and the third load R1. The loads in the negative load circuit through which current flows include the second load R n , and the sum of the currents in the positive load circuit is equal to the sum of the currents in the negative load circuit, therefore, through the first stable voltage U p1 , the third stable voltage U n1 Formula 14 can be established.

[0176] Formula 14:

[0177] In the second stable state, since the second switch K2 is turned on and the first switch K1 is turned off, the loads in the positive load circuit through which current flows include the first load R p , the loads through which current flows in the negative load circuit include the second load R n and the fourth load R2, and the sum of the currents in the positive load circuit is equal to the sum of the currents in the negative load circuit, therefore, the second stable voltage U n2 , the fourth stable voltage U p2 Formula fifteen can be established.

[0178] Formula 15:

[0179] Since the first stable voltage U p1 , the second stable voltage U n2 , the third stable voltage U n1 , the fourth stable voltage U p2 The impedance value of the third load R1 and the impedance value of the fourth load R2 are known quantities. By combining Formula 14 and Formula 15, the impedance of the first load R p The corresponding first load impedance and the second load R n The second load impedance, since the first load impedance is equivalent to the insulation impedance of the positive pole of the charged body 110 to the ground, and the second load impedance is equivalent to the insulation impedance of the negative pole of the charged body 110 to the ground, the insulation impedance detection result can be determined by the obtained first load impedance and the second load impedance.

[0180] In some embodiments, the third load R1 includes a plurality of first sub-loads r 1x , multiple first sub-loads r1x is a series relationship, the first load voltage U 1x For multiple first sub-loads r 1x The first sub-load r in the mth 1m The fourth load R2 includes a plurality of second sub-loads r 2x , multiple second sub-loads r 2x is a series relationship, the second load voltage U 2x For multiple second sub-loads r 2x The nth second subload r 2n voltage, n is a positive integer.

[0181] It is worth noting that multiple first sub-loads r 1x and multiple second sub-loads r 2x All loads have known resistance.

[0182] In one example, if Figure 4 As shown, the third load R1 includes two first sub-loads r 11 and r 12 The fourth load R2 includes two second sub-loads r 21 and r 22 For example, assume that the first load voltage U 1x The first subload r 12 The voltage across the two ends, the second load voltage U 2x The second sub-load r 22 The voltage across both ends.

[0183] Schematically, by obtaining the first subload r 12 The first load voltage U corresponding to at least three time nodes 1x To determine the first capacitance C p The first voltage U corresponding to at least three time nodes px : Control the first switch to be turned on, and control the second switch to be turned off; p During the charging or discharging process, the first sub-load r is obtained. 12 The first load voltage U corresponding to at least three time nodes 1x Based on at least three time nodes respectively corresponding to the first load voltage U 1x , determine the first capacitor C p The first voltage U corresponding to at least three time nodes px , where the first load voltage U at the i-th time node is 1i For determining the first voltage U at the i-th time node pi , i is a positive integer.

[0184] Since the first sub-load in series r11 and r 12 With the first capacitor C p is a parallel relationship, therefore, the first voltage U px It can be determined by formula sixteen.

[0185] Formula 16:

[0186] Assume three time nodes t0, t1, and t2. At time node t0, the first sub-load r is collected. 12 The first load voltage U 11 , through the first load voltage U 11 and the first subload r 11 and r 12 , the first capacitance C at time node t0 can be calculated p The corresponding first voltage U p11 ; At time node t1, the first sub-load r is collected 12 The first load voltage U 12 , through the first load voltage U 12 and the first subload r 11 and r 12 , the first capacitance C at time node t1 can be calculated p The corresponding first voltage U p12 ; At time node t2, the first sub-load r is collected 12 The first load voltage U 13 , through the first load voltage U 13 and the first subload r 11 and r 12 , the first capacitance C at time node t2 can be calculated p The corresponding first voltage U p13 .

[0187] Similarly, by obtaining the second subload r 22 The second load voltage U corresponding to each of the at least three time nodes is 2x To determine the second capacitor C n The second voltage U corresponding to at least three time nodes nx : Control the second switch to be turned on, and control the first switch to be turned off; at the second capacitor C n During the charging or discharging process, the second sub-load r 22 The second load voltage U corresponding to at least three time nodes 2x Based on at least three time nodes respectively corresponding to the second load voltage U 2x , determine the second capacitor C n The second voltage U corresponding to at least three time nodesnx , where the second load voltage U at the jth time node is 2j For determining the second voltage U at the jth time node nj , j is a positive integer.

[0188] Since the second sub-load r 21 and r 22 With the second capacitor C n is a parallel relationship, therefore, the second voltage U nx It can be determined by formula seventeen.

[0189] Formula 17:

[0190] Assume three time nodes t0, t1, and t2. At time node t0, the second sub-load r is collected. 22 The second load voltage U 21 , through the second load voltage U 21 and the known second subload r 21 and r 22 , the second capacitance C at time node t0 can be calculated n The corresponding second voltage U n21 ; At time node t1, the second sub-load r is collected 22 The second load voltage U 22 , through the second load voltage U 22 and the known second subload r 21 and r 22 , the second capacitance C at time node t1 can be calculated m The corresponding second voltage U n22 ; At time node t2, the second sub-load r is collected 22 The second load voltage U 23 , through the second load voltage U 23 and the known second subload r 21 and r 22 , the second capacitance C at time node t2 can be calculated n The corresponding second voltage U n23 .

[0191] Furthermore, according to Formula 6, the first voltage U p11 , U p12 , U p13 Knowing the first capacitor C p The first stable voltage U in the first stable state p1 , according to the above-known second voltage U n21 , U n22 , U n23 Knowing the second capacitor Cn The second stable voltage U in the second stable state n2 , the first load R can be calculated by combining formula 12 to formula 15 p The corresponding first load impedance and the second load R n The second load impedance, since the first load impedance is equivalent to the insulation impedance of the positive pole of the charged body 110 to the ground, and the second load impedance is equivalent to the insulation impedance of the negative pole of the charged body 110 to the ground, the insulation impedance detection result can be determined by the obtained first load impedance and the second load impedance.

[0192] In summary, the impedance detection method provided in the embodiment of the present application determines the insulation impedance detection result of the charged body to the ground by respectively collecting the first voltage corresponding to the first capacitor in the positive load circuit at at least three time nodes, and respectively collecting the second voltage corresponding to the second capacitor in the negative load circuit at at least three time nodes. Since the accurate voltage of the first capacitor and the second capacitor in a stable state can be obtained based on the first voltage and the second voltage at the at least three time nodes, the accuracy of the result when the insulation impedance of the charged body to the ground is detected by the capacitor can be improved. At the same time, since there is no need to eliminate the voltage of the first capacitor and the second capacitor in a stable state when determining the voltage of the first capacitor and the second capacitor in a stable state, The introduction of the natural logarithm function can reduce the calculation efficiency of the equipment when detecting the insulation impedance of the charged body to the ground, thereby improving the efficiency of impedance detection.

[0193] The impedance detection method provided in the embodiment of the present application can be completed on an impedance detection circuit 100 with extremely low computing power and extremely low cost. The implementation of this method is sufficient to meet the requirements of rapid insulation detection before starting of vehicles, ships, high-precision instruments, and high-voltage power supplies, and is sufficient to meet the real-time insulation detection and protection functions of the above equipment during its actual operation.

[0194] It is worth noting that the impedance detection method provided in the embodiment of the present application has at least the following effects:

[0195] 1. Abstracting the actual test into equivalent resistance and equivalent parasitic capacitance as the premise of implementation, only the most basic impedance detection circuit 100 and the highest quadratic calculation power are needed to obtain the insulation impedance of the charged body to the ground.

[0196] 2. During the execution, only three coordinate points need to be collected at equal intervals (such as Figure 4 The potential of a7, b7, b8) in the figure can be used to obtain the stable voltage at which the final capacitor (the first capacitor and the second capacitor) is charged and discharged.

[0197] 3. Only cheap and fast calculations are required to implement the improved impedance detection method, making the chip selection unrestricted and low-cost.

[0198] 4. It ensures the collection of real-time, high-frequency, and truly dynamically changing insulation data that must be maintained in special occasions. For example, electric vehicles traveling on highways or industrial and mining machinery and equipment in production operation scenarios are characterized by the inability to use the current power consumption to smoothly calculate the power consumption at the next moment (seconds or milliseconds). They have the characteristic of sudden discharge and are difficult to prevent. It is necessary to always pay close attention to the safety of accidental discharge of electrical equipment to people. The impedance detection method provided in the embodiment of the present application can be applied to the above-mentioned scenarios, and the insulation impedance of electrical equipment to the ground can be realized through low-cost and efficient calculation to ensure the safe use of electrical equipment.

[0199] 5. While the data processing speed is fast and the computing cost is low, the accuracy of insulation resistance is still maintained.

[0200] 6. It is not necessary to trigger the sampling action based on the changes of other parameters such as waiting time or voltage change rate to obtain the insulation impedance of the charged body to the ground.

[0201] Finally, the impedance detection system provided in this application is introduced.

[0202] The impedance detection system provided in the present application includes any impedance detection circuit as described above, and the impedance detection system is used to execute any impedance detection method as described above.

[0203] like Figure 6 As shown, it shows a schematic diagram of the system architecture of an impedance detection system provided by an exemplary embodiment of the present application. The impedance detection system 600 includes an impedance detection circuit 610.

[0204] In some embodiments, the impedance detection system 600 further includes a control device 620 , and the control device 620 is used to control the impedance detection circuit 610 and collect circuit data of the impedance detection circuit 610 .

[0205] The control device 620 includes: a processor and a memory.

[0206] The processor may include one or more processing cores, such as a 4-core processor, an 8-core processor, etc. The processor may be implemented in at least one hardware form of digital signal processing (DSP), field programmable gate array (FPGA), and programmable logic array (PLA). The processor may also include a main processor and a coprocessor. The main processor is a processor for processing data in an awake state, also known as a central processing unit (CPU); the coprocessor is a low-power processor for processing data in a standby state. In some embodiments, the processor may also include an artificial intelligence (AI) processor, which is used to process computing operations related to machine learning.

[0207] The memory may include one or more computer-readable storage media, which may be non-transitory. The memory may also include a high-speed random access memory, and a non-volatile memory, such as one or more disk storage devices, flash memory storage devices. In some embodiments, the non-transitory computer-readable storage medium in the memory is used to store at least one instruction, which is used to be executed by the processor to implement the impedance detection method provided in the method embodiment of the present application.

[0208] The above description is only an optional embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application shall be included in the protection scope of the present application.

Claims

1. An impedance detection circuit, characterized in that: The circuit includes a charged body, a positive load circuit and a negative load circuit; The positive electrode of the charged body is connected to the positive load circuit, the negative electrode of the charged body is connected to the negative load circuit, and the series node of the positive load circuit and the negative load circuit is grounded; The positive load circuit includes a first capacitor and a first load, and the negative load circuit includes a second capacitor and a second load; During the charging or discharging process of the first capacitor, the first capacitor is used to provide first voltages corresponding to at least three time nodes respectively; During the charging or discharging process of the second capacitor, the second capacitor is used to provide the second voltages corresponding to the at least three time nodes respectively; The first voltage and the second voltage are used to determine the insulation impedance detection result of the charged body to the ground.

2. The circuit according to claim 1, characterized in that The first voltages respectively corresponding to the at least three time nodes are used to determine a first stable voltage when the first capacitor is in a first stable state, where the first stable state is a state of the first capacitor after being charged or discharged; The second voltages corresponding to the at least three time nodes are used to determine a second stable voltage when the second capacitor is in a second stable state, where the second stable state is a state of the second capacitor after being charged or discharged; The first stable voltage and the second stable voltage are used to determine the insulation impedance detection result of the charged body to the ground.

3. The circuit according to claim 2, characterized in that The first load is connected in parallel with the first capacitor; The second load is connected in parallel with the second capacitor; The first stable voltage and the second stable voltage are used to determine a first load impedance of the first load and a second load impedance of the second load; The first load impedance and the second load impedance are used to determine the insulation impedance detection result of the charged body to the ground.

4. The circuit according to any one of claims 1 to 3, characterized in that: The positive load circuit further includes a third load connected in parallel with the first capacitor and a first switch, wherein the third load is connected in series with the first switch; The negative load circuit further includes a fourth load connected in parallel with the second capacitor and a second switch, and the fourth load is connected in series with the second switch; When the first switch is turned on and the second switch is turned off, during the charging or discharging process of the first capacitor, the third load is used to provide the first load voltages corresponding to the at least three time nodes respectively, and the first load voltages corresponding to the at least three time nodes respectively are used to determine the first voltages of the first capacitor corresponding to the at least three time nodes respectively, wherein the first load voltage at the i-th time node is used to determine the first voltage at the i-th time node, and i is a positive integer; When the second switch is turned on and the first switch is turned off, during the charging or discharging process of the second capacitor, the fourth load is used to provide the second load voltages corresponding to the at least three time nodes respectively, and the second load voltages corresponding to the at least three time nodes respectively are used to determine the second voltages of the second capacitor corresponding to the at least three time nodes respectively, wherein the second load voltage at the jth time node is used to determine the second voltage at the jth time node, and j is a positive integer.

5. The circuit according to claim 4, characterized in that The third load includes a plurality of first sub-loads, the plurality of first sub-loads are in a series relationship, the first load voltage is the voltage of the mth first sub-load among the plurality of first sub-loads, and m is a positive integer; The fourth load includes a plurality of second sub-loads, the plurality of second sub-loads are connected in series, the second load voltage is a voltage of an nth second sub-load among the plurality of second sub-loads, and n is a positive integer.

6. An impedance detection method, characterized in that: Applied to the impedance detection circuit as described in any one of claims 1 to 5 above, the method comprises: During the charging or discharging process of the first capacitor, obtaining the first voltages of the first capacitor corresponding to the at least three time nodes respectively; During the charging or discharging process of the second capacitor, obtaining the second voltage corresponding to the second capacitor at the at least three time nodes respectively; Based on the first voltage and the second voltage, a detection result of the insulation impedance of the charged body to the ground is determined.

7. The method according to claim 6, characterized in that The step of determining the insulation impedance detection result of the charged body to the ground based on the first voltage and the second voltage includes: Determine, based on the first voltages respectively corresponding to the at least three time nodes, a first stable voltage corresponding to the first capacitor in a first stable state; Determine, based on the second voltages respectively corresponding to the at least three time nodes, a second stable voltage corresponding to the second capacitor in a second stable state; The insulation impedance detection result of the charged body to ground is determined based on the first stable voltage and the second stable voltage.

8. The method according to claim 7, characterized in that The step of determining the insulation impedance detection result of the charged body to the ground based on the first stable voltage and the second stable voltage includes: collecting the charged body voltage of the charged body; Determine, based on the first stable voltage and the charged body voltage, a third stable voltage corresponding to the second capacitor in the first stable state; Based on the second stable voltage and the charged body voltage, determining a fourth stable voltage corresponding to the first capacitor in the second stable state; The insulation impedance detection result of the charged body to the ground is determined based on the first stable voltage, the second stable voltage, the third stable voltage, and the fourth stable voltage.

9. The method according to claim 8, characterized in that The positive load circuit further includes a first load, which is connected in parallel with the first capacitor, and the negative load circuit further includes a second load, which is connected in parallel with the second capacitor; The step of determining the insulation impedance detection result of the charged body to the ground based on the first stable voltage, the second stable voltage, the third stable voltage, and the fourth stable voltage includes: determining a first load impedance of the first load and a second load impedance of the second load based on the first stable voltage, the second stable voltage, the third stable voltage, and the fourth stable voltage; Based on the first load impedance and the second load impedance, the insulation impedance detection result of the charged body to the ground is determined.

10. The method according to any one of claims 6 to 9, characterized in that: The positive load circuit further includes a third load and a first switch connected in parallel with the first capacitor, and the third load is connected in series with the first switch; the negative load circuit further includes a fourth load and a second switch connected in parallel with the second capacitor, and the fourth load is connected in series with the second switch; The acquiring, during the charging or discharging process of the first capacitor, the first voltages respectively corresponding to the first capacitor at the at least three time nodes includes: Controlling the first switch to be turned on, and controlling the second switch to be turned off; During the charging or discharging process of the first capacitor, obtaining first load voltages of the third load corresponding to the at least three time nodes respectively; Based on the first load voltages corresponding to the at least three time nodes respectively, determining the first voltages of the first capacitor corresponding to the at least three time nodes respectively, wherein the first load voltage at the i-th time node is used to determine the first voltage at the i-th time node, and i is a positive integer; The acquiring, during the charging or discharging process of the second capacitor, the second voltage corresponding to the second capacitor at the at least three time nodes respectively includes: Controlling the second switch to be turned on, and controlling the first switch to be turned off; During the charging or discharging process of the second capacitor, obtaining second load voltages of the fourth load corresponding to the at least three time nodes respectively; Based on the second load voltages corresponding to the at least three time nodes respectively, the second voltages of the second capacitor corresponding to the at least three time nodes respectively are determined, wherein the second load voltage at the jth time node is used to determine the second voltage at the jth time node, and j is a positive integer.

11. The method according to claim 10, characterized in that The third load includes a plurality of first sub-loads, the plurality of first sub-loads are in a series relationship, the first load voltage is the mth first sub-load among the plurality of first sub-loads, the fourth load includes a plurality of second sub-loads, the plurality of second sub-loads are in a series relationship, the second load voltage is the nth second sub-load among the plurality of second sub-loads, and n and m are positive integers; The determining, based on the first load voltages respectively corresponding to the at least three time nodes, the first voltages respectively corresponding to the first capacitor at the at least three time nodes comprises: Obtaining third load impedances respectively corresponding to the plurality of first sub-loads; Determine the first voltage at the i-th time node based on the first load voltage at the i-th time node and the third load impedances respectively corresponding to the plurality of first sub-loads; The determining, based on the second load voltages respectively corresponding to the at least three time nodes, the second voltages respectively corresponding to the second capacitor at the at least three time nodes comprises: Obtaining fourth load impedances respectively corresponding to the plurality of second sub-loads; The second voltage at the jth time node is determined based on the second load voltage at the jth time node and fourth load impedances respectively corresponding to the plurality of second sub-loads.

12. An impedance detection system, characterized in that: The impedance detection system comprises the impedance detection circuit as claimed in any one of claims 1 to 5, and the impedance detection system is used to execute the impedance detection method as claimed in any one of claims 6 to 11.

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