Virtual processor setting method and device, electronic equipment and readable medium

Abstract

The embodiment of the invention provides a virtual processor setting method and device, electronic equipment and a readable medium, and relates to the technical field of virtual machines, in the method, for any virtual processor created for a virtual machine, a configuration value self-defined for a processor configuration item of the virtual processor in a user mode program is obtained; the configuration value is used for setting processor configuration corresponding to the configuration item. Generating a register value for a configuration register of the virtual processor based on the configuration value to obtain a target register value; the value of the register bit corresponding to the configuration item in the target register value is matched with the configuration value. And after the target register value passes the normalized check, writing the target register value into a configuration register of the virtual processor so as to set the virtual processor. Therefore, compared with a mode of directly writing in a fixed value, the target register value is generated according to the configuration value self-defined for the configuration item in the user mode program, and the configuration register is set by using the target register value, so that the processor configuration is more flexible.

Description

Technical Field

[0001] The present invention relates to the field of virtual machine technology, and in particular to a method, device, electronic device and readable medium for setting a virtual processor. Background Art

[0002] With the continuous development of computer technology, virtual machines are increasingly widely used. When a virtual machine is created, a virtual processor (Virtual CPU, vCPU) is created for the virtual machine. After the virtual machine is started, tasks can be assigned to the virtual processor, and the assigned tasks are executed by the virtual processor. In order to ensure that the virtual processor can process tasks normally, the processor configuration of the virtual processor needs to be set to control the processor characteristics of the virtual processor.

[0003] In the prior art, fixed values ​​are often pre-written according to the hardware characteristics of the physical machine to achieve setting the processor configuration for the virtual processor. This method has poor flexibility. Summary of the invention

[0004] The embodiments of the present invention provide a method, an apparatus, an electronic device and a readable medium for setting a virtual processor, which can improve the flexibility of setting a processor configuration for a virtual processor.

[0005] In order to solve the above problem, an embodiment of the present invention discloses a method for setting a virtual processor, the method comprising:

[0006] For any virtual processor created for the virtual machine, obtain a customized configuration value for a configuration item of the virtual processor in a user-mode program; the configuration value is used to set a processor configuration corresponding to the configuration item;

[0007] Generate a register value for the configuration register of the virtual processor based on the configuration value to obtain a target register value; the value of the register bit corresponding to the configuration item in the target register value is adapted to the configuration value;

[0008] After the target register value passes the normalization check, the target register value is written into the configuration register to set the virtual processor.

[0009] On the other hand, an embodiment of the present invention discloses a device for setting a virtual processor, the device comprising:

[0010] An acquisition module, for acquiring, for any virtual processor created for a virtual machine, a customized configuration value for a configuration item of the virtual processor in a user-mode program; the configuration value is used to set a processor configuration corresponding to the configuration item;

[0011] A generating module, configured to generate a register value for a configuration register of the virtual processor based on the configuration value to obtain a target register value; the value of the register bit corresponding to the configuration item in the target register value is adapted to the configuration value;

[0012] A writing module is used to write the target register value into the configuration register after the target register value passes the normalization check to set the virtual processor.

[0013] On the other hand, an embodiment of the present invention discloses an electronic device, comprising: a processor, a memory, a communication interface and a communication bus, wherein the processor, the memory and the communication interface communicate with each other through the communication bus; the memory is used to store at least one executable instruction, and the executable instruction enables the processor to execute the aforementioned method.

[0014] The embodiment of the present invention further discloses a machine-readable medium on which instructions are stored. When executed by one or more processors, the processors are enabled to execute the method described above.

[0015] The embodiments of the present invention include the following advantages: In the method for setting a virtual processor provided by the embodiments of the present invention, for any virtual processor created for a virtual machine, a user-defined configuration value for the processor configuration item of the virtual processor is obtained. A register value is generated for the configuration register of the virtual processor based on the configuration value to obtain a target register value; the value of the register bit corresponding to the processor configuration item in the target register value is adapted to the configuration value. The target register value is written into the configuration register of the virtual processor to set the processor configuration of the virtual processor. In this way, compared to the method of directly writing fixed values, a customized configuration value is defined for the configuration item in the user-state program according to the user's current scenario requirements, and a target register value is generated based on the customized configuration value, and the configuration register is set using the target register value, so that the processor configuration is more flexible and the virtual processor can adapt to development needs in different scenarios. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings required for use in the description of the embodiments of the present invention will be briefly introduced below. Obviously, the accompanying drawings in the following description are only some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying creative labor.

[0017] Figure 1 is a flowchart of a method for setting a virtual processor provided by an embodiment of the present invention;

[0018] Figure 2 is a block diagram of a virtual processor setting device provided by an embodiment of the present invention;

[0019] Figure 3 It is a structural schematic diagram of an electronic device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0020] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0021] Reference Figure 1 , shows a flowchart of a method for setting a virtual processor provided by an embodiment of the present invention. Figure 1 As shown, the method for setting the virtual processor specifically includes the following steps:

[0022] Step 101: For any virtual processor created for a virtual machine, obtain a customized configuration value for a configuration item of the virtual processor in a user-mode program; the configuration value is used to set a processor configuration corresponding to the configuration item.

[0023] Step 102: Generate a register value for the configuration register of the virtual processor based on the configuration value to obtain a target register value; the value of the register bit corresponding to the configuration item in the target register value is adapted to the configuration value.

[0024] Step 103: After the target register value passes the normalization check, write the target register value into the configuration register to set the virtual processor.

[0025] The method for setting a virtual processor provided in an embodiment of the present invention can be applied to the process of creating a virtual machine. The process of creating a virtual machine is described below. First, in response to a virtual machine creation request, a virtual machine instance can be created first, and the virtual machine instance corresponds to a virtual machine. Among them, the virtual machine can be a kernel-based virtual machine (KVM). After the virtual machine instance is created, the virtual machine can be initialized. Then, a virtual processor is created for the virtual machine. Among them, the virtual processor is a simulated processor in the virtual machine, and the virtual processor can simulate the behavior of the physical processor and perform the assigned tasks, so that the virtual machine can execute the instructions of the operating system and the application. After creating the virtual processor, the virtual processor can be set based on the setting method of the virtual processor, that is, the processor configuration of the virtual processor is set.

[0026] The processor has multiple CPU features (CPU Features), and a CPU feature can correspond to a CPU function or specific parameters used. The processor configuration (CPU Config) can be used to control the specific parameters used by the processor and whether a certain CPU function (CPU Feature) is supported. The processor configuration can include multiple processor configuration items, and a processor configuration item can correspond to a processor configuration. A processor configuration represents a CPU feature.

[0027] Exemplarily, taking the Loongson architecture as an example, the CPU characteristics may include the length of the guest virtual address (GVA), the length of the guest physical address (GPA), the page mapping mode function, the processor identification information, the vector function, the floating point function, and the like. These CPU characteristics are settable processor configurations. The processor configuration can be set through the configuration register. To set the processor configuration for the virtual processor is to set the register value corresponding to the configuration register. Among them, the configuration register may also be referred to as the processor configuration (CPUCFG) register, and the generated target register value may also be referred to as the attribute value of the CPUCFG, which indicates the configured processor characteristic information. The value of the CPUCFG register may determine the CPU characteristics, and the CPUCFG register includes 32 bits. Among them, one or more bits may correspond to a processor configuration item. Specifically, a certain bit may indicate whether a certain CPU function is supported, and several consecutive bits may indicate a certain specific parameter. In this way, the target register value generated according to the user-defined configuration value is written into the configuration register of the virtual processor to set the processor configuration of the virtual processor, which is equivalent to configuring the CPU characteristics supported by the virtual processor according to the user-defined configuration value, thereby realizing flexible configuration.

[0028] Exemplarily, for CPUCFG register No. 1, the 3rd bit may correspond to the processor configuration of the page mapping mode function, and the value of the 3rd bit may indicate whether the memory management unit (MMU) supports the page mapping mode. For example, when the value of the 3rd bit is 1, it indicates that the MMU supports the page mapping mode, and when the value of the 3rd bit is 0, it indicates that the MMU does not support the page mapping mode. Bits 5 to 12 correspond to the processor configuration of the GPA length, and the values ​​of bits 5 to 12 may indicate the GPA length. Bits 13 to 20 correspond to the processor configuration of the GVA length, and the values ​​of bits 13 to 20 may indicate the GVA length. For CPUCFG register No. 0, bits 0 to 31 correspond to the processor configuration of the processor identification information, and the values ​​of bits 0 to 31 may indicate the processor identification information.

[0029] Further, in an embodiment of the present invention, an interface for customizing configuration values ​​may be provided to the user, in which the processor configuration items of the virtual processor may be displayed, and the user may enter a custom configuration value for the processor configuration item in the interface. The configuration value is used to represent a specific parameter set for the processor configuration item or to represent whether the value of the processor configuration item is turned on. Specifically, in the case where the processor configuration corresponding to the processor configuration item is a specific parameter, the custom configuration value may be the parameter value itself. For example, for the GVA length configuration item, the user may customize the GVA length value as needed. In the case where the processor configuration corresponding to the processor configuration item is a CPU function, the custom configuration value may be a value representing whether the CPU function corresponding to the processor configuration item is turned on. For example, for a vector function item, the user may customize the value representing whether the corresponding vector function is turned on as needed. For example, in the case where the vector function is to be turned off, a custom configuration value of 0 may be set for the vector function item, or a custom configuration value of off may be set for the vector function item to represent turning off the vector function.

[0030] The target register value includes the same bits as the configuration register, for example, the target register value may include 32 bits. When generating the target register value, the value of the register bit corresponding to the processor configuration item may be determined according to the user-defined configuration value to ensure that the two are compatible. Among them, the register bit corresponding to the processor configuration item refers to the bit corresponding to the processor configuration item. The bit corresponding to each processor configuration item may be determined according to the register manual.

[0031] Exemplarily, for the GVA length configuration item, the register bit corresponding to the GVA length configuration item is the 13th to 20th bits of the CPUCFG register No. 1. The configuration register of the virtual processor may be a CPUCFG register set for the virtual processor, and the configuration register of the virtual processor may be simulated for the virtual processor based on virtualization technology. In a virtualized environment, a set of configuration registers may be virtualized for each virtual processor, that is, each virtual processor has its own configuration register. In this way, it is convenient to configure different virtual processors separately, further improving the flexibility of the configuration method. Specifically, the user can customize the configuration value for the processor configuration item of each virtual processor. Accordingly, for a virtual processor, a target register value can be generated based on the customized configuration value for the processor configuration item of the virtual processor, and the target register value is written into the configuration register of the virtual processor, thereby setting the processor configuration of the virtual processor. Among them, the value of the register bit corresponding to the configuration item is adapted to the configuration value, which means that the configuration content represented by the value of the register bit is consistent with the configuration content represented by the configuration value.

[0032] In summary, in the setting method of the virtual processor provided by the embodiment of the present invention, for any virtual processor created for the virtual machine, the customized configuration value of the processor configuration item of the virtual processor in the user-mode program is obtained; the configuration value is used to set the processor configuration corresponding to the configuration item. A register value is generated for the configuration register of the virtual processor based on the configuration value to obtain a target register value; the value of the register bit corresponding to the configuration item in the target register value is adapted to the configuration value. After the target register value passes the normalization check, the target register value is written into the configuration register of the virtual processor to set the virtual processor. In this way, compared with the method of directly writing fixed values, a customized configuration value is customized for the configuration item in the user-mode program according to the user's current scenario requirements, and a target register value is generated based on the customized configuration value, and the configuration register is set using the target register value, so that the processor configuration is more flexible and the virtual processor can adapt to development needs in different scenarios.

[0033] Optionally, in an embodiment of the present invention, before writing the target register value into the configuration register, the following steps may also be included:

[0034] Step S21: Save the target register value to the structure of the virtual processor.

[0035] Accordingly, the above step of writing the target register value into the configuration register may specifically include:

[0036] Step 1031: In response to a configuration register read operation of the virtual processor, read the target register value from the structure.

[0037] Step 1032: Write the read target register value into the configuration register.

[0038] Among them, the structure of the virtual processor is a specific data structure created for the virtual processor. The structure of the virtual processor can also be called a vCPU structure. The vCPU structure can be used to maintain information related to the virtual processor. For example, the register state, page table information, interrupt and exception information of the virtual processor. Specifically, the virtual processor can essentially be a thread. When creating a virtual processor thread, the structure of the virtual processor can be created in kernel mode. Among them, the operations of creating a virtual processor thread and creating the structure of the virtual processor can be performed by a user mode program. Furthermore, after obtaining the target register value, the target register value can be written into the structure of the virtual processor.

[0039] Further, the configuration register read operation refers to the read operation of the configuration register by the virtual processor. Specifically, the virtual processor thread can perform the operation of reading the configuration register in the virtualization mode. In an embodiment of the present invention, in a user state program, when the virtual processor reads the value of the configuration register in a virtual machine environment, it cannot directly read the value of the hardware register, but will provide the value of the configuration register to the virtual processor through software simulation. Specifically, based on the exception handling mechanism, in response to the configuration register read operation of the virtual processor, an exception signal can be generated, and the exception handling process can be triggered in response to the exception signal. In response to the exception signal, the virtual processor can enter the host mode, and then jump to the exception handling entry to execute the exception handling process. Specifically, the exception handling process includes: parsing the target register value of the configuration register requested to be read by the virtual processor from the structure of the virtual processor, and writing the parsed target register value into the configuration register requested to be read, so that the virtual processor can finally read the target register value set for the configuration register from the configuration register.

[0040] After writing the read target register value into the configuration register, the virtual processor can enter the virtualization mode and continue to run. Accordingly, the target register value can be read from the configuration register at this time. In this case, the virtual processor actually obtains the target register value set for the configuration register according to the user-defined configuration value.

[0041] The structure of the virtual processor may include register parameters corresponding to each configuration register, and the value of the register parameter corresponding to the configuration register represents the target register value corresponding to the configuration register. Taking virtual processor A as an example, assuming that there are three configuration registers: CPUCFG0, CPUCFG1, and CPUCFG2. Then the structure of virtual processor A may include: register parameter 0 corresponding to CPUCFG0, register parameter 1 corresponding to CPUCFG1, and register parameter 2 corresponding to CPUCFG2.

[0042] Accordingly, for virtual processor A, after generating target register values ​​for CPUCFG0, CPUCFG1, and CPUCFG2 respectively, the target register value of CPUCFG0 can be written into register parameter 0, the target register value of CPUCFG1 can be written into register parameter 1, and the target register value of CPUCFG2 can be written into register parameter 2, so as to implement the operation of saving the target register values ​​to the structure of the virtual processor.

[0043] Furthermore, the configuration register read operation of the virtual processor provides the register of the configuration register requested to be read. Assume that the provided register is 2, that is, the configuration register read by the virtual processor is the CPUCFG2 register (i.e., CPUCFG register No. 2). Then, in the exception handling process, the structure can be parsed to parse the value of register parameter 2, obtain the target register value saved for the CPUCFG2 register, and write the read target register value to the CPUCFG2 register. The written register is the same as the register requested to be read. In this way, after the virtual processor enters the virtualization mode, the target register value of the CPUCFG2 register can be read. Further, assume that the user customizes the configuration values ​​for the GPA length configuration item and the GVA length configuration item respectively. The configuration register read by the virtual processor is the CPUCFG1 register (i.e., CPUCFG register No. 1), and the 5th to 12th bits of the CPUCFG1 register store the GPA length, and the 13th to 20th bits store the GVA length. Correspondingly, the GPA length stored in the 5th to 12th bits and the GVA length stored in the 13th to 20th bits correspond to the user-defined configuration values, that is, the GPA length stored in the 5th to 12th bits and the GVA length stored in the 13th to 20th bits are configured by the user. The GPA length and GVA length corresponding to the user-configured virtual machine are realized through software simulation.

[0044] In an embodiment of the present invention, by saving the target register value generated for the virtual processor to the structure of the virtual processor, it is equivalent to realizing that the target register value generated for the virtual processor is stored in association with the virtual processor. It is then convenient to distinguish the target register values ​​set for different virtual processors, and to perform asynchronous configuration on different virtual processors. At the same time, in response to the configuration register read operation of the virtual processor, the target register value is read from the structure of the virtual processor, and then the read target register value is written into the configuration register of the virtual processor. In this way, it can be ensured that the virtual processor can read the target register value set for the virtual processor from the configuration register, and thus the problem of reading errors can be avoided to a certain extent. In other embodiments, after the target register value is generated, the target register value can be directly written into the configuration register corresponding to the virtual processor to achieve synchronous configuration, thereby achieving rapid setting of the virtual processor.

[0045] Optionally, in an embodiment of the present invention, the configuration value includes a GPA length and a GVA length, and the values ​​of the register bits corresponding to the GPA length configuration item and the GVA length configuration item in the target register value are the GPA length and the GVA length, respectively. After the target register value is written into the configuration register, it may also include: the virtual processor determines the page table level based on the GPA length and the GVA length read from the configuration register. Specifically, for the case of custom configuration of the GPA length and the GVA length, in an embodiment of the present invention, when the virtual machine is initialized, the user state program can pass the target register value generated based on the user-defined configuration value to the virtual processor in the kernel state. Correspondingly, the virtual processor writes the target register value into the configuration register of the virtual processor, thereby realizing the control of the CPU characteristics of the virtual processor based on the user state program, making the CPU characteristics control of the virtual processor more flexible. Exemplarily, taking the GPA length and the GVA length as an example, in the physical machine, the GPA length and the GVA length are fixed values ​​determined by hardware. In an embodiment of the present invention, a target register value can be generated based on a user-defined GPA length and GVA length, and the target register value can be written into a configuration register of a virtual processor, so that the virtual processor can read the target register value generated based on the customized GPA length and GVA length from the configuration register, and then control the virtual processor to process according to the customized GPA length and GVA length, so as to specify the GVA length and GPA length according to user needs. Taking the customized GPA length and GVA length as 48 bits as an example, the virtual processor can pass the 48-bit address length to the memory management module in the virtual machine kernel program, and the memory management module can parse the passed-in address length and select the corresponding page table level according to the address length. Specifically, the 48-bit address length corresponds to a 3-level page table. Among them, the virtual machine kernel program can be a vmlinux program executed when the virtual machine is started, and the vmlinux program can be used to boot for initialization.

[0046] Correspondingly, the virtual machine can traverse the page table according to the 3-level page table: when the virtual machine indexes the page table, it can first add the first-level page table offset corresponding to the GVA to the first address of the Page Global Directory (PGD) to obtain the first address of the second-level page table. Then, add the second-level page table offset corresponding to the GVA to the first address of the second-level page table to obtain the first address of the third-level page table. Then, add the third-level page table offset to the first address of the third-level page table to obtain the page table entry address. In a 48-bit address space, the third-level page table can access the page table entry after three memory accesses and three offset calculations. In the case of needing to increase the speed of the virtual machine page table traversal, the user can customize a smaller GPA length and GVA length. When the GPA length and GVA length are smaller and the number of bits occupied is less, the page table level is smaller. Exemplarily, the page table level corresponding to the GPA length and the GVA length can be queried based on a preset correspondence. Specifically, when the GPA length and the GVA length are both 48, the page table level can be determined to be level 3. When the GPA length and the GVA length are both 32, the page table level can be determined to be level 2. When the virtual machine indexes the page table, it can first add the first-level page table offset corresponding to the GVA to the PGD first address to obtain the first address of the second-level page table. Then, add the second-level page table offset corresponding to the GVA to the second-level page table first address to obtain the page table entry address. Under the 32-bit address space, the second-level page table can access the page table entry after accessing the memory twice and calculating the offset twice. That is, after fewer memory accesses and offset calculations, the page table entry address can be obtained, thereby accessing the page table entry. In this way, by sacrificing the address space range, the virtual machine page table traversal is faster.

[0047] Optionally, in the embodiment of the present invention, the step of obtaining the customized configuration value of the configuration item of the virtual processor in the user mode program may specifically include:

[0048] Step 1011: Obtain the configuration value customized by the user for the processor configuration item in the user mode program.

[0049] Accordingly, the step of saving the target register value to the structure of the virtual processor may specifically include:

[0050] Step S211: The user state program transmits the target register value to the virtual processor through an interactive interface with the virtual processor.

[0051] Step S212: The virtual processor saves the target register value to the structure.

[0052] In an embodiment of the present invention, a user state program can run on the same physical machine as a virtual machine, and the user state program can be a QEMU (Quick Emulator) program. An interface for custom configuration values ​​can be provided by the user state program, that is, a user can customize configuration values ​​for processor configuration items in the user state program. Specifically, QEMU can provide an interface for the virtual processor thread in user state after creating a virtual processor thread, so that the user can customize configuration values ​​for the virtual processor thread in the interface. Compared with the default method of using fixed values, in this way, through user customization, the values ​​of the processor configuration items are richer, and the processor configuration of the virtual processor of the virtual machine becomes richer.

[0053] Optionally, the processor configuration item may include one or more of a client physical address GPA length configuration item, a client virtual address GVA length configuration item, and a function enable configuration item. Among them, the GPA length configuration item corresponds to the GPA length configuration item, and the configuration value set by the user for the GPA length configuration item in the user state can represent a custom GPA length value. The GVA length configuration item corresponds to the GPA length configuration item, and the configuration value set by the user for the GVA length configuration item in the user state can represent a custom GVA length value. The function enable configuration item may include configuration items for various CPU functions specified by the corresponding hardware, for example, the function enable configuration item may include a page mapping mode function configuration item, a vector function configuration item, and a floating point function configuration item. In this way, the user can conveniently realize autonomous control of GVA length, GPA length, page mapping mode function, vector function, and floating point function based on the processor configuration item in the user state, thereby ensuring configuration flexibility. Of course, the processor configuration item may also include other configuration items, such as configuration items corresponding to processor identification information, which is not limited in the embodiment of the present invention.

[0054] Furthermore, the configuration value can be customized by the user as needed. In the related art, a fixed value is often set in the kernel by default according to the actual CPU characteristics of the physical machine. Specifically, when a virtual machine instance is created for initialization, a fixed value is set according to the actual CPU characteristics of the physical processor of the physical machine. In response to the configuration register read operation of the virtual processor, the pre-set fixed value is directly read from the kernel and written to the configuration register of the virtual processor. If an error occurs in the operation of reading the fixed value in the above process, the overall process of virtual machine creation will fail. And the value written in the configuration register of each virtual processor is the fixed value, which is set by default according to the CPU characteristics of the physical machine. Users cannot customize the configuration, so the flexibility of the processor configuration is poor.

[0055] Specifically, in the embodiment of the present invention, during the process of creating a virtual machine, QEMU can display an interface for customizing configuration values ​​in user mode, and the user can customize the configuration values ​​based on the interface provided by the user mode program. Accordingly, the target register value is subsequently generated based on the customized configuration value, and the processor configuration is set to flexibly realize the setting of the processor configuration of the virtual processor, thereby achieving the purpose of flexibly configuring the virtual machine.

[0056] Further, the user state program can collect the configuration values ​​customized by the user for each processor configuration item in the interface in the user state. Then generate the target register value based on the configuration value obtained. When creating a virtual processor thread, the user state program can also create a virtual processor descriptor (vCPU fd) for the virtual processor. Among them, each virtual processor has its own independent descriptor to facilitate communication with each virtual processor. When the target register value is saved to the structure of the virtual processor, the target register value can be transferred from the user state to the kernel state based on the input / output control (Input / Output Ctrl, IOCTL) interface corresponding to the descriptor (vCPU fd) of the virtual processor. Specifically, it can be a virtual processor transferred to the kernel state. Among them, vCPU fd can provide an interactive interface between the user state program and the virtual processor. Exemplarily, when it is necessary to control the operation of the virtual processor, a run command can be sent to the virtual processor in the kernel state based on the IOCTL interface of vCPU fd. Further, the virtual processor can save the target register value to the structure of the virtual processor in the kernel state. Accordingly, the virtual processor can subsequently perform a series of initialization operations and enter the virtualization mode to run. The initialization operation may include: vCPU CSR initialization, vCPU exception vector initialization, etc. Exemplarily, when performing vCPU CSR initialization, the SPV field of the status register (e.g., hstatus) may be set to indicate that the vCPU is running in virtualization mode, and the VSXL field may be set to define the length of the register in virtualization mode. When performing vCPU exception vector initialization, an exception vector table may be set, in which the above exception information and its corresponding exception handling function may be defined, wherein the exception handling function may be used to implement the above exception handling process.

[0057] In an embodiment of the present invention, a user-defined configuration value for a processor configuration item in a user-mode program is obtained, and the user can customize the configuration value for the processor configuration item based on the user-mode program, so that the user can customize it conveniently, thereby improving the convenience of operation. Further, when saving the target register value, the user-mode program transmits the target register value to the virtual processor through the interactive interface with the virtual processor, and the virtual processor can save the target register value to the structure of the virtual processor. In this way, the transmission and preservation of the target register value can be conveniently realized, thereby ensuring the preservation efficiency.

[0058] Optionally, in the embodiment of the present invention, the step of generating a register value for a configuration register of the virtual processor based on the configuration value to obtain a target register value may specifically include:

[0059] Step 1021: Use the processor configuration items corresponding to the configuration registers as target configuration items, use the register bits corresponding to the target configuration items as target bits, and set the target bits to binary representations corresponding to the configuration values ​​of the target configuration items.

[0060] Step 1022: Set the other register bits except the target bit to default values ​​respectively to obtain the target register value corresponding to the configuration register.

[0061] In an embodiment of the present invention, the target register value may include the target register value corresponding to each configuration register. Accordingly, the structure of the virtual processor may include the target register value corresponding to each configuration register. That is to say, for different configuration registers, the target configuration items are different. Specifically, there may be multiple configuration registers. For example, for each virtual processor, there may be 21 configuration registers. These 21 configuration registers may be numbered starting from 0, represented as: CPUCFG0~CPUCFG20. Different configuration registers may determine different CPU characteristics, that is, different configuration registers may correspond to different processor configuration items, respectively. The processor configuration item corresponding to each configuration register may be determined by the register design, and the processor configuration item corresponding to each configuration register and the bit corresponding to each processor configuration item may be determined according to the register manual.

[0062] For example, the processor configuration items corresponding to the CPUCFG1 register include a page mapping mode function configuration item, a GPA length configuration item, and a GVA length configuration item. The processor configuration items corresponding to the CPUCFG0 register include a processor identification information configuration item.

[0063] For any configuration register, the processor configuration item corresponding to the configuration register can be first used as the target configuration item of the configuration register. Specifically, the register number of the configuration register can be used to find the corresponding processor configuration item from the register manual as the target configuration item. For a configuration register, there can be multiple target configuration items, and accordingly, each target configuration item has a corresponding target position. Taking the CPUCFG1 register as an example, the target configuration items can be: page mapping mode function configuration item, GPA length configuration item, and GVA length configuration item. Taking the CPUCFG0 register as an example, the target configuration item can be: processor identification information configuration item.

[0064] For any target configuration item of the configuration register, the bit information corresponding to the target configuration item can be found in the register manual, and the supported bit can be used as the register bit corresponding to the target configuration item, that is, the target bit of the target configuration item. Exemplarily, for the GPA length configuration item of the CPUCFG1 register, the bit information can be: 5 to 12, and accordingly, the target bit of the GPA length configuration item can be the 5th to 12th bits. For the GVA length configuration item, the bit information can be: 13 to 20, and accordingly, the target bit of the GPA length configuration item can be the 13th to 20th bits. For the page mapping mode function configuration item, the bit information can be: 3, and accordingly, the target bit of the page mapping mode function configuration item can be the 3rd bit.

[0065] The binary representation corresponding to the configuration value may be a binary value obtained by converting the configuration value. If the configuration value itself is a binary value, the configuration value is directly determined as the binary representation corresponding to the configuration value. If the configuration value itself is not a binary value, the configuration value is converted into a binary value to obtain the binary representation corresponding to the configuration value. In this way, the configuration content represented by the value of the register bit corresponding to the configuration item is consistent with the configuration content represented by the changed configuration value. Specifically, in the case where the target configuration item corresponds to a specific parameter, for the convenience of input, the user often uses a non-binary input configuration value. Accordingly, the configuration value can be directly converted into a binary value to obtain the binary representation corresponding to the configuration value. For example, for the GVA length configuration item and the GPA length configuration item, the configuration values ​​of the GVA length configuration item and the GPA length configuration item can be converted into binary values ​​respectively. In the case where the target configuration item corresponds to the CPU function, if the configuration value of the target configuration item is 0 or 1 (that is, it is a binary value itself), the configuration value is directly determined as the binary representation corresponding to the configuration value. On the contrary, if the configuration value of the target configuration item is not 0 or 1, the binary representation corresponding to the configuration value can be found according to the preset corresponding relationship. The preset correspondence relationship may define the correspondence relationship between the configuration value and the binary representation. For example, for the configuration value: on, the corresponding binary representation may be 1. For the configuration value: off, the corresponding binary representation may be 0. In this way, the configuration content represented by the value of the register bit corresponding to the configuration item is consistent with the configuration content represented by the configuration value.

[0066] Taking the CPUCFG1 register as an example, the values ​​of bits 5 to 12 can be set to the binary values ​​obtained by converting the configuration value of the GVA length configuration item, the values ​​of bits 13 to 20 can be set to the binary values ​​obtained by converting the configuration value of the GPA length configuration item, and the value of bit 3 can be set to the binary value obtained by converting the configuration value of the page mapping mode function configuration item. The values ​​of bits 1 to 2 and bits 21 to 31 are all set to default values, and then the target register value of the CPUCFG1 register is obtained. Among them, the default value can be set in advance, and accordingly, for non-target bits, the default value set for the bit can be found, and the non-target bit can be set to the corresponding default value. Exemplarily, a default value can be set for each bit of each configuration register according to the hardware characteristics of the physical machine, that is, the values ​​of other registers except all target bits are consistent with the values ​​of the hardware registers.

[0067] In an embodiment of the present invention, a user-defined configuration function enable bit can be supported through a function enable configuration item corresponding to a CPU function. The function enable bit is a register bit corresponding to the function configuration item. Exemplarily, a user-defined configuration vector function enable bit and a floating-point function enable bit can be supported through a vector function configuration item and a floating-point function configuration item. Assume that a user sets configuration values ​​for the vector function configuration item and the floating-point function configuration item corresponding to the CPUCFG2 register in the interface. The register bit corresponding to the vector function configuration item is the 7th bit (i.e., the vector function enable bit), i.e., the target bit of the vector function configuration item is the 7th bit. The register bit corresponding to the floating-point function configuration item is the 1st bit (i.e., the floating-point function enable bit), i.e., the target bit of the floating-point function configuration item is the 1st bit. When the configuration values ​​of the vector function configuration item and the floating-point function configuration item are both on, the binary representations corresponding to the configuration values ​​of the vector function configuration item and the floating-point function configuration item are both 1. Then, a target register value can be generated in which the first and seventh bits are both 1, and the other register bits (i.e., other bits) are all corresponding to the default values, as the target register value corresponding to the CPUCFG2 register. Accordingly, when the virtual processor subsequently reads the CPUCFG2 register, the target register value corresponding to the CPUCFG2 register will be written into the CPUCFG2 register. Based on the target register value corresponding to the read CPUCFG2 register, the virtual processor can know whether the vector function and the floating-point function are supported.

[0068] It should be noted that for some processor configuration items, the user may not need to perform autonomous settings, and accordingly, the configuration value of the acquired processor configuration item may be empty. Therefore, in an embodiment of the present invention, when the configuration value of the target configuration item is not empty, the target bit corresponding to the target configuration item may be set to the binary representation corresponding to the configuration value of the target configuration item. When the configuration value of the target configuration item is empty, the target bit corresponding to the target configuration item is set to the corresponding default value.

[0069] In an embodiment of the present invention, the processor configuration items corresponding to the configuration registers are used as target configuration items, the register bits corresponding to the target configuration items are used as target bits, and the target bits are respectively set to the binary representations corresponding to the configuration values ​​of the target configuration items. The other register bits except the target bits are set to default values ​​to obtain the target register values ​​corresponding to the configuration registers. In this way, by setting the target bits corresponding to the target configuration items to the binary representations corresponding to the configuration values, it is possible to ensure that the values ​​of the target bits in the generated target register values ​​are compatible with the configuration values, and ensure that the target register values ​​can represent the user-defined configuration values, thereby making the final processor configuration meet the needs of the user.

[0070] Optionally, before the target register value is saved to the structure of the virtual processor, the embodiment of the present invention may further include the following steps:

[0071] Step S31, obtaining a preset specification file of the configuration register; the preset specification file is used to characterize the numerical specification that the configuration register needs to follow.

[0072] Step S32: performing a standardization check on the target register value based on the preset standard file.

[0073] Step S33: When the target register value passes the normalization check, executing the step of saving the target register value to the structure.

[0074] For the target register value of any configuration register, the preset specification file of the configuration register can be read from the preset specification storage location. Then, the preset specification file read is parsed to obtain the various numerical specifications that the configuration register needs to follow defined by the preset specification file. Then, a normalization check can be performed according to the parsed preset specification file, that is, to check whether the target register value of the configuration register meets the various numerical specifications defined in the preset specification file of the configuration register. Among them, the numerical specification included in the preset specification file of the configuration register can be regarded as a rule that a numerical value needs to follow. Specifically, the numerical specification can be pre-defined in the hardware manual. By performing a normalization check on the target register value through the preset specification file, it is possible to ensure that the customized target register value meets the hardware regulations while supporting user customization, thereby avoiding errors in the operation of the virtual processor.

[0075] Exemplarily, the preset specification file of the CPUCFG2 register may include: the timer function enable bit must be enabled (i.e., the value of the bit corresponding to the timer function is 1), when the floating-point function enable bit is enabled (i.e., the value of the floating-point function enable bit is 1), the single-precision floating-point function enable bit and the double-precision floating-point function enable bit must be enabled (i.e., the value of the single-precision floating-point function enable bit and the double-precision floating-point function enable bit is 1), when the vector function enable bit is enabled (i.e., the value of the vector function enable bit is 1), the value of the floating-point function enable bit must be 1, and when the 256-bit vector enable bit is enabled (i.e., the value of the 256-bit vector enable bit is 1), the value of the 128-bit vector enable bit must be 1. Specifically, for any numerical specification, the target register value is compared with the numerical specification. If the target register value meets the numerical specification, it can be determined that the target register value passes the check of the numerical specification. If the target register value of the configuration register passes the check of all numerical specifications, it can be determined that the target register value passes the normalization check. Otherwise, it can be determined that the target register value has not passed the normalization check. Accordingly, in the embodiment of the present invention, the target register value may be saved to the structure of the virtual processor when the target register value passes the normalization check.

[0076] In an embodiment of the present invention, before writing the target register value into the configuration register, the target register value is first subjected to a normalization check. Specifically, after the target register value is transmitted to the virtual processor, the virtual processor may perform a normalization check. If the target register value passes the normalization check, i.e., complies with the preset specification file, the target register value may be used to save the target register value to the structure of the virtual processor. In this way, while defining the value of the configuration register according to user requirements, it is ensured that the target register value complies with the specification, thereby avoiding the problem of subsequent virtual processor operation errors due to non-compliance with the specification.

[0077] It should be noted that, in the embodiment of the present invention, the compatibility check of the target register value can also be performed according to the physical configuration register value, so as to avoid the conflict between the user-defined configuration and the actual hardware. Wherein, the physical configuration register value is the value of the physical configuration register of the physical processor, and the physical processor refers to the hardware processor of the physical machine where the virtual processor is located. Specifically, for the register bit corresponding to the function enable configuration item in the target register value, the value of the register bit corresponding to the function enable configuration item is extracted. In the case where the extracted value indicates that the CPU function represented by the function enable configuration item is enabled (that is, the extracted value is 1), it is detected whether the value of the register bit in the physical configuration register value corresponding to the configuration register is 1. If so, it means that the hardware processor supports the CPU function represented by the function enable configuration item, and the user-defined configuration does not conflict with the actual hardware, then it is determined to pass the compatibility check. On the contrary, if the value of the register bit in the physical configuration register value corresponding to the configuration register is not 1, it means that the hardware processor does not support the CPU function represented by the function enable configuration item. In this case, even if the value of the register bit in the target register value is set to 1, it cannot be supported by the hardware, and the compatibility check is not passed. Further, in the case where the hardware itself does not support a certain CPU function, if the virtual processor is configured to enable the CPU function, it will conflict with the actual hardware, and if the virtual processor is configured to not enable the CPU function, it will not conflict with the actual hardware. In the case where the hardware itself supports a certain CPU function, whether the virtual processor is configured to enable the CPU function or configured to not enable the CPU function, since the hardware itself supports the CPU function, it will not conflict with the actual hardware. In other words, when the virtual processor is configured to not enable the CPU function, it will not conflict with the actual hardware. Therefore, in the case where the extracted value indicates that the CPU function represented by the function enable configuration item is not enabled (i.e., the extracted value is 0), it can be directly determined that the target register value passes the compatibility check. Accordingly, in an embodiment of the present invention, the target register value can be saved to the structure of the virtual processor when the target register value passes the normalization check and passes the compatibility check.

[0078] Reference Figure 2 , shows a block diagram of a virtual processor setting device provided by an embodiment of the present invention, such as Figure 2 As shown, the setting device of the virtual processor specifically includes:

[0079] The acquisition module 201 is used to acquire, for any virtual processor created for the virtual machine, a customized configuration value for a configuration item of the virtual processor in a user-mode program; the configuration value is used to set a processor configuration corresponding to the configuration item;

[0080] A generating module 202 is used to generate a register value for a configuration register of the virtual processor based on the configuration value to obtain a target register value; the value of the register bit corresponding to the configuration item in the target register value is adapted to the configuration value;

[0081] The writing module 203 is used to write the target register value into the configuration register after the target register value passes the normalization check, so as to set the virtual processor.

[0082] Optionally, the device further comprises:

[0083] A saving module, used for saving the target register value to the structure of the virtual processor before the writing module writes the target register value into the configuration register of the virtual processor;

[0084] The writing module 203 is specifically used to: read the target register value from the structure in response to the configuration register reading operation of the virtual processor;

[0085] The read target register value is written into the configured register.

[0086] Optionally, before saving the target register value to the structure of the virtual processor, the saving module is specifically used to:

[0087] Obtaining a preset specification file of the configuration register; the preset specification file is used to characterize the numerical specification that the configuration register needs to follow;

[0088] Performing a normalization check on the target register value based on the preset specification file;

[0089] In the case where the target register value passes the normalization check, a step of saving the target register value to the structure is performed.

[0090] Optionally, the storage module is further used to:

[0091] The user state program transmits the target register value to the virtual processor through the interactive interface of the virtual processor;

[0092] The target register value is saved to the structure by the virtual processor.

[0093] Optionally, the generating module 202 is specifically configured to:

[0094] Taking the processor configuration items corresponding to the configuration registers as target configuration items, taking the register bits corresponding to the target configuration items as target bits, and setting the target bits to the binary representations corresponding to the configuration values ​​of the target configuration items;

[0095] The other register bits except the target bit are respectively set to default values ​​to obtain the target register value corresponding to the configuration register.

[0096] Optionally, the processor configuration items include one or more of a client physical address GPA length configuration item, a client virtual address GVA length configuration item, and a function enable configuration item.

[0097] Optionally, the configuration value includes a GPA length and a GVA length, and the values ​​of the register bits corresponding to the GPA length configuration item and the GVA length configuration item in the target register value are the GPA length and the GVA length, respectively; the virtual processor determines the page table level based on the GPA length and the GVA length read from the configuration register.

[0098] In summary, the virtual processor setting device provided by the embodiment of the present invention obtains the customized configuration value of the processor configuration item of the virtual processor in the user-mode program for any virtual processor created for the virtual machine; the configuration value is used to set the processor configuration corresponding to the configuration item. A register value is generated for the configuration register of the virtual processor based on the configuration value to obtain a target register value; the value of the register bit corresponding to the configuration item in the target register value is adapted to the configuration value. After the target register value passes the normalization check, the target register value is written into the configuration register of the virtual processor to set the virtual processor. In this way, compared with the method of directly writing fixed values, a customized configuration value is customized for the configuration item in the user-mode program according to the user's current scenario requirements, and a target register value is generated based on the customized configuration value, and the configuration register is set using the target register value, so that the processor configuration is more flexible and the virtual processor can adapt to development needs in different scenarios.

[0099] Reference Figure 3 , is a schematic diagram of the structure of an electronic device provided by an embodiment of the present invention. Figure 3 As shown, the electronic device includes: a processor, a memory, a communication interface and a communication bus, wherein the processor, the memory and the communication interface communicate with each other through the communication bus; the memory is used to store at least one executable instruction, and the executable instruction enables the processor to execute the virtual processor setting method of the above embodiment. The executable instructions can form a program.

[0100] An embodiment of the present invention provides a machine-readable medium having instructions stored thereon, which, when executed by one or more processors, enables the processors to execute the method for setting a virtual processor of the aforementioned embodiment.

[0101] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0102] It will be appreciated by those skilled in the art that the embodiments of the present invention may be provided as methods, devices, or computer program products. Therefore, the embodiments of the present invention may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Moreover, the embodiments of the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program codes.

[0103] It should be noted that all actions of acquiring signals, information or data in this application are carried out in compliance with the relevant data protection laws and policies of the country where they are located and with the authorization given by the owner of the corresponding device.

[0104] The embodiments of the present invention are described with reference to the flowcharts and / or block diagrams of the methods, terminal devices (systems), and computer program products according to the embodiments of the present invention. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of the processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing terminal device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing terminal device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0105] These computer program instructions may also be stored in a computer readable memory capable of directing a computer or other programmable data processing terminal device to operate in a predictable manner, so that the instructions stored in the computer readable memory produce a manufactured product including an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0106] These computer program instructions can also be loaded onto a computer or other programmable data processing terminal device so that a series of operating steps are executed on the computer or other programmable terminal device to produce a computer-implemented process, thereby providing instructions for executing on the computer or other programmable terminal device to implement the process. Figure 1 A process or multiple processes and / or boxes Figure 1 A step that specifies a function in one or more boxes.

[0107] Although the preferred embodiments of the present invention have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the embodiments of the present invention.

[0108] Finally, it should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or terminal device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or terminal device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or terminal device including the elements.

[0109] The above describes in detail a method for setting a virtual processor, a device for setting a virtual processor, an electronic device and one or more readable media provided by the present invention. Specific examples are used herein to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea. At the same time, for those skilled in the art, according to the idea of ​​the present invention, there will be changes in the specific implementation methods and application scopes. In summary, the content of this specification should not be understood as limiting the present invention.

Claims

1. A method for setting a virtual processor, characterized in that: The method comprises: For any virtual processor created for the virtual machine, obtain a customized configuration value for a configuration item of the virtual processor in a user-mode program; the configuration value is used to set a processor configuration corresponding to the configuration item; Generate a register value for the configuration register of the virtual processor based on the configuration value to obtain a target register value; the value of the register bit corresponding to the configuration item in the target register value is adapted to the configuration value; After the target register value passes the normalization check, the target register value is written into the configuration register to set the virtual processor.

2. The method according to claim 1, characterized in that Before writing the target register value into the configuration register, the method further includes: Saving the target register value to a structure of the virtual processor; The writing the target register value into the configuration register comprises: in response to a configuration register read operation of the virtual processor, reading the target register value from the structure; The read target register value is written into the configuration register.

3. The method according to claim 2, characterized in that The method further comprises: Obtaining a preset specification file of the configuration register; the preset specification file is used to characterize the numerical specification that the configuration register needs to follow; Performing a normalization check on the target register value based on the preset specification file; In the case where the target register value passes the normalization check, a step of saving the target register value to the structure is performed.

4. The method according to claim 2, characterized in that: The step of saving the target register value to the structure of the virtual processor includes: The user state program transmits the target register value to the virtual processor through the interactive interface of the virtual processor; The virtual processor saves the target register value to the structure.

5. The method according to claim 1, characterized in that The generating a register value for a configuration register of the virtual processor based on the configuration value to obtain a target register value includes: Taking the processor configuration items corresponding to the configuration registers as target configuration items, taking the register bits corresponding to the target configuration items as target bits, and setting the target bits to the binary representations corresponding to the configuration values ​​of the target configuration items; The other register bits except the target bit are respectively set to default values ​​to obtain the target register value corresponding to the configuration register.

6. The method according to any one of claims 1 to 5, characterized in that: The processor configuration items include one or more of a client physical address GPA length configuration item, a client virtual address GVA length configuration item, and a function enable configuration item.

7. The method according to any one of claims 1 to 5, characterized in that: The configuration value includes a GPA length and a GVA length; the values ​​of the register bits corresponding to the GPA length configuration item and the GVA length configuration item in the target register value are the GPA length and the GVA length respectively; After writing the target register value into the configuration register, the method further includes: The virtual processor determines a page table level based on the GPA length and the GVA length read from the configuration register.

8. A device for setting a virtual processor, characterized in that: The device comprises: An acquisition module, for acquiring, for any virtual processor created for a virtual machine, a customized configuration value for a configuration item of the virtual processor in a user-mode program; the configuration value is used to set a processor configuration corresponding to the configuration item; A generating module, configured to generate a register value for a configuration register of the virtual processor based on the configuration value to obtain a target register value; the value of the register bit corresponding to the configuration item in the target register value is adapted to the configuration value; A writing module is used to write the target register value into the configuration register after the target register value passes the normalization check to set the virtual processor.

9. An electronic device, characterized in that: include: A processor, a memory, a communication interface and a communication bus, wherein the processor, the memory and the communication interface communicate with each other via the communication bus; The memory is used to store executable instructions, and the executable instructions enable the processor to execute the method according to any one of claims 1 to 7.

10. One or more machine-readable media, characterized in that Instructions are stored thereon, which, when executed by one or more processors, cause the processors to perform the method as claimed in any one of claims 1 to 7.

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