Serial port control method and device, electronic equipment and storage medium

Abstract

The invention discloses a serial port control method and device, electronic equipment and a storage medium, the serial port control method and device are applied to a server, and a substrate management controller in the server is connected with a programmable pin of a processor. Setting level states of the plurality of programmable pins according to a target serial port state which needs to be set and is contained in the serial port control command; after the server is restarted, the processor obtains the level states of the plurality of programmable pins, and determines corresponding target serial port state identifiers according to the level states of the plurality of programmable pins; and the processor sets the state of the ABL serial port as a target serial port state corresponding to the target serial port state identifier. According to the method and the device, the efficiency of opening the ABL serial port is improved, and the startup time of the server is shortened.

Description

Technical Field

[0001] The present application relates to the field of computer technology, and more specifically, to a serial port control method, device, electronic device and storage medium. Background Art

[0002] ABL (AGESA Boot Loader) is a key component in the initialization process of the AMD processor platform. It is responsible for the pre-initialization of the processor and platform at the beginning of system startup, laying a solid foundation for the subsequent BIOS (Basic Input Output System) firmware execution and operating system loading. The main responsibilities of ABL cover multiple aspects such as processor and memory initialization, hardware resource management, error detection and recovery, and platform security initialization, ensuring that the system can reach the best state from the beginning of startup. In related technologies, two restarts are required to enable the ABL serial port, which is inefficient and causes the server to take too long to start up.

[0003] Therefore, how to improve the efficiency of opening the ABL serial port is a technical problem that those skilled in the art need to solve. Summary of the invention

[0004] The purpose of the present application is to provide a serial port control method, device, electronic device and storage medium, which improves the efficiency of opening an ABL serial port.

[0005] To achieve the above object, the present application provides a serial port control method, which is applied to a server, wherein a baseboard management controller in the server is connected to a programmable pin of a processor, and the method comprises:

[0006] When the baseboard management controller obtains the serial port control command, the level states of the plurality of programmable pins are set according to the target serial port state to be set contained in the serial port control command;

[0007] After the server is restarted, the processor obtains the level states of the plurality of programmable pins, and determines the corresponding target serial port state identifier according to the level states of the plurality of programmable pins;

[0008] The processor sets the state of the ABL serial port to the target serial port state corresponding to the target serial port state identifier.

[0009] Wherein, the programmable pin is a general purpose input and output pin;

[0010] Correspondingly, the baseboard management controller sets the level states of the plurality of programmable pins according to the target serial port state to be set contained in the serial port control command, including:

[0011] The baseboard management controller determines the level states that need to be set for the plurality of general input and output pins according to the target serial port state that needs to be set contained in the serial port control command;

[0012] Access the general input / output pin level status register, and set the level status of the general input / output pin to the level status that needs to be set.

[0013] The processor obtains the level states of the plurality of programmable pins, including:

[0014] The processor accesses a general purpose input / output pin mode register, configures a plurality of the general purpose input / output pins to an input mode, and reads level states of the plurality of the general purpose input / output pins.

[0015] The processor sets the state of the ABL serial port to the target serial port state corresponding to the target serial port state identifier, including:

[0016] The processor loads the configuration block data corresponding to the target serial port status identifier to set the state of the ABL serial port to the target serial port state.

[0017] After the processor sets the state of the ABL serial port to the target serial port state corresponding to the target serial port state identifier, the processor further includes:

[0018] Load the ABL serial port, execute the basic input and output system startup phase, and output the ABL serial port information.

[0019] After the processor sets the state of the ABL serial port to the target serial port state corresponding to the target serial port state identifier, the processor further includes:

[0020] During the startup phase of the basic input / output system, if the setting is successful, the basic input / output system sends a first IPMI command to the baseboard management controller, so that the baseboard management controller generates a system event log based on the setting success information in the first IPMI command and the target serial port status identifier;

[0021] If the setting fails, the basic input and output system sends a second IPMI command to the baseboard management controller, so that the baseboard management controller generates an alarm log based on the setting failure information in the second IPMI command and the target serial port status identifier.

[0022] Wherein, setting the level states of multiple programmable pins according to the target serial port state to be set contained in the serial port control command includes:

[0023] Determine a target serial port state identifier corresponding to a target serial port state to be set contained in the serial port control command;

[0024] Determine the programmable pin corresponding to each identification bit in the target serial port status identification, and set the level state of the corresponding programmable pin by accessing the programmable pin level state register based on the identification value of each identification bit;

[0025] Wherein, if the identification value of the identification bit is a first preset value, the level state of the programmable pin corresponding to the identification bit is set to a low level; if the identification value of the identification bit is a second preset value, the level state of the programmable pin corresponding to the identification bit is set to a high level;

[0026] Correspondingly, determining the corresponding target serial port status identifier according to the level states of the plurality of programmable pins includes:

[0027] Determine the identification value of the corresponding identification bit in the target serial port status identification according to the level state of each of the programmable pins;

[0028] Among them, if the level state of the programmable pin is a low level, the identification value of the corresponding identification bit in the target serial port status identifier is the first preset value; if the level state of the programmable pin is a high level, the identification value of the corresponding identification bit in the target serial port status identifier is the second preset value.

[0029] To achieve the above object, the present application provides a serial port control device, which is applied to a server, wherein a baseboard management controller in the server is connected to a programmable pin of a processor, and the device comprises:

[0030] A first setting module is used to set the level states of multiple programmable pins according to the target serial port state to be set contained in the serial port control command when a serial port control command is obtained;

[0031] A determination module, configured to obtain the level states of the plurality of programmable pins after the server is restarted, and determine the corresponding target serial port state identifier according to the level states of the plurality of programmable pins;

[0032] The second setting module is used to set the state of the ABL serial port to the target serial port state corresponding to the target serial port state identifier.

[0033] To achieve the above objectives, the present application provides an electronic device, including:

[0034] Memory for storing computer programs;

[0035] The processor is used to implement the steps of the above-mentioned serial port control method when executing the computer program.

[0036] To achieve the above-mentioned purpose, the present application provides a non-volatile storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps of the above-mentioned serial port control method are implemented.

[0037] To achieve the above-mentioned purpose, the present application provides a computer program product, including a computer program, which implements the steps of the above-mentioned serial port control method when executed by a processor.

[0038] It can be seen from the above scheme that a serial port control method provided by the present application is applied to a server, in which a baseboard management controller is connected to a programmable pin of a processor, and the method includes: when the baseboard management controller obtains a serial port control command, setting the level states of multiple programmable pins according to the target serial port state that needs to be set contained in the serial port control command; after the server is restarted, the processor obtains the level states of the multiple programmable pins, and determines the corresponding target serial port state identifier according to the level states of the multiple programmable pins; the processor sets the state of the ABL serial port to the target serial port state corresponding to the target serial port state identifier.

[0039] The serial port control method provided by the present application connects the BMC with the programmable pins of the processor through hardware, and the BMC controls the level state of the programmable pins of the processor, so that the ABL serial port can be opened in real time in an out-of-band manner. Even if the server crashes during the ABL stage, the ABL serial port can be opened to collect fault information. At the same time, the processor does not need to communicate with the BMC to obtain the status setting of the ABL serial port. Even if the interaction channel between the BIOS and the BMC is abnormal, the ABL serial port can be opened to collect fault information. In addition, the present application only requires one server restart to make the setting of opening the ABL serial port effective, which improves the efficiency of opening the ABL serial port and reduces the boot time of the server. The present application also discloses a serial port control device, an electronic device, a non-volatile storage medium and a computer program product, which can also achieve the above-mentioned technical effects.

[0040] It should be understood that the foregoing general description and the following detailed description are exemplary only and are not restrictive of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following is a brief introduction to the drawings required for use in the embodiments or the prior art descriptions. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work. The drawings are used to provide a further understanding of the present disclosure and constitute a part of the specification. Together with the following specific implementation methods, they are used to explain the present disclosure, but do not constitute a limitation to the present disclosure. In the drawings:

[0042] Figure 1 is a flow chart of a serial port control method according to an exemplary embodiment;

[0043] Figure 2 is a flow chart of another serial port control method according to an exemplary embodiment;

[0044] Figure 3 A flowchart of a serial port control method in an application embodiment provided by the present application;

[0045] Figure 4 is a structural diagram of a serial port control device according to an exemplary embodiment;

[0046] Figure 5 The figure is a structural diagram of an electronic device according to an exemplary embodiment. DETAILED DESCRIPTION

[0047] The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without making creative work are within the scope of protection of the present application. In addition, in the embodiments of the present application, "first", "second", etc. are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence.

[0048] ABL (AGESA Boot Loader) is a key component in the initialization process of the AMD processor platform. It is responsible for the pre-initialization of the processor and platform at the beginning of the system startup, laying a solid foundation for the subsequent BIOS (Basic Input Output System) firmware execution and operating system loading. The main responsibilities of ABL cover processor and memory initialization, hardware resource management, error detection and recovery, platform security initialization and other aspects, ensuring that the system can reach the best state from the beginning of startup.

[0049] ABL is critical to the boot process of the AMD processor platform. It not only ensures the safe and efficient initialization of the processor and platform hardware, but also provides a solid guarantee for the stable operation of the entire system. By optimizing ABL, AMD can further improve system performance, enhance compatibility, and strengthen the security of the platform. The ABL serial port is an important tool for outputting key information to confirm status and perform fault debugging. However, because printing ABL serial port information will increase the task burden of the CPU, thereby significantly extending the server startup time, the ABL serial port is usually set to closed. If the ABL serial port needs to be enabled, engineers need to manually modify the code and recompile to generate a new BIOS firmware.

[0050] In the related art, the setting value representing the ABL serial port switch is stored in the EEPROM (Electrically Erasable Programmable Read-Only Memory) through the BIOS and the BMC (Baseboard Management Controller). The user can write the value that the user needs to set to the EEPROM through the IPMI (Intelligent Platform Management Interface) command from the BMC, restart the server, and the BIOS obtains the corresponding setting from the BMC through the IPMI command during the startup process, updates the setting, and then restarts to make the setting take effect.

[0051] In the above solution, if the server crashes during the ABL stage, the BIOS will not continue to execute, so the solution cannot take effect in this case. This means that when the server fails during the ABL stage or early in the BIOS startup, the above solution cannot help collect fault information. In addition, even if the new setting of the ABL serial port switch is successfully applied during the BIOS startup process, two restarts are required to make the ABL serial port effective, which is inefficient and causes the server to take too long to boot. In addition, if the interaction channel between the BIOS and the BMC is abnormal, such as due to network problems or other failures, the BIOS will not be able to obtain the setting value of the ABL serial port switch from the BMC through the IPMI command, and thus cannot turn on the ABL serial port.

[0052] Therefore, in this application, by connecting the BMC to the programmable pins of the processor in hardware, and by controlling the level state of the programmable pins of the processor by the BMC, the ABL serial port can be opened in real time in an out-of-band manner. Even if the server crashes during the ABL stage, the ABL serial port can be opened to collect fault information. At the same time, the processor does not need to communicate with the BMC to obtain the status setting of the ABL serial port. Even if the interaction channel between the BIOS and the BMC is abnormal, the ABL serial port can be opened to collect fault information. In addition, this application only requires one server restart to make the setting of opening the ABL serial port effective, which improves the efficiency of opening the ABL serial port and reduces the boot time of the server.

[0053] The embodiment of the present application discloses a serial port control method, which improves the efficiency of opening an ABL serial port.

[0054] See also Figure 1 , a flowchart of a serial port control method according to an exemplary embodiment is shown, such as Figure 1 As shown, including:

[0055] S101: When the baseboard management controller obtains a serial port control command, the level states of a plurality of programmable pins are set according to the target serial port state to be set contained in the serial port control command;

[0056] This embodiment is applied to a server, wherein a baseboard management controller is connected to a programmable pin of a processor, and the BMC can control the level state of the programmable pin of the processor. The programmable pin in this embodiment can be a general-purpose input / output pin (GPIO). The baseboard management controller determines the level states that need to be set for a plurality of general-purpose input / output pins according to the target serial port state that needs to be set included in the serial port control command, accesses the general-purpose input / output pin level state register, and sets the level state of the general-purpose input / output pin to the level state that needs to be set.

[0057] In the specific implementation, during the BMC code development phase, the server agrees with the BIOS on the designated programmable pins and their arrangement order, such as GPIO0, GPIO1, and GPIO2. Each GPIO has two states: high level (1) and low level (0), which can form an ID value from 0 to 7. The corresponding serial port status identifier and the corresponding serial port status setting are agreed with the BIOS. For example, the serial port status identifier 000 sets the ABL serial port to the closed state, and the serial port status identifier 001 sets the ABL serial port to the open state. The BMC provides the corresponding IPMI / Redfish interactive interface to the user. For example, raw 0x3c 0x1 means that the ABL serial port is set to the open state. When the BMC receives this instruction from the user, it sets GPIO0, GPIO1, and GPIO2 to 1, 0, and 0.

[0058] When the user needs to control the state of the ABL serial port, first set it through the IPMI / Redfish interface provided by the BMC, such as raw 0x3c 0x1, where 0x1 is the target serial port state identifier, indicating that the ABL serial port is set to the open state. After receiving the corresponding instruction, the BMC sets the corresponding level state of the GPIO agreed with the BIOS, such as setting GPIO0, GPIO1, and GPIO2 to 1, 0, 0.

[0059] S102: After the server is restarted, the processor obtains the level states of the plurality of programmable pins, and determines the corresponding target serial port state identifier according to the level states of the plurality of programmable pins;

[0060] In a specific implementation, the server is restarted, and the processor obtains the level status of the agreed programmable pins, and determines the corresponding target serial port status identifier according to the level status of the programmable pins and the agreed arrangement order.

[0061] As a feasible implementation mode, the processor obtains the level status of the plurality of programmable pins, including: the processor accesses the general input and output pin mode register, configures the plurality of general input and output pins as input mode, and reads the level status of the plurality of general input and output pins. In a specific implementation, during the ABL loading stage, the processor accesses the general input and output pin mode register, sets the corresponding GPIO to GPI (input mode), and is used to receive the level status of the GPIO.

[0062] For example, the processor obtains the level states of GPIO0, GPIO1, and GPIO2 as 1 (high), 0 (low), and 0 (low), respectively, and the determined target serial port state identifier is 001.

[0063] S103: The processor sets the state of the ABL serial port to the target serial port state corresponding to the target serial port state identifier.

[0064] In a specific implementation, the processor sets the state of the ABL serial port to the target serial port state corresponding to the target serial port state identifier. For example, if the target serial port state identifier is 001 and the corresponding target serial port state is an open state, the processor sets the state of the ABL serial port to an open state.

[0065] As a feasible implementation manner, the processor sets the state of the ABL serial port to the target serial port state corresponding to the target serial port state identifier, including: the processor loads the configuration block data corresponding to the target serial port state identifier to set the state of the ABL serial port to the target serial port state.

[0066] In a specific implementation, during the BIOS code development phase, different serial port status identifiers are preset to correspond to different APCB (AGESA Platform Configuration Block) data settings. For example, if the serial port status identifier is 000, the corresponding APCB data sets the ABL serial port switch to off, and if the serial port status identifier is 001, the corresponding APCB data sets the ABL serial port switch to on. After determining the target serial port status identifier, the APCB data setting corresponding to the target serial port status identifier is loaded. For example, if the target serial port status identifier is 001, the ABL serial port is set to on, and the ABL serial port information can be output at this time.

[0067] As a feasible implementation, after the processor sets the state of the ABL serial port to the target serial port state corresponding to the target serial port state identifier, it also includes: loading the ABL serial port, executing the startup phase of the basic input and output system, and outputting the ABL serial port information. In a specific implementation, the server continues POST (power-on self-test), performs the ABL phase, and the BIOS startup phase.

[0068] The serial port control method provided in the embodiment of the present application can realize the real-time opening of the ABL serial port in an out-of-band manner by connecting the BMC with the programmable pin of the processor through the hardware, and the BMC controls the level state of the programmable pin of the processor. Even if the server crashes in the ABL stage, the ABL serial port can be opened to collect fault information. At the same time, the processor does not need to communicate with the BMC to obtain the state setting of the ABL serial port. Even if the interaction channel between the BIOS and the BMC is abnormal, the ABL serial port can be opened to collect fault information. In addition, the embodiment of the present application only needs one server restart to make the setting of opening the ABL serial port take effect, which improves the efficiency of opening the ABL serial port and reduces the boot time of the server.

[0069] The embodiment of the present application discloses a serial port control method. Compared with the previous embodiment, this embodiment further explains and optimizes the technical solution. Specifically:

[0070] See also Figure 2 , a flowchart of another serial port control method according to an exemplary embodiment is shown, such as Figure 2 As shown, including:

[0071] S201: When the baseboard management controller obtains a serial port control command, the level states of a plurality of programmable pins are set according to the target serial port state to be set contained in the serial port control command;

[0072] S202: After the server is restarted, the processor obtains the level states of the plurality of programmable pins, and determines the corresponding target serial port state identifier according to the level states of the plurality of programmable pins;

[0073] S203: The processor sets the state of the ABL serial port to the target serial port state corresponding to the target serial port state identifier;

[0074] S204: Load the ABL serial port, execute the startup phase of the basic input and output system, and output the ABL serial port information;

[0075] S205: During the startup phase of the basic input / output system, if the setting is successful, the basic input / output system sends a first IPMI command to the baseboard management controller so that the baseboard management controller generates a system event log based on the setting success information in the first IPMI command and the target serial port status identifier; if the setting fails, the basic input / output system sends a second IPMI command to the baseboard management controller so that the baseboard management controller generates an alarm log based on the setting failure information in the second IPMI command and the target serial port status identifier.

[0076] In a specific implementation, during the BIOS startup process, if the serial port status of the ABL serial port is set successfully, the BIOS will send a first IPMI command containing success information and a target serial port status identifier to the BMC. After receiving this command, the BMC will create a system event log containing the setting success information and the target serial port status identifier. On the contrary, if the serial port setting fails, the BIOS will send a second IPMI command containing failure information and a target serial port status identifier to the BMC. After receiving this command, the BMC will generate an alarm log containing the setting failure information and the target serial port status identifier. Of course, the alarm log can also record the cause of the failure and the timestamp, so that more information can be provided in the later troubleshooting and system maintenance to help quickly locate the problem.

[0077] As a preferred implementation, after the processor loads the APCB data, in addition to recording the flag bit of whether the setting is successful, a status notification can be sent to the administrator through a status indicator or through a network management interface to clearly inform the administrator of the current status of the ABL serial port. In this way, even if the user cannot see the ABL serial port information temporarily, he can still learn the status of the serial port through other channels.

[0078] As a preferred embodiment, if the processor fails when trying to load APCB data, an automatic retry mechanism can be designed. After the initial setup fails, the processor can automatically retry, for example, it can be set to retry after 1 minute, 5 minutes, or 15 minutes until it succeeds or reaches the maximum number of retries. This can improve the robustness of the system and reduce setup failures caused by transient faults.

[0079] As a feasible implementation manner, setting the level states of multiple programmable pins according to the target serial port state to be set contained in the serial port control command includes: determining the target serial port state identifier corresponding to the target serial port state to be set contained in the serial port control command; determining the programmable pin corresponding to each identification bit in the target serial port state identifier, and setting the level state of the corresponding programmable pin by accessing the programmable pin level state register based on the identification value of each identification bit; wherein, if the identification value of the identification bit is a first preset value, the level state of the programmable pin corresponding to the identification bit is set to a low level, and if the identification value of the identification bit is a second preset value, the level state of the programmable pin corresponding to the identification bit is set to a high level; accordingly, determining the corresponding target serial port state identifier according to the level states of the multiple programmable pins includes: determining the identification value of the corresponding identification bit in the target serial port state identifier according to the level state of each programmable pin; wherein, if the level state of the programmable pin is a low level, the identification value of the corresponding identification bit in the target serial port state identifier is the first preset value, and if the level state of the programmable pin is a high level, the identification value of the corresponding identification bit in the target serial port state identifier is the second preset value.

[0080] In a specific implementation, when the BMC receives a serial port control command from a user, it first determines the target serial port status identifier, and then determines the programmable pin corresponding to each identifier in the target serial port status identifier according to a pre-agreed agreement, and then maps the flag value of each identifier in the target serial port status identifier to a specific programmable pin, that is, the level state of the programmable pin is set by accessing the programmable pin level state register according to the identifier value. If the value of the identifier is a first preset value (such as 0), the corresponding programmable pin level state in the programmable pin level state register is set to a low level; if the value of the identifier is a second preset value (such as 1), the corresponding programmable pin level state in the programmable pin level state register is set to a high level. After the server is restarted, the processor determines the level state of each programmable pin, and then sets the identification value of the corresponding identifier in the target serial port status identifier according to the level state of each programmable pin. If the level state is low, the corresponding identifier in the target serial port status identifier will be set to the first preset value, and if the level state is high, the corresponding identifier in the target serial port status identifier will be set to the second preset value.

[0081] An application example provided by the present application is described below. Figure 3 As shown, the following steps are included:

[0082] The user sends a command to turn on the ABL serial port switch, such as raw 0x3c 0x1;

[0083] BMC receives the command and sets the level status of GPIO;

[0084] BMC sets the GPIO level status, GPIO0(1), GPIO1(0), GPIO2(0), and the component ID is 001;

[0085] The user restarts the server;

[0086] The CPU (Central Processing Unit) sets the corresponding GPIO to GPI mode during the ABL loading phase;

[0087] The CPU obtains the level status of the corresponding GPIO, and the component ID is 001;

[0088] The CPU finds the matching APCB data based on ID 001;

[0089] CPU loads APCB data (ABL is set to open)

[0090] The CPU records whether the setting is successful and outputs APOB;

[0091] Determine whether the setting is successful. If so, the user can see the ABL serial port information, and the BIOS sends an IPMI command to the BMC, including the setting success information and the setting ID. The BMC records the corresponding SEL (System Event Log): setting is successful, and the ID is 001. If not, the user cannot see the ABL serial port information, and the BIOS sends an IPMI command to the BMC, including the setting failure information BMC and the setting ID. The BMC records the SEL alarm log of the setting failure.

[0092] A serial port control device provided in an embodiment of the present application is introduced below. The serial port control device described below and the serial port control method described above can be referenced to each other.

[0093] See also Figure 4 , a structural diagram of a serial port control device according to an exemplary embodiment is shown, such as Figure 4 As shown, including:

[0094] The first setting module 401 is used to set the level states of multiple programmable pins according to the target serial port state to be set contained in the serial port control command when a serial port control command is obtained;

[0095] A determination module 402 is used to obtain the level states of the plurality of programmable pins after the server is restarted, and determine the corresponding target serial port state identifier according to the level states of the plurality of programmable pins;

[0096] The second setting module 403 is used to set the state of the ABL serial port to the target serial port state corresponding to the target serial port state identifier.

[0097] The serial port control device provided in the embodiment of the present application is connected to the programmable pin of the processor through the hardware BMC, and the level state of the programmable pin of the processor is controlled by the BMC, so that the ABL serial port can be opened in real time in an out-of-band manner. Even if the server crashes in the ABL stage, the ABL serial port can be opened to collect fault information. At the same time, the processor does not need to communicate with the BMC to obtain the state setting of the ABL serial port. Even if the interaction channel between the BIOS and the BMC is abnormal, the ABL serial port can be opened to collect fault information. In addition, the embodiment of the present application only needs one server restart to make the setting of opening the ABL serial port take effect, which improves the efficiency of opening the ABL serial port and reduces the boot time of the server.

[0098] Based on the above embodiment, as a preferred implementation, the programmable pin is a general input and output pin;

[0099] Correspondingly, the first setting module 401 is specifically used to: determine the level states that need to be set for multiple general input / output pins according to the target serial port state that needs to be set contained in the serial port control command; access the general input / output pin level state register, and set the level state of the general input / output pin to the level state that needs to be set.

[0100] Based on the above embodiment, as a preferred implementation, the determination module 402 is specifically used to: access the general input and output pin mode register, configure multiple general input and output pins as input mode, and read the level status of multiple general input and output pins.

[0101] Based on the above embodiment, as a preferred implementation, the second setting module 403 is specifically used to: load the configuration block data corresponding to the target serial port status identifier to set the state of the ABL serial port to the target serial port state.

[0102] Based on the above embodiment, as a preferred implementation, it also includes:

[0103] The loading module is used to load the ABL serial port, execute the startup phase of the basic input and output system, and output the ABL serial port information.

[0104] Based on the above embodiment, as a preferred implementation, it also includes:

[0105] A generating module is used for, during the startup phase of the basic input / output system, if the setting is successful, the basic input / output system sends a first IPMI command to the baseboard management controller, so that the baseboard management controller generates a system event log based on the setting success information in the first IPMI command and the target serial port status identifier; if the setting fails, the basic input / output system sends a second IPMI command to the baseboard management controller, so that the baseboard management controller generates an alarm log based on the setting failure information in the second IPMI command and the target serial port status identifier.

[0106] On the basis of the above embodiment, as a preferred implementation mode, the first setting module 401 is specifically used to: determine the target serial port state identifier corresponding to the target serial port state to be set contained in the serial port control command; determine the programmable pin corresponding to each identification bit in the target serial port state identifier, and set the level state of the corresponding programmable pin by accessing the programmable pin level state register based on the identification value of each identification bit; wherein, if the identification value of the identification bit is a first preset value, the level state of the programmable pin corresponding to the identification bit is set to a low level, and if the identification value of the identification bit is a second preset value, the level state of the programmable pin corresponding to the identification bit is set to a high level;

[0107] Correspondingly, the second setting module 403 is specifically used to: determine the identification value of the corresponding identification bit in the target serial port status identifier according to the level state of each of the programmable pins; wherein, if the level state of the programmable pin is a low level, the identification value of the corresponding identification bit in the target serial port status identifier is the first preset value, and if the level state of the programmable pin is a high level, the identification value of the corresponding identification bit in the target serial port status identifier is the second preset value.

[0108] Regarding the device in the above embodiment, the specific manner in which each module performs operations has been described in detail in the embodiment of the method, and will not be elaborated here.

[0109] Based on the hardware implementation of the above program module, and in order to implement the method of the embodiment of the present application, the embodiment of the present application also provides an electronic device, Figure 5 FIG. 1 is a structural diagram of an electronic device according to an exemplary embodiment. Figure 5 As shown, the electronic equipment includes:

[0110] Communication interface 1, capable of exchanging information with other devices such as network devices;

[0111] The processor 2 is connected to the communication interface 1 to implement information exchange with other devices and is used to execute the serial port control method provided by one or more of the above technical solutions when running a computer program. The computer program is stored in the memory 3.

[0112] Of course, in actual application, the various components in the electronic device are coupled together through the bus system 4. It can be understood that the bus system 4 is used to realize the connection and communication between these components. In addition to the data bus, the bus system 4 also includes a power bus, a control bus and a status signal bus. However, for the sake of clarity, Figure 5 Various buses are labeled as bus system 4.

[0113] The memory 3 in the embodiment of the present application is used to store various types of data to support the operation of the electronic device. Examples of such data include: any computer program used to operate on the electronic device.

[0114] It can be understood that the memory 3 can be a volatile memory or a non-volatile memory, and can also include both volatile and non-volatile memories. Among them, the non-volatile memory can be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), a magnetic random access memory (FRAM), a flash memory, a magnetic surface memory, an optical disc, or a compact disc read-only memory (CD-ROM); the magnetic surface memory can be a disk memory or a tape memory. The volatile memory can be a random access memory (RAM), which is used as an external cache. By way of example and not limitation, many forms of RAM are available, such as static random access memory (SRAM), synchronous static random access memory (SSRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDRSDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous link dynamic random access memory (SLDRAM, SyncLink Dynamic Random Access Memory), and direct RAMbus random access memory (DRRAM, Direct Rambus Random Access Memory).The memory 3 described in the embodiments of the present application is intended to include but is not limited to these and any other suitable types of memories.

[0115] The method disclosed in the above embodiment of the present application can be applied to the processor 2, or implemented by the processor 2. The processor 2 may be an integrated circuit chip with signal processing capabilities. In the implementation process, each step of the above method can be completed by the hardware integrated logic circuit in the processor 2 or the instruction in the form of software. The above processor 2 may be a general-purpose processor, a DSP, or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components, etc. The processor 2 can implement or execute the methods, steps and logic block diagrams disclosed in the embodiments of the present application. The general-purpose processor may be a microprocessor or any conventional processor, etc. In combination with the steps of the method disclosed in the embodiment of the present application, it can be directly embodied as a hardware decoding processor to execute, or it can be executed by a combination of hardware and software modules in the decoding processor. The software module may be located in a storage medium, which is located in the memory 3, and the processor 2 reads the program in the memory 3 and completes the steps of the above method in combination with its hardware.

[0116] When the processor 2 executes the program, the corresponding processes in the various methods of the embodiments of the present application are implemented, which will not be repeated here for the sake of brevity.

[0117] In an exemplary embodiment, the embodiment of the present application further provides a non-volatile storage medium storing a computer program, which can be executed by the processor 2 to complete the steps of the aforementioned method.

[0118] In an exemplary embodiment, the present application also provides a computer program product, including a computer program, which is executed by the processor 2 to complete the steps of the aforementioned method.

[0119] A person of ordinary skill in the art can understand that all or part of the steps of implementing the above-mentioned method embodiment can be completed by hardware related to computer program instructions, and the aforementioned computer program can be stored in a non-volatile storage medium. When the computer program is executed, it executes the steps of the above-mentioned method embodiment. Alternatively, if the above-mentioned integrated unit of the present application is implemented in the form of a software function module and sold or used as an independent product, it can also be stored in a non-volatile storage medium. Based on this understanding, the technical solution of the embodiment of the present application can be essentially or partly embodied in the form of a software product, which is stored in a non-volatile storage medium and includes a number of instructions for an electronic device (which can be a personal computer, a server, a network device, etc.) to execute all or part of the methods described in each embodiment of the present application.

[0120] The above description is only a specific implementation manner of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application.

Claims

1. A serial port control method, characterized in that: Applied to a server, in which a baseboard management controller is connected to a programmable pin of a processor, the method comprises: When the baseboard management controller obtains the serial port control command, the level states of the plurality of programmable pins are set according to the target serial port state to be set contained in the serial port control command; After the server is restarted, the processor obtains the level states of the plurality of programmable pins, and determines the corresponding target serial port state identifier according to the level states of the plurality of programmable pins; The processor sets the state of the ABL serial port to the target serial port state corresponding to the target serial port state identifier.

2. The serial port control method according to claim 1, characterized in that: The programmable pins are general purpose input and output pins; Correspondingly, the baseboard management controller sets the level states of the plurality of programmable pins according to the target serial port state to be set contained in the serial port control command, including: The baseboard management controller determines the level states that need to be set for the plurality of general input and output pins according to the target serial port state that needs to be set contained in the serial port control command; Access the general input / output pin level status register, and set the level status of the general input / output pin to the level status that needs to be set.

3. The serial port control method according to claim 2, characterized in that: The processor obtains the level states of the plurality of programmable pins, including: The processor accesses a general purpose input / output pin mode register, configures a plurality of the general purpose input / output pins to an input mode, and reads level states of the plurality of the general purpose input / output pins.

4. The serial port control method according to claim 1, characterized in that: The processor sets the state of the ABL serial port to the target serial port state corresponding to the target serial port state identifier, including: The processor loads the configuration block data corresponding to the target serial port status identifier to set the state of the ABL serial port to the target serial port state.

5. The serial port control method according to claim 1, characterized in that: After the processor sets the state of the ABL serial port to the target serial port state corresponding to the target serial port state identifier, the process further includes: Load the ABL serial port, execute the basic input and output system startup phase, and output the ABL serial port information.

6. The serial port control method according to claim 1, characterized in that: After the processor sets the state of the ABL serial port to the target serial port state corresponding to the target serial port state identifier, the process further includes: During the startup phase of the basic input / output system, if the setting is successful, the basic input / output system sends a first IPMI command to the baseboard management controller, so that the baseboard management controller generates a system event log based on the setting success information in the first IPMI command and the target serial port status identifier; If the setting fails, the basic input and output system sends a second IPMI command to the baseboard management controller, so that the baseboard management controller generates an alarm log based on the setting failure information in the second IPMI command and the target serial port status identifier.

7. The serial port control method according to claim 1, characterized in that: The level states of multiple programmable pins are set according to the target serial port state to be set contained in the serial port control command, including: Determine a target serial port state identifier corresponding to a target serial port state to be set contained in the serial port control command; Determine the programmable pin corresponding to each identification bit in the target serial port status identification, and set the level state of the corresponding programmable pin by accessing the programmable pin level state register based on the identification value of each identification bit; Wherein, if the identification value of the identification bit is a first preset value, the level state of the programmable pin corresponding to the identification bit is set to a low level; if the identification value of the identification bit is a second preset value, the level state of the programmable pin corresponding to the identification bit is set to a high level; Correspondingly, determining the corresponding target serial port status identifier according to the level states of the plurality of programmable pins includes: Determine the identification value of the corresponding identification bit in the target serial port status identification according to the level state of each of the programmable pins; Among them, if the level state of the programmable pin is a low level, the identification value of the corresponding identification bit in the target serial port status identifier is the first preset value; if the level state of the programmable pin is a high level, the identification value of the corresponding identification bit in the target serial port status identifier is the second preset value.

8. A serial port control device, characterized in that: Applied to a server, in which a baseboard management controller is connected to a programmable pin of a processor, the device comprises: A first setting module is used to set the level states of multiple programmable pins according to the target serial port state to be set contained in the serial port control command when a serial port control command is obtained; A determination module, configured to obtain the level states of the plurality of programmable pins after the server is restarted, and determine the corresponding target serial port state identifier according to the level states of the plurality of programmable pins; The second setting module is used to set the state of the ABL serial port to the target serial port state corresponding to the target serial port state identifier.

9. An electronic device, characterized in that: include: Memory for storing computer programs; A processor, configured to implement the steps of the serial port control method according to any one of claims 1 to 7 when executing the computer program.

10. A non-volatile storage medium, characterized in that: The non-volatile storage medium stores a computer program, and when the computer program is executed, the steps of the serial port control method according to any one of claims 1 to 7 are implemented.

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