A Simulation Method and Device for a High-Voltage Direct-Connected Energy Storage System Based on FPGA

Abstract

The present invention discloses a simulation method and device for a high-voltage direct-connected energy storage system based on FPGA. The power unit of the high-voltage direct-connected energy storage system is split into an H-bridge and an energy storage unit part. The H-bridge and the grid-side topology are placed in the FPGA for simulation, and the energy storage battery branch part is simulated in the CPU. The sub-module voltage and current information are interacted between the FPGA and the CPU through the PCIE bus. The FPGA calculates the sub-module capacitor voltage, sub-module terminal voltage, and arm voltage by establishing a Thevenin model of a single sub-module of the high-voltage direct-connected energy storage system and using the series relationship of the sub-modules for algebraic superposition. The equivalent model and the grid-side topology run in the FPGA of the simulator with a simulation step size of 1 us. The energy storage battery branch runs in the CPU of the simulator, and the CPU supports user-defined energy storage battery models. By fully combining the respective advantages of the real-time multi-core processor and the FPGA, an accurate real-time simulation of a high-voltage direct-connected energy storage system with any number of stages is realized on the FPGA with a simulation step size of 1 us.

Description

Technical Field

[0001] The present invention relates to the technical field of real-time simulation, and particularly relates to a simulation method and device for a high-voltage direct-connected energy storage system based on FPGA. Background Art

[0002] With the increasing demand for energy storage technology and the requirements for power grid stability and flexibility, in order to balance the difference between load and supply in the power network and improve the efficiency and reliability of the power system, high-voltage direct-connected energy storage systems have gradually become the focus of research for various energy storage manufacturers. Currently, high-voltage direct-connected energy storage systems have mature applications in 6kV and 10kV for new energy energy storage, grid side, and large-scale industrial and commercial applications. High-voltage direct-connected energy storage at the 35kV voltage level has multiple demonstration projects and has become the focus of research for multiple manufacturers.

[0003] High-voltage direct-connected energy storage systems usually have a high voltage level, large power capacity, many cascaded sub-modules, many switches, and a large volume occupied by the battery system. Testing based on a physical platform is costly, has a high risk factor, and is engineering complex. It is difficult to test and debug on a physical prototype, and it is often difficult to show some abnormal operating conditions, such as voltage fluctuations and frequency offsets of the power grid. Therefore, for a high-voltage direct-connected energy storage controller, it is very necessary to test through a real-time simulation device that can simulate various operating conditions of the actual system.

[0004] However, for high-voltage direct-connected energy storage systems, there are mainly the following challenges in real-time simulation testing;

[0005] First, a high-voltage direct-connected energy storage system usually contains hundreds of power electronic devices, which cannot be accurately simulated by conventional real-time simulation devices. To ensure the accuracy of real-time simulation, this requires the real-time simulation device to have an extremely small simulation step, usually at the microsecond level.

[0006] Second, there is a large amount of data interaction information between the high-voltage direct-connected energy storage system and the controller, and the traditional physical IO wiring form cannot be used to achieve the interaction;

[0007] Third, traditional simulation devices run the battery model of the high-voltage direct-connected energy storage system in the FPGA and do not support modifying the characteristics and series-parallel conditions of the energy storage battery.

[0008] Fourth, the widely used detail model based on device level truly builds each sub-module of the high-voltage direct-connected energy storage system and can directly simulate the charging and discharging processes of the capacitors of each sub-module. However, as the simulation scale increases, the presence of a large number of power electronic devices causes the calculation efficiency to drop sharply, which is not suitable for the fast electromagnetic transient simulation of the power system. Therefore, a simulation method and device for a high-voltage direct-connected energy storage system based on FPGA are provided. Summary of the Invention

[0009] The purpose of the present invention is to provide a simulation method for a high-voltage direct-mounted energy storage system based on FPGA in view of the defects of the prior art, wherein the power unit of the high-voltage direct-mounted energy storage system is split into an H-bridge and an energy storage unit part, the H-bridge and the grid-side topology are placed in the FPGA for simulation, and the energy storage battery branch part is placed in the CPU for simulation, and the FPGA and the CPU exchange the submodule voltage and current information through the PCIE bus. The FPGA establishes a Thevenin model of a single high-voltage direct-mounted energy storage system submodule, and uses the submodule series relationship for algebraic superposition to calculate the submodule capacitor voltage, submodule terminal voltage, and bridge arm voltage; the equivalent model and the grid-side topology run in the FPGA of the simulator with a simulation step of 1us; the energy storage battery branch runs in the CPU of the simulator, and the CPU supports user-defined energy storage battery models; the advantages of the real-time multi-core processor and the FPGA are fully combined, so as to realize accurate real-time simulation of any series of high-voltage direct-mounted energy storage systems with a simulation step of 1us on the FPGA.

[0010] To achieve the above object, the present invention provides the following technical solution: a simulation method of a high-voltage direct-mounted energy storage system based on FPGA, comprising the following steps:

[0011] Step 1: The host computer applies the model cascade submodules to the high-voltage direct-mounted energy storage system. The module cascade number N, bypass capacitor value C, and capacitor initial voltage V c_initial , discharge resistor R p 、IGBT on-resistance R on 、IGBT turn-off resistance R off As well as the grid-side inductance L0, grid-side resistance R0, grid-side voltage V abc , simulation step length ΔT and other numerical information are configured;

[0012] Step 2: Model the high-voltage cascade submodule on the DC side, where the energy storage battery and the series inductor before the battery are simulated on the CPU, and the DC capacitor of the submodule is equivalent to a controllable voltage source on the CPU; the H-bridge and capacitor of the submodule are simulated on the FPGA for small step size, and the energy storage battery part is equivalent to a controllable current source on the FPGA;

[0013] Step 3: FPGA performs Thevenin equivalent on the submodule capacitor part, and connects the bypass capacitor C and the discharge resistor R p Equivalent to resistance R ceq With voltage source V ceq Equivalent circuit model of series connection;

[0014] Step 4: FPGA performs Thevenin equivalent on the cascaded submodules and connects the H-bridge in parallel with the controllable current source I bat The submodule is equivalent to a resistor R smeq With voltage source V smeqThe equivalent circuit model in series, and pre-calculate and generate the value of R smeq , the numerical values of the terminal voltage proportionality coefficient A and the battery current proportionality coefficient B under different switching tube states;

[0015] Step 5: The FPGA performs Thevenin equivalent on each phase arm of the high-voltage direct-connected energy storage, and equivalently represents the whole of each phase arm as a resistor R EQ in series with the voltage source V EQ equivalent circuit model;

[0016] Step 6: The FPGA switches the equivalent circuit parameters R smeq , the terminal voltage proportionality coefficient A and the battery current proportionality coefficient B corresponding to the current sub-module according to the conduction state of each switching tube of the current sub-module, and according to the capacitor voltage V c (t - ΔT) and the battery current I bat at the previous moment, calculate the equivalent voltage V smeq of each sub-module, and then obtain the equivalent voltage V EQ of each phase arm by accumulation;

[0017] Step 7: The FPGA calculates the arm current I EQ according to the equivalent resistance R EQ of each arm and the equivalent voltage V sm , as well as the parameters of the grid-side voltage and the grid-side grid inductance by integral calculation;

[0018] Step 8: The FPGA calculates the capacitor current I sm of each sub-module according to the arm current I bat and the energy storage battery current I c and the capacitor voltage V c ;

[0019] Step 9: The CPU obtains the capacitor voltage V c of the sub-module uploaded by the FPGA, combines it with the energy storage battery voltage on the CPU, calculates the energy storage battery current I bat , and sends the energy storage battery current I bat to the FPGA;

[0020] Step 10: The FPGA uploads the information of the sub-module voltage, current, arm voltage, and current, and the upper computer can perform real-time observation on the operating state of the high-voltage direct-connected energy storage system; the data of the sub-module voltage, current, and SOC are transmitted to the energy storage controller through optical fibers; the battery information in the CPU can be optionally transmitted to the BMS control system through CAN communication.

[0021] As a preferred technical solution of the present invention, all the configuration information in Step 1 needs to be configured in the upper computer. After configuration, the functions described in the configuration information can be realized without additional FPGA compilation;

[0022] The specific steps of Step 1 are as follows:

[0023] Step 11: The front-end of the host computer connects to the device through the device IP, and configures the number of module cascades N, bypass capacitance value C, initial capacitance voltage V of the cascaded sub-module of the high-voltage direct-connected energy storage system application model on the host computer c_initial , discharge resistor R p , IGBT on-resistance R on , IGBT off-resistance R off , as well as grid-side inductance L0, grid-side resistance R0, grid-side voltage V abc , simulation step ΔT parameter information;

[0024] Step 12: The back-end of the host computer reads the front-end configuration information and generates a configuration file.

[0025] As a preferred technical solution of the present invention, the specific steps of Step 3 are as follows:

[0026] Step 31: Discretize the equivalent model of the sub-module by using the trapezoidal integration method, and equivalent the bypass capacitance C to a capacitance resistor R c in series with a voltage source V c0eq ; where the sub-module voltage V c has the following expression:

[0027]

[0028] Where:

[0029] I c (t) is the capacitance current; R c is the equivalent resistance of capacitance C; ΔT is the simulation step;

[0030] Step 32: The overall equivalent of the parallel connection of capacitance C and discharge resistor R p is equivalent to a resistance R ceq in series with a voltage source V ceq equivalent model:

[0031]

[0032] As a preferred technical solution of the present invention, the specific steps of Step 4 are as follows:

[0033] Step 41: The FPGA establishes a Thevenin equivalent model of the sub-module of the high-voltage direct-connected energy storage system, and regards the four switching tubes S1, S2, S3, and S4 of the sub-module as variable resistors R1, R2, R3, and R4 that switch between high and low resistance values. When in the on state, the resistance value is R on , and when off, it is R off ; on-resistance R on and off-resistance Roff is parameter configuration data;

[0034] Step 42: Equivalently represent the overall sub - modules of the controllable current source I of the H - bridge parallel energy storage unit as a resistor R bat in series with a voltage source V smeq : smeq :

[0035] V sm = R smeq I sm + V smeq (t - ΔT);

[0036] R smeq = R A / / (R2 / / R C ) / / (R4 / / R B );

[0037] Where:

[0038] V smeq (t - ΔT)= A * V ceq (t - ΔT)+ B * I bat ;

[0039] Where:

[0040] R smeq is the equivalent circuit resistance; V smeq is the sub - module equivalent voltage source; I bat is the battery current, calculated and issued by the CPU; V sm is the sub - module terminal voltage; A is the terminal voltage proportionality coefficient, B is the battery current proportionality coefficient;

[0041] Step 43: Pre - calculate and generate the initial equivalent circuit parameters R smeq , terminal voltage proportionality coefficient A, and capacitance voltage proportionality coefficient B for each state of the sub - module according to the cascade module parameters and various possible conduction states of the sub - module switching tubes.

[0042] As a preferred technical solution of the present invention, in step 5, the series equivalent circuits of N sub - modules in the high - voltage directly - connected energy storage bridge arm are equivalently represented as an equivalent circuit of a bridge - arm resistor R EQ in series with a voltage source V EQ . The sum of the terminal voltages V sm of each sub - module unit is obtained to get the bridge - arm terminal voltage V MV :

[0043]

[0044] Then: V MV = REQ I sm +V EQ (t - ΔT);

[0045] Where:

[0046] V MV is the voltage of each phase bridge arm; R EQ is the equivalent circuit resistance; V EQ is the equivalent voltage source of the bridge arm; I sm is the bridge arm current.

[0047] As a preferred technical solution of the present invention, in step 6, the FPGA switches and selects the corresponding initialized equivalent circuit parameters R smeq resistance value and terminal voltage ratio coefficient A, battery current ratio coefficient B according to the conduction state of the current sub-module switching tube. The conduction state combinations of the 4 switching tubes of each sub-module H-bridge are different, and the corresponding equivalent circuit parameters R smeq resistance value, terminal voltage ratio coefficient A and battery current ratio coefficient B are also different;

[0048] The FPGA selects the equivalent circuit parameters and ratio coefficients at the current moment, and according to the capacitor voltage V c (t - ΔT) and battery current I bat , calculates the equivalent voltage V smeq of each cascaded sub-module, and then obtains the equivalent voltage V EQ of each phase bridge arm by cumulative summation.

[0049] As a preferred technical solution of the present invention, in step 8, the FPGA calculates the capacitor current I sm of each sub-module according to the bridge arm current I bat and the energy storage battery current I c (t) and the capacitor voltage V c :

[0050]

[0051] Where: R ∑ = R1 + R2 + R3 + R4;

[0052]

[0053] V c (t) = R c ·I c (t) + V c0eq (t - ΔT);

[0054] I bat is the energy storage battery current, which is calculated by the energy storage battery model in the CPU and uploaded to the FPGA; Ism is the arm current; I c is the capacitor current; I c ′ is the current flowing through the capacitor and the bypass capacitor; ΔT is the simulation step size; the electrical quantities of each sub-module at the t - ΔT moment in the equivalent arm are used for simulation calculation to obtain the capacitor voltage and current of each sub-module in the arm at the t moment; the energy storage battery current I bat is calculated by the energy storage battery model in the CPU and uploaded to the FPGA; at the same time, the FPGA sends the sub-module voltage V c to the CPU, and high-speed communication between the CPU and the FPGA is carried out through the PCIE bus.

[0055] As a preferred technical solution of the present invention, in step 9, the CPU obtains the sub-module capacitor voltage N c uploaded by the FPGA, combines it with the energy storage battery voltage on the CPU, calculates the energy storage battery current I bat , and sends the energy storage battery current I bat to the FPGA; closed-loop interaction of data information of the high-voltage directly-connected energy storage battery branch and the cascaded H-bridge part is carried out between the FPGA and the CPU through the PCIE bus;

[0056] At the same time, it is considered that the simulation test of the high-voltage directly-connected energy storage system usually also includes a breaker signal and a battery SOC signal. Among them, the breaker signal is received by the FPGA optical fiber from an external controller signal and then uploaded to the energy storage branch of the CPU, and the battery SOC is sent to the FPGA and then transmitted to the external controller.

[0057] As a preferred technical solution of the present invention, the data of the sub-module voltage, current, and SOC in step 10 needs to be framed. The frame structure includes a frame synchronization header and each data packet information. Each optical fiber transmits all sub-module information of one phase, and the high-voltage directly-connected energy storage system needs three optical fibers to be connected to the external controller through an external optical port.

[0058] A device for implementing a simulation method of a high-voltage directly-connected energy storage system based on an FPGA includes a host computer for configuring parameters, an FPGA, and an optical fiber interface; the optical fiber interface is configured with 8 optical fiber interfaces for sending sub-module voltage, current, and SOC information and receiving the PWM signal and breaker signal transmitted by the external controller.

[0059] Compared with the prior art, the present invention has the following advantages:

[0060] The present invention proposes a simulation method and device for a high-voltage direct-connected energy storage system based on FPGA. The power unit of the high-voltage direct-connected energy storage system is split into an H-bridge and an energy storage unit part. The H-bridge and the grid-side topology are placed in the FPGA for simulation, and the energy storage battery branch part is simulated in the CPU. The sub-module voltage and current information are exchanged between the FPGA and the CPU through the PCIE bus, and the user is supported to customize the energy storage battery model. Combining the advantages of the real-time multi-core processor and the FPGA respectively, it is possible to achieve accurate real-time simulation of a high-voltage direct-connected energy storage system with any number of stages on the FPGA with a simulation step size of 1 us. BRIEF DESCRIPTION OF THE DRAWINGS

[0061] Figure 1 It is a flowchart of the high-voltage direct-connected energy storage modeling and simulation method of the present invention;

[0062] Figure 2 It is a schematic block diagram of the structure of the high-voltage direct-connected energy storage simulation device of the present invention;

[0063] Figure 3 It is the Thevenin equivalent model of the sub-module bypass capacitor of the high-voltage direct-connected energy storage system of the present invention;

[0064] Figure 4 It is the Thevenin equivalent model of the sub-module of the high-voltage direct-connected energy storage system of the present invention;

[0065] Figure 5 It is the Thevenin equivalent model of the bridge arm of the high-voltage direct-connected energy storage system of the present invention;

[0066] Figure 6 It is the waveform diagram of the real-time simulation result of the high-voltage direct-connected energy storage system of the present invention;

[0067] (a) Battery DC side current; (b) Cascade H-bridge capacitor voltage. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0068] The following elaborates on the preferred embodiments of the present invention in conjunction with the accompanying drawings, so that the advantages and features of the present invention can be more easily understood by those skilled in the art, thereby making the protection scope of the present invention more clearly defined.

[0069] Embodiment 1: Please refer to Figure 1 , the present invention provides a technical solution: a simulation method for a high-voltage direct-connected energy storage based on FPGA, and the specific steps are as follows:

[0070] Step 1: The host computer sets the number of module cascades N, bypass capacitor value C, initial capacitor voltage V c_initial , discharge resistance R p , IGBT on-resistance R on , IGBT off-resistance R offand parameters such as grid-side inductor L0, grid-side resistor R0, and grid-side voltage V abc are configured;

[0071] Step 11: As Figure 1 shown, the front end of the host computer connects to the device through the device IP. On the host computer, the number of module cascades N, bypass capacitance value C, initial capacitor voltage V c_initial of the high-voltage directly-connected energy storage system application model cascade sub-module, discharge resistor R p , IGBT conduction resistance R on , IGBT turn-off resistance R off and parameters such as grid-side inductor L0, grid-side resistor R0, and grid-side voltage V abc simulation step ΔT are configured;

[0072] Step 12: The back end of the host computer reads the front-end configuration information and generates a configuration file;

[0073] Step 2: The high-voltage cascade sub-module is divided into models on the DC side. As Figure 2 shown, the energy storage battery and the series inductor in front of the battery are simulated on the CPU, and the sub-module DC capacitor is equivalent to a controllable voltage source on the CPU; the H-bridge and capacitor of the sub-module are simulated with a small step on the FPGA, and the energy storage battery part is equivalent to a controllable current source on the FPGA;

[0074] Step 3: The FPGA performs Thevenin equivalent on the capacitor part of the sub-module, and the bypass capacitor C and the discharge resistor R p are equivalent to an equivalent circuit model in which the resistor R ceq is in series with the voltage source V ceq ;

[0075] Step 31: The trapezoidal integration method is used to discretize the sub-module equivalent model, and the bypass capacitor C is equivalent to a capacitor resistor R c in series with the voltage source V c0eq , as Figure 3 shown; among them, the sub-module voltage V c is expressed as follows:

[0076]

[0077] Where:

[0078] I c (t) is the capacitor current; R c is the equivalent resistance of the capacitor C; ΔT is the simulation step;

[0079] Step 32: As Figure 3 shown, the capacitor C is connected in parallel with the discharge resistor R pEquivalent to resistance R as a whole ceq Series voltage source V ceq Equivalent model of:

[0080]

[0081] Step 4: The FPGA performs Thevenin equivalent on the cascaded sub-module, and the sub-module of the H-bridge shunt controllable current source I bat is equivalent to resistance R as a whole smeq in series with voltage source V smeq to generate an equivalent circuit model, and pre-calculate the values of R smeq , terminal voltage ratio coefficient A, and battery current ratio coefficient B under different switch tube states;

[0082] Step 41: The FPGA establishes a Thevenin equivalent model for the high-voltage directly-connected energy storage system sub-module, regarding the four switch tubes S1, S2, S3, and S4 of the sub-module as variable resistors R1, R2, R3, and R4 that switch between high and low resistance values. When turned on, the resistance value is R on , and when turned off, it is R off ; The on-resistance R on and off-resistance R off are parameter configuration data;

[0083] Step 42: As Figure 4 shown, the cascaded sub-module of the H-bridge shunt energy storage unit controllable current source I bat is equivalent to resistance R smeq in series with voltage source V smeq , where:

[0084] V sm = R smeq I sm + V smeq (t - ΔT);

[0085] R emeq = R A / / (R2 / / R C ) / / (R4 / / R B );

[0086] Where:

[0087] V smeq (t - ΔT) = A * V ceq (t - ΔT)+ B * I bat ;

[0088] Where:

[0089] R smeq is the equivalent circuit resistance; Vsmeq is the equivalent voltage source of the sub-module; I bat is the battery current, which is calculated and sent by the CPU; V sm is the voltage at the sub-module terminal; A is the terminal voltage proportionality coefficient, and B is the battery current proportionality coefficient;

[0090] Step 43: Pre-calculate and generate the initial equivalent circuit parameters R of each state of the sub-module according to the cascade module parameters and various possible conduction states of the sub-module switching tubes smeq , the terminal voltage proportionality coefficient A, and the capacitor voltage proportionality coefficient B;

[0091] Step 5: The FPGA performs Thevenin equivalent on each phase arm of the high-voltage direct-connected energy storage, and equivalently represents each phase arm as a resistor R EQ in series with the voltage source V EQ series equivalent circuit model;

[0092] As Figure 5 shown, the equivalent circuits of N sub-modules in the high-voltage direct-connected energy storage bridge arm are connected in series and equivalently represented as a bridge arm resistor R EQ in series with the voltage source V EQ , and the terminal voltages V sm of each sub-module unit are summed to obtain the bridge arm terminal voltage V MV :

[0093]

[0094] Then: V MV = R EQ I sm + V EQ (t - ΔT);

[0095] Among them:

[0096] V MV is the voltage of each phase arm; R EQ is the equivalent circuit resistance; V EQ is the equivalent voltage source of the bridge arm; I sm is the bridge arm current;

[0097] Step 6: The FPGA switches the current equivalent circuit parameters R smeq , the terminal voltage proportionality coefficient A, and the battery current proportionality coefficient B of the sub-module according to the current conduction states of the sub-module switching tubes, and calculates the equivalent voltage V c of each sub-module based on the capacitor voltage V bat (t - ΔT) and the battery current I smeq at the previous moment, and then obtains the equivalent voltage V EQ of each phase arm by accumulation;

[0098] Step 61: Switch the equivalent resistance R corresponding to the sub-module according to the conduction conditions of the 4 switching tubes of the sub-module smeq and the proportionality coefficients A and B:

[0099] When switches S1 and S3 are conducting and S2 and S4 are off, switches S1 and S3 are equivalent to a small resistance R on , and switches S2 and S4 are equivalent to a large resistance R off . At this time, the equivalent circuit R smeq has a resistance value of R 1010 , A is 0, and B is 0;

[0100] When switches S1 and S4 are conducting and S2 and S3 are off, switches S1 and S4 are equivalent to a small resistance R on , and switches S2 and S3 are equivalent to a large resistance R off . The equivalent circuit R smeq has a resistance value of R 1001 , corresponding to A being K Q , and B being S Q ;

[0101] When switches S2 and S3 are conducting and S1 and S4 are off, switches S2 and S3 are equivalent to a small resistance R on , and switches S1 and S4 are equivalent to a large resistance R off . The equivalent circuit R smeq has a resistance value of R 0110 , corresponding to A being L Q , and B being T Q ;;

[0102] When switches S2 and S4 are conducting and S1 and S3 are off, switches S2 and S4 are equivalent to a small resistance R on , and switches S1 and S3 are equivalent to a large resistance R off . The equivalent circuit R smeq has a resistance value of R 0101 , corresponding to A being 0 and B being 0;

[0103] When switches S1, S2, S3, and S4 are all off, switches S1, S2, S3, and S4 are all equivalent to a large resistance R off . The equivalent circuit R smeq has a resistance value of R 0000 , corresponding to A being 0 and B being 0;

[0104] The above-mentioned R 1010 , R 1001 , R 0110 , R 0110 , R 0101 , K Q , L Q , S Q , T QThey are all pre - calculated values in advance. Here, only the corresponding values need to be selected and switched according to the on - off states of the switches of each sub - module at present.

[0105] Step 62: The FPGA selects the equivalent resistance R at the current moment smeq and the proportionality coefficients A and B, and calculates the equivalent voltage V of each cascaded sub - module according to the capacitor voltage V c (t - ΔT) and the battery current I bat at the previous moment, and then obtains the equivalent voltage V of each phase leg by cumulative summation smeq . EQ .

[0106] Step 7: The FPGA calculates the leg current I by integral according to the equivalent resistance R EQ and the equivalent voltage V EQ of each leg, as well as the grid - side voltage, grid - side inductance and other grid - side parameters sm ;

[0107] Step 8: The FPGA calculates the capacitor current I of each sub - module according to the leg current I sm and the energy - storage battery current I bat , and calculates the capacitor current I c and the capacitor voltage V c of each sub - module;

[0108]

[0109] Where: R ∑ = R1 + R2 + R3 + R4;

[0110]

[0111] V c (t)= R c ·I c (t)+ V c0eq (t - ΔT);

[0112] I bat is the energy - storage battery current, which is calculated by the energy - storage battery model in the CPU and uploaded to the FPGA; I sm is the leg current; I c is the capacitor current; I c ′ is the current flowing through the capacitor and the bypass capacitor; ΔT is the simulation step. According to the electrical quantities of each sub - module at the t - ΔT moment in the equivalent leg, the capacitor voltage and current of each sub - module in the leg at the t moment are obtained through simulation calculation; the energy - storage battery current I bat is calculated by the energy - storage battery model in the CPU and uploaded to the FPGA; at the same time, the FPGA sends the sub - module voltage V c to the CPU, and the CPU and the FPGA communicate at high speed through the PCIE bus;

[0113] Step 9: The CPU obtains the sub-module capacitor voltage V uploaded by the FPGA c , combines it with the energy storage battery voltage on the CPU, and calculates the energy storage battery current I bat , and sends the energy storage battery current I bat to the FPGA;

[0114] The CPU obtains the sub-module capacitor voltage V uploaded by the FPGA c , combines it with the energy storage battery voltage on the CPU, and calculates the energy storage battery current I bat , and sends the energy storage battery current I bat to the FPGA; There is information interaction between the CPU and the FPGA for sub-module voltage, current, SOC, circuit breaker, etc. through the PCIE bus;

[0115] Step 10: The FPGA uploads information such as sub-module voltage, current, arm voltage, and current, and the host computer can perform real-time observation on the operating state of the high-voltage direct-connected energy storage system; Data such as sub-module voltage, current, and SOC are transmitted to the energy storage controller through optical fibers; The battery information in the CPU can be transmitted to the BMS control system through optional CAN communication;

[0116] Data such as sub-module voltage, current, and SOC are transmitted to the energy storage controller through optical fibers at the optical fiber port of the simulation device. Among them, data such as sub-module voltage, current, and SOC need to be framed. The frame structure includes a frame synchronization header and information of each data packet. Each optical fiber transmits information of all sub-modules of one phase. The high-voltage direct-connected energy storage system requires three optical fibers to be connected to an external controller through an external optical port; The battery information in the CPU can be transmitted to the BMS control system through optional CAN communication;

[0117] The present invention also provides a device for a high-voltage direct-connected energy storage system based on an FPGA, including:

[0118] A host computer, used to configure parameters, including the number of module cascades N of the module cascade of the high-voltage direct-connected energy storage system application model, the bypass capacitance value C, the initial capacitor voltage V c_initial , the discharge resistance R p , the IGBT conduction resistance R on , the IGBT turn-off resistance R off , and parameter information such as the grid-side inductor L0, grid-side resistor R0, grid-side voltage V abc , and the simulation step size ΔT;

[0119] An FPGA, used to execute the simulation method of the present invention;

[0120] Optical fiber interface, configured with 8 optical fiber interfaces, used to send information such as sub-module voltage, current, and SOC, and receive PWM signals and breaker signals transmitted from an external controller.

[0121] Embodiment 2: Analysis of real-time simulation results of high-voltage direct-connected energy storage;

[0122] Taking a 48-level high-voltage direct-connected energy storage system as an example to verify the performance of the high-voltage direct-connected energy storage real-time simulator. Simulation model parameters: Three-phase grid voltage is 35 kV, rated capacity is 12500 kVA, grid frequency is 50 Hz, the number of levels of the high-voltage direct-connected energy storage system is 40, grid-side inductor parameter is 28.8 mH, capacitor parameter is 50000 uF, battery capacity is 50 Ah, rated voltage is 768 V, and DC-side inductor is 0.85 mH.

[0123] Use the high-voltage direct-connected energy storage real-time simulator provided by the present invention to simulate the above-mentioned system architecture and parameters. The high-voltage direct-connected energy storage controller is docked with the real-time simulator, and data information is exchanged between the high-voltage direct-connected energy storage controller and the real-time simulation device provided by the present invention through optical fiber to achieve the control of the high-voltage direct-connected energy storage system.

[0124] Figure 6 It includes two subgraphs. Figure 6 (a), Figure 6 (b) are respectively the battery DC-side current and the cascaded H-bridge capacitor voltage sampled by the simulator host computer. From figures (a) and (b), it can be seen that by observing the waveforms of each DC-side current and sub-module voltage, the simulator can accurately simulate the second-harmonic frequency characteristics of the battery current, as well as the ripple magnitude and equalization effect of the sub-module voltage. Therefore, the results shown by the real-time simulation method of the high-voltage direct-connected energy storage system implemented with a small step size will be more accurate.

[0125] As mentioned above, the above are only specific embodiments of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present invention can easily think of various equivalent modifications or substitutions, and these modifications or substitutions should all be covered within the protection scope of the present invention. Therefore, the protection scope of the present invention should be subject to the protection scope of the claims.

Claims

1. A simulation method for a high-voltage direct-connected energy storage system based on FPGA, characterized in that, Specifically, it includes the following steps: Step 1: The host computer configures the parameter information of the number of module cascades N, bypass capacitance value C, initial capacitor voltage V, discharge resistance R, IGBT on-resistance R, IGBT off-resistance R, grid-side inductance L0, grid-side resistance R0, grid-side voltage V, and simulation step ΔT of the module cascade sub-module of the high-voltage direct-connected energy storage system; c_initial , discharge resistance R p , IGBT on-resistance R on , IGBT off-resistance R off and grid-side inductance L0, grid-side resistance R0, grid-side voltage V abc , simulation step ΔT; Step 2: Split the model of the high-voltage cascaded sub-module on the DC side. Among them, the energy storage battery and the series inductor in front of the battery are simulated on the CPU, and the DC capacitor of the sub-module is equivalent to a controllable voltage source on the CPU; the H-bridge and capacitor of the sub-module are simulated with a small step size on the FPGA, and the energy storage battery part is equivalent to a controllable current source on the FPGA; Step 3: The FPGA performs Thevenin equivalent on the sub-module capacitor part, and the bypass capacitor C and the discharge resistor R p are equivalent to a resistor R ceq in series with a voltage source V ceq to form an equivalent circuit model; Step 4: The FPGA performs Thevenin equivalent on the cascaded sub-module, and the overall sub-module of the H-bridge parallel controllable current source I bat is equivalently a resistance R smeq in series with a voltage source V smeq to form an equivalent circuit model, and pre-calculates and generates the values of R smeq , the terminal voltage proportionality coefficient A, and the battery current proportionality coefficient B under different switch tube states; Step 5: The FPGA performs Thevenin equivalent on each phase arm of the high-voltage direct-connected energy storage, and the overall each phase arm is equivalently a resistor R EQ in series with the voltage source V EQ series equivalent circuit model; Step 6: The FPGA switches the equivalent circuit parameters R, the terminal voltage proportionality coefficient A, and the battery current proportionality coefficient B corresponding to the current sub-module according to the conduction states of the current switching transistors of the sub-module, and calculates the equivalent voltage V of each sub-module based on the capacitor voltage V(t-ΔT) and the battery current I at the previous moment. Then, the equivalent voltage V of each phase leg is obtained by accumulation; smeq and the terminal voltage proportionality coefficient A and the battery current proportionality coefficient B, and calculates the equivalent voltage V of each sub-module according to the capacitor voltage V c (t-ΔT) and the battery current I bat at the previous moment, and then calculates the equivalent voltage V of each sub-module by accumulation. Then, the equivalent voltage V of each phase leg is obtained by accumulation; smeq of each sub-module, and then obtains the equivalent voltage V of each phase leg by accumulation; EQ ; Step 7: The FPGA calculates the arm current I by integral calculation based on the equivalent resistance R of each arm EQ and the equivalent voltage V EQ , as well as the parameters of the grid-side voltage and grid-side inductance sm ; Step 8: The FPGA calculates the capacitor current I sm of each sub-module and the energy storage battery current I bat , and calculates the capacitor current I c and the capacitor voltage V c ; Step 9: The CPU obtains the sub-module capacitor voltage V uploaded by the FPGA c , combines it with the energy storage battery voltage on the CPU, and calculates the energy storage battery current I bat , and then sends the energy storage battery current I bat to the FPGA; Step 10: The FPGA uploads the information of the sub-module voltage, current, arm voltage, and current, and the host computer can observe the operating state of the high-voltage directly-connected energy storage system in real time; the data of the sub-module voltage, current, and SOC are transmitted to the energy storage controller through optical fibers; the battery information in the CPU can be optionally transmitted to the BMS control system through CAN communication.

2. The simulation method of a high-voltage direct-connected energy storage system based on FPGA according to claim 1, wherein: All the configuration information in Step 1 needs to be configured in the host computer. After configuration, the functions described in the configuration information can be realized without additional FPGA compilation; The specific steps of Step 1 are as follows: Step 11: The host computer front end connects to the device through the device IP, and configures the number of module cascades N, bypass capacitance value C, initial capacitor voltage V of the module cascade sub-module of the high-voltage direct-connected energy storage system application model on the host computer c_initial , discharge resistor R p , IGBT conduction resistance R on , IGBT turn-off resistance R off , as well as grid-side inductor L0, grid-side resistor R0, grid-side voltage V abc , simulation step size ΔT parameter information; Step 12: The host computer backend reads the front-end configuration information and generates a configuration file.

3. The simulation method of a high-voltage direct-connected energy storage system based on FPGA according to claim 1, characterized in that: The specific steps of Step 3 are as follows: Step 31: Discretize the equivalent model of the sub-module using the trapezoidal integration method, and equivalent the bypass capacitor C to a capacitance resistor R c series voltage source V c0eq ; Among them, the sub-module voltage V c The expression is as follows: Wherein: I c (t) is the capacitive current; R c is the equivalent resistance of capacitor C; ΔT is the simulation step size; Step 32: Connect the capacitor C in parallel with the discharge resistor R p The whole is equivalently regarded as a resistor R ceq connected in series with a voltage source V ceq for the equivalent model:

4. A simulation method for a high-voltage direct-connected energy storage system based on FPGA according to claim 1, characterized in that: The specific steps of Step 4 are as follows: Step 41: The FPGA establishes the Thevenin equivalent model of the high-voltage directly-connected energy storage system sub-module. The four switching tubes S1, S2, S3, and S4 of the sub-module are regarded as variable resistors R1, R2, R3, and R4 that switch between high and low resistance values. When in the on state, the resistance value is R on , and when off, it is R off ; The on-resistance R on and the off-resistance R off are parameter configuration data; Step 42: Overall equivalent of the sub-module of the controllable current source I of the H-bridge parallel energy storage unit as a resistor R bat in series with a voltage source V smeq : smeq ​ V sm = R smeq I sm + V smeq (t - ΔT); R smeq = R A / / (R2 / / R C ) / / (R4 / / R B ) ; Wherein: V smeq (t - ΔT) = A * V ceq (t - ΔT) + B * I bat ; Wherein: R smeq is the equivalent circuit resistance; V smeq is the equivalent voltage source of the sub-module; I bat is the battery current, which is calculated and sent by the CPU; V sm is the terminal voltage of the sub-module; A is the terminal voltage proportionality coefficient, and B is the battery current proportionality coefficient; Step 43: Calculate and generate the initial equivalent circuit parameters R, terminal voltage proportionality coefficient A, and capacitance voltage proportionality coefficient B in each state of the sub-module in advance according to the cascade module parameters and various conduction states of the sub-module switching tubes. smeq , terminal voltage proportionality coefficient A, and capacitance voltage proportionality coefficient B.

5. The simulation method of a high-voltage direct-connected energy storage system based on FPGA according to claim 1, characterized in that: In step 5, the equivalent circuits of N sub-modules in the high-voltage directly-connected energy storage bridge arm are connected in series and equivalent to a bridge arm resistor R EQ series voltage source V EQ of the equivalent circuit, and the terminal voltage V of each sub-module unit sm is summed to obtain the bridge arm terminal voltage V MV : Then: V MV = R EQ I sm + V EQ (t - ΔT); Wherein: V MV is the voltage of each phase leg; R EQ is the equivalent circuit resistance; V EQ is the equivalent voltage source of the leg; I sm is the leg current.

6. The simulation method of a high-voltage direct-connected energy storage system based on FPGA according to claim 1, characterized in that: In step 6, the FPGA switches to select the corresponding initialized equivalent circuit parameters R according to the conduction states of the switching transistors of the current sub-module smeq resistance value, terminal voltage proportionality coefficient A, and battery current proportionality coefficient B. Since the conduction state combinations of the 4 switching transistors of each sub-module H-bridge are different, the corresponding equivalent circuit parameters R smeq resistance value, terminal voltage proportionality coefficient A, and battery current proportionality coefficient B are also different; The FPGA selects the equivalent circuit parameters and proportionality coefficients at the current moment, and based on the capacitor voltage V c (t - ΔT) and the battery current I bat , calculates the equivalent voltage V smeq of each cascaded sub-module, and then obtains the equivalent voltage V EQ of each phase leg by cumulative summation.

7. A simulation method for a high-voltage direct-connected energy storage system based on FPGA according to claim 1, characterized in that: In step 8, the FPGA calculates the capacitor current I sm and the energy storage battery current I bat of each sub-module, and calculates the capacitor current I c (t) and the capacitor voltage V c : Wherein: R ∑ = R1 + R2 + R3 + R4; V c (t) = R c ·I c (t) + V c0eq (t - ΔT); I bat is the energy storage battery current, which is calculated by the energy storage battery model in the CPU and uploaded to the FPGA; I sm is the arm current; I c is the capacitor current; I c ′ is the current flowing through the capacitor and the bypass capacitor; ΔT is the simulation step size; the electrical quantities of each sub-module at the t - ΔT moment in the equivalent arm are used for simulation calculation to obtain the capacitor voltage and current of each sub-module in the arm at the t moment; the energy storage battery current I bat is calculated by the energy storage battery model in the CPU and uploaded to the FPGA; at the same time, the FPGA sends the sub-module voltage V c to the CPU, and the CPU and the FPGA communicate at high speed through the PCIE bus.

8. A simulation method for a high-voltage direct-connected energy storage system based on FPGA according to claim 1, characterized in that: In step 9, the CPU obtains the capacitor voltage V of the sub-module uploaded by the FPGA c , combines it with the voltage of the energy storage battery on the CPU, and calculates the energy storage battery current I bat , and sends the energy storage battery current I bat to the FPGA; the data information of the high-voltage directly-connected energy storage battery branch and the cascaded H-bridge part between the FPGA and the CPU is closed-loop interacted through the PCIE bus At the same time, considering the simulation test of the high-voltage directly-connected energy storage system also includes the breaker signal and the battery SOC signal. Among them, the breaker signal receives the external controller signal through the FPGA optical fiber and then uploads it to the energy storage branch of the CPU, and the battery SOC is sent to the FPGA and then transmitted to the external controller.

9. The simulation method of a high-voltage direct-connected energy storage system based on FPGA according to claim 1, wherein: The data of the sub-module voltage, current, and SOC in Step 10 need to be framed. The frame structure includes a frame synchronization header and information of each data packet. Each optical fiber transmits the information of all sub-modules of one phase, and the high-voltage directly-connected energy storage system needs three optical fibers to connect to the external controller through the external optical port.

10. An apparatus for implementing a simulation method of an FPGA-based high-voltage direct-connected energy storage system according to any one of claims 1-9, characterized in that: It includes a host computer, an FPGA, and an optical fiber interface for configuring parameters; the optical fiber interface is configured with 8 optical fiber interfaces for sending the sub-module voltage, current, and SOC information and receiving the PWM signal and breaker signal transmitted by the external controller.

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