Leadframe and fc-qfn packaged device

By designing the front half-etched area, the back half-etched area and vias on the lead frame, the contact area is increased and stress is released, which solves the problems of delamination between the lead frame and the plastic package and pin breakage, and improves the reliability of the packaged device.

CN119297167BActive Publication Date: 2025-10-17JIANGYIN SHENGBANG MICROELECTRONICS MFG CO LTD
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Patent Information

Application Number
CN202411323145.5
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-09-20
Publication Date
2025-10-17
Estimated Expiration
2044-09-20

AI Technical Summary

Technical Problem

The long pin design in the lead frame of existing FC-QFN packaged devices leads to high stress, causing delamination between the lead frame and the plastic package, affecting the reliability of the chip bumps. Although roughening treatment improves delamination, it increases the risk of pin breakage, resulting in lower reliability of the packaged device.

Method used

By designing the front half-etched area and the back half-etched area on the lead frame, the contact area with the plastic package is increased, and the stress is released through the vias, thereby improving the bonding strength between the lead frame and the plastic package and reducing the risk of pin breakage.

Benefits of technology

The reliability of the packaged device is improved, the delamination problem between the lead frame and the plastic package is reduced, and the risk of pin breakage is reduced.

✦ Generated by Eureka AI based on patent content.

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Abstract

Embodiments of the present disclosure provide a lead frame and an FC-QFN packaged device. The lead frame includes a first lead, a front half-etching area, a back half-etching area and a via, the first lead includes a first side, a third side and a second side connecting the first side and the third side, the front half-etching area is located on a front surface of the lead frame, a projection of the first lead on the front surface of the lead frame covers a projection of the front half-etching area on the front surface of the lead frame, a longest length of the front half-etching area in a second direction is equal to a length of the second side in the second direction, the back half-etching area is located on a back surface of the lead frame and is arranged along a side of the first lead, an inner side of the back half-etching area is in contact with the side of the first lead, and the via is located on an area of the back half-etching area opposite to the second side and penetrates through the back half-etching area. The lead frame can improve the problem of delamination with the plastic package, and can also reduce the risk of lead breakage, thereby improving the reliability of the packaged device.
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Description

TECHNICAL FIELD

[0001] Embodiments of the present disclosure relate to the technical field of semiconductor packaging, and particularly relate to a lead frame and an FC-QFN packaged device. BACKGROUND

[0002] The current lead frame of a square flat no-pin flip chip (FC-QFN) packaged device has long pins, and the design of the long pins causes a large stress in the packaging process, thereby causing delamination between the lead frame and the plastic package, which affects the Bump of the chip and causes reliability problems of the packaged device.

[0003] In the prior art, the surface metal of the lead frame is roughened to increase the bonding force between the lead frame and the plastic package, thereby improving the delamination between the lead frame and the plastic package. However, although the delamination between the lead frame and the plastic package can be improved, the risk of fracture of the long pins is increased in the packaging process, resulting in low reliability of the packaged device. SUMMARY

[0004] Embodiments of the present disclosure provide a lead frame and a QFN packaged device, which can improve the delamination problem with the plastic package and reduce the risk of pin fracture, thereby improving the reliability of the packaged device.

[0005] In a first aspect, the present disclosure provides a lead frame, comprising:

[0006] a first pin comprising a first side, a second side and a third side, the first side and the third side extending along a first direction, the second side extending along a second direction, both ends of the second side being connected to one end of the first side and one end of the third side, the second direction being perpendicular to the first direction;

[0007] a front half-etching area located on a front surface of the lead frame, a projection of the first pin on the front surface of the lead frame covering a projection of the front half-etching area on the front surface of the lead frame, a longest length of the front half-etching area in the second direction being equal to a length of the second side in the second direction;

[0008] a back half-etching area located on a back surface of the lead frame and arranged along the first side, the second side and the third side, an inner side surface of the back half-etching area being in contact with the first side, the second side and the third side;

[0009] a via located on an area opposite to the second side on the back half-etching area and penetrating the back half-etching area along a third direction, the third direction being perpendicular to both the first direction and the second direction.

[0010] In some embodiments of the present disclosure, the projection of the front half-etching region on the front surface of the lead frame does not overlap with the projection of the back half-etching region on the front surface of the lead frame.

[0011] In some embodiments of the present disclosure, the first lead pin comprises: an end portion comprising a side region of the first side surface close to the second side surface, the second side surface, and a side region of the third side surface close to the second side surface; and a connecting portion comprising a side region of the first side surface away from the second side surface and a side region of the third side surface away from the second side surface.

[0012] The back half-etching region comprises: a first back half-etching region, an inner side surface of the first back half-etching region being in contact with a side surface of the end portion.

[0013] The front half-etching region comprises: a first front half-etching region, located on the front surface of the connecting portion, a length of the first front half-etching region in the second direction being equal to a length of the second side surface in the second direction.

[0014] In some embodiments of the present disclosure, the front half-etching region further comprises: a second front half-etching region, located on the front surface of the connecting portion, the second front half-etching region being away from the second side surface from a side of the first front half-etching region, a length of the second front half-etching region in the second direction being less than the length of the second side surface in the second direction.

[0015] The back half-etching region further comprises: a second back half-etching region, isolated from the first back half-etching region, an inner side surface of the second back half-etching region being in contact with a side surface of the connecting portion, a projection of the first lead pin on the front surface of the lead frame between the first back half-etching region and the second back half-etching region covering the projection of the first front half-etching region on the front surface of the lead frame without overlapping.

[0016] In some embodiments of the present disclosure, the number of the second back half-etching regions is equal to the number of the first front half-etching regions; when both the number of the second back half-etching regions and the number of the first front half-etching regions are plural, a projection of the first lead pin on the front surface of the lead frame between two adjacent second back half-etching regions covers the projection of the first front half-etching region on the front surface of the lead frame without overlapping.

[0017] In some embodiments of the present disclosure, the back half-etching region comprises: a third back half-etching region, being a region between an outer side surface of the back half-etching region facing the second side surface and a plane in which the second side surface is located.

[0018] The length of the third backside semi-etching area in the first direction is greater than or equal to 0.52 mm and less than or equal to 0.54 mm, and the length of the third backside semi-etching area in the second direction is greater than or equal to 0.52 mm and less than or equal to 0.54 mm.

[0019] The via is located in a central region of the third backside semi-etching area, and a diameter of the via is greater than or equal to 0.15 mm and less than or equal to 0.2 mm.

[0020] In some embodiments of the present disclosure, the maximum distance between the first side and the third side and the outer side of the nearest backside semi-etching area is greater than 0.12 mm and less than or equal to 0.15 mm.

[0021] In some embodiments of the present disclosure, the lead frame further comprises:

[0022] a plurality of second pins, the length of each second pin in the second direction is less than the length of the first pin in the first direction, each second pin comprises a fourth side, a fifth side and a sixth side, the fourth side and the sixth side extend along the second direction, and two ends of the fifth side are connected to one end of the fourth side and one end of the sixth side;

[0023] The backside semi-etching area corresponding to the first pin comprises a first region and a second region, the first region is a part of the backside semi-etching area directly opposite to the backside semi-etching area corresponding to the second pin, and the second region is a region of the backside semi-etching area corresponding to the second pin other than the first region;

[0024] The length of the first region in the second direction is less than the length of the second region in the second direction, so that the minimum distance between the outer side of the backside semi-etching area corresponding to the second pin and the outer side of the nearest backside semi-etching area corresponding to the first pin is greater than or equal to a preset distance.

[0025] In a second aspect, the present disclosure provides an FC-QFN packaged device comprising any lead frame provided in the first aspect.

[0026] In some embodiments of the present disclosure, the FC-QFN packaged device further comprises:

[0027] a chip, one side surface of the chip provided with bumps is arranged opposite to the front surface of the lead frame, and a part of the bumps are welded to a region of the front surface of the first pin other than the front surface semi-etching area;

[0028] a plastic encapsulation, filling the front surface semi-etching area, the backside semi-etching area and the via;

[0029] An electroplated layer is disposed on the back surface of the first pin.

[0030] In the technical solution of the embodiments of the present disclosure, the packaging device includes a first pin, a front surface semi-etching area, a back surface semi-etching area, and a via. The first pin includes a first side surface extending along a first direction, a third side surface extending along the first direction, and a second side surface extending along a second direction. Two ends of the second side surface are connected to one end of the first side surface and one end of the third side surface. The front surface semi-etching area is located on the front surface of the lead frame. The projection of the first pin on the front surface of the lead frame covers the projection of the front surface semi-etching area on the front surface of the lead frame. The longest length of the front surface semi-etching area in the second direction is equal to the length of the second side surface in the second direction. The back surface semi-etching area is located on the back surface of the lead frame and is arranged along the first side surface, the second side surface, and the third side surface. The inner side surface of the back surface semi-etching area is in contact with the first side surface, the second side surface, and the third side surface. The via is located on the region opposite to the second side surface of the back surface semi-etching area and penetrates the back surface semi-etching area along a third direction. In this way, the length of the front surface semi-etching area in the second direction and the length of the back surface semi-etching area in the first direction are increased, the area of the front surface semi-etching area and the back surface semi-etching area is increased, the contact area between the lead frame and the plastic package is increased, the bonding force between the lead frame and the plastic package is increased, the delamination between the lead frame and the plastic package is improved, the stress can be released through the via, the risk of pin breakage is reduced, and the reliability of the packaging device is improved.

[0031] The above description is only a summary of the technical solutions of the embodiments of the present application. In order to more clearly understand the technical means of the embodiments of the present application, the embodiments of the present application can be implemented according to the content of the description, and in order to make the above and other purposes, characteristics and advantages of the embodiments of the present application more obvious and easy to understand, the following specific embodiments of the present application are described. BRIEF DESCRIPTION OF DRAWINGS

[0032] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following will briefly introduce the drawings needed in the embodiment description. Obviously, the drawings in the following description are some embodiments of the present application, and other drawings can also be obtained by those skilled in the art without creating laborious work.

[0033] Figure 1 A structural schematic diagram of a lead frame provided by the prior art.

[0034] Figure 2 A top view structural schematic diagram of a lead frame provided by the embodiments of the present disclosure.

[0035] Figure 3 A Figure 2 A sectional structural schematic diagram of the lead frame shown along the sectional line AA'.

[0036] Figure 4 Another top view structural schematic diagram of a lead frame provided by an embodiment of the present disclosure.

[0037] Figure 5 A structural schematic diagram of an FC-QFN packaged device provided by an embodiment of the present disclosure.

[0038] Figures 6A-6D A preparation process schematic diagram of an FC-QFN packaged device provided by an embodiment of the present disclosure. DETAILED DESCRIPTION

[0039] In order to make the purpose, technical solutions and advantages of the embodiments of the present disclosure clearer, the technical solutions of the embodiments of the present disclosure will be described clearly and completely below with reference to the drawings. Obviously, the described embodiments are part of the embodiments of the present disclosure, rather than all the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by a person skilled in the art without any inventive effort are also within the scope of protection of the present disclosure.

[0040] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this present disclosure belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the specification and relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein. As used herein, the statement that two or more parts are "connected" together shall mean that the parts are joined directly or through one or more intermediate parts.

[0041] Reference in the specification to "an embodiment" or "the embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the application. The appearances of the phrase "in an embodiment" or "in the embodiment" in various places in the specification are not necessarily all referring to the same embodiment, nor are they necessarily mutually exclusive of one another. A person of ordinary skill in the art will understand that the embodiments described herein can be combined with one another.

[0042] In addition, the terms "first", "second", and the like in the description and claims of the present disclosure or the above drawings are used to distinguish different objects, and are not used to describe a particular order, and can explicitly or implicitly include one or more of the features.

[0043] The term "and / or", in the present disclosure, merely describes an association relationship of associated objects, and can represent three relationships, for example, A and / or B can represent three cases of existence of A, existence of A and B, and existence of B. In addition, the character " / " herein generally represents an "or" relationship between the front and rear associated objects.

[0044] In the description of the present disclosure, unless otherwise specified, the meanings of "a plurality of" and "at least two" are two or more (including two), and similarly, "a plurality of groups" and "at least two groups" mean two groups or more (including two groups).

[0045] In order for those skilled in the art to better understand the scheme of the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below in combination with the drawings.

[0046] Figure 1 A structure diagram of a lead frame provided by the prior art is shown in Figure 1 The lead frame includes a plurality of lead frame units, and each lead frame unit includes a long pin 10, a plurality of short pins 20, a plurality of first half-etching areas 30, and a plurality of second half-etching areas 40.

[0047] The length of the long pin 10 is greater than the length of the short pin 20, and the plurality of short pins 20 are symmetrically distributed on both sides of the symmetry axis of the long pin 10. The front surface of the long pin 10 and the front surface of each short pin 20 are provided with the first half-etching area 30, and the second half-etching area 40 is arranged along the side surface where the long side of the long pin 10 is located and the side surface where the short side of the long pin 10 is located, and the inner side surface of the second half-etching area 40 is in contact with the side surface where the long side of the long pin 10 is located and the side surface where the short side of the long pin 10 is located. The side surface of the region near the side of each short pin 20 close to the long pin 10 is provided with the second half-etching area 40, and the inner side surface of the second half-etching area 40 is in contact with the side surface of the short pin 20.

[0048] For example, during packaging, the long pin 10 will generate a larger stress due to its longer length, causing delamination between the lead frame and the plastic package, and after delamination, the reliability of the chip Bump will be affected, and then the reliability of the packaged device will be affected.

[0049] Generally, the surface metal of the lead frame can be roughened to increase the contact area between the lead frame and the plastic package, thereby increasing the bonding force between the lead frame and the plastic package. The increased bonding force can offset part of the stress generated by the long pin during packaging to improve the delamination problem between the lead frame and the plastic package. However, with the increase of the bonding force between the lead frame and the plastic package, the risk of long pin fracture during packaging will increase, resulting in low reliability of the packaged device.

[0050] To solve the above problems, the technical scheme of the present disclosure is provided as follows.

[0051] The technical scheme of the present disclosure will be described in detail below with reference to several specific embodiments.

[0052] Figure 2 A top view structural schematic diagram of the lead frame provided by the present disclosure is shown in Figure 2 The lead frame 100 includes a first lead 110, a front half-etching area 120, a back half-etching area 130, and a via 140.

[0053] The first lead 110 includes a first side 111, a second side 112, and a third side 113. The first side 111 and the third side 113 extend along a first direction, and the second side 112 extends along a second direction. The two ends of the second side 112 are connected to one end of the first side 111 and one end of the third side 113. The second direction is perpendicular to the first direction.

[0054] For example, as shown in Figure 2 The lead frame 100 includes a plurality of leads, some of which are relatively long, and some of which are relatively short. The relatively long leads are defined as long leads, i.e., the first lead 110. The relatively short leads are defined as short leads. Therefore, the lead frame 100 includes a plurality of first leads 110 and a plurality of short leads.

[0055] The short pins are symmetrically distributed on both sides of the symmetry axis of the first pin 110. The short pins facing the first side 111 and the third side 113 are the second pins 150. The second pins 150 are arranged along the first direction, and the length of the second pins 150 in the second direction is less than the length of the first pin 110 in the first direction. The short pins facing the second side 112 are the third pins 160. The third pins 160 are arranged along the second direction, and the length of the third pins 160 in the first direction is less than the length of the first pin 110 in the first direction.

[0056] Each second pin 150 includes a fourth side surface 151, a fifth side surface 152 and a sixth side surface 153. The fourth side surface 151 and the sixth side surface 153 extend along the second direction. The two ends of the fifth side surface 152 are connected to one end of the fourth side surface 151 and one end of the sixth side surface 153. The fifth side surfaces 152 of some second pins 150 face the plane where the first side surface 111 is located, and the fifth side surfaces 152 of some second pins 150 face the plane where the third side surface 113 is located.

[0057] Each third pin 160 includes a seventh side surface 161, an eighth side surface 162 and a ninth side surface 163. The seventh side surface 161 and the ninth side surface 163 extend along the first direction. The two ends of the eighth side surface 162 connect one end of the seventh side surface 161 and one end of the ninth side surface 163. The eighth side surface 162 faces the plane where the second side surface 112 is located.

[0058] Exemplarily, the first direction is the Y direction, the second direction is the X direction, and the third direction is the Z direction. The plane where the first side surface 111 and the third side surface 113 are located is parallel to the YZ plane, the plane where the second side surface 112 is located is parallel to the XZ plane, and the length of the first side surface 111 and the third side surface 113 in the Y direction is greater than the length of the second side surface 112 in the X direction.

[0059] The plane where the fourth side surface 151 and the sixth side surface 153 lie is parallel to the XZ plane. The lengths of the fourth side surface 151 and the sixth side surface 153 in the X direction are greater than the length of the fifth side surface 152 in the Y direction. The fifth side surface 152 is a curved surface and / or a flat surface. If the fifth side surface 152 is a flat surface, then the fifth side surface 152 is parallel to the YZ plane.

[0060] The plane where the seventh side surface 161 and the ninth side surface 163 lie is parallel to the YZ plane. The lengths of the seventh side surface 161 and the ninth side surface 163 in the Y direction are greater than the length of the eighth side surface 162 in the X direction. The eighth side surface 162 is a curved surface and / or a flat surface. If the eighth side surface 162 is a flat surface, then the eighth side surface 162 is parallel to the XZ plane.

[0061] In other implementations, the first direction may be the X direction and the second direction may be the Y direction. The present disclosure does not impose any specific limitation on this. The embodiments of the present disclosure are only illustrative with the first direction being the Y direction and the second direction being the X direction as an example.

[0062] The front half-etched area 120 is located on the front of the lead frame 100, the projection of the first pin 110 on the front of the lead frame 100 covers the projection of the front half-etched area 120 on the front of the lead frame 100, and the longest length of the front half-etched area 120 in the second direction is equal to the length of the second side surface 112 in the second direction.

[0063] For example, Figure 2 As shown, the front of the first pin 110, the front of the second pin 150 and the front of the third pin 160 are all provided with a front half-etched area 120, the projection of the first pin 110 on the front of the lead frame 100 covers the projection of the front half-etched area 120 of the first pin 110 on the front of the lead frame 100, the projection of the second pin 150 on the front of the lead frame 100 covers the projection of the front half-etched area 120 of the second pin 150 on the front of the lead frame 100, and the projection of the third pin 160 on the front of the lead frame 100 covers the projection of the front half-etched area 120 of the third pin 160 on the front of the lead frame 100.

[0064] In which, the front half-etched area 120 on the front of the first pin 110 includes a first front half-etched area 121 and a second front half-etched area 122 distributed along the Y direction, wherein the length of the first front half-etched area 121 in the X direction is equal to the length of the second side surface 112 in the X direction, and the length of the second front half-etched area 122 in the X direction is less than the length of the second side surface 112 in the X direction.

[0065] In this way, by increasing the length of the front half-etched area 120 in the second direction, the area of ​​the front half-etched area 120 can be increased, thereby increasing the contact area between the lead frame 100 and the plastic package, which can increase the bonding force between the lead frame 100 and the plastic package, improve the problem of delamination between the lead frame 100 and the plastic package, and improve the reliability of the packaged device.

[0066] The back half-etched area 130 is located on the back side of the lead frame 100 , and is arranged along the first side 111 , the second side 112 and the third side 113 . The inner side of the back half-etched area 130 contacts the first side 111 , the second side 112 and the third side 113 .

[0067] Exemplarily, a back side half-etched area 130 corresponding to the first pin 110 is set along the first side 111, the second side 112 and the third side 113, a back side half-etched area 130 corresponding to the second pin 150 is set along the fourth side 151, the fifth side 152 and the sixth side 153, and a back side half-etched area 130 corresponding to the third pin 160 is set along the seventh side 161, the eighth side 162 and the ninth side 163.

[0068] The maximum distance between the first side surface 111 and the nearest outer side surface of the back half-etched area 130 is greater than 0.12 mm and less than or equal to 0.15 mm. The maximum distance between the third side surface 113 and the nearest outer side surface of the back half-etched area 130 is greater than 0.12 mm and less than or equal to 0.15 mm.

[0069] like Figure 2 As shown, the back side half-etched area 130 corresponding to the first pin 110 includes a first outer side surface 1311 and a second outer side surface 1312. The outer side surfaces of the back side half-etched area 130 closest to the first side surface 111 are the first outer side surface 1311 and the second outer side surface 1312. The distance between the first side surface 111 and the first outer side surface 1311 is smaller than the distance between the first side surface 111 and the second outer side surface 1312. The distance between the first side surface 111 and the second outer side surface 1312 is the maximum distance between the first side surface 111 and the outer side surface of the nearest back side half-etched area 130, and the maximum distance can be any value between 0.12 mm and 0.15 mm.

[0070] The back half-etched area 130 corresponding to the first pin 110 also includes a third outer side surface and a fourth outer side surface. The outer side surfaces of the back half-etched area 130 closest to the third side surface 113 are the third outer side surface and the fourth outer side surface. The distance between the third side surface 113 and the third outer side surface is less than the distance between the third side surface 113 and the fourth outer side surface. The distance between the third side surface 113 and the fourth outer side surface is the maximum distance between the third side surface 113 and the outer side surface of the nearest back half-etched area 130, and the maximum distance can be any value between 0.12 mm and 0.15 mm.

[0071] Since the distance between the first side surface 111 and the third side surface 113 and the outer side surface of the nearest back half-etched area 130 in the existing design is less than 0.12 mm, the embodiment provided in the present disclosure increases the length of the back half-etched area 130 in the second direction compared to the existing design.

[0072] Therefore, by increasing the length of the backside semi-etching area 130 in the second direction, the area of the backside semi-etching area 130 can be increased, thereby increasing the contact area between the lead frame 100 and the plastic package, and the bonding force between the lead frame 100 and the plastic package can be increased, the delamination between the lead frame 100 and the plastic package can be improved, and the reliability of the packaged device can be improved.

[0073] The via 140 is located in the area of the backside semi-etching area 130 opposite to the second side surface 112, and the via 140 penetrates the backside semi-etching area 130 in the third direction.

[0074] Exemplarily, Figure 3 For Figure 2 The cross-sectional structure of the lead frame shown in the cross-sectional view along the cross-sectional line AA' is schematically shown in combination with Figure 2 And Figure 3 As shown, the backside semi-etching area 130 corresponding to the first lead pin 110 includes a third backside semi-etching area 133, which is the area between the outer side surface of the backside semi-etching area 130 opposite to the second side surface 112 and the plane where the second side surface 112 is located. The via 140 penetrates the backside semi-etching area 130 in the Z direction, for example, the diameter of the via 140 can be generally set to be greater than or equal to 0.15 mm and less than or equal to 0.2 mm.

[0075] Therefore, in order to leave enough third backside semi-etching area 133 to set the via 140 penetrating the backside semi-etching area 130, it is necessary to increase the length of the backside semi-etching area 130 in the first direction, and by increasing the length of the backside semi-etching area 130 in the first direction, the area of the backside semi-etching area 130 can be increased, thereby increasing the contact area between the lead frame 100 and the plastic package, and the bonding force between the lead frame 100 and the plastic package can be increased, the delamination between the lead frame 100 and the plastic package can be improved, and the reliability of the packaged device can be improved. In addition, the stress can be released through the via 140, and the risk of lead pin breakage can be reduced to improve the reliability of the packaged device.

[0076] In some embodiments, the via 140 is arranged in the central area of the third backside semi-etching area 133, so as to facilitate stress release balance and reduce the risk of lead pin breakage, thereby further improving the reliability of the packaged device.

[0077] In some embodiments, considering the limitation of the minimum distance between the edge of the via 140 and the edge of the nearest third backside semi-etching area 133, the length s1 of the third backside semi-etching area 133 in the Y direction satisfies: 0.52 mm≤s1≤0.54 mm, and the length s2 of the third backside semi-etching area 133 in the X direction satisfies: 0.52 mm≤s2≤0.54 mm.

[0078] In this way, the third backside semi-etching area 133 has a larger length in the first direction and a larger length in the second direction, which increases the length of the backside semi-etching area 130 in the first direction and the second direction, i.e., increases the area of the backside semi-etching area 130, thereby increasing the contact area between the lead frame 100 and the plastic package, which can increase the bonding force between the lead frame 100 and the plastic package, improve the delamination between the lead frame 100 and the plastic package, and improve the reliability of the packaged device.

[0079] In some embodiments, the projection of the front side semi-etching area 120 on the front side of the lead frame 100 does not overlap with the projection of the backside semi-etching area 130 on the front side of the lead frame 100.

[0080] For example, continuing to refer to Figure 2 The first lead 110 includes an end portion 110a and a connecting portion 110b. The end portion 110a includes a side region of the first side 111 close to the second side 112, the second side 112, and a side region of the third side 113 close to the second side 112. The connecting portion 110b includes a side region of the first side 111 away from the second side 112 and a side region of the third side 113 away from the second side 112.

[0081] The first front side semi-etching area 121 is located on the front side of the connecting portion 110b, and thus the first front side semi-etching area 121 connects the side region of the first side 111 away from the second side 112 and the side region of the third side 113 away from the second side 112. The backside semi-etching area 130 includes a first backside semi-etching area 131, and the inner side of the first backside semi-etching area 131 is in contact with the side of the end portion 110a, and thus the first backside semi-etching area 131 connects the side region of the first side 111 close to the second side 112 and the side region of the third side 113 close to the second side 112.

[0082] The projection of the first front side semi-etching area 121 on the front side of the lead frame 100 does not overlap with the projection of the first backside semi-etching area 131 on the front side of the lead frame 100, which can avoid the appearance of through holes and through gaps between the front side semi-etching area 120 and the backside semi-etching area 130, and these through holes and through gaps can combine with the plastic package during the packaging process to affect the reliability of the packaged device. In this way, the embodiments provided by the present disclosure can avoid the reliability problems caused by the combination of through holes and through gaps with the plastic package, thereby improving the reliability of the packaged device.

[0083] In some embodiments, continuing to refer to Figure 2The front-side semi-etching area 120 includes a second front-side semi-etching area 122, which is located on the side of the connecting part 110b away from the second side 112 and on the side of the first front-side semi-etching area 121 of the front side. The second back-side semi-etching area 132 also connects the side area of the first side 111 away from the second side 112 and the side area of the third side 113 away from the second side 112.

[0084] In this way, by increasing the number of the front-side semi-etching areas 120, the area of the front-side semi-etching areas 120 can be increased, thereby increasing the contact area between the lead frame 100 and the plastic package, improving the bonding force between the lead frame 100 and the plastic package, and improving the delamination between the lead frame 100 and the plastic package, so as to improve the reliability of the packaged device.

[0085] For example, continuing to refer to Figure 2 The back-side semi-etching area 130 also includes a second back-side semi-etching area 132, which is isolated from the first back-side semi-etching area 131. The inner side of the second back-side semi-etching area 132 is in contact with the side of the connecting part 110b. The second back-side semi-etching area 132 connects the side area of the first side 111 away from the second side 112 and the side area of the third side 113 away from the second side 112.

[0086] The projection of the first pin 110 between the second back-side semi-etching area 132 and the first back-side semi-etching area 131 on the front side of the lead frame 100 covers the projection of the first front-side semi-etching area 121 on the front side of the lead frame 100 and does not overlap. The three areas on the first side 111 connected with the first front-side semi-etching area 121, the first back-side semi-etching area 131, and the second back-side semi-etching area 132 are different and isolated areas. The three areas on the third side 113 connected with the first front-side semi-etching area 121, the first back-side semi-etching area 131, and the second back-side semi-etching area 132 are different and isolated areas.

[0087] In this way, the projection of the first front-side semi-etching area 121 on the front side of the lead frame 100 and the projection of the second back-side semi-etching area 132 on the front side of the lead frame 100 do not overlap, which can avoid the through holes and through gaps in the area between the front-side semi-etching area 120 and the back-side semi-etching area 130, thereby improving the reliability of the packaged device.

[0088] In some embodiments, the front-side semi-etching area 120 includes one first front-side semi-etching area 121, and the back-side semi-etching area 130 includes one second back-side semi-etching area 132, as shown in Figure 2

[0089] In other embodiments, Figure 4 Another schematic diagram of the top view structure of the lead frame provided by the embodiments of the present disclosure is shown in FIG. 6.​Figure 4 As shown, the front half-etched area 120 includes a plurality of first front half-etched areas 121 , and the back half-etched area 130 includes a plurality of second back half-etched areas 132 , and the number of the second back half-etched areas 132 is equal to the number of the first front half-etched areas 121 .

[0090] The projection of the first lead 110 between two adjacent second back half-etched areas 132 on the front surface of the lead frame 100 covers the projection of the first front half-etched area 121 on the front surface of the lead frame 100 and does not overlap.

[0091] For example, Figure 4 As shown, the front half-etched region 120 includes a first front half-etched region 1211 and a first front half-etched region 1212 , and the back half-etched region 130 includes a second back half-etched region 1321 and a second back half-etched region 1322 .

[0092] Among them, the projection of the first pin 110 between the second back side half-etched area 1321 and the second back side half-etched area 1322 on the front side of the lead frame 100 covers the projection of the first front side half-etched area 1211 on the front side of the lead frame 100 and does not overlap. Then, the three areas on the first side 111 connected to the first front side half-etched area 1211, the second back side half-etched area 1321 and the second back side half-etched area 1322 are different and isolated areas, and the three areas on the third side 113 connected to the first front side half-etched area 1211, the second back side half-etched area 1321 and the second back side half-etched area 1322 are different and isolated areas.

[0093] It should be noted that Figure 4 The number of the second back side half-etched areas 132 and the number of the first front side half-etched areas 121 are illustrated by taking two as an example. In actual applications, the number of the second back side half-etched areas 132 and the number of the first front side half-etched areas 121 can also be three or more. The present disclosure does not impose specific restrictions on this, and only limits the number of the second back side half-etched areas 132 to be equal to the number of the first front side half-etched areas 121.

[0094] In this way, the projections of the multiple first front half-etched areas 121 on the front of the lead frame 100 and the projections of the second back half-etched areas 132 on the front of the lead frame 100 do not overlap, which can avoid the appearance of through holes and through gaps in the area between the front half-etched area 120 and the back half-etched area 130, and can improve the reliability of the packaged device.

[0095] In some embodiments, see Figure 4The back surface semi-etching area 130 corresponding to the first pin 110 includes a first area 130a and a second area 130b. The first area 130a is a back surface semi-etching area 130 directly opposite to the back surface semi-etching area 130 corresponding to the second pin 150. The second area 130b is an area of the back surface semi-etching area 130 corresponding to the second pin 150 other than the first area 130a.

[0096] The length of the first area 130a in the second direction is less than the length of the second area 130b in the second direction, so that the minimum distance between the outer side of the back surface semi-etching area 130 corresponding to the second pin 150 and the outer side of the nearest back surface semi-etching area 130 corresponding to the first pin 110 is greater than or equal to the preset distance.

[0097] For example, as shown in FIG. 1, the back surface semi-etching area 130 corresponding to each second pin 150 extends in the direction close to the first pin 110. When the minimum distance between the outer side of the back surface semi-etching area 130 corresponding to the second pin 150 and the outer side of the nearest back surface semi-etching area 130 corresponding to the first pin 110 is less than the preset distance, that is, the distance between the metal edges of adjacent pins is less than the preset distance, the reliability of the packaged device is reduced due to the too small distance between the metal edges of adjacent pins. Figure 4

[0098] In the embodiments of the present disclosure, by setting the length of the first area 130a in the X direction to be less than the length of the second area 130b in the X direction, the distance between the outer side of the first area 130a and the outer side of the nearest back surface semi-etching area 130 corresponding to the second pin 150 can be increased, thereby increasing the minimum distance between the outer side of the back surface semi-etching area 130 corresponding to the second pin 150 and the outer side of the nearest back surface semi-etching area 130 corresponding to the first pin 110. The minimum distance between the outer side of the back surface semi-etching area 130 corresponding to the second pin 150 and the outer side of the nearest back surface semi-etching area 130 corresponding to the first pin 110 is greater than or equal to the preset distance, thereby improving the reliability of the packaged device.

[0099] The embodiments of the present disclosure also provide an FC-QFN packaged device including the lead frame 100 provided by any of the above embodiments.

[0100] Figure 5 A structure schematic diagram of an FC-QFN packaged device provided by the embodiments of the present disclosure is shown in FIG. 2. The FC-QFN packaged device 200 includes a lead frame 100, a chip 210, a plastic package 220, and a plating layer 230. Figure 5

[0101] ​​Exemplarily, one side surface of the chip 210 is provided with a bump 211 which is arranged opposite to the front side of the lead frame 100, part of the bump 211 is welded to the area outside the front half-etched area of ​​the first pin, the plastic package 220 fills the front half-etched area, the back half-etched area and the via, and the electroplating layer 230 is arranged on the back side of the first pin.

[0102] Figures 6A-6D A schematic diagram of the preparation process of a FC-QFN packaged device provided in an embodiment of the present disclosure is shown in FIG. Figure 6A As shown, first, a lead frame 100 is provided, and a film is attached to the back side of the lead frame 100 .

[0103] Next, place the chip 210 with the bump 211 on one side facing the front of the lead frame 100, and solder the bump 211 to the front of the first pin so that the bump 211 is located outside the half-etched area on the front. Figure 6B shown.

[0104] Then, the plastic packaging material is injected to fill the front half-etched area, the back half-etched area and the via hole, and after solidification, a plastic packaging body 220 covering the chip 210 and higher than the chip 210 is formed. Figure 6C shown.

[0105] Then, the film on the back side of the lead frame 100 is torn off, as shown in FIG. Figure 6D As shown, tin is electroplated on the back of the first pin to form an electroplating layer 230, as shown Figure 5 shown.

[0106] The FC-QFN package device 200 provided in the embodiment of the present disclosure includes the lead frame 100 provided in any of the above embodiments, and has the same functional modules and beneficial effects as the lead frame 100, which will not be repeated here.

[0107] Unless the context clearly indicates otherwise, as used herein and in the appended claims, the singular includes the plural, and vice versa. Thus, when referring to the singular, the plural of the corresponding term is generally included. Similarly, the words "include" and "comprising" are to be interpreted as inclusive rather than exclusive. Likewise, the terms "include" and "or" should be interpreted as inclusive unless such interpretation is expressly prohibited herein. Where the term "example" is used herein, particularly when it follows a group of terms, the "example" is merely exemplary and illustrative and should not be considered exclusive or comprehensive.

[0108] Further aspects and ranges of adaptation become apparent from the description provided herein. It should be understood that various aspects of the application can be implemented alone or in combination with one or more other aspects. It should also be understood that the description and specific examples herein are intended to be illustrative only and are not intended to limit the scope of the present application.

[0109] The above detailed description of several embodiments of the disclosure has been presented for the purposes of illustration and description. It is apparent to those skilled in the art that various modifications and variations can be made to the embodiments of the disclosure without departing from the spirit and scope of the disclosure. The scope of protection of the disclosure is defined by the appended claims.

Claims

1. A lead frame, characterized in that: include: A first pin includes a first side surface, a second side surface, and a third side surface, wherein the first side surface and the third side surface extend along a first direction, the second side surface extends along a second direction, two ends of the second side surface connect one end of the first side surface and one end of the third side surface, and the second direction is perpendicular to the first direction; a front half-etched area, located on the front side of the lead frame, wherein the projection of the first lead on the front side of the lead frame covers the projection of the front half-etched area on the front side of the lead frame, and the longest length of the front half-etched area in the second direction is equal to the length of the second side surface in the second direction; a back half-etched area, located on the back side of the lead frame, arranged along the first side surface, the second side surface, and the third side surface, wherein an inner side surface of the back half-etched area contacts the first side surface, the second side surface, and the third side surface; a projection of the back half-etched area on the front side of the lead frame does not overlap with a projection of the front half-etched area on the front side of the lead frame; a via hole located in a region of the back half-etched region directly opposite to the second side surface, and penetrating the back half-etched region along a third direction, wherein the third direction is perpendicular to both the first direction and the second direction; Wherein, the first pin includes: an end portion, comprising a side region of the first side surface close to the second side surface, the second side surface, and a side region of the third side surface close to the second side surface; a connecting portion, comprising a side region of the first side away from the second side and a side region of the third side away from the second side; The back side half-etched area comprises: a first back side half-etched region, wherein an inner side surface of the first back side half-etched region contacts a side surface of the end portion; a second back side half-etched area, isolated from the first back side half-etched area, an inner side surface of the second back side half-etched area in contact with a side surface of the connecting portion, and a projection of the first lead between the second back side half-etched area and the first back side half-etched area on the front side of the lead frame covering a projection of the first front side half-etched area on the front side of the lead frame without overlapping; The front half-etched area includes: The first front half-etched area is located on the front side of the connecting portion, and the length of the first front half-etched area in the second direction is equal to the length of the second side surface in the second direction; The second front half-etched area is located on the front side of the connecting portion and away from the second side surface of the first front half-etched area. The length of the second front half-etched area in the second direction is smaller than the length of the second side surface in the second direction.

2. The lead frame according to claim 1, wherein: The number of the second back side half-etched areas is equal to the number of the first front side half-etched areas; When the number of the second back side half-etched areas and the number of the first front side half-etched areas are both multiple, the projection of the first pin between two adjacent second back side half-etched areas on the front side of the lead frame covers the projection of the first front side half-etched area on the front side of the lead frame and does not overlap.

3. The lead frame according to claim 1, wherein: The back side half-etched area comprises: a third back side half-etched area, which is an area between an outer side surface of the back side half-etched area facing the second side surface and a plane where the second side surface is located; The length of the third back half-etched area in the first direction is greater than or equal to 0.52 mm and less than or equal to 0.54 mm, and the length of the third back half-etched area in the second direction is greater than or equal to 0.52 mm and less than or equal to 0.54 mm; The via hole is located in a central area of ​​the third back side half-etched area, and a diameter of the via hole is greater than or equal to 0.15 mm and less than or equal to 0.2 mm.

4. The lead frame according to claim 1, wherein A maximum distance between the first side surface and the third side surface and an outer side surface of the nearest back half-etched region is greater than 0.12 mm and less than or equal to 0.15 mm.

5. The lead frame according to claim 1, wherein The lead frame further includes: a plurality of second pins, each having a length in the second direction that is shorter than a length of the first pin in the first direction, each second pin including a fourth side surface, a fifth side surface, and a sixth side surface, the fourth side surface and the sixth side surface extending along the second direction, and two ends of the fifth side surface connecting one end of the fourth side surface and one end of the sixth side surface; The back half-etched area corresponding to the first pin includes a first area and a second area, the first area being the back half-etched area directly opposite to a portion of the back half-etched area corresponding to the second pin, and the second area being an area outside the first area of ​​the back half-etched area corresponding to the second pin; In which, the length of the first area in the second direction is smaller than the length of the second area in the second direction, so that the minimum distance between the outer side surface of the back half-etched area corresponding to the second pin and the outer side surface of the back half-etched area corresponding to the nearest first pin is greater than or equal to a preset distance.

6. An FC-QFN packaged device, characterized in that: The lead frame comprises the lead frame according to any one of claims 1 to 5.

7. The FC-QFN packaged device according to claim 6, characterized in that: The FC-QFN package device further includes: A chip, wherein a surface of one side provided with bumps is arranged opposite to the front surface of the lead frame, and a portion of the bumps is welded to an area outside the front half-etched area of ​​the front surface of the first pin; A plastic package body, filling the front half-etched area, the back half-etched area and the via hole; The electroplating layer is arranged on the back side of the first pin.

Citation Information

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