Frequency synthesizer

Abstract

The invention discloses a frequency synthesizer, and relates to the technical field of communication hardware. The frequency synthesizer comprises a six-layer substrate and a plurality of elements, layout and wiring are reasonably performed in the six-layer substrate, the elements are placed in a limited space, then a coplanar waveguide transmission line model is adopted for a loop filter part, and shielding holes are selected to be added to the position away from the metal edge to reduce return loss and insertion loss. According to the frequency synthesizer, the return loss reaches-30dB or below, the insertion loss is lower than 0.05 dB, a bonding pad and a through hole are adopted for connection aiming at an output high-frequency signal line, a metal column type quasi-coaxial structure and a shielding hole are added to optimize the return loss and the insertion loss, the frequency synthesizer is miniaturized and high in performance, and the frequency synthesizer is suitable for high-integration and miniaturized application scenes.

Description

Technical Field

[0001] The present invention relates to the technical field of communication hardware, and in particular to a frequency synthesizer. Background Art

[0002] At present, frequency synthesizers (frequency sources, local oscillators) are the heart of electronic systems such as communications, radars, and electronic countermeasures. Their performance indicators have a huge impact on improving system performance. Taking an analog receiver as an example, after the antenna receives the microwave signal in the air, it usually passes through a bandpass filter to filter out useless signals outside the band, amplifies the weak signal through an amplifier, mixes the high-frequency signal to a suitable intermediate frequency through a mixer, and then filters out image interference and clutter through an image suppression filter. After that, the signal is amplified again and converted into a digital signal through an ADC. A frequency reference is required for mixing, that is, the local oscillator signal LO. The single-sideband phase noise, reference spurious, frequency hopping time and other indicator parameters of the local oscillator affect the quality of the mixed signal, which in turn affects the signal processing of the back-end digital module.

[0003] In the prior art, a solution based on phase locked loop (PLL) frequency synthesis utilizes negative phase feedback in the PLL to output a high-frequency clean signal and provide a local oscillator signal for a mixer.

[0004] However, with the improvement of modern electronic system functions, more and more indicators need to be taken into account in the design of frequency synthesizers. In order to meet the demand for miniaturization of frequency synthesizers, RF systems have gradually transformed from planar packaging to three-dimensional packaging structures to improve the integration of modules. Usually, a smaller frequency synthesizer area often leads to an increase in thickness, and a decrease in thickness often leads to an increase in area. Current frequency synthesizers cannot meet the needs of miniaturization and high performance. Summary of the invention

[0005] The present invention provides a frequency synthesizer for partially solving the problems existing in the prior art.

[0006] The present invention adopts the following technical solutions:

[0007] The present invention provides a frequency synthesizer, comprising: a six-layer substrate and a plurality of components;

[0008] The components include: a phase-locked loop chip, a low-noise amplifier, an attenuator, multiple resistors, multiple capacitors, and an inductor; wherein some resistors and some capacitors form a loop filter;

[0009] The six-layer substrate comprises six metal layers and five dielectric layers, any two metal layers sandwich one dielectric layer, and the six-layer substrate is packaged in a leadless form as a whole;

[0010] In order from top to bottom, the first metal layer is used to place the kovar;

[0011] The second metal layer is used to place components;

[0012] The third metal layer is used to place the signal lines of the components;

[0013] The fourth metal layer is used to set the transmission line of the loop filter using a coplanar waveguide structure, and the port of the loop filter and the pin of the phase-locked loop chip are electrically connected through blind holes and the coplanar waveguide transmission line; a buried shielding hole is set at a preset interval between the routing of the fourth metal layer and the boundary to shield the signal line, and the buried shielding hole connects the fourth metal layer and the fifth metal layer;

[0014] The fifth metal layer is used to provide a reference ground plane;

[0015] The sixth metal layer is used to set the signal connection port; the attenuator on the second metal layer is used to output microwave signals, and the pad at the pin end of the attenuator on the second metal layer is set directly above the signal output pad of the sixth metal layer, and the pad at the pin end of the attenuator and the signal output pad are interconnected through a through hole, and a circle of metal columns are set around the through hole as shielding holes, and side-by-side shielding holes are set around the signal output pad of the sixth metal layer.

[0016] Optionally, the frequency synthesizer has a size of 9 mm×9 mm×1.8 mm.

[0017] Optionally, the phase-locked loop chip is a TW6223DMA phase-locked loop chip, the low-noise amplifier is an ILA-0618E low-noise amplifier, and the attenuator is an HH-AT40 attenuator.

[0018] Optionally, the resistor is a 01005 packaged resistor, and the capacitor is a 0402 packaged capacitor or a 0201 packaged capacitor.

[0019] Optionally, the dielectric layer is a dielectric layer formed by a HA90 model ceramic layer;

[0020] Wherein, the height of the kovar placed on the first metal layer is greater than or equal to 0.7 mm, and the width is greater than or equal to 0.6 mm;

[0021] The second metal layer includes metal for placing components and routing parts and metal tungsten laid outside the components and routing parts, and the metal tungsten is connected to the ground plane;

[0022] The third metal layer includes metal tungsten laid outside the signal line portion and the metal tungsten is connected to the ground plane;

[0023] The fourth metal layer includes metal tungsten laid outside the coplanar waveguide routing portion and the metal tungsten is connected to the ground plane;

[0024] The thickness of the first dielectric layer, the second dielectric layer, the third dielectric layer, and the fourth dielectric layer is greater than or equal to 0.1152 mm, the thickness of the fourth dielectric layer and the fifth dielectric layer is less than or equal to 0.2304 mm, and the total thickness of the first to sixth metal layers and the kovar is less than or equal to 1.51 mm.

[0025] Optionally, the pad at the pin end of the attenuator is a gold wire jumper pad, and the output signal of the attenuator is connected to the pad at the pin end of the attenuator through the gold wire. The transmission path of the output signal of the attenuator is gold wire-pad at the pin end of the attenuator-through hole-signal output pad.

[0026] Optionally, the diameter of the through hole connecting the pad at the pin end of the attenuator and the signal output pad is greater than or equal to 80um, the size of the gold wire jumper pad is greater than or equal to 0.15mm×0.15mm, and the through hole coverage square is greater than or equal to 0.18mm×0.18mm.

[0027] Optionally, the signal output pad of the sixth metal layer adopts a coplanar waveguide structure.

[0028] Optionally, the cavity wall thickness of the six-layer substrate package is greater than or equal to 0.8 mm, the metal trace width is greater than or equal to 0.1 mm, and the distance between each component and the cavity wall is greater than or equal to 0.1 mm.

[0029] At least one of the above technical solutions adopted by the present invention can achieve the following beneficial effects:

[0030] The frequency synthesizer of the present invention includes a six-layer substrate and multiple components. The layout and wiring are reasonably performed in the six-layer substrate, and the components are placed in a limited space. Then, a coplanar waveguide transmission line model is adopted for the loop filter part, and shielding holes are added at a distance from the metal edge to reduce the return loss and the insertion loss. The return loss reaches below -30dB, and the insertion loss is lower than 0.05dB. For the output high-frequency signal line, a solder pad and a through hole are used for connection, and a metal column-type coaxial structure and a shielding hole are added to optimize the return loss and the insertion loss, so as to realize a miniaturized and high-performance frequency synthesizer, which is suitable for highly integrated and miniaturized application scenarios. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] The drawings described herein are used to provide a further understanding of the present invention and constitute a part of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings:

[0032] Figure 1 A schematic diagram of the principle of a frequency synthesizer circuit provided by the present invention;

[0033] Figure 2A schematic diagram of a circuit substrate stacking structure provided by the present invention;

[0034] Figure 3 A schematic diagram of a circuit structure of a loop portion provided by the present invention;

[0035] Figure 4 A schematic diagram of the output circuit structure provided by the present invention;

[0036] Figure 5 A schematic diagram of a QFN package shape of a circuit provided by the present invention;

[0037] Figure 6 A schematic diagram of a circuit layout provided by the present invention. DETAILED DESCRIPTION

[0038] In order to make the purpose, technical solution and advantages of the present invention clearer, the technical solution of the present invention will be clearly and completely described below in conjunction with the specific embodiments of the present invention and the corresponding drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0039] The technical solutions provided by various embodiments of the present invention are described in detail below in conjunction with the accompanying drawings.

[0040] Generally, the frequency synthesizer (frequency source, local oscillator) is the heart of electronic systems such as communications, radar, and electronic countermeasures. It is an indispensable and important part, and its performance indicators have a decisive influence on the system.

[0041] In practical applications, when designing a frequency synthesizer, its circuit schematic can be designed first. Figure 1 This is a schematic diagram of the principle of a frequency synthesizer circuit in the present invention. Generally, the circuit principle diagram includes: the input signal 1-1 (which can be provided by a 100M crystal oscillator) is multiplied to 14GHz through a phase-locked loop 1; in addition, the phase-locked loop 1 requires an external loop filter 2 to reduce the high-frequency noise of the charge pump output terminal 1-3; the signal 1-2 output by the phase-locked loop 1 is passed through a low-noise amplifier 3-1 to amplify the weak signal and reduce the introduction of noise as much as possible, and an attenuator 3-2 is placed after the output of the amplifier to control the power of the output signal; the external input voltage 4-1 is passed through an LDO element 4 to power the phase-locked loop 1 and the amplifier 3-1 in the circuit. The present invention is described by taking a frequency synthesizer with a size of 9mm×9mm×1.8mm as an example.

[0042] Figure 1There are four modules in total, namely phase-locked loop 1, loop filter 2, amplifier attenuation 3 and power supply 4. Phase-locked loop 1 uses TW6223DMA model, which is the main component of miniaturized frequency source. Its function is to receive external reference signal 1-1 input and output high-frequency signal 1-2 of about 14GHz after frequency multiplication; loop filter 2 is composed of three capacitors of 900PF, 50PF, and 13PF and two 1.3kohm resistors. Loop filter 2 is a low-pass filter that filters the output signal of phase-locked loop charge pump pin 1-3 and transmits the filtered signal to the voltage-controlled oscillator tuning port 1-2 of phase-locked loop 1. 4; Amplifier attenuator 3 is composed of a low noise amplifier 3-1 of model ILA-0618E and an attenuator 3-2 of model HH-AT40-4dB. Amplifier attenuator 3 is set after the output signal 1-2 of the phase-locked loop 1. Its function is to amplify the output signal 1-2 of the phase-locked loop 1 to reach a power of about 10dBm; power supply 4 is composed of an LDO of model HRW1117-3.3. The input of power supply 4 is an external 5V voltage 4-1, and the output is a 3.3V voltage 4-2, which supplies power to the phase-locked loop 1 and amplifier attenuator 3-1. The output of the final frequency synthesizer is the 3-2-1 pin of the attenuator 3-2.

[0043] Of course, in one or more embodiments of the present invention, the components further include a plurality of resistors, a plurality of capacitors, and an inductor, wherein some resistors and some capacitors form a loop filter.

[0044] Specifically, in one or more embodiments of the present invention, after obtaining the bare chip parameters, packaging and other information in the above circuit schematic diagram, a high temperature co-fired ceramic process (HTCC) can be selected to make a six-layer substrate, and the ceramic material can be HA90, and the thickness of each layer can be 0.1152mm. The metal layer uses tungsten and the thickness is selected to be 10um. At 9GHz, the dielectric constant of the medium is 9.4 and the dielectric loss angle is 0.001.

[0045] Figure 2 A schematic diagram of a circuit substrate stacking structure provided by the present invention, comprising Figure 2 It can be seen that the frequency synthesizer in the present invention includes a six-layer substrate made by a high-temperature co-fired ceramic process. The six-layer substrate includes six metal layers (L1~L6) and five dielectric layers. Any two metal layers sandwich one dielectric layer. The six-layer substrate is packaged in a pinless form as a whole.

[0046] From top to bottom, a kovar is placed above the first metal layer L1 , and the height of the kovar is greater than or equal to 0.7 mm, and the width of the kovar is greater than or equal to 0.6 mm.

[0047] The second metal layer L2 is a component layer, on which all components 5 in the frequency synthesizer circuit schematic diagram are placed. The second metal layer includes metal for placing components and wiring parts and a metal tungsten layer laid outside the components and wiring parts, and the metal tungsten layer of the second metal layer is connected to the reference ground through a through hole.

[0048] The third metal layer L3 is used to place signal lines including power lines and SPI signal lines. The third metal layer includes a metal tungsten layer laid outside the signal line portion, and the metal tungsten layer of the third metal layer is connected to the reference ground.

[0049] The fourth metal layer L4 is used for loop filter connection routing. Specifically, the fourth metal layer L4 can use a coplanar waveguide structure to set the transmission line of the loop filter, and the port of the loop filter and the pin of the phase-locked loop chip are electrically connected through blind holes and coplanar waveguide transmission lines. A buried shielding hole is set at a preset interval from the boundary of the fourth metal layer L4 routing to shield the signal line, prevent the high-frequency transmission signal from radiating to the outside, and thereby make the electric field of the transmission signal more uniform and reduce signal loss. The buried shielding hole connects the fourth metal layer and the fifth metal layer. The fourth metal layer includes a metal tungsten layer laid outside the coplanar waveguide routing portion, and the metal tungsten layer of the fourth metal layer is connected to the reference ground.

[0050] The fifth metal layer L5 is used to provide a reference ground plane, and the thickness of the fourth dielectric layer 6 between L4 and L5 is designed to be less than or equal to 0.2304 mm.

[0051] The sixth metal layer L6 is used to set the signal connection port. The attenuator on the second metal layer outputs a microwave signal. The pad at the pin end of the attenuator on the second metal layer is set directly above the signal output pad on the sixth metal layer. The pad at the pin end of the attenuator and the signal output pad are interconnected through a through hole, and a circle of metal columns are set around the through hole as shielding holes, and side-by-side shielding holes are set around the signal output pad on the sixth metal layer.

[0052] The thickness of the fifth dielectric layer 7 between L5 and L6 can be designed to be less than or equal to 0.2304 mm. Except for the fourth dielectric layer 6 and the fifth dielectric layer 7, the thickness of the remaining first dielectric layer, second dielectric layer and third dielectric layer is greater than or equal to 0.1152 mm. The thickness of all layers L1-L6 plus Kovar added together is less than or equal to 1.51 mm.

[0053] Of course, in one or more embodiments of the present invention, in order to meet the size manufacturing requirements of the frequency synthesizer, the passive part can be selected, and the appropriate circuit components can be selected by comprehensively considering factors such as operating temperature, operating voltage, and cost. Specifically, for resistors, 01005 packaged 1.3KΩ resistors can be selected, 10pF, 13pF, 50pF small capacitors can be selected from 0402 package capacitors, and 1000pF large capacitors can be selected from 0201 package capacitors. The operating temperature is -55°C to 100°C.

[0054] After obtaining the die parameters and selecting the appropriate stacking structure and components, the components can be reasonably laid out and routed to make the RF line as close to the PLL chip output port as possible. Under the premise of meeting the HTCC process rules, the high-frequency signal lines can be kept away from each other to reduce interference.

[0055] Regarding the wiring layout, specifically, in one or more embodiments of the present invention, the specific layout structure of the wiring of the loop filter 2 is as follows: Figure 3 As shown, Figure 3 The present invention provides a schematic diagram of the circuit structure of a loop filter 2. The loop filter 2 and the phase-locked loop 1 chip are both placed on the second component layer, and the pad 2-5 of the filter 2 is connected to the pad 2-1 at the pin 1-3 of the phase-locked loop 1 chip through the metal wiring 2-3, blind holes 2-2, and 2-4 in the inner layer of the plate (the chip pin and the pad are connected with gold wires), the metal wiring 2-3 in the inner layer of the plate is located at the fourth layer of the substrate and adopts the form of a coplanar waveguide, the blind holes 2-2 and 2-4 are in the dielectric layer, the blind hole 2-2 connects the phase-locked loop pad 2-1 of the second layer to the metal wiring 2-3 of the fourth layer, the blind hole 2-4 connects the filter pad 2-5 of the second layer to the metal wiring 2-3 of the fourth layer, and the pads 2-1 and 2-5 are respectively at the ports of the phase-locked loop 1 and the loop filter 2, and are connected to the phase-locked loop pin and the loop filter through gold wires. The width of the inner metal trace 2-3 of the plate is designed to be 0.1mm, the width of the surrounding isolation zone is 0.15mm, the metal trace 2-3 is 0.2304mm away from the lower metal plate, and a shielding hole 2-6 with a center distance of 0.24mm is added around the trace at a distance of 0.31mm from the metal 2-3 boundary to reduce return loss and attenuation. The overall signal transmission model of the loop part is: input-soldering pad (2-1)-blind hole (2-2)-metal trace (2-3)-blind hole (2-4)-soldering pad (2-5)-output.

[0056] Specifically, in one or more embodiments of the present invention, for the high-frequency routing portion of the attenuator 3-2 output, in order to reduce the length of the microwave signal transmission line, the attenuator 3-2 chip pin 3-2-1 and the pad 3-2-2 are connected through a gold wire jumper, and the pad 3-2-2 is directly connected to the underlying signal output pad 3-2-4 through a through hole 3-2-3 for output, which effectively reduces attenuation and impedance discontinuity. Figure 4 The present invention is a schematic diagram of the circuit structure of the output part. The size of the pad 3-2-2 of the component layer is set to 0.18mm in diameter, the diameter of the through hole 3-2-3 is 80um, the size of the bottom signal output pad 3-2-4 is 0.95mm long and 0.4mm wide, and the radiation is reduced by a quasi-coaxial structure (3-2-5). Four shielding holes 3-2-5 are used around the through hole, and the aperture is 80um, and the distance from the through hole 3-2-3 is 0.65mm. The radius of the L2 layer anti-pad 3-2-6 is set to 0.56mm, and the radius of the L3, L4, and L5 layer anti-pads 3-2-7 is set to 0.51mm. The bottom layer L6 uses a 0.4mm isolation tape, making the L5-L6 dielectric 7 0.2304mm thick, and placing parallel shielding holes 3-2-8 near the bottom pad to improve the return loss and insertion loss. The output transmission model is: input-pad (3-2-2)-through hole (3-2-3)-signal output pad (3-2-4)-output. Among them, the size of the gold wire jumper pad is greater than or equal to 0.15mm×0.15mm, and the through hole covering square is greater than or equal to 0.18mm×0.18mm.

[0057] After the above process, the return loss and attenuation of microwave signal transmission reach the optimal level. Finally, all components are placed in a 9mm×9mm space. Because of the small space, the design is almost at the limit of the process. The cavity wall thickness is greater than or equal to 0.8mm, the power metal trace width and the SPI digital signal line width are greater than or equal to 0.1mm, the medium between the metal layers is designed to be 0.1152mm, the distance between the component and the cavity wall is greater than or equal to 0.1mm, and all components are connected. Its appearance is as follows Figure 5 , Figure 5 A schematic diagram of a QFN package shape of a circuit in the present invention is shown in FIG. Figure 5 The frequency synthesizer has 18 input and output ports, of which port number 2 is the 5V power input; ports 4, 6, and 16 are vacant; port 8 is the 3-2-4 microwave signal output port; ports 10, 11, 12, 13, 14, and 15 are SPI digital signal control ports; port 17 is the reference signal input port; and the remaining ports are ground. Figure 6 It is a schematic diagram of the overall layout of a circuit in the present invention, Figure 6 The layout structure of each metal layer is shown from top to bottom in the middle to right.

[0058] The present invention uses SIP technology, gold wire jumpers, vias, and metal routing to interconnect chips, saving space and having good electromagnetic performance. First, the chip bare die parameters that meet the requirements are obtained, and the HTCC process is selected. Under the limitation of the process, the layout and wiring are reasonably performed, and dozens of components are placed in a space of 9mm×9mm×1.8mm. Then, the coplanar waveguide transmission line model is used for the loop filter part, and shielding holes with a center spacing of 0.24mm are added at 0.31mm away from the metal edge of the routing to optimize the return loss. For the output high-frequency signal line, the signal is directly output through the through hole, and the coaxial structure and shielding hole are added to minimize the return loss and insertion loss. The input reference signal of the present invention can be selected as 100MHz, and the output frequency can be as high as 14.75GHz.

[0059] It should also be noted that the terms “comprises”, “includes” or any other variations thereof in the present invention are intended to cover non-exclusive inclusion, that is, in addition to the elements listed in the present invention, other elements not explicitly listed may also be included.

[0060] The various embodiments of the present invention are described in a progressive manner, and the same or similar parts between the various embodiments can be referred to each other, and each embodiment focuses on the differences from other embodiments.

[0061] The above description is only an embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent substitution, improvement, etc. made within the spirit and principle of the present invention should be included in the scope of the claims of the present invention.

Claims

1. A frequency synthesizer, characterized in that: include: Six-layer substrate and multiple components; The components include: a phase-locked loop chip, a low-noise amplifier, an attenuator, multiple resistors, multiple capacitors, and an inductor; wherein some resistors and some capacitors form a loop filter; The six-layer substrate comprises six metal layers and five dielectric layers, any two metal layers sandwich one dielectric layer, and the six-layer substrate is packaged in a leadless form as a whole; The first metal layer is used to place the kovar; The second metal layer is used to place components; The third metal layer is used to place the signal lines of the components; The fourth metal layer is used to set the transmission line of the loop filter using a coplanar waveguide structure, and the port of the loop filter and the pin of the phase-locked loop chip are electrically connected through blind holes and the coplanar waveguide transmission line; a buried hole type shielding hole is set at a preset interval between the routing line of the fourth metal layer and the boundary to shield the signal line, and the buried hole type shielding hole connects the fourth metal layer and the fifth metal layer; The fifth metal layer is used to provide a reference ground; The sixth metal layer is used to set the signal connection port; the attenuator on the second metal layer is used to output microwave signals, and the pad at the pin end of the attenuator on the second metal layer is set directly above the signal output pad of the sixth metal layer, and the pad at the pin end of the attenuator and the signal output pad are interconnected through a through hole, and a circle of metal columns are set around the through hole as shielding holes, and side-by-side shielding holes are set around the signal output pad of the sixth metal layer.

2. The frequency synthesizer according to claim 1, characterized in that The size of the frequency synthesizer is 9mm×9mm×1.8mm.

3. The frequency synthesizer according to claim 2, characterized in that The phase-locked loop chip is a TW6223DMA phase-locked loop chip, the low-noise amplifier is an ILA-0618E low-noise amplifier, and the attenuator is an HH-AT40 attenuator.

4. The frequency synthesizer according to claim 2, characterized in that The resistor is a 01005 packaged resistor, and the capacitor is a 0402 packaged capacitor or a 0201 packaged capacitor.

5. The frequency synthesizer according to claim 2, characterized in that The dielectric layer is a dielectric layer formed by a HA90 model ceramic layer; Wherein, the height of the kovar placed on the first metal layer is greater than or equal to 0.7 mm, and the width is greater than or equal to 0.6 mm; The second metal layer includes metal for placing components and wiring parts and a metal tungsten layer laid outside the components and wiring parts, and the metal tungsten layer of the second metal layer is connected to the reference ground through a through hole; The third metal layer includes a metal tungsten layer laid outside the signal line portion and the metal tungsten layer of the third metal layer is connected to the reference ground; The fourth metal layer includes a metal tungsten layer laid outside the coplanar waveguide routing portion, and the metal tungsten layer of the fourth metal layer is connected to a reference ground; The thickness of the first dielectric layer, the second dielectric layer, and the third dielectric layer is greater than or equal to 0.1152 mm, the thickness of the fourth dielectric layer and the fifth dielectric layer is less than or equal to 0.2304 mm, and the total thickness of the first to sixth metal layers and the kovar is less than or equal to 1.51 mm.

6. The frequency synthesizer according to claim 2, characterized in that The pad at the pin end of the attenuator is a gold wire jumper pad, the output signal of the attenuator is connected to the pad at the pin end of the attenuator through the gold wire, and the transmission path of the output signal of the attenuator is gold wire-pad at the pin end of the attenuator-through hole-signal output pad.

7. The frequency synthesizer according to claim 6, characterized in that The through hole diameter connecting the pad at the pin end of the attenuator and the signal output pad is greater than or equal to 80um, the gold wire jumper pad size is greater than or equal to 0.15mm×0.15mm, and the through hole coverage square is greater than or equal to 0.18mm×0.18mm.

8. The frequency synthesizer according to claim 1, characterized in that The signal output pad of the sixth metal layer adopts a coplanar waveguide structure.

9. The frequency synthesizer according to claim 2, characterized in that The cavity wall thickness of the six-layer substrate package is greater than or equal to 0.8 mm, the metal trace width is greater than or equal to 0.1 mm, and the distance between each component and the cavity wall is greater than or equal to 0.1 mm.

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