Data processing method and device, terminal equipment, chip and storage medium

Abstract

The invention provides a data processing method and device, terminal equipment, a chip and a storage medium, and the method comprises the steps: responding to the determination that a physical layer decoder obtains downlink data, generating the indication information of the downlink data through the physical layer decoder, and transmitting the indication information of the downlink data to an analyzer, downlink data and control information of the downlink data are obtained through an analyzer according to indication information of the downlink data, the downlink data are analyzed according to the control information of the downlink data, and an analysis result is obtained. According to the invention, the parser obtains the downlink data based on the parsing information of the downlink data and completes the parsing of the downlink data, so that the hardware pipeline processing of the downlink data between the physical layer decoder and the parser is realized, the processing efficiency is improved, the performance requirement on a CPU (Central Processing Unit) is reduced, and the power consumption is reduced.

Description

Technical Field

[0001] The present application relates to the field of wireless communication technology, and in particular to a data processing method, apparatus, terminal equipment, chip and storage medium. Background Art

[0002] The now mature 5G has become the new focus and trendsetter in the field of wireless communications, and the downlink transmission rate supported by terminal devices has also been rapidly improved.

[0003] In the related technology, downlink data is received through a physical layer decoder, but the parsing of the downlink data needs to be executed by the link layer software after the interaction between the physical layer software and the link layer software. This data processing method based on software interaction has high requirements on the processing performance of the central processor of the terminal device and consumes large power. Summary of the invention

[0004] The present application aims to solve one of the technical problems in the related art at least to some extent.

[0005] To this end, the present application proposes a data processing method, device, terminal equipment, chip and storage medium, which realize the pipeline processing of downlink data between the physical layer decoder and the parser, reduce the performance requirements of the CPU, improve the processing efficiency, and reduce the power consumption of the equipment.

[0006] In one aspect, an embodiment of the present application provides a data processing method, including:

[0007] In response to determining that the physical layer decoder acquires the downlink data, generating indication information of the downlink data through the physical layer decoder;

[0008] Sending the indication information of the downlink data to the parser through the physical layer decoder;

[0009] Acquiring the downlink data and the control information of the downlink data according to the indication information of the downlink data by the parser;

[0010] The parser parses the downlink data according to the control information of the downlink data to obtain a parsing result.

[0011] Another aspect of the present application provides a data processing device, including:

[0012] Physical layer decoders and parsers;

[0013] The physical layer decoder is used to generate indication information of the downlink data in response to acquiring the downlink data, and send the indication information of the downlink data to the parser;

[0014] The parser is used to obtain the downlink data and the control information of the downlink data according to the indication information of the downlink data, and parse the downlink data according to the control information of the downlink data to obtain a parsing result.

[0015] Another aspect of the present application provides a terminal device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the program, the method described in the above-mentioned first aspect is implemented.

[0016] To achieve the above objective, another aspect of the present application provides a chip, the chip comprising a processing circuit, and the processing circuit is configured to execute the method as described in the aforementioned aspect of the present application.

[0017] Another aspect of the present application provides a non-transitory computer-readable storage medium having a computer program stored thereon. When the computer program is executed by a processor, the method described in the above aspect of the embodiment is implemented.

[0018] Another aspect of the present application provides a computer program product on which a computer program is stored. When the program is executed by a processor, the method described in the above aspect of the embodiment is implemented.

[0019] The data processing method, apparatus, terminal device, chip and storage medium proposed in the present application, in response to determining that the physical layer decoder obtains downlink data, generates indication information of the downlink data through the physical layer decoder, and sends the indication information of the downlink data to the parser, obtains the downlink data and the control information of the downlink data according to the indication information of the downlink data through the parser, and parses the downlink data according to the control information of the downlink data to obtain the parsing result. In the present application, the physical layer decoder generates the indication information of the downlink data and sends it to the parser, and the parser obtains the downlink data based on the parsing information of the downlink data and completes the parsing of the downlink data, thereby realizing hardware pipeline processing of the downlink data between the physical layer decoder and the parser, improving the processing efficiency, reducing the performance requirements for the CPU, and thus reducing power consumption.

[0020] Additional aspects and advantages of the present application will be given in part in the description below, and in part will become apparent from the description below, or will be learned through the practice of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] The above and / or additional aspects and advantages of the present application will become apparent and easily understood from the following description of the embodiments in conjunction with the accompanying drawings, in which:

[0022] Figure 1 A schematic diagram of a downlink data processing architecture proposed in the related art;

[0023] Figure 2 A flowchart of a data processing method provided in an embodiment of the present application;

[0024] Figure 3 A flowchart of another data processing method provided in an embodiment of the present application;

[0025] Figure 4 A schematic diagram of the architecture of a data processing method provided in an embodiment of the present application;

[0026] Figure 5 A flowchart of an interactive method for data processing provided in an embodiment of the present application;

[0027] Figure 6 A schematic diagram of the structure of a data processing device provided in an embodiment of the present application;

[0028] Figure 7 A schematic diagram of the structure of a terminal device provided in an embodiment of the present application;

[0029] Figure 8 It is a schematic diagram of the structure of a chip proposed in an embodiment of the present application. DETAILED DESCRIPTION

[0030] Embodiments of the present application are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to be used to explain the present application, and should not be construed as limiting the present application.

[0031] The following describes the data processing method, apparatus, terminal device, chip and storage medium of the embodiments of the present application with reference to the accompanying drawings.

[0032] In the related art, the terminal device receives the downlink data sent by the base station and parses the downlink data separately. Figure 1This is a schematic diagram of an architecture for downlink data processing proposed in the relevant technology, which is illustrated by taking a 5G communication (New Radio, NR) system or a 4G long term evolution (Long Term Evolution, LET) system as an example, wherein the physical layer software configures parameters to the physical layer decoder according to the received downlink control information (Downlink Control Information, DCI), the physical layer decoder decodes the received pre-decoding data according to the configured parameters to obtain downlink data, and reports the downlink data to the physical layer software, the physical layer software notifies the link layer (Layer 2, L2) software of the decoding result based on the received decoding result, the L2 software parses the decoded downlink data according to the Third Generation Partnership Project (Third Generation Partnership Project, 3GPP) protocol, and submits the parsing result to the upper layer, but because the downlink data rate is very high, the data parsing is jointly implemented by the physical layer software and the L2 software, which has high performance requirements on the central processor of the terminal device and consumes a lot of power during the processing.

[0033] To this end, an embodiment of the present application provides a data processing method, in response to determining that a physical layer decoder obtains downlink data, indication information of the downlink data is generated by the physical layer decoder, and the indication information of the downlink data is sent to a parser, the downlink data and control information of the downlink data are obtained by the parser according to the indication information of the downlink data, and the downlink data is parsed according to the control information of the downlink data to obtain a parsing result. In the present application, the physical layer decoder generates indication information of the downlink data and sends it to the parser, and the parser obtains the downlink data based on the parsing information of the downlink data and completes the parsing of the downlink data, thereby realizing hardware pipeline processing of the downlink data between the physical layer decoder and the parser, improving processing efficiency, reducing performance requirements on the central processing unit CPU, and thus reducing power consumption.

[0034] Figure 2 A flowchart of a data processing method provided in an embodiment of the present application.

[0035] The embodiment of the present application takes the data processing method being configured in a data processing device as an example. The data processing device can be applied to any terminal device so that the terminal device can perform a data processing function.

[0036] Among them, the terminal device can be any device with computing capabilities, such as a mobile terminal. The mobile terminal can be, for example, a mobile phone, a tablet computer, a personal digital assistant, a wearable device, and other hardware devices with various operating systems, touch screens and / or display screens.

[0037] like Figure 2As shown, the method may include the following steps:

[0038] Step 201: In response to determining that a physical layer decoder obtains downlink data, indication information of the downlink data is generated by the physical layer decoder.

[0039] Among them, the downlink data can be data sent by a network side device to a terminal device in a self-organizing network system, a 5G communication (New Radio, NR) system, or a 4G long term evolution (Long Term Evolution, LET) system. In a self-organizing network scenario, it can be data sent from one node to another node. In a wireless communication system, for example, a 5G communication (New Radio, NR) system, a 4G long term evolution (Long Term Evolution, LET) system, the downlink data can be data transmitted by a base station to a terminal device, such as a transport block (Transport Block, TB), which can be user data, control data, etc.

[0040] In the embodiment of the present application, the physical layer decoder is the hardware of the physical layer to implement the decoding function of the physical layer. During the wireless communication process, the base station sends original data to the terminal device, and in response to the physical layer decoder receiving the original data sent by the base station, the original data is decoded to obtain downlink data, that is, the downlink data in the embodiment of the present application is the downlink data obtained by decoding.

[0041] In an embodiment of the present application, when the physical layer decoder obtains downlink data, indication information of the downlink data is generated. As an implementation method, the indication information of the downlink data is the location information of the description information of the downlink data. The description information of the downlink data includes the location information and control information of the downlink data, that is, the description information of the downlink data can be obtained based on the location information of the description information of the downlink data, and the control information of the downlink data and the downlink data can be determined according to the description information of the downlink data. As another implementation method, the indication information of the downlink data is the location information of the downlink data and the control information of the downlink data, that is, based on the location information, the parser can obtain the downlink data and the control information of the downlink data. Among them, the control information of the downlink data is used by the parser to parse the downlink data.

[0042] Step 202: Send the indication information of the downlink data to the parser through the physical layer decoder.

[0043] The parser may be a physical layer parser or a link layer parser.

[0044] In the embodiment of the present application, based on the provisions of the transmission protocol between the physical layer and the link layer, the indication information of the generated downlink data is sent to the parser through the physical layer decoder.

[0045] Step 203, the downlink data and the control information of the downlink data are obtained by the parser according to the indication information of the downlink data. In the present application, when the physical layer decoder generates the indication information of the downlink data, the physical layer decoder sends the indication information of the downlink data to the parser, and the parser obtains the downlink data and the control information of the downlink data according to the indication information of the downlink data obtained, and parses the downlink data based on the control information, thereby realizing the pipeline processing of the downlink data between the physical layer decoder and the parser, and improving the processing efficiency of the downlink data. The downlink data is parsed by the parser, so that the reception and parsing of the downlink data are both performed in the parser, and no software interaction is required, which reduces the processing delay, improves the processing efficiency, and does not require the CPU to have a high processing performance, thereby reducing power consumption.

[0046] Step 204: The parser parses the downlink data according to the control information of the downlink data to obtain a parsing result.

[0047] In the embodiment of the present application, the parser parses the acquired downlink data based on the 3GPP protocol according to the control information of the downlink data to obtain the parsing result, for example, the downlink data is parsed according to the Media Access Control (MAC) or Radio Link Control (RLC) specified in the 3GPP protocol, or the Packet Data Convergence Protocol (PDCP) or the Service Data Adaptation Protocol (SDAP) header format, and the parsing result is sent to the link layer software, and then the parsing result is submitted to the upper layer application through the link layer software. Compared with the method in the related art that the downlink data is notified to the link layer software by the physical layer software, and the link layer software parses the downlink data, the present application parses the downlink data by the parser, which has higher performance requirements on the CPU of the terminal device, which may cause the terminal device to freeze during the processing, and at the same time, increases the power consumption of the device and increases the cost. On the other hand, the performance requirements on the CPU of the terminal device are higher, that is, the terminal device needs to be configured with a higher performance CPU, otherwise it will affect the processing speed, thereby increasing the hardware cost of the device.

[0048] In the data processing method of the embodiment of the present application, in response to determining that the physical layer decoder obtains downlink data, indication information of the downlink data is generated by the physical layer decoder, and the indication information of the downlink data is sent to the parser, the downlink data and the control information of the downlink data are obtained by the parser according to the indication information of the downlink data, and the downlink data is parsed according to the control information of the downlink data to obtain a parsing result. In the present application, the physical layer decoder generates the indication information of the downlink data and sends it to the parser, and the parser obtains the downlink data based on the parsing information of the downlink data and completes the parsing of the downlink data, thereby realizing hardware pipeline processing of the downlink data between the physical layer decoder and the parser, improving processing efficiency, reducing performance requirements on the CPU, and thus reducing power consumption.

[0049] Based on the above embodiments, Figure 3 A flowchart of another data processing method provided in an embodiment of the present application is shown in FIG. Figure 3 As shown, the method comprises the following steps:

[0050] Step 301: In response to determining that the physical layer decoder obtains downlink data, the downlink data is stored in a memory.

[0051] In one implementation of the embodiment of the present application, a check code is obtained, and the downlink data is checked using the check code to determine whether the downlink data passes the check, wherein the check of the downlink data may be a CRC check. If it is determined through the check that the downlink data is received completely and no data anomalies exist, the downlink data is stored in a memory through a physical layer decoder, thereby avoiding downlink data rollback caused by a check failure of the downlink data, and improving the accuracy of the description information of the downlink data to be processed and the generated downlink data.

[0052] The relevant explanations in the aforementioned embodiments are also applicable to this embodiment and will not be repeated here.

[0053] In an example of an embodiment of the present application, the memory may be a static random access memory (SRAM), a synchronous dynamic random access memory (SDRAM), a dynamic random access memory DRAM, etc. In order to improve efficiency, the memory is a static random access memory. Since the read and write speed of SRAM is fast, storing downlink data in SRAM can improve the storage and writing speed and has high efficiency.

[0054] As an example, Figure 4 A schematic diagram of the architecture of a data processing method provided in an embodiment of the present application is shown in FIG. Figure 4 As shown, the physical layer decoder obtains the decoding control information of the downlink data from the physical layer software, and decodes the original data obtained by the physical layer decoder according to the decoding control information to obtain the downlink data to be parsed. If the downlink data to be parsed passes the cyclic redundancy check (CRC) check verification, the downlink data is written into the SRAM.

[0055] Step 302: Generate description information of the downlink data according to the location information of the downlink data in the memory and the control information of the downlink data.

[0056] In the embodiment of the present application, the downlink data is stored in the memory, the location information of the downlink data in the memory can be obtained, and the control information of the downlink data can be obtained, wherein the control information of the downlink data can be generated based on the decoding control information sent by the physical layer software, and the control information is used for the link layer parser to parse the downlink data, and the control information includes the length and time slot information of the downlink data. The physical layer decoder generates the description information of the downlink data according to the location information of the downlink data in the memory and the control information of the downlink data, that is, the description information of the downlink data includes the storage location information of the downlink data and the control information for data parsing.

[0057] Step 303: Store the description information of the downlink data in a queue, and obtain location indication information of the description information of the downlink data.

[0058] In the embodiment of the present application, the queue is used to store the description information of the downlink data. In order to reduce the memory usage, the queue is a first-in, first-out queue, which can be a first-in, first-out (FIFO) queue. After the description information of the downlink data is stored in the queue, the position indication information of the description information of the downlink data in the queue is determined. Figure 4As shown, as an implementation method, the position indication information is the write pointer of the queue. The write pointer refers to the next storable position in the queue, that is, the position where the data to be stored can be written, which can be used to indicate the position information of the description information of the downlink data in the queue. The write pointer is updated after each data is written to the queue, and the updated write pointer is sent to the parser. Similarly, the parser updates the read pointer when reading data from the queue, and sends the updated read pointer to the physical layer decoder, which will be described in detail later. Among them, the width and depth of the queue can be set based on demand, and are not limited in this embodiment. In order to reduce the occupancy of memory, the queue can be stored in a loop. As an implementation method, the current first read pointer and first write pointer of the queue are obtained, and the description information of the downlink data is stored in the queue according to the first read pointer and the first write pointer. Among them, the read pointer is obtained by the parser after each read of the historical downlink data from the queue. The read pointer is updated, so the first read pointer is updated after the parser reads the historical downlink data before the downlink data from the queue. When the queue is a non-circular queue for reading and writing, the read pointer does not have to be obtained. When the queue needs to be read and written cyclically, the value of the read pointer can be used to identify whether the current queue is full to achieve correct writing of data in the queue.

[0059] Among them, when new downlink data is stored in the queue, the value of the write pointer of the queue will increase, thereby updating the first write pointer in the queue to obtain the second write pointer, wherein the downlink data can be one in a single carrier scenario, and in a multi-carrier scenario, the downlink data can be multiple, for example, in a multi-carrier scenario, the downlink data is N, the value of the second write pointer is equal to the value of the first write pointer plus N, and the second write pointer is used as the position indication information of the description information.

[0060] Step 304: Use the location indication information of the description information as indication information of the downlink data.

[0061] Step 305: Send the indication information of the downlink data to the parser through the physical layer decoder.

[0062] Among them, the relevant explanations in the aforementioned embodiments are also applicable to this embodiment, and the principles are the same, so they will not be repeated here.

[0063] Step 306: Read the description information of the downlink data from the queue according to the location indication information of the description information of the downlink data.

[0064] In one implementation of the embodiment of the present application, each time the parser reads the description information of the downlink data from the queue, it will update the read pointer, that is, the parser will store the read pointer in the current queue, so as to obtain the first read pointer of the queue, and determine the position information of the description information of the downlink data to be read according to the first read pointer and the second write pointer of the queue. Specifically, the values ​​of the first read pointer and the second write pointer are compared. If the position of the first read pointer is before the position of the second write pointer, that is, the value of the first read pointer is less than the value of the second write pointer, then it means that the description information of the downlink data to be read is stored in the queue; if the position of the first read pointer and the position of the second write pointer are the same, then it means that the description information of the downlink data to be read does not exist in the queue.

[0065] According to the position information of the descriptive information of the determined downlink data to be read, the stored downlink data is read from the queue, and according to the amount of downlink data read, the first read pointer is updated to obtain the second read pointer, and the second read pointer is sent to the physical layer decoder, so as to realize the update of the read pointer by the physical layer decoder to improve the accuracy of subsequent writing.

[0066] In this application, downlink data is stored and read through a queue, so that when the downlink data to be processed is obtained in the physical layer decoder, the description information of the downlink data is generated and stored in the queue, and the write pointer is updated, and the updated write pointer is sent to the parser. The parser reads the description information of the downlink data from the queue according to the read pointer maintained by itself and the updated write pointer obtained. Since the description information of the downlink data includes control information and the location information of the downlink data in the memory, the downlink data can be obtained from the memory without the need for the link layer software and the physical layer software to interact to obtain the control information, and the downlink data is parsed according to the control information of the downlink data to obtain the parsing result, which can be directly sent to the link layer software, thereby improving the processing efficiency. In addition, the downlink data is processed in the queue, and the processing method is the same regardless of whether it is a single-carrier scenario or a multi-carrier scenario, and the hardware is not aware of it.

[0067] For the above steps 304 to 306, as another implementation, the location indication information is the storage location information of the description information of the downlink data currently stored in the queue. Therefore, the parser receives the storage location information of the description information of the downlink data in the queue, and reads the description information of the downlink data from the queue according to the storage location information.

[0068] like Figure 4 As shown, the physical layer decoder and the parser write and read the description information of the downlink data through a queue, thereby implementing pipeline processing of the description information of the downlink data between the two hardwares and improving processing efficiency.

[0069] Step 307: read the downlink data from the memory according to the location information of the downlink data included in the description information of the downlink data, and determine the control information of the downlink data from the description information of the downlink data.

[0070] Step 308: releasing the storage space for the downlink data in the memory.

[0071] In an embodiment of the present application, the description information of the downlink data includes the location information of the downlink data and the control information of the downlink data. The downlink data is obtained from the SRAM according to the location information of the downlink data, and the storage space occupied by the downlink data in the SRAM is released when the downlink data is obtained. The storage space for the downlink data is requested from the SRAM through the physical layer decoder. After the parser obtains the downlink data from the SRAM, it is responsible for releasing the storage space, thereby realizing efficient pipeline use of the storage space in the SRAM. In other words, a smaller SRAM can meet the storage requirements, thereby reducing the equipment cost.

[0072] Step 309: The downlink data is parsed by a parser according to the control information of the downlink data to obtain a parsing result.

[0073] Among them, step 309 can refer to the relevant explanations in the above-mentioned embodiment, and the principle is the same, which will not be repeated here.

[0074] like Figure 4 As shown, as an implementation method, the software can flexibly control the power on and off of the hardware. When there is no downlink data receiving task, the physical layer software configures the hardware of the physical layer decoder to enter the power-off state. At the same time, the link layer software configures the hardware of the parser to enter the power-off state, thereby reducing the overall power consumption of the terminal device. When the downlink data receiving task needs to be restored, the corresponding software configures the corresponding hardware to quickly enter the power-on state, thereby meeting the needs of different scenarios and reducing the power consumption of the device.

[0075] In the data processing method of the embodiment of the present application, in response to determining that the physical layer decoder obtains downlink data, indication information of the downlink data is generated by the physical layer decoder, and the indication information of the downlink data is sent to the parser, the downlink data and the control information of the downlink data are obtained by the parser according to the indication information of the downlink data, and the downlink data is parsed according to the control information of the downlink data to obtain a parsing result. In the present application, the physical layer decoder generates the indication information of the downlink data and sends it to the parser, and the parser obtains the downlink data based on the parsing information of the downlink data and completes the parsing of the downlink data, thereby realizing hardware pipeline processing of the downlink data between the physical layer decoder and the parser, improving processing efficiency, reducing performance requirements on the CPU, and thus reducing power consumption.

[0076] Based on the above embodiments, Figure 5A flowchart of an interactive method for data processing provided in an embodiment of the present application is shown in FIG. Figure 5 As shown, the method comprises the following steps:

[0077] In the embodiment of the present application, the 5G or LE T scenario is taken as an example for explanation: Step 1, the physical layer software parses the received downlink DCI information into downlink DCI information, and configures the physical layer decoder according to the downlink DCI information, so that the physical layer decoder obtains the control information of the TB, and the physical layer decoder obtains the downlink data, that is, the TB to be decoded, and decodes the TB to be decoded according to the control information of the TB to obtain the downlink TB to be sent to the parser for parsing.

[0078] Step 2: The physical layer decoder applies for memory from the SRAM to store the downlink TB, and generates description information of the downlink TB according to the location information of the downlink TB in the SRAM and the control information of the TB. The description information is also called a descriptor.

[0079] Step 3: After the CRC check on the TB passes, the physical layer decoder writes the descriptor of the downstream TB into the queue FIFO, updates the FIFO write pointer and pushes it to the parser.

[0080] Step 4: After receiving the write pointer push from the FIFO, the parser reads the descriptor of the downstream TB from the FIFO according to the write pointer and the read pointer, updates the FIFO read pointer, and pushes it to the physical layer decoder.

[0081] Step 5: The parser reads the downlink TB descriptor, includes the downlink TB location information and downlink TB control information, and releases the memory occupied by the downlink TB in the SRAM. The parser parses the TB according to the MAC / RLC / PDPC / SDAP header format specified by the 3GPP protocol to obtain the parsing result, and reports the parsing result to the link layer L2 software after completion.

[0082] In the embodiment of the present application, the processing efficiency of the downstream TB is greatly improved by the combined use of the hardware pipeline processing and the on-chip SRAM, and the life cycle of the TB memory is shortened, thereby greatly reducing the use of the DDR memory and reducing the power consumption of the terminal. The reception and parsing of the downstream TB are processed by the hardware pipeline processing between the physical layer decoder and the parser, the terminal software interaction cost is reduced, the implementation complexity of the link layer L2 software is reduced, and the terminal's performance requirements for the CPU are reduced, thereby further reducing power consumption, while reducing the processing delay of the downstream TB, thereby improving the terminal's downlink data transmission performance. In addition, for single-carrier or multi-carrier scenarios, the hardware is not aware, and the solution is more compatible.

[0083] In order to implement the above embodiment, the embodiment of the present application also proposes a data processing device.

[0084] Figure 6 A schematic diagram of the structure of a data processing device provided in an embodiment of the present application.

[0085] like Figure 6 As shown, the device may include: a physical layer decoder 601 and a parser 602 .

[0086] The physical layer decoder 601 is used to generate indication information of the downlink data in response to obtaining the downlink data, and send the indication information of the downlink data to the parser.

[0087] The parser 602 is configured to obtain the downlink data and the control information of the downlink data according to the indication information of the downlink data, and parse the downlink data according to the control information of the downlink data to obtain a parsing result.

[0088] Among them, the relevant explanations in the aforementioned method embodiment are also applicable to this embodiment, the principles are the same, and they will not be repeated here.

[0089] In the data processing method of the embodiment of the present application, in response to determining that the physical layer decoder obtains downlink data, indication information of the downlink data is generated by the physical layer decoder, and the indication information of the downlink data is sent to the parser, the downlink data and the control information of the downlink data are obtained by the parser according to the indication information of the downlink data, the downlink data is parsed according to the control information of the downlink data, and the parsing result is sent to the link layer software. In the present application, the physical layer decoder generates indication information of the downlink data and sends it to the parser, and the parser obtains the downlink data based on the parsing information of the downlink data and completes the parsing of the downlink data, thereby realizing hardware pipeline processing of the downlink data between the physical layer decoder and the parser, improving processing efficiency, reducing performance requirements on the CPU, and thus reducing power consumption.

[0090] Based on the above embodiment, as an implementation mode, the physical layer decoder 601 is further used for:

[0091] The downlink data is stored in a memory, description information of the downlink data is generated according to the position information of the downlink data in the memory and the control information of the downlink data, the description information of the downlink data is stored in a queue, position indication information of the description information of the downlink data is obtained, and the position indication information of the description information is used as indication information of the downlink data.

[0092] As an implementation, the parser 602 is further configured to:

[0093] According to the location indication information of the description information of the downlink data, the description information of the downlink data is read from the queue, according to the location information of the downlink data included in the description information of the downlink data, the downlink data is read from the memory, and the control information of the downlink data is determined from the description information of the downlink data.

[0094] As an implementation, the parser 602 is further configured to:

[0095] The storage space occupied by the downlink data in the memory is released.

[0096] As an implementation manner, the physical layer decoder 601 is further configured to:

[0097] Obtaining a current first read pointer and a first write pointer of the queue; wherein the first read pointer is updated by the parser when reading historical data before the downlink data stored in the queue;

[0098] According to the first read pointer and the first write pointer, the description information of the downlink data is stored in a queue, and the first write pointer in the queue is updated to obtain a second write pointer;

[0099] The second write pointer is used as position indication information of the description information.

[0100] As an implementation, the parser 602 is further configured to:

[0101] Obtaining the current first read pointer of the queue;

[0102] Determining, according to the first read pointer and the second write pointer of the queue, location information of the description information of the downlink data to be read;

[0103] According to the determined position information of the description information of the downlink data to be read, the stored description information of the downlink data is read from the queue.

[0104] As an implementation manner, the physical layer decoder 601 is further configured to:

[0105] Get the verification code;

[0106] The downlink data is verified using the verification code to determine whether the downlink data passes the verification.

[0107] Among them, the relevant explanations and beneficial effects in the aforementioned method embodiment are also applicable to this embodiment, the principle is the same, and will not be repeated here.

[0108] In order to implement the above embodiments, the present application also proposes a terminal device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the program, the method described in the above method embodiments is implemented.

[0109] Figure 7 This is a schematic diagram of a terminal device provided in an embodiment of the present application. For example, the terminal device 800 may be a mobile phone, a computer, a digital broadcast terminal, a message transceiver, a game console, a tablet device, a medical device, a fitness device, a personal digital assistant, etc.

[0110] Reference Figure 7 The terminal device 800 may include one or more of the following components: a processing component 802 , a memory 804 , a power component 806 , a multimedia component 808 , an audio component 810 , an input / output (I / O) interface 812 , a sensor component 814 , and a communication component 816 .

[0111] The processing component 802 generally controls the overall operation of the terminal device 800, such as operations associated with display, phone calls, data communications, camera operations, and recording operations. The processing component 802 may include one or more processors 820 to execute instructions to complete all or part of the steps of the above-mentioned method. In addition, the processing component 802 may include one or more modules to facilitate the interaction between the processing component 802 and other components. For example, the processing component 802 may include a multimedia module to facilitate the interaction between the multimedia component 808 and the processing component 802.

[0112] The memory 804 is configured to store various types of data to support operations on the terminal device 800. Examples of such data include instructions for any application or method operating on the terminal device 800, contact data, phone book data, messages, pictures, videos, etc. The memory 804 can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic disk or optical disk.

[0113] The power component 806 provides power to various components of the terminal device 800. The power component 806 may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power to the terminal device 800.

[0114] The multimedia component 808 includes a screen that provides an output interface between the terminal device 800 and the user. In some embodiments, the screen may include a liquid crystal display (LCD) and a touch panel (TP). If the screen includes a touch panel, the screen may be implemented as a touch screen to receive input signals from the user. The touch panel includes one or more touch sensors to sense touch, slide, and gestures on the touch panel. The touch sensor may not only sense the boundaries of the touch or slide action, but also detect the duration and pressure associated with the touch or slide operation. In some embodiments, the multimedia component 808 includes a front camera and / or a rear camera. When the terminal device 800 is in an operating mode, such as a shooting mode or a video mode, the front camera and / or the rear camera may receive external multimedia data. Each front camera and the rear camera may be a fixed optical lens system or have a focal length and optical zoom capability.

[0115] The audio component 810 is configured to output and / or input audio signals. For example, the audio component 810 includes a microphone (MIC), and when the terminal device 800 is in an operating mode, such as a call mode, a recording mode, and a speech recognition mode, the microphone is configured to receive an external audio signal. The received audio signal can be further stored in the memory 804 or sent via the communication component 816. In some embodiments, the audio component 810 also includes a speaker for outputting audio signals.

[0116] I / O interface 812 provides an interface between processing component 802 and peripheral interface modules, such as keyboards, click wheels, buttons, etc. These buttons may include but are not limited to: home button, volume button, start button, and lock button.

[0117] The sensor assembly 814 includes one or more sensors for providing various aspects of status assessment for the terminal device 800. For example, the sensor assembly 814 can detect the open / closed state of the terminal device 800, the relative positioning of the components, such as the display and keypad of the terminal device 800, and the sensor assembly 814 can also detect the position change of the terminal device 800 or a component of the terminal device 800, the presence or absence of contact between the user and the terminal device 800, the orientation or acceleration / deceleration of the terminal device 800, and the temperature change of the terminal device 800. The sensor assembly 814 may include a proximity sensor configured to detect the presence of nearby objects without any physical contact. The sensor assembly 814 may also include an optical sensor, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, the sensor assembly 814 may also include an acceleration sensor, a gyroscope sensor, a magnetic sensor, a pressure sensor, or a temperature sensor.

[0118] The communication component 816 is configured to facilitate wired or wireless communication between the terminal device 800 and other devices. The terminal device 800 can access a wireless network based on a communication standard, such as WiFi, 4G or 5G, or a combination thereof. In an exemplary embodiment, the communication component 816 receives a broadcast signal or broadcast-related information from an external broadcast management system via a broadcast channel. In an exemplary embodiment, the communication component 816 also includes a near field communication (NFC) module to facilitate short-range communication. For example, the NFC module can be implemented based on radio frequency identification (RFID) technology, infrared data association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth (BT) technology and other technologies.

[0119] In an exemplary embodiment, the terminal device 800 can be implemented by one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic components to perform the above method.

[0120] In an exemplary embodiment, a non-transitory computer-readable storage medium including instructions is also provided, such as a memory 804 including instructions, and the instructions can be executed by a processor 820 of a terminal device 800 to complete the above method. For example, the non-transitory computer-readable storage medium can be a ROM, a random access memory (RAM), a CD-ROM, a magnetic tape, a floppy disk, an optical data storage device, etc.

[0121] In order to implement the above embodiments, the present application further proposes a chip, including: the chip includes a processing circuit, and the processing circuit is configured to execute the method provided in the above embodiments.

[0122] Figure 8 is a schematic diagram of the structure of a chip proposed in an embodiment of the present application. Figure 8 The structure of the chip 1100 is shown, but is not limited to this.

[0123] The chip 1100 includes a processing circuit 1101 , and the processing circuit 1101 is configured to execute any of the above methods.

[0124] In some embodiments, the chip 1100 further includes one or more interface circuits 1102. Optionally, the interface circuit 1102 is connected to the memory 1103. The interface circuit 1102 can be used to receive signals from the memory 1103 or other devices, and the interface circuit 1102 can be used to send signals to the memory 1103 or other devices. For example, the interface circuit 1102 can read instructions stored in the memory 1103 and send the instructions to the processing circuit 1101.

[0125] In some embodiments, the interface circuit 1102 performs at least one of the communication steps such as sending and / or receiving in the above method, and the processing circuit 1101 performs other steps.

[0126] In some embodiments, terms such as interface circuit, interface, transceiver pin, and transceiver may be used interchangeably.

[0127] In some embodiments, the chip 1100 further includes one or more memories 1103 for storing instructions. Alternatively, all or part of the memory 1103 may be outside the chip 1100.

[0128] In order to implement the above embodiments, the present application also proposes a non-temporary computer-readable storage medium on which a computer program is stored. When the program is executed by a processor, the method described in the above method embodiments is implemented.

[0129] In order to implement the above embodiments, the present application also proposes a computer program product on which a computer program is stored. When the computer program is executed by a processor, the method described in the above method embodiments is implemented.

[0130] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples, without contradiction.

[0131] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In the description of this application, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0132] Any process or method description in a flowchart or otherwise described herein may be understood to represent a module, fragment or portion of code comprising one or more executable instructions for implementing the steps of a custom logical function or process, and the scope of the preferred embodiments of the present application includes alternative implementations in which functions may not be performed in the order shown or discussed, including performing functions in a substantially simultaneous manner or in the reverse order depending on the functions involved, which should be understood by technicians in the technical field to which the embodiments of the present application belong.

[0133] The logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as an ordered list of executable instructions for implementing logical functions, and can be embodied in any computer-readable medium for use by an instruction execution system, device or apparatus (such as a computer-based system, a system including a processor, or other system that can fetch instructions from an instruction execution system, device or apparatus and execute the instructions), or in combination with these instruction execution systems, devices or apparatuses. For the purpose of this specification, "computer-readable medium" can be any device that can contain, store, communicate, propagate or transmit a program for use by an instruction execution system, device or apparatus, or in combination with these instruction execution systems, devices or apparatuses. More specific examples of computer-readable media (a non-exhaustive list) include the following: an electrical connection with one or more wires (electronic device), a portable computer disk box (magnetic device), a random access memory (RAM), a read-only memory (ROM), an erasable and programmable read-only memory (EPROM or flash memory), a fiber optic device, and a portable compact disk read-only memory (CDROM). In addition, the computer-readable medium may even be paper or other suitable medium on which the program is printed, since the program may be obtained electronically, for example, by optically scanning the paper or other medium and then editing, interpreting or processing in other suitable ways if necessary, and then stored in a computer memory.

[0134] It should be understood that the various parts of the present application can be implemented by hardware, software, firmware or a combination thereof. In the above-mentioned embodiments, multiple steps or methods can be implemented by software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented by hardware, as in another embodiment, it can be implemented by any one of the following technologies known in the art or their combination: a discrete logic circuit having a logic gate circuit for implementing a logic function for a data signal, a dedicated integrated circuit having a suitable combination of logic gate circuits, a programmable gate array (PGA), a field programmable gate array (FPGA), etc.

[0135] A person skilled in the art may understand that all or part of the steps in the method for implementing the above-mentioned embodiment may be completed by instructing related hardware through a program, and the program may be stored in a computer-readable storage medium, which, when executed, includes one or a combination of the steps of the method embodiment.

[0136] In addition, each functional unit in each embodiment of the present application may be integrated into a processing module, or each unit may exist physically separately, or two or more units may be integrated into one module. The above-mentioned integrated module may be implemented in the form of hardware or in the form of a software functional module. If the integrated module is implemented in the form of a software functional module and sold or used as an independent product, it may also be stored in a computer-readable storage medium.

[0137] The storage medium mentioned above may be a read-only memory, a magnetic disk or an optical disk, etc. Although the embodiments of the present application have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limiting the present application. A person of ordinary skill in the art may change, modify, replace and modify the above embodiments within the scope of the present application.

Claims

1. A data processing method, characterized in that: include: In response to determining that the physical layer decoder acquires the downlink data, generating indication information of the downlink data through the physical layer decoder; Sending the indication information of the downlink data to the parser through the physical layer decoder; Acquiring the downlink data and the control information of the downlink data according to the indication information of the downlink data by the parser; The parser parses the downlink data according to the control information of the downlink data to obtain a parsing result.

2. The method according to claim 1, characterized in that The generating the indication information of the downlink data by the physical layer decoder includes: storing the downlink data in a memory; Generate description information of the downlink data according to the location information of the downlink data in the memory and the control information of the downlink data; wherein the description information includes the location information and the control information of the downlink data; storing the description information of the downlink data in a queue, and obtaining location indication information of the description information of the downlink data; The location indication information of the description information is used as the indication information of the downlink data.

3. The method according to claim 2, characterized in that The acquiring, by the parser, the downlink data and the control information of the downlink data according to the indication information of the downlink data comprises: Reading the description information of the downlink data from the queue according to the location indication information of the description information of the downlink data; The downlink data is read from the memory according to the location information of the downlink data included in the description information of the downlink data, and the control information of the downlink data is determined from the description information of the downlink data.

4. The method according to claim 3, characterized in that After reading the downlink data from the memory according to the location information of the downlink data included in the description information of the downlink data, the method further comprises: The storage space occupied by the downlink data in the memory is released.

5. The method according to claim 3, characterized in that The step of storing the description information of the downlink data in a queue and obtaining the location indication information of the description information of the downlink data includes: Obtaining a current first read pointer and a first write pointer of the queue; wherein the first read pointer is updated by the parser when reading historical data before the downlink data stored in the queue; According to the first read pointer and the first write pointer, the description information of the downlink data is stored in a queue, and the first write pointer in the queue is updated to obtain a second write pointer; The second write pointer is used as position indication information of the description information.

6. The method according to claim 5, characterized in that The step of reading the description information of the downlink data from the queue according to the location indication information of the description information of the downlink data includes: Obtaining the current first read pointer of the queue; Determining, according to the first read pointer and the second write pointer of the queue, location information of the description information of the downlink data to be read; According to the determined position information of the description information of the downlink data to be read, the stored description information of the downlink data is read from the queue.

7. The method according to claim 1, characterized in that Before the physical layer decoder generates the indication information of the downlink data, the method further includes: Get the verification code; The downlink data is verified using the verification code to determine whether the downlink data passes the verification.

8. A data processing device, characterized in that: include: Physical layer decoders and parsers; The physical layer decoder is used to generate indication information of the downlink data in response to acquiring the downlink data, and send the indication information of the downlink data to the parser; The parser is used to obtain the downlink data and the control information of the downlink data according to the indication information of the downlink data, and parse the downlink data according to the control information of the downlink data to obtain a parsing result.

9. The device according to claim 8, characterized in that The physical layer decoder is further used for: The downlink data is stored in a memory, description information of the downlink data is generated according to position information of the downlink data in the memory and control information of the downlink data, the description information of the downlink data is stored in a queue, position indication information of the description information of the downlink data is obtained, and the position indication information of the description information is used as indication information of the downlink data.

10. The device according to claim 9, characterized in that The parser is also used to: According to the location indication information of the description information of the downlink data, the description information of the downlink data is read from the queue, according to the location information of the downlink data included in the description information of the downlink data, the downlink data is read from the memory, and the control information of the downlink data is determined from the description information of the downlink data.

11. The device according to claim 10, characterized in that The parser is also used to: The storage space occupied by the downlink data in the memory is released.

12. A terminal device, characterized in that: The method comprises a memory, a processor and a computer program stored in the memory and executable on the processor, wherein when the processor executes the program, the method according to any one of claims 1 to 7 is implemented.

13. A chip, characterized in that: The chip comprises a processing circuit configured to execute the method according to any one of claims 1-7.

14. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the method according to any one of claims 1 to 7 is implemented.

15. A computer program product, characterized in that The invention comprises a computer program, which, when executed by a processor, implements the method according to any one of claims 1 to 7.

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