A stability analysis method and system for SiC MOSFET

Abstract

This application belongs to the field of semiconductor device analysis and specifically discloses a stability analysis method and system for SiC MOSFETs. The method includes: determining the parasitic parameters of the SiC MOSFET; combining the parasitic parameters to obtain the feedback transfer functions of two feedback loops in the SiC MOSFET switching transient; the two feedback loops include: an inductive feedback loop and a capacitive feedback loop; the feedback transfer functions of the two feedback loops are respectively expanded in the complex frequency domain to determine the gate-source voltage changes introduced by the two feedback loops; the gate-source voltage changes include: amplitude gain changes and phase changes; when the sum of the gate-source voltage changes does not exceed a preset threshold, the SiC MOSFET is in a stable state; otherwise, the SiC MOSFET is in an unstable state. Through this application, a concise and clear analysis method for SiC MOSFET switching stability is provided, providing technical guidance for maximizing the performance of SiC MOSFETs.

Description

Technical Field

[0001] The present application relates to the field of semiconductor device analysis, and more specifically, to a stability analysis method and system for a silicon carbide metal-oxide-semiconductor field-effect transistor (SiC MOSFET). Background Art

[0002] In recent years, wide-bandgap semiconductor devices, represented by SiC MOSFET, have advantages such as smaller chip area, lower on-resistance, and higher operating frequency, enabling them to meet the efficiency, volume, and high-frequency, high-temperature, and high-voltage application requirements of power electronic devices. However, their high-frequency switching results in a greater current change rate (di / dt) and voltage change rate (dv / dt), which, when coupled with parasitic parameters in the device and circuit, form voltage and current ringing, which in turn causes electromagnetic interference, additional switching losses, bridge arm punch-through, and other problems, deteriorating the transient performance of SiC MOSFETs and posing a significant challenge to their wider application and promotion.

[0003] Self-sustained oscillations caused by SiC MOSFET switching instability are the most complex phenomenon. Unlike the damped oscillations caused by switching transients, self-sustained oscillations always maintain a constant amplitude. Furthermore, unlike false-on events, which are momentary, self-sustained oscillations are continuous. Research on self-sustained oscillations primarily equates the circuit in which self-sustained oscillations occur to an LC oscillation network with no energy consumption. This model requires that the impedance of the two-port network composed of SiC MOSFETs be negative to meet the starting conditions for self-sustained oscillations. However, in actual operation, due to the complexity of extracting the equivalent impedance of the circuit and the strong nonlinearity of the device's own capacitance, the negative resistance network method cannot provide guidance for practical design.

[0004] Therefore, using a concise and clear analysis method for SiC MOSFET switching stability to guide engineering practice is of great significance for maximizing the excellent performance of SiC MOSFET and improving the performance of the entire converter. Summary of the Invention

[0005] In view of the shortcomings of the prior art, the purpose of this application is to provide a stability analysis method and system for SiC MOSFET, aiming to solve the problem that the prior art cannot provide a criterion for the instability of SiC MOSFET caused by high-speed switching.

[0006] To achieve the above objectives, in a first aspect, the present application provides a stability analysis method for SiC MOSFET, comprising:

[0007] Determine the parasitic parameters of SiC MOSFET;

[0008] In combination with the parasitic parameters, feedback transfer functions of two feedback loops in the SiC MOSFET switching transient are obtained; the two feedback loops include: an inductive feedback loop and a capacitive feedback loop;

[0009] Expanding the feedback transfer functions of the two feedback loops in the complex frequency domain to determine gate-source voltage changes introduced by the two feedback loops; the gate-source voltage changes include amplitude gain changes and phase changes;

[0010] When the sum of the gate-source voltage changes does not exceed a preset threshold, the SiC MOSFET is in a stable state; otherwise, the SiC MOSFET is in an unstable state.

[0011] In an example, the parasitic parameters may include at least: gate parasitic inductance, source parasitic inductance, gate drive resistance, gate-source capacitance, drain-source capacitance, and gate-drain capacitance.

[0012] It should be noted that this application treats the SiC MOSFET switching transient as a closed-loop system; the present invention treats the SiC MOSFET switching transient as a closed-loop system by analyzing the working mechanism of the SiC MOSFET, and the input is the gate-source voltage V gs , the output is the drain-source current I ds and drain-source voltage V ds Therefore, in the switching transient of MOSFET, due to the effect of di / dt and dv / dt, the parasitic parameter source inductance L s , gate-drain capacitance C gd Gate-source voltage V gs This application analyzes each feedback loop present in SiC MOSFET switching transients one by one, determining the gate-source voltage changes introduced by each feedback loop. This allows for a stability analysis of the SiC MOSFET and identifies the instability criteria for the SiC MOSFET caused by high-speed switching, providing theoretical support for the high-speed application of SiC MOSFETs.

[0013] This application studies the influence of gate-source voltage V on SiC MOSFET switching transients. gsThe feedback open-loop transfer functions of the two feedback branches are analyzed one by one to determine the gate-source voltage amplitude gain and phase change introduced by each feedback transfer loop; finally, this application analyzes the stability of the SiC MOSFET device by combining the sum of the open-loop transfer function voltage amplitude gain and phase change, thereby realizing the stability analysis of the device.

[0014] In a possible implementation, the preset thresholds include: a gate-source voltage amplitude gain change threshold and a phase change threshold;

[0015] When the sum of the amplitude gain changes of the gate-source voltage is greater than 0 dB and the sum of the phase changes is greater than or equal to 180 degrees, the SiC MOSFET is in an unstable state; otherwise, the SiC MOSFET is in a stable state.

[0016] It should be noted that combining the gate-source voltage amplitude gain and the sum of the phase changes to analyze the stability of SiC MOSFETs is more effective in determining the phase impact of the feedback loop on the gate-source voltage than considering only the gate-source voltage amplitude. The phase can determine whether the feedback loop is positive or negative, and thus determine the stability of the system.

[0017] In one possible implementation, obtaining the feedback transfer function of the inductor feedback loop during the SiC MOSFET switching transient includes:

[0018] determining a total impedance of the inductive feedback loop according to the parasitic parameters;

[0019] Determining the voltage across the gate-source capacitor under the action of inductive feedback in a switching transient state in combination with the total impedance;

[0020] The gate current is taken as input, and the voltage across the gate-source capacitance under the action of inductive feedback is taken as output. This output is compared with the input to obtain the feedback transfer function of the inductive feedback loop.

[0021] In one possible implementation, obtaining the feedback transfer function of the capacitor feedback loop during the SiC MOSFET switching transient includes:

[0022] determining a total impedance of the capacitor feedback loop according to the parasitic parameters;

[0023] Determining the voltage across the gate-source capacitor under the action of capacitive feedback in a switching transient state based on the total impedance;

[0024] The gate current is taken as input, and the voltage across the gate-source capacitance under the action of capacitor feedback is taken as output. This output is compared with the input to obtain the feedback transfer function of the capacitor feedback loop.

[0025] In one possible implementation, the feedback transfer function of the inductive feedback loop is for:

[0026]

[0027] Among them, s is a complex variable, L s is the source parasitic inductance, g m is the SiC MOSFET transconductance, C iss is the SiC MOSFET input capacitance, R g is the gate drive resistance, L g is the gate parasitic inductance, C gs is the gate-source capacitance, C gd is the gate-drain capacitance, C ds is the drain-source capacitance.

[0028] In one possible implementation, the feedback transfer function of the capacitor feedback loop is for:

[0029]

[0030] Among them, s is a complex variable, L s is the source parasitic inductance, L g is the gate parasitic inductance, R g is the gate drive resistance, C gs is the gate-source capacitance, C gd is the gate-drain capacitance.

[0031] In a second aspect, the present application provides a stability analysis system for SiC MOSFET, comprising:

[0032] Device parameter determination module, used to determine the parasitic parameters of SiC MOSFET;

[0033] A feedback transfer function determination module is used to obtain feedback transfer functions of two feedback loops in the SiC MOSFET switching transient state in combination with the parasitic parameters; the two feedback loops include: an inductive feedback loop and a capacitive feedback loop;

[0034] A device stability analysis module is configured to expand the feedback transfer functions of the two feedback loops in the complex frequency domain to determine gate-source voltage changes introduced by the two feedback loops, respectively. The gate-source voltage changes include amplitude gain changes and phase changes. When the sum of the gate-source voltage changes does not exceed a preset threshold, the SiC MOSFET is determined to be in a stable state; otherwise, the SiC MOSFET is determined to be in an unstable state.

[0035] In one possible implementation, the feedback transfer function determination module is configured to determine a total impedance of the inductive feedback loop based on the parasitic parameters; determine a voltage across a gate-source capacitor under inductive feedback during a switching transient in combination with the total impedance; and use the gate current as input and the voltage across the gate-source capacitor under inductive feedback as output, and compare the output with the input to obtain a feedback transfer function of the inductive feedback loop.

[0036] In one possible implementation, the feedback transfer function determination module is configured to determine a total impedance of the capacitor feedback loop based on the parasitic parameters; determine a voltage across a gate-source capacitor under capacitor feedback in a switching transient in combination with the total impedance; and use the gate current as input and the voltage across the gate-source capacitor under capacitor feedback as output, and compare the output with the input to obtain a feedback transfer function of the capacitor feedback loop.

[0037] In one possible implementation, the preset thresholds include: a gate-source voltage amplitude gain change threshold and a phase change threshold; the device stability analysis module is configured to determine that the SiC MOSFET is in an unstable state when the sum of the gate-source voltage amplitude gain changes is greater than 0 dB and the sum of the phase changes is greater than or equal to 180 degrees; otherwise, determine that the SiC MOSFET is in a stable state.

[0038] It can be understood that the beneficial effects of the second aspect mentioned above can be found in the relevant description of the first aspect mentioned above, and will not be repeated here.

[0039] In general, the above technical solutions conceived by this application have at least the following beneficial effects compared with the prior art:

[0040] The present application provides a stability analysis method and system for SiC MOSFET. According to the working mechanism of SiC MOSFET, the switching transient of SiC MOSFET is equivalent to a closed-loop system. By analyzing the working mechanism of SiC MOSFET, the present invention treats the switching transient of SiC MOSFET as a closed-loop system. The input is the gate-source voltage V gs , the output is the drain-source current I ds and drain-source voltage V ds Therefore, in the switching transient of MOSFET, due to the effect of di / dt and dv / dt, the parasitic parameter source inductance L s , gate-drain capacitance C gd Gate-source voltage V gsThis application analyzes the feedback loops present in the switching transient of SiC MOSFETs one by one, and is able to determine the gate-source voltage changes introduced by each feedback loop, thereby realizing the stability analysis of SiC MOSFETs and determining the instability criterion of SiC MOSFETs caused by high-speed switching, thus providing theoretical support for the high-speed application of SiC MOSFETs. The stability analysis method provided in this application can not only be applied to the stability analysis of a single SiC MOSFET, but can also be used for the stability analysis of active transistors versus passive transistors in a half-bridge circuit composed of SiC MOSFETs. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] Figure 1 This is a flow chart of a stability analysis method for SiC MOSFET provided in an embodiment of the present application;

[0042] FIG2( a ) is a time domain loop diagram of an inductive feedback loop provided in an embodiment of the present application;

[0043] FIG2( b ) is a complex frequency domain schematic diagram of an inductor feedback loop provided in an embodiment of the present application;

[0044] FIG3( a ) is a time domain loop diagram of a capacitor feedback loop provided in an embodiment of the present application;

[0045] FIG3( b ) is a complex frequency domain schematic diagram of a capacitor feedback loop provided in an embodiment of the present application;

[0046] Figure 4 1 is a diagram of the stability analysis system architecture for SiC MOSFET provided in an embodiment of the present application;

[0047] Figure 5 This is an architectural diagram of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0048] In order to make the purpose, technical solutions and advantages of this application more clear, the following further describes this application in detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain this application and are not intended to limit this application.

[0049] The term "and / or" as used herein describes an association between related objects, indicating that three possible relationships exist. For example, "A and / or B" can represent: A exists alone, A and B exist simultaneously, or B exists alone. The symbol " / " as used herein indicates that the related objects are in an "or" relationship, for example, A / B means either A or B.

[0050] In the embodiments of this application, words such as "exemplary" or "for example" are used to indicate examples, illustrations, or descriptions. Any embodiment or design described as "exemplary" or "for example" in the embodiments of this application should not be interpreted as being preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary" or "for example" is intended to present the relevant concepts in a concrete manner.

[0051] In the description of the embodiments of the present application, unless otherwise specified, "multiple" means two or more, for example, multiple processing units means two or more processing units, etc.; multiple elements means two or more elements, etc.

[0052] First, the technical terms involved in the embodiments of this application are introduced.

[0053] (1) Feedback transmission loop

[0054] The feedback transfer loop forms a closed control loop by returning part or all of the system output signal to the input end to adjust and control the system.

[0055] (2) Complex frequency domain

[0056] The Laplace transform is a fundamental mathematical method in control engineering. Its advantage is that it can transform the derivative of a time function into a product of the complex variable s, converting a differential equation expressed in time into an algebraic equation expressed in s. The range of the complex variable s is the complex frequency domain, also known as the s-domain.

[0057] Next, the technical solutions provided in the embodiments of this application are introduced.

[0058] Figure 1 : is a flow chart of a stability analysis method for SiC MOSFET provided in an embodiment of the present application; Figure 1 As shown, the following steps are included:

[0059] Step S101, determining the parasitic parameters of the SiC MOSFET;

[0060] The above parasitic parameters include: gate parasitic inductance L g , source parasitic inductance L s ; Gate drive resistor R g ; Gate-source capacitance C gs , drain-source capacitance C ds and gate-drain capacitance C gd .

[0061] Step S102: obtaining feedback transfer functions of two feedback loops in a SiC MOSFET switching transient state in combination with parasitic parameters; the two feedback loops include: an inductive feedback loop and a capacitive feedback loop;

[0062] For example, based on the working principle of the device, the capacitive feedback loop and the inductive feedback loop in the switching transient of the SiC MOSFET are determined, and the time domain and complex frequency domain schematic diagrams of the two feedback loops are respectively parameterized. Figure 2(a)-Figure 3(b) shown.

[0063] In step S1021, the feedback transfer function of the inductor feedback loop is determined as follows:

[0064] As shown in Figure 2(a), the total impedance of the inductive feedback loop is composed of the drain-source capacitance C ds and gate-drain capacitance C gd After connecting in series with the gate-source capacitor C gs connected in parallel, and finally connected with the gate capacitor group R g and gate inductance L g The series composition is expressed as:

[0065] Z=(Z Rg +Z Lg )+[Z Cgs / / (Z Cgd +Z Cds )]

[0066] Among them, Z Rg The impedance of the gate resistor, Z Lg Represents the impedance of the source inductor, Z Cgs Represents the impedance of the gate-source capacitance, Z Cgd Represents the impedance of the gate-drain capacitance, Z Cds Represents the impedance of the drain-source capacitance.

[0067] Further, the calculation is done by di ds Gate-source voltage change caused by / dt: The parasitic inductance L s In transient state, it is equivalent to a voltage source, whose value is L s *di ds / dt, the gate-source capacitance C under the action of this voltage source gs Voltage across both ends for:

[0068]

[0069] On this basis, the feedback transfer function of the inductive feedback loop is calculated.

[0070] in:

[0071]

[0072] Where C iss is the SiC MOSFET input capacitance, whose value is C gs +C gd , g m is the transconductance of SiC MOSFET. The complex frequency domain diagram of the inductor feedback loop is shown in Figure 2(b). In Figure 2(a) and Figure 2(b), a1 is the rate of change of the drain-source current of SiC MOSFET di ds / dt; the gate current I g As input, the output of the inductor feedback loop is The transfer function of the inductor feedback loop obtained by the output ratio is:

[0073]

[0074] In step S1022, the feedback transfer function of the capacitor feedback loop is determined as follows:

[0075] As shown in Figure 3(a), the total impedance of the capacitor feedback loop is determined by the gate resistor R g , gate inductance L g After being connected in series with the source inductor and the gate-source capacitor C gs The parallel composition is expressed as:

[0076] Z=Z Cgs / / (Z Rg +Z Lg +Z Ls )+Z Cgd

[0077] Among them, Z Ls Represents the impedance of the common source inductor.

[0078] Specifically, in dv ds / Under the action of dt, the gate-source capacitance C gs The time domain expression of the voltage across the two ends is:

[0079]

[0080] The complex frequency domain diagram of the capacitor feedback loop is shown in Figure 3(b). In Figures 3(a) and 3(b), a2 is the rate of change of the drain-source voltage of the SiC MOSFET, dv. ds / dt.; The s-domain expression corresponding to the above time-domain expression is:

[0081]

[0082] Furthermore, the feedback transfer function of the capacitor feedback loop is calculated as:

[0083] in:

[0084]

[0085] The gate current I g As input, the output of the capacitor feedback loop is The transfer function of the capacitor feedback loop obtained by dividing the output by the input is:

[0086]

[0087] Step S103, expanding the feedback transfer functions of the two feedback loops in the complex frequency domain to determine gate-source voltage changes introduced by the two feedback loops; the gate-source voltage changes include amplitude gain changes and phase changes;

[0088] Optionally, in step 6: Expanding in the s-domain allows analysis of the magnitude and phase of the gate-source voltage caused by the inductive feedback loop. Expanding in the s-domain, the amplitude gain and phase of the gate-source voltage caused by the capacitive feedback loop can be analyzed.

[0089] Specifically, after replacing s in the open-loop transfer function with jω, the real and imaginary parts are calculated. The square root of the sum of the squares of the real and imaginary parts is the amplitude gain, and the inverse tangent of the imaginary part to the real part is the phase gain.

[0090] Step S104 : When the sum of the gate-source voltage changes does not exceed a preset threshold, the SiC MOSFET is in a stable state; otherwise, the SiC MOSFET is in an unstable state.

[0091] Optionally, when the sum of the phase shifts caused by the inductive feedback branch and the capacitive feedback branch is greater than or equal to 180 degrees and the amplitude gain thereof is greater than 0 dB, the system is in an unstable state. Otherwise, the system is in a stable state.

[0092] It should be noted that this application considers the SiC MOSFET with parasitic parameters as equivalent to a common source amplifier, whose input is the gate-source voltage and current, and the output is the drain-source voltage and current. At the same time, there are two feedback paths: the drain-source voltage is connected to the gate-source voltage via the gate-drain capacitance, i.e., a capacitive feedback loop; the drain-source current is connected to the gate-source voltage via the common source inductor, i.e., an inductive feedback loop. The circuit characteristics of the two feedback loops are then determined, the gate-source voltage changes introduced by the two feedback loops are determined, and the feedback transfer functions under capacitive feedback and voltage feedback are obtained respectively. The parasitic parameters of the SiC MOSFET are determined, and the values ​​of the parasitic parameters are substituted into the feedback transfer function. The amplitude gain and phase change of the two feedback branches are determined by the feedback transfer function. When the sum of the amplitude gain and phase changes does not exceed a preset threshold, the SiC MOSFET is in a stable state; otherwise, the SiC MOSFET is in an unstable state.

[0093] Figure 4 : is a diagram of the stability analysis system architecture for SiC MOSFET provided in an embodiment of the present application; Figure 4 Shown, including:

[0094] A device parameter determination module 410 is configured to determine parasitic parameters of the SiC MOSFET;

[0095] A feedback transfer function determination module 420 is configured to obtain feedback transfer functions of two feedback loops in a SiC MOSFET switching transient state based on the parasitic parameters; the two feedback loops include an inductive feedback loop and a capacitive feedback loop;

[0096] The device stability analysis module 430 is configured to expand the feedback transfer functions of the two feedback loops in the complex frequency domain to determine gate-source voltage changes introduced by the two feedback loops. The gate-source voltage changes include amplitude gain changes and phase changes. When the sum of the gate-source voltage changes does not exceed a preset threshold, the SiC MOSFET is in a stable state; otherwise, the SiC MOSFET is in an unstable state.

[0097] Optionally, the feedback transfer function determination module 420 is configured to determine the total impedance of the inductive feedback loop based on parasitic parameters; determine the voltage across the gate-source capacitor under the action of inductive feedback in a switching transient in combination with the total impedance; and use the gate current as input and the voltage across the gate-source capacitor under the action of inductive feedback as output, and compare the output with the input to obtain a feedback transfer function of the inductive feedback loop.

[0098] Optionally, the feedback transfer function determination module 420 is configured to determine the total impedance of the capacitor feedback loop based on the parasitic parameters; determine the voltage across the gate-source capacitor under the action of capacitor feedback in a switching transient in combination with the total impedance; and use the gate current as input and the voltage across the gate-source capacitor under the action of capacitor feedback as output, and compare the output with the input to obtain a feedback transfer function of the capacitor feedback loop.

[0099] Further optionally, the preset thresholds include: a gate-source voltage amplitude gain change threshold and a phase change threshold; the device stability analysis module 430 is configured to determine that the SiC MOSFET is in an unstable state when the sum of the gate-source voltage amplitude gain changes is greater than 0 dB and the sum of the phase changes is greater than or equal to 180 degrees; otherwise, determine that the SiC MOSFET is in a stable state.

[0100] It should be understood that the above-mentioned system is used to execute the method in the above-mentioned embodiment. The implementation principle and technical effect of the corresponding program module in the system are similar to those described in the above-mentioned method. The working process of the system can refer to the corresponding process in the above-mentioned method and will not be repeated here.

[0101] Based on the method in the above embodiment, the embodiment of the present application provides an electronic device, such as Figure 5 As shown, the electronic device may include: a processor 510, a communication interface 520, a memory 530, and a communication bus 540, wherein the processor 510, the communication interface 520, and the memory 530 communicate with each other via the communication bus 540. The processor 510 may call the logic instructions in the memory 530 to execute the method in the above embodiment.

[0102] In addition, the logic instructions in the above-mentioned memory 530 can be implemented in the form of a software functional unit and can be stored in a computer-readable storage medium when sold or used as an independent product. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes a number of instructions for enabling a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the method described in each embodiment of the present application.

[0103] Based on the method in the above embodiment, an embodiment of the present application provides a computer-readable storage medium, which stores a computer program. When the computer program runs on a processor, the processor executes the method in the above embodiment.

[0104] Based on the method in the above embodiment, an embodiment of the present application provides a computer program product. When the computer program product runs on a processor, the processor executes the method in the above embodiment.

[0105] It is understood that the processor in the embodiments of the present application may be a central processing unit (CPU), or may be other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field programmable gate arrays (FPGA), or other programmable logic devices, transistor logic devices, hardware components, or any combination thereof. The general-purpose processor may be a microprocessor or any conventional processor.

[0106] The method steps in the embodiments of the present application can be implemented by hardware or by a processor executing software instructions. The software instructions can be composed of corresponding software modules, which can be stored in random access memory (RAM), flash memory, read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), registers, hard disks, mobile hard disks, CD-ROMs or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor so that the processor can read information from the storage medium and write information to the storage medium. Of course, the storage medium can also be a component of the processor. The processor and the storage medium can be located in an ASIC.

[0107] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware or any combination thereof. When implemented using software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the process or function described in the embodiment of the present application is generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted via the computer-readable storage medium. The computer instructions can be transmitted from one website, computer, server or data center to another website, computer, server or data center via a wired (e.g., coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) method. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that includes one or more available media integrated. The available medium can be a magnetic medium (e.g., a floppy disk, a hard disk, a tape), an optical medium (e.g., a DVD), or a semiconductor medium (e.g., a solid state drive (SSD)).

[0108] It will be understood that the various numerical numbers involved in the embodiments of the present application are merely distinctions for the convenience of description and are not intended to limit the scope of the embodiments of the present application.

[0109] It is easy for those skilled in the art to understand that the above is only a preferred embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present application should be included in the scope of protection of the present application.

Claims

1. A stability analysis method for a silicon carbide metal oxide semiconductor field effect transistor (SiC MOSFET), characterized in that: include: Determine the parasitic parameters of SiC MOSFET; Combining the parasitic parameters, obtaining feedback transfer functions of two feedback loops in the SiC MOSFET switching transient; The two feedback loops include: an inductive feedback loop and a capacitive feedback loop; Expanding the feedback transfer functions of the two feedback loops in the complex frequency domain to determine gate-source voltage changes introduced by the two feedback loops; the gate-source voltage changes include amplitude gain changes and phase changes; When the sum of the gate-source voltage changes does not exceed a preset threshold, the SiC MOSFET is in a stable state; otherwise, the SiC MOSFET is in an unstable state.

2. The method according to claim 1, characterized in that The preset thresholds include: a gate-source voltage amplitude gain change threshold and a phase change threshold; When the sum of the amplitude gain changes of the gate-source voltage is greater than 0 dB and the sum of the phase changes is greater than or equal to 180 degrees, the SiC MOSFET is in an unstable state; otherwise, the SiC MOSFET is in a stable state.

3. The method according to claim 1, characterized in that Obtain the feedback transfer function of the inductive feedback loop during SiC MOSFET switching transients, including: determining a total impedance of the inductive feedback loop according to the parasitic parameters; Determining the voltage across the gate-source capacitor under the action of inductive feedback in a switching transient state in combination with the total impedance; The gate current is taken as input, and the voltage across the gate-source capacitance under the action of inductive feedback is taken as output. This output is compared with the input to obtain the feedback transfer function of the inductive feedback loop.

4. The method according to claim 1, wherein Obtain the feedback transfer function of the capacitor feedback loop during SiC MOSFET switching transients, including: determining a total impedance of the capacitor feedback loop according to the parasitic parameters; Determining the voltage across the gate-source capacitor under the action of capacitive feedback in a switching transient state based on the total impedance; The gate current is taken as input, and the voltage across the gate-source capacitance under the action of capacitor feedback is taken as output. This output is compared with the input to obtain the feedback transfer function of the capacitor feedback loop.

5. The method according to claim 3, characterized in that The feedback transfer function of the inductive feedback loop is for: Among them, s is a complex variable, L s is the source parasitic inductance, g m is the SiC MOSFET transconductance, C iss is the SiC MOSFET input capacitance, R g is the gate drive resistance, L g is the gate parasitic inductance, C gs is the gate-source capacitance, C gd is the gate-drain capacitance, C ds is the drain-source capacitance.

6. The method according to claim 4, characterized in that The feedback transfer function of the capacitive feedback loop is for: Among them, s is a complex variable, L s is the source parasitic inductance, L g is the gate parasitic inductance, R g is the gate drive resistance, C gs is the gate-source capacitance, C gd is the gate-drain capacitance.

7. A stability analysis system for a silicon carbide metal oxide semiconductor field effect transistor (SiC MOSFET), characterized in that: include: Device parameter determination module, used to determine the parasitic parameters of SiC MOSFET; A feedback transfer function determination module is used to obtain feedback transfer functions of two feedback loops in the SiC MOSFET switching transient state in combination with the parasitic parameters; The two feedback loops include: an inductive feedback loop and a capacitive feedback loop; A device stability analysis module is configured to expand the feedback transfer functions of the two feedback loops in the complex frequency domain to determine gate-source voltage changes introduced by the two feedback loops, respectively. The gate-source voltage changes include amplitude gain changes and phase changes. When the sum of the gate-source voltage changes does not exceed a preset threshold, the SiC MOSFET is determined to be in a stable state; otherwise, the SiC MOSFET is determined to be in an unstable state.

8. The system according to claim 7, characterized in that The feedback transfer function determination module is configured to determine a total impedance of the inductive feedback loop based on the parasitic parameters; and determine a voltage across a gate-source capacitor under the action of inductive feedback in a switching transient state in combination with the total impedance; The gate current is taken as input, the voltage across the gate-source capacitance under the action of inductive feedback is taken as output, and the output is compared with the input to obtain the feedback transfer function of the inductive feedback loop.

9. The system according to claim 7, wherein: The feedback transfer function determination module is configured to determine a total impedance of the capacitor feedback loop based on the parasitic parameters; and determine a voltage across the gate-source capacitor under the action of capacitor feedback in a switching transient state in combination with the total impedance; The gate current is taken as input, the voltage across the gate-source capacitance under the action of capacitor feedback is taken as output, and this output is compared with the input to obtain the feedback transfer function of the capacitor feedback loop.

10. The system according to claim 7, wherein: The preset thresholds include: a gate-source voltage amplitude gain change threshold and a phase change threshold; the device stability analysis module is configured to determine that the SiC MOSFET is in an unstable state when the sum of the gate-source voltage amplitude gain changes is greater than 0 dB and the sum of the phase changes is greater than or equal to 180 degrees; otherwise, determine that the SiC MOSFET is in a stable state.

Images