Band-gap reference circuit and electronic device

Abstract

The invention relates to the technical field of integrated circuits, in particular to a band-gap reference circuit and electronic equipment, and the circuit comprises a starting module which is used for providing starting current; the band-gap reference voltage source module is connected to the starting module and used for receiving the starting current and the power supply voltage so as to generate an intermediate voltage, and the starting current is used for enabling the band-gap reference voltage source module to leave a zero degeneration state so as to enter a normal working state; and the trimming module is connected to the band-gap reference voltage source module and is used for compensating the temperature coefficient of the band-gap reference voltage source module and generating band-gap reference voltage according to the intermediate voltage. According to the embodiment of the invention, the temperature coefficient of the band-gap reference voltage source module is compensated, so that a lower temperature coefficient is realized in a full temperature range.

Description

Technical Field

[0001] The present disclosure relates to the technical field of integrated circuits, and in particular to a bandgap reference circuit and electronic equipment. Background Art

[0002] Voltage references are essential for most analog and mixed-signal applications, such as voltage regulators, analog-to-digital converters (ADCs), and digital-to-analog converters (DACs). Bandgap references (BGRs) are widely used because of their low temperature coefficient (TC) and high power supply rejection ratio (PSR). The core of achieving low temperature coefficients for bandgap references is to use voltages with opposite temperature characteristics to offset the effect of temperature on the output voltage. This design ensures that the reference voltage remains relatively stable over a wide temperature range. A voltage that increases proportionally with temperature is usually called a positive temperature coefficient voltage (V PTAT ) and the voltage that decreases proportionally with temperature is called a negative temperature coefficient voltage (V CTAT ). Then the voltage with the smaller slope (here, the PTAT voltage) is multiplied by a temperature-independent coefficient. If the absolute values ​​of the two voltage slopes are equal at this time, then adding these two curves together can produce a temperature-independent voltage curve.

[0003] If only the first-order temperature coefficient is considered, the positive and negative temperature coefficients can be compensated by selecting an appropriate proportional coefficient k to realize a first-order bandgap reference voltage source. However, due to the influence of higher-order terms, the temperature coefficient of the first-order bandgap reference voltage source is relatively high, which will cause the bandgap voltage output by the bandgap voltage source to vary greatly with temperature.

[0004] Therefore, how to achieve a lower temperature coefficient to improve the stability of the bandgap voltage output by the bandgap voltage source has become a major problem that needs to be solved urgently. Summary of the invention

[0005] According to one aspect of the present disclosure, there is provided a bandgap reference circuit, the circuit comprising:

[0006] A starting module, used for providing starting current;

[0007] a bandgap reference voltage source module, connected to the startup module, and used to receive the startup current and the power supply voltage to generate an intermediate voltage, wherein the startup current is used to make the bandgap reference voltage source module leave the zero degenerate state and enter the normal working state;

[0008] The trimming module is connected to the bandgap reference voltage source module and is used to compensate the temperature coefficient of the bandgap reference voltage source module and generate a bandgap reference voltage according to the intermediate voltage.

[0009] In a possible implementation, the startup module includes a zeroth transistor, a first transistor, and a second transistor, wherein:

[0010] The gate of the zeroth transistor is grounded, the source of the zeroth transistor is used to receive a power supply voltage, and the drain of the zeroth transistor is connected to the drain of the first transistor and the gate of the second transistor.

[0011] The gate of the first transistor is used to receive a start control signal.

[0012] The drain of the second transistor is used to receive a first bias voltage.

[0013] A source of the first transistor and a source of the second transistor are grounded.

[0014] In a possible implementation, the bandgap reference voltage source module includes a zeroth resistor, a first resistor, a second resistor, a third resistor, a fourth resistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, a zeroth triode, a first triode, a zeroth operational amplifier, and a first operational amplifier, wherein:

[0015] The source of the third transistor, the source of the fourth transistor, the source of the fifth transistor, the source of the sixth transistor, and the source of the seventh transistor are all used to receive a power supply voltage.

[0016] The gate of the third transistor is connected to the output terminal of the zeroth operational amplifier, and the output terminal of the zeroth operational amplifier is used to output a second bias voltage.

[0017] The positive input terminal of the zeroth operational amplifier is connected to the drain of the third transistor and the first end of the first resistor, and the negative input terminal of the zeroth operational amplifier is connected to the drain of the fourth transistor, the negative input terminal of the first operational amplifier and the emitter of the zeroth transistor.

[0018] A common node of the second end of the first resistor and the first end of the zeroth resistor is connected to the trimming module as a first trimming control end.

[0019] The gate of the fourth transistor is connected to the gate of the fifth transistor, the output terminal of the first operational amplifier and one terminal of the startup circuit.

[0020] The output terminal of the first operational amplifier is used to output a first bias voltage.

[0021] The positive input terminal of the first operational amplifier is connected to the drain of the fifth transistor and the first terminal of the second resistor.

[0022] The second end of the second resistor is connected to the emitter of the first transistor.

[0023] The gate of the sixth transistor is used to receive the second bias voltage, and the gate of the seventh transistor is used to receive the first bias voltage.

[0024] The drain of the sixth transistor is connected to the drain of the seventh transistor and the first end of the third resistor.

[0025] A common node of the second end of the third resistor and the first end of the fourth resistor is connected to the trimming module as a second trimming control end.

[0026] The second end of the zeroth resistor, the base and collector of the zeroth transistor, the base and collector of the first transistor, and the second end of the fourth resistor are all grounded.

[0027] In a possible implementation, the zeroth resistor, the first resistor, the second resistor, and the third resistor are all unsalicided p-polysilicon resistors (unsalicided p-polyresistor, rppolyu) resistors.

[0028] In a possible implementation, the trimming module includes an eighth transistor, a ninth transistor, a tenth transistor, an eleventh transistor, and a fifth resistor, wherein:

[0029] The source of the eighth transistor, the first end of the fifth resistor and the source of the eleventh transistor are used to receive the power supply voltage.

[0030] The gate of the eighth transistor is used to receive a first bias voltage, and the drain of the eighth transistor is connected to the gate of the ninth transistor, the drain of the ninth transistor, and the gate of the tenth transistor.

[0031] The second end of the fifth resistor is connected to the gate of the eleventh transistor and the drain of the tenth transistor.

[0032] The drain of the eleventh transistor is connected to the second trimming control terminal in the bandgap reference voltage source module, and the drain of the eleventh transistor is used to output the bandgap reference voltage.

[0033] A source of the ninth transistor and a source of the tenth transistor are grounded.

[0034] In a possible implementation, the fifth resistor is a positive temperature coefficient resistor with adjustable resistance, the temperature coefficient of the fifth resistor is greater than the temperature coefficient of the second resistor in the bandgap reference voltage source module, and the trimming module further includes a zero mode selection switch and a first mode selection switch, wherein:

[0035] The first end of the zeroth mode selection switch is connected to the first trimming control end of the bandgap reference voltage source module, and the second end of the zeroth mode selection switch is grounded.

[0036] The first end of the first mode selection switch is connected to the second trimming control end of the bandgap reference voltage source module, and the second end of the first mode selection switch is connected to the drain of the eleventh transistor.

[0037] The control end of the zeroth mode selection switch and the control end of the first mode selection switch are used to receive a switch control signal to achieve mode switching.

[0038] In a possible implementation manner, the circuit further includes a control module, the control module being connected to the resistance adjustment end of the fifth resistor, the control end of the zeroth mode selection switch, and the control end of the first mode selection switch, and being configured to:

[0039] Outputting a first set of switch control signals to control the circuit to operate in a calibration mode, wherein the zeroth mode selection switch and the first mode selection switch are both set to an on state;

[0040] In the calibration mode, a first bandgap reference voltage and a second bandgap reference voltage outputted by the drain of the eleventh transistor at a first preset temperature and a second preset temperature are respectively obtained, and a resistance adjustment signal is outputted according to the first bandgap reference voltage and the second bandgap reference voltage to adjust the resistance of the fifth resistor.

[0041] Wherein, the first preset temperature is lower than the second preset temperature,

[0042] Wherein, at the first preset temperature, the compensation current flowing through the drain of the eleventh transistor is less than a preset value.

[0043] In a possible implementation manner, adjusting the resistance of the fifth resistor according to the first bandgap reference voltage and the second bandgap reference voltage output resistance adjustment signal includes:

[0044] At the second preset temperature, the resistance of the fifth resistor is adjusted using the resistance adjustment signal until the voltage value of the second bandgap reference voltage is equal to or approximately equal to the voltage value of the first bandgap reference voltage.

[0045] In a possible implementation manner, the control module is further used for:

[0046] A second set of switch control signals is output to control the circuit to operate in a normal working mode. In the normal working mode, the zeroth mode selection switch and the first mode selection switch are both set to an open state.

[0047] According to one aspect of the present disclosure, an electronic device is provided, and the electronic device includes the bandgap reference circuit.

[0048] The bandgap reference circuit of the disclosed embodiment provides a starting current through a starting module so that the bandgap reference voltage source module leaves the zero degenerate state and enters a normal working state; the starting current and the power supply voltage are received by the bandgap reference voltage source module to generate an intermediate voltage, the temperature coefficient of the bandgap reference voltage source module is compensated by a trimming module, and a bandgap reference voltage is generated according to the intermediate voltage, and the temperature coefficient of the bandgap reference voltage source module is compensated to achieve a lower temperature coefficient within the full temperature range.

[0049] It should be understood that the above general description and the following detailed description are exemplary and explanatory only and do not limit the present disclosure. Other features and aspects of the present disclosure will become clear from the following detailed description of exemplary embodiments with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0050] The drawings herein are incorporated into the specification and constitute a part of the specification. These drawings illustrate embodiments consistent with the present disclosure and are used to illustrate the technical solutions of the present disclosure together with the specification.

[0051] Figure 1 A block diagram of a bandgap reference circuit according to an embodiment of the present disclosure is shown.

[0052] Figure 2 A block diagram of a bandgap reference circuit according to an embodiment of the present disclosure is shown.

[0053] Figure 3 A schematic diagram showing the relationship between various voltages and temperatures in the bandgap reference circuit is shown.

[0054] Figure 4 A principle schematic diagram of a first-order bandgap reference voltage source is shown.

[0055] Figure 5 A schematic diagram of a curve showing an intermediate voltage output by a bandgap reference voltage source module in a bandgap reference circuit according to an embodiment of the present disclosure is shown.

[0056] Figure 6 A schematic diagram showing a voltage output by a bandgap reference circuit according to an embodiment of the present disclosure is shown.

[0057] Figure 7A partial structural schematic diagram of a trimming module in a bandgap reference circuit according to an embodiment of the present disclosure is shown.

[0058] Figure 8 A schematic diagram of a voltage curve obtained after resistance calibration of voltage at different temperatures is shown.

[0059] Fig. 9 A schematic diagram of the temperature coefficient simulation results after curvature compensation is shown. DETAILED DESCRIPTION

[0060] Various exemplary embodiments, features and aspects of the present disclosure will be described in detail below with reference to the accompanying drawings. The same reference numerals in the accompanying drawings represent elements with the same or similar functions. Although various aspects of the embodiments are shown in the accompanying drawings, the drawings are not necessarily drawn to scale unless otherwise specified.

[0061] In the description of the present disclosure, it should be understood that the terms "length", "width", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., indicating the orientation or position relationship are based on the orientation or position relationship shown in the accompanying drawings, and are only for the convenience of describing the present disclosure and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present disclosure.

[0062] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the present disclosure, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0063] In the present disclosure, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present disclosure can be understood according to specific circumstances.

[0064] The word “exemplary” is used exclusively herein to mean “serving as an example, example, or illustration.” Any embodiment described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other embodiments.

[0065] The term "and / or" herein is only a description of the association relationship of the associated objects, indicating that there may be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the term "at least one" herein represents any combination of at least two of any one or more of a plurality of. For example, including at least one of A, B, and C can represent including any one or more elements selected from the set consisting of A, B, and C.

[0066] In addition, in order to better illustrate the present disclosure, numerous specific details are given in the following specific embodiments. It should be understood by those skilled in the art that the present disclosure can also be implemented without certain specific details. In some examples, methods, means, components and circuits well known to those skilled in the art are not described in detail in order to highlight the subject matter of the present disclosure.

[0067] See also Figure 1 , Figure 1 A block diagram of a bandgap reference circuit according to an embodiment of the present disclosure is shown.

[0068] like Figure 1 As shown, the circuit comprises:

[0069] A starting module 10, used for providing a starting current;

[0070] A bandgap reference voltage source module 20, connected to the startup module 10, for receiving the startup current and the power supply voltage to generate an intermediate voltage, wherein the startup current is used to make the bandgap reference voltage source module 20 leave the zero degenerate state to enter a normal working state;

[0071] The trimming module 30 is connected to the bandgap reference voltage source module 20 and is used to compensate the temperature coefficient of the bandgap reference voltage source module 20 and generate a bandgap reference voltage according to the intermediate voltage.

[0072] The bandgap reference circuit of the disclosed embodiment provides a startup current through a startup module 10 so that the bandgap reference voltage source module 20 leaves the zero degenerate state to enter a normal working state; the startup current and the power supply voltage VDD are received by the bandgap reference voltage source module 20 to generate an intermediate voltage, the temperature coefficient of the bandgap reference voltage source module 20 is compensated by the adjustment module 30, and a bandgap reference voltage is generated according to the intermediate voltage, and the temperature coefficient of the bandgap reference voltage source module 20 is compensated to achieve a lower temperature coefficient within the full temperature range.

[0073] The embodiments of the present disclosure do not limit the specific implementation of the startup module 10, the bandgap reference voltage source module 20, and the adjustment module 30. Those skilled in the art may adopt appropriate technical means to implement them according to actual conditions and needs, as long as each module can achieve the corresponding function.

[0074] The preferred implementations of the startup module 10 , the bandgap reference voltage source module 20 , and the trimming module 30 are exemplarily introduced below.

[0075] See also Figure 2 , Figure 2 A block diagram of a bandgap reference circuit according to an embodiment of the present disclosure is shown.

[0076] In a possible implementation, Figure 2 As shown, the startup module 10 may include a zeroth transistor M0, a first transistor M1, and a second transistor M2, wherein:

[0077] The gate of the zeroth transistor M0 is grounded (GND), the source of the zeroth transistor M0 is used to receive the power supply voltage VDD, and the drain of the zeroth transistor M0 is connected to the drain of the first transistor M1 and the gate of the second transistor M2.

[0078] The gate of the first transistor M1 is used to receive a start control signal VN.

[0079] The drain of the second transistor M2 is used to receive the first bias voltage PBIAS1.

[0080] A source of the first transistor M1 and a source of the second transistor M2 are grounded.

[0081] In the disclosed embodiment, the startup module 10 injects a startup current into the VN node to prevent the bandgap reference voltage source module 20 from entering a zero degeneracy point state when powered on, wherein the degeneracy point refers to a DC static operating point at which the circuit can be self-stabilized. When the circuit starts working, there may be several static operating points. For the bandgap reference voltage source module 20, there are often two or more degeneracy points. It is necessary to design a startup circuit to eliminate the degeneracy points that are not needed in the design, so that the circuit works in the state required by the design.

[0082] In a possible implementation, Figure 2As shown, the bandgap reference voltage source module 20 may be a first-order current-type bandgap reference voltage source, and the bandgap reference voltage source module 20 may include a zeroth resistor R0, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a third transistor M3, a fourth transistor M4, a fifth transistor M5, a sixth transistor M6, a seventh transistor M7, a zeroth transistor Q0, a first transistor Q1, a zeroth operational amplifier OPA0, and a first operational amplifier OPA1, wherein,

[0083] The source of the third transistor M3, the source of the fourth transistor M4, the source of the fifth transistor M5, the source of the sixth transistor M6, and the source of the seventh transistor M7 are all used to receive the power supply voltage VDD.

[0084] The gate of the third transistor M3 is connected to the output terminal of the zeroth operational amplifier OPA0, and the output terminal of the zeroth operational amplifier OPA0 is used to output the second bias voltage PBIAS2.

[0085] The positive input terminal of the zeroth operational amplifier OPA0 is connected to the drain of the third transistor M3 and the first end of the first resistor R1, and the negative input terminal of the zeroth operational amplifier OPA0 is connected to the drain of the fourth transistor M4, the negative input terminal of the first operational amplifier OPA1 and the emitter of the zeroth transistor Q0.

[0086] A common node between the second end of the first resistor R1 and the first end of the zeroth resistor R0 is connected to the trimming module 30 as a first trimming control end.

[0087] The gate of the fourth transistor M4 is connected to the gate of the fifth transistor M5, the output terminal of the first operational amplifier OPA1 and one terminal of the startup circuit.

[0088] The output terminal of the first operational amplifier OPA1 is used to output a first bias voltage PBIAS1.

[0089] The positive input terminal of the first operational amplifier OPA1 is connected to the drain of the fifth transistor M5 and the first end of the second resistor R2.

[0090] The second end of the second resistor R2 is connected to the emitter of the first transistor Q1.

[0091] The gate of the sixth transistor M6 is used to receive the second bias voltage PBIAS2, and the gate of the seventh transistor M7 is used to receive the first bias voltage PBIAS1.

[0092] The drain of the sixth transistor M6 is connected to the drain of the seventh transistor M7 and the first end of the third resistor R3.

[0093] A common node of the second end of the third resistor R3 and the first end of the fourth resistor R4 is connected to the adjustment module 30 as a second adjustment control end.

[0094] The second end of the zeroth resistor R0, the base and the collector of the zeroth transistor Q0, the base and the collector of the first transistor Q1, and the second end of the fourth resistor R4 are all grounded.

[0095] The disclosed embodiment does not limit the specific resistor types of the zeroth resistor R0, the first resistor R1, the second resistor R2, and the third resistor R3. Those skilled in the art may set them according to actual conditions and needs. For example, in a possible implementation, the zeroth resistor R0, the first resistor R1, the second resistor R2, and the third resistor R3 may all be unsalicided p-polysilicon resistors (RPPOLYU) resistors.

[0096] See also Figure 3 , Figure 3 A schematic diagram showing the relationship between various voltages and temperatures in the bandgap reference circuit is shown.

[0097] Positive temperature coefficient voltage (V PTAT ) and negative temperature coefficient voltage (V CTAT ) usually have different slopes. In the embodiment of the present disclosure, the voltage with a smaller slope (here, the PTAT voltage) can be multiplied by a temperature-independent coefficient m. If the absolute values ​​of the two voltage slopes are equal at this time, then by adding the two curves, a bandgap voltage curve that is independent of (or almost independent of) temperature can be obtained.

[0098] If only the first-order temperature coefficient is considered, the transistor base-emitter voltage V BE (like Figure 1 V BE The positive and negative temperature coefficients can be compensated by selecting an appropriate proportionality coefficient m to realize a first-order bandgap reference voltage source.

[0099] The following is an exemplary introduction to the method of determining the coefficient m.

[0100] See also Figure 4 , Figure 4 A principle schematic diagram of a first-order bandgap reference voltage source is shown.

[0101] Assume that the output reference voltage of the first-order bandgap reference voltage source is:

[0102] vref=mV PTAT +V CTAT

[0103] Where m is a coefficient that is independent of temperature.

[0104] The negative temperature coefficient voltage is:

[0105]

[0106] Among them, V BE For the transistor in the bandgap reference voltage source (such as Figure 2 The voltage between the base and emitter of the zeroth transistor Q0 or the first transistor Q1 in the circuit is a negative temperature coefficient voltage, V G0 is the bandgap voltage of silicon at 27°C (e.g. 1.205V), k is the Boltzmann constant, T is the relative voltage, T0 is the absolute reference voltage, V BE0 is the voltage between the base and emitter of the transistor at T0, q is the charge of the electron, γ is the coefficient related to temperature, J D is the current density of the diode, J D0 is the current density of the diode at T0.

[0107] like Figure 4 As shown, when two current sources flow into two diodes, these two diodes can also be transistors with collectors connected to bases, and the voltage difference across the two ends is ΔV D Is a positive temperature coefficient voltage, the positive temperature coefficient voltage can be expressed as:

[0108]

[0109] If I1=I2, the above formula shows that ΔV D is a positive temperature coefficient voltage.

[0110] Perform the following operations:

[0111]

[0112] The temperature-independent coefficient m can be obtained as:

[0113]

[0114] The output reference voltage of the first-order bandgap reference voltage source can be obtained as:

[0115] vref=V G0 +(α-γ)V t0

[0116] The embodiment of the present disclosure can use the coefficient m to compensate for a voltage with a smaller slope, such as a PTAT voltage, to realize a first-order bandgap reference voltage source. However, due to the influence of higher-order terms, even if a reasonable coefficient m is set to perform positive temperature coefficient compensation, the temperature coefficient of the first-order bandgap reference voltage source is still as high as 20ppm / °C. Therefore, the embodiment of the present disclosure proposes to use a trimming module 30 to compensate for the temperature coefficient of the bandgap reference voltage source module 20, and generate a bandgap reference voltage based on the intermediate voltage to achieve a lower temperature coefficient.

[0117] For example, Figure 2 As shown, according to the principle of virtual shorting of the positive and negative terminals of the negative feedback of the operational amplifier, the positive input voltage of the zeroth operational amplifier OPA0 is equal to the negative input voltage, which is equal to the base-emitter voltage V of the zeroth transistor Q0. BE0 , so we can get a negative temperature coefficient current (I CTAT ):

[0118]

[0119] Here, R0 represents the resistance value of the zeroth resistor R0, and R1 represents the resistance value of the first resistor R1.

[0120] Similarly, the positive input voltage of the first operational amplifier OPA1 is equal to the negative input voltage, which is equal to the base-emitter voltage V of the first transistor Q1. BE1 , so we can get a positive temperature coefficient current (I PTAT ):

[0121]

[0122] Wherein, R2 represents the resistance value of the second resistor R2.

[0123] The positive temperature coefficient current I is mirrored by a current mirror (including the sixth transistor M6 and the seventh transistor M7). PTAT and negative temperature coefficient current I CTAT And make them flow through the third resistor R3 and the fourth resistor R4. When the appropriate zeroth resistor R0, the first resistor R1, the second resistor R2, the third resistor R3 and the fourth resistor R4 are selected, an intermediate voltage Vref1 that is independent of the first-order temperature coefficient can be obtained:

[0124]

[0125] Wherein, R3 represents the resistance value of the third resistor R3, and R4 represents the resistance value of the fourth resistor R4.

[0126] See also Figure 5 , Figure 5FIG. 4 is a schematic diagram showing a curve of an intermediate voltage output by a bandgap reference voltage source module 20 in a bandgap reference circuit according to an embodiment of the present disclosure.

[0127] because Figure 2 The base-emitter voltage of the transistor in the bandgap reference voltage source module 20 also contains high-order terms, so Figure 5 As shown, the obtained temperature curve is a parabola with low ends and high middle. The temperature coefficient can be as low as about 20ppm / ℃.

[0128] Therefore, the embodiment of the present disclosure compensates the temperature coefficient of the bandgap reference voltage source module 20 through the trimming module 30 to achieve a lower temperature coefficient within the full temperature range.

[0129] In a possible implementation, Figure 2 As shown, the trimming module 30 may include an eighth transistor M8, a ninth transistor M9, a tenth transistor M10, an eleventh transistor M11, and a fifth resistor R5, wherein:

[0130] The source of the eighth transistor M8, the first end of the fifth resistor R5 and the source of the eleventh transistor M11 are used to receive the power supply voltage VDD.

[0131] The gate of the eighth transistor M8 is used to receive the first bias voltage PBIAS1, and the drain of the eighth transistor M8 is connected to the gate of the ninth transistor M9, the drain of the ninth transistor M9 and the gate of the tenth transistor M10.

[0132] The second end of the fifth resistor R5 is connected to the gate of the eleventh transistor M11 and the drain of the tenth transistor M10.

[0133] The drain of the eleventh transistor M11 is connected to the second trimming control terminal in the bandgap reference voltage source module 20, and the drain of the eleventh transistor M11 is used to output the bandgap reference voltage.

[0134] A source of the ninth transistor M9 and a source of the tenth transistor M10 are grounded.

[0135] By reasonably setting the size of the fifth resistor R5, the embodiment of the present disclosure can enable the bandgap reference circuit to achieve a lower temperature coefficient within the operating temperature range and output an accurate and stable bandgap voltage.

[0136] Of course, the specific setting and calibration of the fifth resistor R5 are not limited in the embodiment of the present disclosure. Those skilled in the art can adopt relevant technologies to implement it according to actual conditions and needs. The preferred implementation method is exemplarily introduced below.

[0137] In a possible implementation, the fifth resistor R5 may be a positive temperature coefficient resistor with adjustable resistance, and the temperature coefficient of the fifth resistor R5 is greater than the temperature coefficient of the second resistor R2 in the bandgap reference voltage source module 20. Figure 2 As shown, the adjustment module 30 may further include a zeroth mode selection switch SW0 and a first mode selection switch SW1, wherein:

[0138] The first end of the zeroth mode selection switch SW0 is connected to the first trimming control end (the common node of the second end of the first resistor R1 and the first end of the zeroth resistor R0) in the bandgap reference voltage source module 20, and the second end of the zeroth mode selection switch SW0 is grounded.

[0139] The first end of the first mode selection switch SW1 is connected to the second trimming control end (a common node between the second end of the third resistor R3 and the first end of the fourth resistor R4) in the bandgap reference voltage source module 20, and the second end of the first mode selection switch SW1 is connected to the drain of the eleventh transistor M11.

[0140] The control end of the zeroth mode selection switch SW0 and the control end of the first mode selection switch SW1 are used to receive a switch control signal to implement mode switching.

[0141] In one example, in the calibration mode, the zeroth mode selection switch SW0 and the first mode selection switch SW1 are both set to the on state, and the resistance of the fifth resistor R5 can be adjusted according to the output bandgap reference voltage at different temperatures to achieve calibration; in the normal working mode, the zeroth mode selection switch SW0 and the first mode selection switch SW1 are both set to the off state, so that the bandgap reference circuit can work normally.

[0142] See also Figure 6 , Figure 6 A schematic diagram showing a voltage output by a bandgap reference circuit according to an embodiment of the present disclosure is shown.

[0143] For example, Figure 6 As shown, after the trimming module 30 is used to perform temperature coefficient compensation with the trimming voltage, as the temperature rises, the temperature coefficient of the bandgap voltage output by the bandgap reference circuit decreases, and has higher stability compared to the general BGR.

[0144] The embodiment of the present disclosure does not limit the specific implementation method of adjusting the resistance of the fifth resistor R5 according to the output bandgap reference voltage at different temperatures to achieve calibration, and those skilled in the art can adopt relevant technologies to achieve it according to actual conditions and needs.

[0145] In a possible implementation, the circuit may further include a control module (not shown), the control module being connected to the resistance adjustment end of the fifth resistor R5, the control end of the zeroth mode selection switch SW0, and the control end of the first mode selection switch SW1, for:

[0146] Outputting a first set of switch control signals to control the circuit to operate in a calibration mode, in which the zeroth mode selection switch SW0 and the first mode selection switch SW1 are both set to an on state;

[0147] In the calibration mode, a first bandgap reference voltage and a second bandgap reference voltage outputted by the drain of the eleventh transistor M11 at a first preset temperature and a second preset temperature are obtained respectively, and a resistance adjustment signal is outputted according to the first bandgap reference voltage and the second bandgap reference voltage to adjust the resistance of the fifth resistor R5.

[0148] Wherein, the first preset temperature is lower than the second preset temperature,

[0149] Wherein, at the first preset temperature, the compensation current flowing through the drain of the eleventh transistor M11 is less than a preset value.

[0150] In a possible implementation manner, adjusting the resistance of the fifth resistor R5 according to the first bandgap reference voltage and the second bandgap reference voltage output resistance adjustment signal may include:

[0151] At the second preset temperature, the resistance of the fifth resistor R5 is adjusted using the resistance adjustment signal until the voltage value of the second bandgap reference voltage is equal to or approximately equal to the voltage value of the first bandgap reference voltage.

[0152] In a possible implementation manner, the control module may also be used to:

[0153] The second set of switch control signals is output to control the circuit to operate in a normal working mode. In the normal working mode, the zeroth mode selection switch SW0 and the first mode selection switch SW1 are both set to an off state.

[0154] The working principle and working method of the adjustment module 30 are exemplarily introduced below.

[0155] See also Figure 7 , Figure 7 FIG. 4 is a partial structural diagram of a trimming module 30 in a bandgap reference circuit according to an embodiment of the present disclosure.

[0156] For example, Figure 2As shown, the embodiment of the present disclosure uses a current mirror formed by an eighth transistor M8, a ninth transistor M9, and a tenth transistor M10 to mirror the positive temperature coefficient current and flow it through the fifth resistor R5 (as shown in FIG. Figure 7 I PTAT ), and a voltage proportional to the square of the temperature is obtained (V∝PTAT 2 ).

[0157] For example, Figure 2 As shown, the output reference voltage Vref after adding the trimming module 30 is:

[0158]

[0159] Differentiating the above formula yields:

[0160]

[0161] The source-gate voltage V of the eleventh transistor M11 SG11 for:

[0162]

[0163] Among them, when V SG11 <V THP , no current will flow through M11; when V SG11 Close to V THP When M11 works in the weak inversion region, the drain current I of the eleventh transistor M11 can be obtained. NL :

[0164]

[0165] when is approximately equal to zero. Because V SG11 ∝T 2 , so we get I NL ∝exp(T), that is, the drain current I of the eleventh transistor M11 NL Exponentially related to temperature T.

[0166] When V SG11 Greater than V THP When M11 works in the strong inversion region, the drain current I of the eleventh transistor M11 can be obtained. NL :

[0167]

[0168] Because the mobility μ p ∝T -2 ; So we get I NL ∝T 2, that is, the drain current I of the eleventh transistor M11 NL is related to the square of the temperature T.

[0169] Exemplarily, the relationship between the drain current I of the eleventh transistor M11 NL and the temperature T can be expressed as:

[0170]

[0171] According to the above formula, when the temperature is less than T0, the compensation current is zero; when the temperature T0 < T < T1, the compensation current increases exponentially with the increase of temperature; when the temperature is greater than T1, the compensation current increases with the increase of temperature and is proportional to the square of the temperature.

[0172] Exemplarily, in the embodiments of the present disclosure, by reasonably designing the value of I PTAT the size of the fifth resistor R5 and the aspect ratio of the eleventh transistor M11, it can be designed that when the temperature is lower than T0 (such as 25 °C), the non-linear calibration current is zero, corresponding to the situation of T0 in the above formula, that is, when the temperature is less than T0, the compensation current is zero;

[0173] When the temperature is in the case of T0 < T < T1, for example, greater than 25 °C and less than 70 °C, the non-linear compensation current increases exponentially with the increase of temperature;

[0174] When the temperature is greater than T1, for example, 70 °C, the compensation current increases with the increase of temperature and is proportional to the square of the temperature.

[0175] Therefore, since only when the temperature is greater than 25 °C and less than 70 °C, the temperature coefficient slope of the non-linear compensation current This slope is greater than the temperature coefficient slope of the negative temperature coefficient term at this time Therefore, it is reflected in the output of Vref that it decreases first and then gradually increases;

[0176] When the temperature is greater than 70 °C, the temperature coefficient slope of the compensation current This temperature coefficient slope is less than the slope of the negative temperature coefficient term at this time. Therefore, it is reflected in the output of the reference voltage Vref that it increases first and then gradually decreases. Therefore, when the value of the reference voltage Vref corresponding to 70 °C can be adjusted, a reference voltage source with a small deviation can be obtained in the full temperature range.

[0177] Exemplarily, since the curvature compensation is related to the resistance value of the fifth resistor R5 and the threshold voltage of the eleventh transistor M11, etc., it is difficult for the factory to ensure absolute accuracy during production. Therefore, for a high-precision reference voltage source, each chip needs to be calibrated before leaving the factory; when the value of the fifth resistor R5 is changed, the temperature of T0 can be adjusted. The larger the fifth resistor R5, the smaller the values of T0 and T1, and vice versa;

[0178] For example, an output voltage V1 of Vref can be measured at room temperature of 25°C. At this time, when the corresponding temperature is less than T0, the gate-source voltage of the eleventh transistor M11 is Then, another output voltage V2 of Vref is measured at 75°C. At this time, the gate-source voltage of the eleventh transistor M11 is By adjusting the calibration value of the fifth resistor R5, the gate-source voltage of the eleventh transistor M11 can be increased or decreased. Increasing the value of the fifth resistor R5 can increase V SG11 , thereby increasing the compensation current I flowing out of the eleventh transistor M11 NL , thereby increasing the influence of the positive temperature coefficient of the compensation current in the reference voltage source, and conversely reducing the resistance of the fifth resistor R5 can reduce V SG11 , thereby reducing the compensation current I flowing out of the eleventh transistor M11 NL , thereby reducing the influence of the positive temperature coefficient term of the compensation current, and adjusting the resistance value of the fifth resistor R5 so that V1=V2, it means that the positive and negative temperature coefficient terms of the reference voltage source are offset at this time, so as to achieve the purpose of curvature calibration.

[0179] See also Figure 8 , Fig. 9 , Figure 8 The schematic diagram of the voltage curve obtained after the voltage is calibrated with resistance at different temperatures is shown. Fig. 9 A schematic diagram of the temperature coefficient simulation results after curvature compensation is shown.

[0180] For example, Figure 8 As shown, for the voltages obtained at different temperatures, such as V2 being greater than V1 or V2 being less than V1, the output temperatures at different temperatures can be made equal after calibration and adjustment by the adjustment module 30, that is, V2 = V1.

[0181] In the embodiment of the present disclosure, the influence caused by the process deviation can be eliminated by adjusting the value of the fifth resistor R5, and the output reference voltage after curvature compensation can achieve a lower temperature coefficient. Fig. 9 As shown, its temperature coefficient is reduced to 1.4ppm / ℃.

[0182] In the embodiment of the present disclosure, a startup module 10 outputs a startup current to enable the circuit to leave the zero degenerate state and enter a normal working state, a bandgap reference voltage source module 20 (such as a first-order current-type bandgap reference voltage source) is used to provide an intermediate voltage with a low temperature coefficient, and an adjustment module 30 is used to perform segmented compensation on the temperature coefficient of the bandgap reference voltage source module 20 to achieve a lower temperature coefficient. The adjusted circuit can achieve a lower temperature coefficient within the entire temperature range, and has a simple structure, which is conducive to reducing costs.

[0183] According to one aspect of the present disclosure, an electronic device is provided, and the electronic device includes the bandgap reference circuit.

[0184] The embodiments of the present disclosure do not limit the specific types of electronic devices, and those skilled in the art may configure them according to actual conditions and needs. The electronic device may include devices such as a voltage regulator provided with a bandgap reference circuit, an analog-to-digital converter (ADC), and a digital-to-analog converter (DAC). For example, the electronic device may include a terminal device. In one example, the terminal is also referred to as user equipment (UE), a mobile station (MS), a mobile terminal (MT), etc., and is a device that provides voice and / or data connectivity to users, such as a handheld device with wireless connection function, a vehicle-mounted device, etc. At present, some examples of terminals are: mobile phones, tablet computers, laptops, PDAs, mobile Internet devices (MID), wearable devices, virtual reality (VR) devices, augmented reality (AR) devices, wireless terminals in industrial control (Industrial Control), wireless terminals in self-driving, wireless terminals in remote medical surgery, wireless terminals in smart grid (Smart Grid), wireless terminals in transportation safety (Transportation Safety), wireless terminals in smart cities (Smart City), wireless terminals in smart homes (Smart Home), wireless terminals in Internet of Vehicles, etc.

[0185] The embodiments of the present disclosure have been described above, and the above description is exemplary, not exhaustive, and is not limited to the disclosed embodiments. Many modifications and changes will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The selection of terms used herein is intended to best explain the principles of the embodiments, practical applications, or improvements to the technology in the market, or to enable other persons of ordinary skill in the art to understand the embodiments disclosed herein.

Claims

1. A bandgap reference circuit, characterized in that: The circuit comprises: A starting module, used for providing starting current; a bandgap reference voltage source module, connected to the startup module, and used to receive the startup current and the power supply voltage to generate an intermediate voltage, wherein the startup current is used to make the bandgap reference voltage source module leave the zero degenerate state and enter the normal working state; The trimming module is connected to the bandgap reference voltage source module and is used to compensate the temperature coefficient of the bandgap reference voltage source module and generate a bandgap reference voltage according to the intermediate voltage.

2. The circuit according to claim 1, characterized in that The startup module includes a zeroth transistor, a first transistor, and a second transistor, wherein: The gate of the zeroth transistor is grounded, the source of the zeroth transistor is used to receive a power supply voltage, and the drain of the zeroth transistor is connected to the drain of the first transistor and the gate of the second transistor. The gate of the first transistor is used to receive a start control signal. The drain of the second transistor is used to receive a first bias voltage. A source of the first transistor and a source of the second transistor are grounded.

3. The circuit according to claim 1 or 2, characterized in that The bandgap reference voltage source module includes a zeroth resistor, a first resistor, a second resistor, a third resistor, a fourth resistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, a zeroth triode, a first triode, a zeroth operational amplifier, and a first operational amplifier, wherein: The source of the third transistor, the source of the fourth transistor, the source of the fifth transistor, the source of the sixth transistor, and the source of the seventh transistor are all used to receive a power supply voltage. The gate of the third transistor is connected to the output terminal of the zeroth operational amplifier, and the output terminal of the zeroth operational amplifier is used to output a second bias voltage. The positive input terminal of the zeroth operational amplifier is connected to the drain of the third transistor and the first end of the first resistor, and the negative input terminal of the zeroth operational amplifier is connected to the drain of the fourth transistor, the negative input terminal of the first operational amplifier and the emitter of the zeroth transistor. A common node of the second end of the first resistor and the first end of the zeroth resistor is connected to the trimming module as a first trimming control end. The gate of the fourth transistor is connected to the gate of the fifth transistor, the output terminal of the first operational amplifier and one terminal of the startup circuit. The output terminal of the first operational amplifier is used to output a first bias voltage. The positive input terminal of the first operational amplifier is connected to the drain of the fifth transistor and the first terminal of the second resistor. The second end of the second resistor is connected to the emitter of the first transistor. The gate of the sixth transistor is used to receive the second bias voltage, and the gate of the seventh transistor is used to receive the first bias voltage. The drain of the sixth transistor is connected to the drain of the seventh transistor and the first end of the third resistor. A common node of the second end of the third resistor and the first end of the fourth resistor is connected to the trimming module as a second trimming control end. The second end of the zeroth resistor, the base and collector of the zeroth transistor, the base and collector of the first transistor, and the second end of the fourth resistor are all grounded.

4. The circuit according to claim 3, characterized in that The zeroth resistor, the first resistor, the second resistor, and the third resistor are all unsalicided p-polysilicon resistors (rppolyu) resistors.

5. The circuit according to claim 1, characterized in that The trimming module includes an eighth transistor, a ninth transistor, a tenth transistor, an eleventh transistor, and a fifth resistor, wherein: The source of the eighth transistor, the first end of the fifth resistor and the source of the eleventh transistor are used to receive the power supply voltage. The gate of the eighth transistor is used to receive a first bias voltage, and the drain of the eighth transistor is connected to the gate of the ninth transistor, the drain of the ninth transistor, and the gate of the tenth transistor. The second end of the fifth resistor is connected to the gate of the eleventh transistor and the drain of the tenth transistor. The drain of the eleventh transistor is connected to the second trimming control terminal in the bandgap reference voltage source module, and the drain of the eleventh transistor is used to output the bandgap reference voltage. A source of the ninth transistor and a source of the tenth transistor are grounded.

6. The circuit according to claim 5, characterized in that The fifth resistor is a positive temperature coefficient resistor with adjustable resistance, the temperature coefficient of the fifth resistor is greater than the temperature coefficient of the second resistor in the bandgap reference voltage source module, and the trimming module further includes a zero mode selection switch and a first mode selection switch, wherein: The first end of the zeroth mode selection switch is connected to the first trimming control end of the bandgap reference voltage source module, and the second end of the zeroth mode selection switch is grounded. The first end of the first mode selection switch is connected to the second trimming control end of the bandgap reference voltage source module, and the second end of the first mode selection switch is connected to the drain of the eleventh transistor. The control end of the zeroth mode selection switch and the control end of the first mode selection switch are used to receive a switch control signal to achieve mode switching.

7. The circuit according to claim 6, characterized in that The circuit further includes a control module, which is connected to the resistance adjustment end of the fifth resistor, the control end of the zeroth mode selection switch and the control end of the first mode selection switch, and is used for: Outputting a first set of switch control signals to control the circuit to operate in a calibration mode, wherein the zeroth mode selection switch and the first mode selection switch are both set to an on state; In the calibration mode, a first bandgap reference voltage and a second bandgap reference voltage outputted by the drain of the eleventh transistor at a first preset temperature and a second preset temperature are respectively obtained, and a resistance adjustment signal is outputted according to the first bandgap reference voltage and the second bandgap reference voltage to adjust the resistance of the fifth resistor. Wherein, the first preset temperature is lower than the second preset temperature, Wherein, at the first preset temperature, the compensation current flowing through the drain of the eleventh transistor is less than a preset value.

8. The circuit according to claim 7, characterized in that The resistance of the fifth resistor is adjusted according to the first bandgap reference voltage and the second bandgap reference voltage output resistance adjustment signal, including: At the second preset temperature, the resistance of the fifth resistor is adjusted using the resistance adjustment signal until the voltage value of the second bandgap reference voltage is equal to or approximately equal to the voltage value of the first bandgap reference voltage.

9. The circuit according to claim 6, characterized in that The control module is also used for: A second set of switch control signals is output to control the circuit to operate in a normal working mode. In the normal working mode, the zeroth mode selection switch and the first mode selection switch are both set to an open state.

10. An electronic device, characterized in that: The electronic device comprises the bandgap reference circuit as claimed in any one of claims 1 to 9.

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