Parallel simulation task delay optimization method and device, equipment and storage medium

Abstract

The invention discloses a parallel simulation task delay optimization method and device, equipment and a storage medium, and the method comprises the steps: obtaining delay attribute data of each task node in a target simulation critical path, the target simulation critical path comprising a root node and a plurality of child nodes; calculating the rank of each task node according to the delay attribute data to obtain a node priority; selecting a priority task node corresponding to the maximum node priority, and distributing the priority task node to a target idle processor for task processing based on a preset distribution condition; and carrying out delayed attribute updating operation on the priority task node to obtain an updated task node. The technical problem that the overall calculation efficiency is low due to the fact that efficient scheduling of high-delay tasks cannot be achieved and processing of complex tasks is difficult to adapt in the prior art can be solved.

Description

Technical Field

[0001] The present application relates to the field of data processing technology, and in particular to a method, device, equipment and storage medium for optimizing delay of parallel simulation tasks. Background Art

[0002] Power system simulation is the process of building a mathematical model for the physical process of the power system on a digital computer and solving it through mathematical methods for simulation research. This process is an important means to support the cognition and research of power systems. For example, in the electromagnetic transient parallel simulation process, each task will generate an independent simulation process, and these processes will be distributed to different cores for independent calculation. Due to the dependencies between tasks, some tasks must be calculated after other tasks have completed the calculation and transmitted data. Therefore, in order to complete all tasks as soon as possible, these tasks must be scheduled using a reasonable scheduling algorithm.

[0003] As the scale of new power systems increases and their structures change, their operating characteristics become more complex. The rapid dynamic response characteristics of power systems and the large scale of the system have brought new challenges and urgent improvement needs to the static task scheduling methods of parallel simulation technology. Traditional task scheduling methods are often unable to effectively handle high-latency tasks, resulting in low overall computing efficiency, especially in complex power grid structures, which are difficult to adapt to the challenges brought about by cross-regional networking and the increasing proportion of new energy. Summary of the invention

[0004] The present application provides a parallel simulation task delay optimization method, device, equipment and storage medium, which are used to solve the technical problems that the existing technology cannot achieve efficient scheduling of high-latency tasks, is difficult to adapt to the processing of complex tasks, and leads to low overall computing efficiency.

[0005] In view of this, the first aspect of the present application provides a parallel simulation task delay optimization method, comprising:

[0006] Obtaining delay attribute data of each task node in a target simulation critical path, wherein the target simulation critical path includes a root node and a plurality of child nodes;

[0007] Calculate the rank of each of the task nodes according to the delay attribute data to obtain a node priority;

[0008] Selecting a priority task node corresponding to the largest node priority, and assigning the priority task node to a target idle processor for task processing based on a preset assignment condition;

[0009] A delayed attribute update operation is performed on the priority task node to obtain an updated task node.

[0010] Preferably, calculating the rank of each of the task nodes according to the delay attribute data to obtain the node priority includes:

[0011] Calculate the node calculation time and task transmission time of each task node according to the delay attribute data;

[0012] The rank of each task node is calculated according to the node calculation time and the task transmission time to obtain the node priority.

[0013] Preferably, the selecting the priority task node corresponding to the largest node priority and allocating the priority task node to the target idle processor for task processing based on a preset allocation condition includes:

[0014] Select the priority task node corresponding to the largest node priority;

[0015] Configuring a preset allocation condition, wherein the preset allocation condition includes that the processor has an idle time period, satisfies a priority constraint condition, and the duration of the idle time period is greater than or equal to the execution time of the priority task node;

[0016] The target idle processor is screened based on the preset allocation condition, and the priority task node is allocated to the target idle processor for task processing.

[0017] Preferably, performing a delayed attribute update operation on the priority task node to obtain an updated task node includes:

[0018] Performing a delay attribute update operation on the priority task node after the scheduling is executed to obtain a delay attribute update value;

[0019] The delay attribute update value replaces the delay attribute data, and returns to the step of calculating the rank of each task node according to the delay attribute data to obtain the node priority, thereby obtaining the update priority and the corresponding update task node.

[0020] A second aspect of the present application provides a parallel simulation task delay optimization device, comprising:

[0021] A data acquisition unit, used to acquire delay attribute data of each task node in a target simulation critical path, wherein the target simulation critical path includes a root node and a plurality of child nodes;

[0022] A priority calculation unit, used to calculate the rank of each of the task nodes according to the delay attribute data to obtain a node priority;

[0023] A task allocation unit, configured to select a priority task node corresponding to the largest node priority, and allocate the priority task node to a target idle processor for task processing based on a preset allocation condition;

[0024] The attribute updating unit is used to perform a delayed attribute updating operation on the priority task node to obtain an updated task node.

[0025] Preferably, the priority calculation unit is specifically used for:

[0026] Calculate the node calculation time and task transmission time of each task node according to the delay attribute data;

[0027] The rank of each task node is calculated according to the node calculation time and the task transmission time to obtain the node priority.

[0028] Preferably, the task allocation unit is specifically used to:

[0029] Select the priority task node corresponding to the largest node priority;

[0030] Configuring a preset allocation condition, wherein the preset allocation condition includes that the processor has an idle time period, satisfies a priority constraint condition, and the duration of the idle time period is greater than or equal to the execution time of the priority task node;

[0031] The target idle processor is screened based on the preset allocation condition, and the priority task node is allocated to the target idle processor for task processing.

[0032] Preferably, the attribute updating unit is specifically used for:

[0033] Performing a delay attribute update operation on the priority task node after the scheduling is executed to obtain a delay attribute update value;

[0034] The delay attribute update value replaces the delay attribute data, and triggers the priority calculation unit to obtain the update priority and the corresponding update task node.

[0035] A third aspect of the present application provides a parallel simulation task delay optimization device, the device comprising a processor and a memory;

[0036] The memory is used to store program code and transmit the program code to the processor;

[0037] The processor is used to execute the parallel simulation task delay optimization method described in the first aspect according to the instructions in the program code.

[0038] A fourth aspect of the present application provides a computer-readable storage medium, wherein the computer-readable storage medium is used to store program code, and the program code is used to execute the parallel simulation task delay optimization method described in the first aspect.

[0039] It can be seen from the above technical solutions that the embodiments of the present application have the following advantages:

[0040] In the present application, a parallel simulation task delay optimization method is provided, including: obtaining delay attribute data of each task node in a target simulation critical path, the target simulation critical path includes a root node and multiple child nodes; calculating the rank of each task node according to the delay attribute data to obtain a node priority; selecting a priority task node corresponding to the largest node priority, and allocating the priority task node to a target idle processor for task processing based on preset allocation conditions; performing a delay attribute update operation on the priority task node to obtain an updated task node.

[0041] The parallel simulation task delay optimization method provided by the present application combines the concept of dynamic critical path delay optimization, performs delay attribute analysis on high-delay simulation tasks, and calculates the node priority of each task node; then selects the priority task node for priority scheduling according to the node priority; in addition, selects the appropriate target idle processor for task processing based on the preset allocation conditions to ensure that the selected task nodes and processors can meet the requirements of fast task processing; in addition, updates the node priority attribute through the update operation of the node delay attribute to ensure the efficiency of task processing; this process can process high-latency tasks quickly and efficiently, and can also adapt to the parallel analysis of tasks in complex scenarios. Therefore, the present application can solve the technical problems that the prior art cannot realize efficient scheduling of high-latency tasks, is difficult to adapt to the processing of complex tasks, and leads to low overall computing efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] Figure 1 A flowchart of a parallel simulation task delay optimization method provided in an embodiment of the present application;

[0043] Figure 2 A schematic diagram of the structure of a parallel simulation task delay optimization device provided in an embodiment of the present application;

[0044] Figure 3 A histogram of the running time of the scheduling scheme based on the HEFT method provided for the application example of this application;

[0045] Figure 4 A histogram of the running time of the scheduling scheme based on the method of the present application provided for the application example of the present application;

[0046] Figure 5 An example diagram comparing the scheduling results of the two solutions provided for the application example of this application;

[0047] Figure 6 An example diagram comparing the load conditions of the two solutions provided for the application example of this application on each core;

[0048] Figure 7 An example diagram comparing the scheduling lengths of the two schemes provided for the application example of this application. DETAILED DESCRIPTION

[0049] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0050] For easier understanding, see Figure 1 , an embodiment of a parallel simulation task delay optimization method provided by the present application includes:

[0051] Step 101: Obtain delay attribute data of each task node in a target simulation critical path, where the target simulation critical path includes a root node and multiple child nodes.

[0052] The target simulation critical path is the task geometry with significant delay, where the nodes are tasks, the root node can be the first task, and the child node can be the connected subtasks executed after the first task. The delay attribute data of each task node includes some parameters that affect the delay, including some dependencies between task nodes, communication time, and the computational cost of the processor; it can be extracted from the task node as needed, and the details are not described here.

[0053] Step 102: Calculate the rank of each task node according to the delay attribute data to obtain the node priority.

[0054] Furthermore, step 102 includes:

[0055] Calculate the node calculation time and task transmission time of each task node according to the delay attribute data;

[0056] The rank of each task node is calculated based on the node calculation time and task transmission time to obtain the node priority.

[0057] It should be noted that the process of calculating the node calculation time of the task node and the task transmission time according to the delay attribute data can be expressed as:

[0058]

[0059]

[0060] in, , Respectively represent the task nodes in the processor The node computation time and all tasks on the processor The average transmission time on ; Indicates the current processor The computational time cost on represents the weight between node i and node j, Indicates the number of task nodes, Represents the number of edges between all task nodes.

[0061] Then calculate the rank of each task node based on the node calculation time and task transmission time:

[0062]

[0063] in, For task nodes in the processor The rank value of To represent the task node After the task node, Represents a task node The set of all subsequent task nodes, that is, the node A collection of nodes with dependencies. is the weight between node i and node k, and node k is a node in the set of all subsequent task nodes of node i; this characterizes the dependency between task nodes, that is, the calculation process of node priority takes into account the dependency between task nodes. For Node The set of rank values ​​of all subsequent task nodes.

[0064] Step 103: Select a priority task node corresponding to the largest node priority, and allocate the priority task node to a target idle processor for task processing based on a preset allocation condition.

[0065] Further, step 103 includes:

[0066] Select the priority task node corresponding to the largest node priority;

[0067] Configure preset allocation conditions, the preset allocation conditions include that the processor has an idle time period, satisfies the priority constraint condition, and the duration of the idle time period is greater than or equal to the execution time of the priority task node;

[0068] The target idle processor is screened based on the preset allocation conditions, and the priority task nodes are allocated to the target idle processor for task processing.

[0069] In order to ensure that the priority task node selected based on the node priority can be smoothly scheduled to the appropriate processor for execution, this embodiment screens the processor based on the preset allocation conditions. The screened target idle processor not only needs to have an idle time period, but also this idle time period must be greater than or equal to the execution time of the priority task node, so as to ensure that the task is effectively executed; in addition, since there is a priority attribute between tasks, the processor cannot violate the task priority constraint when receiving the task node for task processing, that is, the task with a high priority must be processed first, and there cannot be a situation where a lower priority task is processed before a higher priority task. Other allocation conditions can also be set according to actual conditions to select a processor that better meets actual needs to help improve the efficiency of task scheduling, and the specific conditions are not limited here.

[0070] It is understandable that the idle time period refers to the time interval between two consecutive scheduled tasks on the processor. Once a suitable target idle processor is found, the priority task node can be assigned to the processor for task processing. If a processor that meets the preset allocation conditions cannot be found, it is necessary to wait for the last scheduled task on the processor to complete before arranging the allocation of the current task. If dependent task nodes can be assigned to the same processor, the communication delay will be significantly reduced, which will help improve the scheduling efficiency of tasks.

[0071] Step 104: Perform a delayed attribute update operation on the priority task node to obtain an updated task node.

[0072] Furthermore, step 104 includes:

[0073] Perform delay attribute update operation on the priority task node after scheduling execution to obtain the delay attribute update value;

[0074] The delay attribute update value replaces the delay attribute data, and returns the step of calculating the rank of each task node according to the delay attribute data to obtain the node priority, and obtains the update priority and the corresponding update task node.

[0075] Since the delay of a task node may change after it is assigned to a processor for processing, which changes the delay attribute of the task node, the delay attribute update operation needs to be performed after the task node is scheduled to obtain the delay attribute update value; and based on the delay attribute update value, the corresponding update priority can be calculated. At this time, the update priority is to update the dynamic update attribute of the task node; according to the update priority, the scheduling order of each task node can be adjusted, that is, the order of subsequent simulation calculations can be adjusted to ensure that high-level tasks can be executed as soon as possible to avoid blocking other tasks.

[0076] Each task assigned to the processor must perform actual electromagnetic transient simulation calculations, and the calculation content may include numerical solutions to electromagnetic transients in the power grid, simulations of physical quantities such as current and voltage in the network, etc. After each task is completed, the calculation results such as node current, voltage, and state quantity will be fed back to the system for use by subsequent tasks. Since the simulation is performed dynamically, the results of the current task may affect the calculation of subsequent tasks. The simulation system will continue to repeat the scheduling and calculation process of tasks until all node tasks are completed and the entire electromagnetic transient simulation process ends. In other words, since there are multiple tasks executed in parallel in the power system, or there are complex calculation relationships between the previous and next tasks, if the attributes of the task nodes can be adjusted dynamically in time, the efficiency of subsequent calculation operations can also be improved, so that the execution of the tasks of the entire simulation system is a dynamically updated calculation process, which is more flexible and in line with the actual situation.

[0077] For ease of understanding, this application provides a real power grid data simulation model operation comparison case, please refer to Figure 3 and Figure 4 , Figure 3 is the running time of the simulation task scheduling scheme based on the existing HEFT (Heterogeneous Earliest-Finish-Time algorithm) method, Figure 4 The running time of the simulation task scheduling scheme of the parallel simulation task delay optimization method provided in the embodiment of the present application. For a comparison of the scheduling results of the two schemes, please refer to Figure 5 For a comparison of the load of the two solutions on each core, please refer to Figure 6 ; For comparison of scheduling lengths, see Figure 7 Comprehensive analysis shows that the solution provided by this application can achieve simulation acceleration, more balanced load, and improve the efficiency and reliability of simulation task execution.

[0078] The parallel simulation task delay optimization method provided by the embodiment of the present application combines the concept of dynamic critical path delay optimization, performs delay attribute analysis on high-delay simulation tasks, and calculates the node priority of each task node; then selects the priority task node for priority scheduling according to the node priority; in addition, selects the appropriate target idle processor for task processing based on the preset allocation conditions to ensure that the selected task nodes and processors can meet the requirements of fast task processing; in addition, updates the node priority attribute through the update operation of the node delay attribute to ensure the efficiency of task processing; this process can process high-latency tasks quickly and efficiently, and can also adapt to the parallel analysis of tasks in complex scenarios. Therefore, the embodiment of the present application can solve the technical problems that the prior art cannot realize efficient scheduling of high-latency tasks, is difficult to adapt to the processing of complex tasks, and leads to low overall computing efficiency.

[0079] For easier understanding, see Figure 2 The present application provides an embodiment of a parallel simulation task delay optimization device, comprising:

[0080] The data acquisition unit 201 is used to acquire the delay attribute data of each task node in the target simulation critical path, where the target simulation critical path includes a root node and multiple child nodes;

[0081] A priority calculation unit 202, used to calculate the rank of each task node according to the delay attribute data to obtain the node priority;

[0082] The task allocation unit 203 is used to select a priority task node corresponding to the largest node priority, and allocate the priority task node to a target idle processor for task processing based on a preset allocation condition;

[0083] The attribute updating unit 204 is used to perform a delayed attribute updating operation on the priority task node to obtain an updated task node.

[0084] Furthermore, the priority calculation unit 202 is specifically configured to:

[0085] Calculate the node calculation time and task transmission time of each task node according to the delay attribute data;

[0086] The rank of each task node is calculated based on the node calculation time and task transmission time to obtain the node priority.

[0087] Furthermore, the task allocation unit 203 is specifically configured to:

[0088] Select the priority task node corresponding to the largest node priority;

[0089] Configure preset allocation conditions, the preset allocation conditions include that the processor has an idle time period, satisfies the priority constraint condition, and the duration of the idle time period is greater than or equal to the execution time of the priority task node;

[0090] The target idle processor is screened based on the preset allocation conditions, and the priority task nodes are allocated to the target idle processor for task processing.

[0091] Furthermore, the attribute updating unit 204 is specifically configured to:

[0092] Perform delay attribute update operation on the priority task node after scheduling execution to obtain the delay attribute update value;

[0093] The delayed attribute update value replaces the delayed attribute data, and triggers the priority calculation unit to obtain the update priority and the corresponding update task node.

[0094] The present application also provides a parallel simulation task delay optimization device, the device comprising a processor and a memory;

[0095] The memory is used to store the program code and transmit the program code to the processor;

[0096] The processor is used to execute the parallel simulation task delay optimization method in the above method embodiment according to the instructions in the program code.

[0097] The present application also provides a computer-readable storage medium, which is used to store program code, and the program code is used to execute the parallel simulation task delay optimization method in the above method embodiment.

[0098] In the several embodiments provided in the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0099] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0100] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0101] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product. The computer software product is stored in a storage medium, including a number of instructions for executing all or part of the steps of the method described in each embodiment of the present application through a computer device (which can be a personal computer, server, or network device, etc.). The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (full name in English: Read-Only Memory, English abbreviation: ROM), random access memory (full name in English: Random Access Memory, English abbreviation: RAM), disk or optical disk and other media that can store program codes.

[0102] As described above, the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A parallel simulation task delay optimization method, characterized in that: include: Obtaining delay attribute data of each task node in a target simulation critical path, wherein the target simulation critical path includes a root node and a plurality of child nodes; Calculate the rank of each of the task nodes according to the delay attribute data to obtain a node priority; Selecting a priority task node corresponding to the largest node priority, and assigning the priority task node to a target idle processor for task processing based on a preset assignment condition; A delayed attribute update operation is performed on the priority task node to obtain an updated task node.

2. The parallel simulation task delay optimization method according to claim 1, characterized in that: The step of calculating the rank of each task node according to the delay attribute data to obtain the node priority includes: Calculate the node calculation time and task transmission time of each task node according to the delay attribute data; The rank of each task node is calculated according to the node calculation time and the task transmission time to obtain the node priority.

3. The parallel simulation task delay optimization method according to claim 1, characterized in that: The selecting a priority task node corresponding to the largest node priority, and allocating the priority task node to a target idle processor for task processing based on a preset allocation condition, comprises: Select the priority task node corresponding to the largest node priority; Configuring a preset allocation condition, wherein the preset allocation condition includes that the processor has an idle time period, satisfies a priority constraint condition, and the duration of the idle time period is greater than or equal to the execution time of the priority task node; The target idle processor is screened based on the preset allocation condition, and the priority task node is allocated to the target idle processor for task processing.

4. The parallel simulation task delay optimization method according to claim 1, characterized in that: The delaying attribute updating operation on the priority task node to obtain the updated task node includes: Performing a delay attribute update operation on the priority task node after the scheduling is executed to obtain a delay attribute update value; The delay attribute update value replaces the delay attribute data, and returns to the step of calculating the rank of each task node according to the delay attribute data to obtain the node priority, thereby obtaining the update priority and the corresponding update task node.

5. A parallel simulation task delay optimization device, characterized in that: include: A data acquisition unit, used to acquire delay attribute data of each task node in a target simulation critical path, wherein the target simulation critical path includes a root node and a plurality of child nodes; A priority calculation unit, used to calculate the rank of each of the task nodes according to the delay attribute data to obtain a node priority; A task allocation unit, configured to select a priority task node corresponding to the largest node priority, and allocate the priority task node to a target idle processor for task processing based on a preset allocation condition; The attribute updating unit is used to perform a delayed attribute updating operation on the priority task node to obtain an updated task node.

6. The parallel simulation task delay optimization device according to claim 5, characterized in that: The priority calculation unit is specifically used for: Calculate the node calculation time and task transmission time of each task node according to the delay attribute data; The rank of each task node is calculated according to the node calculation time and the task transmission time to obtain the node priority.

7. The parallel simulation task delay optimization device according to claim 5, characterized in that: The task allocation unit is specifically used for: Select the priority task node corresponding to the largest node priority; Configuring a preset allocation condition, wherein the preset allocation condition includes that the processor has an idle time period, satisfies a priority constraint condition, and the duration of the idle time period is greater than or equal to the execution time of the priority task node; The target idle processor is screened based on the preset allocation condition, and the priority task node is allocated to the target idle processor for task processing.

8. The parallel simulation task delay optimization device according to claim 5, characterized in that: The attribute updating unit is specifically used for: Performing a delay attribute update operation on the priority task node after the scheduling is executed to obtain a delay attribute update value; The delay attribute update value replaces the delay attribute data, and triggers the priority calculation unit to obtain the update priority and the corresponding update task node.

9. A parallel simulation task delay optimization device, characterized in that: The device comprises a processor and a memory; The memory is used to store program code and transmit the program code to the processor; The processor is used to execute the parallel simulation task delay optimization method described in any one of claims 1-4 according to the instructions in the program code.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium is used to store program code, and the program code is used to execute the parallel simulation task delay optimization method described in any one of claims 1-4.

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