NPC three-level inverter common-mode voltage suppression method

Abstract

The invention discloses a common-mode voltage suppression method for an NPC three-level inverter, and the method comprises the steps: abandoning a positive small vector with the common-mode voltage amplitude of + / -Vdc / 3 during the construction of a virtual vector, constructing a virtual small vector and a virtual middle vector through employing a negative small vector and a middle vector, and reducing the common-mode voltage generated by the NPC three-level inverter to + / -Vdc / 6. Meanwhile, the midpoint current generated by the constructed virtual vector in a switching period is zero, and the midpoint potential cannot be influenced. In addition, in one switching period, compared with a standard SVPWM switching mode, the number of actions is only two more than that of actions of the standard SVPWM switching mode. According to the method disclosed by the invention, the effectiveness of the method is verified through MATLAB / Simulink simulation test.

Description

Technical Field

[0001] The invention belongs to the technical field of power electronics, and in particular relates to a common-mode voltage suppression method for an NPC three-level inverter. Technical Background Neutral Point Clamped (NPC) three-level inverters have been widely used in high-power and high-performance fields such as motor drive and photovoltaic power generation due to their low output harmonic content, low switching device voltage stress and high efficiency. However, NPC three-level inverters output high-frequency common-mode voltage, which causes shaft current induction in the motor to cause bearing damage, and also brings problems such as electromagnetic interference and current harmonic distortion. Therefore, reducing or eliminating the common-mode voltage in NPC three-level inverters has important theoretical value and practical significance.

[0003] The common-mode voltage suppression methods of NPC three-level inverters mainly include hardware methods such as adding hardware devices and improving the converter topology structure, and software methods such as using model predictive control strategies and improving pulse width modulation strategies. The hardware method requires the addition of common-mode filters, common-mode chokes, power switch tubes, etc., which increases the system size and cost. The software method does not need to increase the cost and volume, and the model prediction method will increase the amount of calculation. The common-mode voltage suppression is achieved by optimizing the space vector synthesis rules, the action time of the switching state, and the action order of the switching state based on the improved pulse width modulation algorithm. Its economic and flexible advantages have attracted widespread attention. The improved pulse width modulation algorithms currently involved include space vector pulse width modulation (SVPWM), carrier-based pulse width modulation (CBPWM), and virtual space vector pulse width modulation (VSVPWM). However, the disadvantages of SVPWM and CBPWM are that the midpoint potential is unbalanced under low load power factor and high modulation system, resulting in the output voltage containing low-order harmonics. The VSVPWM algorithm optimizes modulation by introducing virtual vectors, providing a new idea for common-mode voltage suppression and midpoint potential control. Some people only use the middle vector and zero vector with zero common-mode voltage to synthesize virtual vectors, eliminating the common-mode voltage, but greatly reducing the modulation range. Some people use zero vectors, middle vectors and large vectors to synthesize virtual small vectors and virtual middle vectors, suppressing the common-mode voltage to one-sixth of the DC bus voltage, and controlling the midpoint voltage fluctuation by adjusting the variable coefficient of the virtual vector configuration. Since the basic small vector is not used, the switching is not smooth, resulting in the switching frequency being doubled compared to SVPWM. Summary of the invention

[0004] In view of the deficiencies in the above-mentioned prior art, the present invention provides a method for suppressing the common-mode voltage of an NPC three-level inverter. The method is based on virtual space vector modulation and can effectively reduce the common-mode voltage of the NPC three-level inverter without causing midpoint voltage fluctuations and increasing the switching frequency.

[0005] To achieve the above object, the technical solution of the present invention is as follows: a method for suppressing common-mode voltage of an NPC three-level inverter is designed, characterized in that the method comprises the following steps: S1: Each phase of the NPC three-level inverter outputs three states: P, O, and N. The three phases output 3 3 = 27 switching states, corresponding to 27 basic space voltage vectors, which are divided into 6 large sectors on the α and β axes; calculate the common mode voltage of the basic space voltage vector of the NPC three-level inverter, and analyze the influence of the basic space voltage vector on the midpoint current; S2: Redefine the first large sector virtual space vector, the virtual vector includes a virtual zero vector V VO , virtual small vector V VS 、Virtual vector V VM , Virtual Large Vector V VL , and all virtual space vectors must satisfy a switching cycle T s The midpoint current generated inside is zero: S3: For the first large sector virtual space vector in S2, the reference voltage vector V is selected by designing a selection function based on the principle of minimum loss. ref A combination of virtual small vectors with minimal switching loss during synthesis; S4: For the first large sector in S2, set the small sector and calculate V ref The boundary judgment conditions of the small sector; calculate the action time of the virtual vector and determine the switching sequence of the basic vector; S5: For the second to sixth large sectors in S1, the methods in S2-S4 are respectively processed to obtain the switching sequence of each large sector in turn; the switching sequence of each large sector is applied to the control of the NPC three-level inverter to achieve the suppression of the common mode voltage of the NPC three-level inverter.

[0006] Compared with the prior art, the present invention has the following beneficial effects: a common-mode voltage suppression method for an NPC three-level inverter designed by the present invention abandons the common-mode voltage amplitude of ±V when constructing a virtual vector. dc / 3, and construct virtual small vector and virtual middle vector by using negative small vector and middle vector, so as to reduce the common mode voltage generated by NPC three-level inverter to ±V dc / 6. At the same time, the midpoint current generated by the constructed virtual vector in one switching cycle is zero, and will not affect the midpoint potential. In addition, in one switching cycle, the switching action of the present invention is only 2 more times than that of the standard SVPWM. The effectiveness of the method of the present invention is verified by MATLAB / Simulink simulation test. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Figure 1 This is the topology diagram of the NPC three-level inverter.

[0008] Figure 2 It is the space vector diagram of NPC three-level inverter.

[0009] Figure 3 The present invention is a spatial vector diagram of redefining the first large sector virtual vector in an embodiment of a common mode voltage suppression method for an NPC three-level inverter.

[0010] Figure 4 The diagram is a small sector division diagram within a first large sector according to an embodiment of a common mode voltage suppression method for an NPC three-level inverter of the present invention.

[0011] Figure 5 The present invention is a switching timing diagram of the first small sector in the first large sector according to an embodiment of a common mode voltage suppression method for an NPC three-level inverter. DETAILED DESCRIPTION

[0012] The present invention will be described in more detail below in conjunction with the accompanying drawings.

[0013] The topology of the NPC three-level inverter is as follows: Figure 1 As shown, the inverter has three-phase bridge arms, each of which consists of four power switches and two clamping diodes. The DC side consists of two upper and lower capacitors C1 and C2. The midpoint O of the two capacitors is connected to the clamping diode to achieve midpoint clamping. V dc is the DC bus voltage, V cm is the DC bus voltage.

[0014] The present invention provides a method for suppressing common-mode voltage of an NPC three-level inverter, the method comprising the following steps: S1: Each phase of the NPC three-level inverter outputs three states: P, O, and N. The three phases output 3 3 = 27 switching states, corresponding to 27 basic space voltage vectors, which are divided into 6 large sectors (Ⅰ, Ⅱ, Ⅲ, Ⅳ, Ⅴ, Ⅵ) on the α and β axes. Figure 2 The figure shows the space vector diagram of the NPC three-level inverter. The common-mode voltage of the basic space voltage vector of the NPC three-level inverter is calculated, and the influence of the basic space voltage vector on the midpoint current is analyzed.

[0015] The common mode voltage corresponding to the 27 basic space voltage vectors is calculated as follows: (1) Where V dc is the inverter DC bus voltage, S a , S b , S c is the three-phase switching state of the inverter, S a , S b , S c ∈(-1, 0, 1), 1, 0, -1 correspond to the switch states P, O, N respectively.

[0016] Table 1 shows the common-mode voltages corresponding to the 27 voltage vectors of the NPC three-level inverter. It can be seen that the common-mode voltage generated by the small positive vector is V dc / 3, the common-mode voltage amplitude generated by the positive small vector in the effective vector is the highest.

[0017]

[0018] According to the following formula, the influence of the basic voltage vector on the midpoint current is analyzed: (2) In the formula, i a 、i b 、i c is the three-phase current of the inverter.

[0019] According to the analysis of formula (2), the midpoint current i generated by the zero vector and the large vector is np The midpoint current generated by the small vector and the medium vector is shown in Table 2.

[0020]

[0021] S2: Redefine the first large sector virtual space vector, the virtual vector includes a virtual zero vector V VO , virtual small vector V VS 、Virtual vector V VM , Virtual Large Vector V VL , and all virtual space vectors must satisfy a switching cycle T s The midpoint current generated inside is zero: The common-mode voltage amplitude is abandoned in the basic voltage vector as ±V dc A small positive vector of / 3.

[0022] Taking large sector I as an example, new virtual zero vector and virtual large vector are defined as basic zero vector and large vector: V VO =VOOO V VL1 =V PNN V VL2 =V PPN Define a new virtual center vector as the synthesis of the original center vector and its two adjacent center vectors: V VM =1 / 3V OPN +1 / 3V PON +1 / 3V PNO Define a new virtual small vector as a composite of the adjacent middle vector and negative small vector. The virtual small vector V VS1 and V VS2 There are two synthesis options: V VS1.1 =1 / 2V OON +1 / 2V PNO V VS1.2 =1 / 2V ONO +1 / 2V PON V VS2.1 =1 / 2V POO +1 / 2V OPN V VS2.2 =1 / 2V OPO +1 / 2V PON Figure 3 Space vector diagram that redefines the virtual vector for the NPC three-level inverter.

[0023] In the first large sector (i.e., large sector I), the midpoint current generated by the basic vectors OOO, PNN, and PPN is zero, and the midpoint currents generated by the basic vectors OPN, PON, PNO, OON, ONO, POO, and OPO are i respectively. a 、i b 、i c 、-i c 、-i b 、-i a 、-i b .

[0024] Therefore, in one switching cycle, the virtual vector V VO 、V VL1 、V VL2 The resulting midpoint current is zero, and the virtual midpoint vector V VM The generated midpoint current i VM =(i a +i b +ic ) / 3=0, virtual small vector V VS The generated midpoint current i VS1.1 =(-i c +i c ) / 2=0,i VS1.2 =(-i b +i b ) / 2=0,i VS2.1 =(-i c +i c ) / 2=0,i VS2.2 =(-i b +i b ) / 2=0.

[0025] Therefore, the maximum common-mode voltage amplitude of all newly defined virtual vectors is ±V dc / 6, and will not affect the midpoint potential.

[0026] S3: For the first large sector virtual space vector in S2, the reference voltage vector V is selected by designing a selection function based on the principle of minimum loss. ref A combination of virtual small vectors with minimal switching losses during synthesis.

[0027] According to S2, the virtual small vector V of the first large sector VS1 and V VS2 There are two synthesis schemes. When the reference voltage V ref When located in large sector Ⅰ and small sectors 1 and 2, four groups of V VS1 and V VS2 The combinations are: ①V VS1.1 and V VS2.1 ; ②V VS1.2 and V VS2.2 ; ③V VS1.1 and V VS2.2 ④V VS1.2 and V VS2.1 For the above four groups V VS1 and V VS2 The combination of virtual small vectors based on the principle of minimum loss is designed as follows: (3) Where N x Indicates the number of switching actions of the virtual small vector combination, such as N1 represents the number of switching actions of combination ①; N i Indicates the number of switching actions of the three-phase bridge arm.

[0028] According to formula (3), when V refWhen located in small sector 1, N1=8, N2=10, N3=10, N4=10; when V ref When located in small sector 2, N1=8, N2=12, N3=10, N4=10.

[0029] In terms of switching losses, V VS1 and V VS2 The combination ① is better than the other three combinations. Therefore, the virtual small vector combination ① is selected as the virtual small vector of the first largest sector.

[0030] S4: For the first large sector in S2, set the small sector and calculate V ref The boundary judgment conditions of the small sector; calculate the action time of the virtual vector and determine the switching sequence of the basic vector.

[0031] like Figure 4 As shown, the first large sector is set to 5 small sectors, and L1~L3 are set as the straight line equations dividing the small sectors: (4) Where V α 、V β is the reference voltage vector V ref The voltage components on the α and β axes.

[0032] According to formula (4), V ref The basis for determining the small sector is: Small sector 1: L1<0; Small sector 2: L1>0, L2<0, L3<0; Small sector 3: L1<0, L3>0; Small sector 4: L1>0, L3<0; Small sector 5: L2>0, L3>0.

[0033] Taking the large sector I as an example, the synthetic V is calculated according to the volt-second balance principle. ref Virtual vector action time: (5) (6) (7) Where, T1, T2, and T3 are the composite V ref The action time of the three nearest vectors required, T s is the switching period, and m is the modulation index.

[0034] In the virtual null vector modulation method, since the virtual small vector contains adjacent basic small vectors and basic middle vectors, its switching sequence adopts a 9-segment sequence. In addition, when switching the switch state, it is required that only one phase of the switch state is in action, and it can switch between O and N or O and P, but not directly between P and N, thereby reducing the switching loss. Table 3 shows the switching sequence of the virtual null vector modulation method in the I large sector. Figure 5 This is the switching timing diagram of the first small sector in the first large sector under the virtual null vector modulation method.

[0035]

[0036] S5: For the second to sixth large sectors in S1, the methods in S2-S4 are respectively processed to obtain the switching sequence of each large sector in turn; the switching sequence of each large sector is applied to the control of the NPC three-level inverter to achieve the suppression of the common mode voltage of the NPC three-level inverter.

[0037] In order to verify the effectiveness of the proposed common-mode voltage suppression method for NPC three-level inverter based on virtual space vector modulation, simulation analysis is carried out in MATLAB / Simulink. The simulation parameters are shown in Table 4.

[0038]

[0039] The line voltage V of the common mode voltage suppression method of the virtual space vector modulation proposed by the present invention is obtained when the modulation index m takes different values ab , phase voltage V ao , phase current i a , DC side capacitor voltage difference ΔV and common mode voltage V cm waveform.

[0040] The simulation results show that the method of the present invention outputs stable line voltage and phase voltage, and the phase current also presents an ideal sine wave, and the total harmonic distortion THD of the phase current is within the allowable range of 5%. However, under the low-profile system m=0.3, the line voltage V ab The waveforms are quite different. In the low-profile system, the virtual small vector of the virtual space vector modulation common mode voltage suppression method has a basic vector, namely V ref The synthetic participating vectors include a small vector, a medium vector and a zero vector, so the line voltage presents 5 levels. In addition, whether it is a high modulation index or a modulation index, the voltage difference ΔV between the upper and lower capacitors on the DC side of this method is very small, and does not exceed 0.08V, so the proposed method will not affect the midpoint potential. In terms of common-mode voltage suppression, the Vcm amplitude of the method proposed in the present invention is ±125V (±V dc / 6), compared with the traditional SVPWM method V cmTherefore, the common-mode voltage suppression method of an NPC three-level inverter based on virtual space vector modulation provided by the present invention can effectively suppress the common-mode voltage of the NPC three-level inverter.

[0041] Any matters not described in the present invention are applicable to the prior art.

Claims

1. A method for suppressing common-mode voltage of an NPC three-level inverter, characterized in that: The method comprises the following steps: S1: Each phase of the NPC three-level inverter outputs three states: P, O, and N. The three phases output a total of 27 switching states, corresponding to 27 basic space voltage vectors, which are divided into 6 large sectors on the α and β axes; calculate the common-mode voltage of the basic space voltage vector of the NPC three-level inverter, and analyze the influence of the basic space voltage vector on the midpoint current; S2: Redefine the first large sector virtual space vector, the virtual vector includes a virtual zero vector V VO , virtual small vector V VS 、Virtual vector V VM , Virtual Large Vector V VL , and all virtual space vectors must satisfy a switching cycle T s The midpoint current generated inside is zero: S3: For the first large sector virtual space vector in S2, the reference voltage vector V is selected by designing a selection function based on the principle of minimum loss. ref A combination of virtual small vectors with minimal switching loss during synthesis; S4: For the first large sector in S2, set the small sector and calculate V ref The boundary judgment conditions of the small sector; calculate the action time of the virtual vector and determine the switching sequence of the basic vector; S5: For the second to sixth large sectors in S1, the methods in S2-S4 are respectively processed to obtain the switching sequence of each large sector in turn; the switching sequence of each large sector is applied to the control of the NPC three-level inverter to achieve the suppression of the common mode voltage of the NPC three-level inverter.

2. The method for suppressing common mode voltage of an NPC three-level inverter according to claim 1, characterized in that: In S1, the common mode voltage corresponding to the 27 basic space voltage vectors is calculated as follows: Where V dc is the inverter DC bus voltage, S a , S b , S c is the three-phase switching state of the inverter, S a , S b , S c ∈(-1, 0, 1), 1, 0, -1 correspond to the switch states P, O, N respectively; Table 1 shows the common-mode voltages corresponding to the 27 voltage vectors of the NPC three-level inverter; Table 1 NPC three-level inverter common mode voltage According to the following formula, the influence of the basic voltage vector on the midpoint current is analyzed: i np =(1-|S a |)i a +(1-|S b |)i b +(1-|S c |)i c (2) In the formula, i a 、i b 、i c is the three-phase current of the inverter.

3. The method for suppressing common mode voltage of an NPC three-level inverter according to claim 1, characterized in that: In S2, the specific method of redefining the first large sector virtual space vector is: Define new virtual zero vector and virtual large vector as basic zero vector and large vector: V VO =V OOO V VL1 =V PNN V VL2 =V PPN Define a new virtual center vector as the synthesis of the original center vector and its two adjacent center vectors: V VM =1 / 3V OPN +1 / 3V PON +1 / 3V PNO Define a new virtual small vector as a composite of the adjacent middle vector and negative small vector. The virtual small vector V VS1 and V VS2 There are two synthesis options: V VS1 .1=1 / 2V OON +1 / 2V PNO V VS1.2 =1 / 2V ONO +1 / 2V PON V VS2.1 =1 / 2V POO +1 / 2V OPN V VS2.2 =1 / 2V OPO +1 / 2V PON In the first large sector, the midpoint current generated by the basic vectors OOO, PNN, and PPN is zero, and the midpoint currents generated by the basic vectors OPN, PON, PNO, OON, ONO, POO, and OPO are i respectively. a 、i b 、i c 、-i c 、-i b 、-i a 、-i b ; Therefore, in one switching cycle, the virtual vector V VO 、V VL1 、V VL2 The resulting midpoint current is zero, and the virtual midpoint vector V VM The generated midpoint current i VM =(i a +i b +i c ) / 3=0, virtual small vector V VS The generated midpoint current i VS1.1 =(-i c +i c ) / 2=0,i VS1.2 =(-i b +i b ) / 2=0,i VS2.1 =(-i c +i c ) / 2=0,i VS2.2 =(-i b +i b ) / 2=0; Therefore, the maximum common-mode voltage amplitude of all newly defined virtual vectors is ±V dc / 6, and will not affect the midpoint potential.

4. The method for suppressing common mode voltage of an NPC three-level inverter according to claim 1, characterized in that: The specific process in S3 is as follows: According to S2, the first large sector virtual small vector V VS1 and V VS2 There are two synthesis schemes. When the reference voltage V ref When located in large sector Ⅰ and small sectors 1 and 2, four groups of V VS1 and V VS2 The combinations are: ①V VS1.1 and V VS2.1 ; ②V VS1.2 and V VS2.2 ; ③V VS1.1 and V VS2.2 ④V VS1.2 and V VS2.1 ; For the above four groups V VS1 and V VS2 The combination of virtual small vectors based on the principle of minimum loss is designed as follows: Where N x Indicates the number of switching actions of the virtual small vector combination, such as N1 represents the number of switching actions of combination ①; N i Indicates the number of switching actions of the three-phase bridge arm; According to formula (3), when V ref When located in small sector 1, N1=8, N2=10, N3=10, N4=10; when V ref When located in small sector 2, N1=8, N2=12, N3=10, N4=10; In terms of switching losses, V VS1 and V VS2 The combination ① is better than the other three combinations; therefore, the virtual small vector combination ① is selected as the virtual small vector of the first largest sector.

5. The method for suppressing common mode voltage of an NPC three-level inverter according to claim 1, characterized in that: The specific process in S4 is: set the first large sector to 5 small sectors, and set L1 to L3 as the straight line equations for dividing the small sectors: Where V α 、V β is the reference voltage vector V ref Voltage components on the α and β axes; According to formula (4), V ref The basis for determining the small sector is: Small sector 1: L1<0; Small sector 2: L1>0, L2<0, L3<0; Small sector 3: L1<0, L3>0; Small sector 4: L1>0, L3<0; Small sector 5: L2>0, L3>0; Calculate the synthetic V based on the volt-second balance principle ref Virtual vector action time: <h2 style=";text-align:left;direction:ltr">T3=T<h2 style=";text-align:left;direction:ltr"> s <h2 style=";text-align:left;direction:ltr"> -T1-T2 (6) Where, T1, T2, and T3 are the composite V ref The action time of the three nearest vectors required, T s is the switching period, m is the modulation index; In the virtual null vector modulation method, since the virtual small vector includes adjacent basic small vectors and basic middle vectors, its switching sequence adopts a 9-segment sequence.

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