Wheel sensor digitizer

Abstract

The invention belongs to the technical field of railway vehicle axle temperature detection, and particularly discloses a wheel sensor digitizer, which comprises a front shaping module, a conversion module, a processing module and a network transmission module, and is characterized in that the front shaping module is used for shaping a wheel sensor signal to filter out a high-frequency interference signal in the wheel sensor signal; the conversion module is used for converting the shaped wheel sensor signal into a digital signal; the processing module is used for receiving the digital signals and extracting signal features; and the network transmission module is used for packaging and transmitting the signal features extracted by the processing module. According to the invention, the high-frequency interference signal in the wheel sensor signal can be effectively filtered, so that the signal quality of the wheel sensor signal is improved.

Description

Technical Field

[0001] The present application belongs to the technical field of railway vehicle axle temperature detection, and specifically relates to a wheel sensor digitization device. Background Art

[0002] Traditionally, the detection of axle temperature of railway vehicles relies on wheel sensors with analog signals. Such sensors directly output continuously changing electrical signals, which are easily affected by environmental noise and require complex signal processing to obtain useful information. With the development of electronic technology and information technology, the requirements for data acquisition, processing and transmission are getting higher and higher. Traditional analog signal processing methods can no longer meet the requirements of modern railway transportation systems for real-time, accuracy and reliability. Therefore, it is urgent to develop a digital device that can convert the analog signal of the wheel sensor into a digital signal and effectively process and transmit it. Summary of the invention

[0003] The main purpose of the present application is to provide a wheel sensor digitization device, which can effectively filter out high-frequency interference signals in wheel sensor signals and ensure the accuracy of subsequent circuit processing.

[0004] To achieve the above objectives, this application provides the following technical solutions: A wheel sensor digitization device, the device comprising: a pre-shaping module, a conversion module, a processing module and a network transmission module, wherein the pre-shaping module is used to shape the wheel sensor signal to filter out the high-frequency interference signal therein; the conversion module is used to convert the shaped wheel sensor signal into a digital signal; the processing module is used to collect the digital signal and extract signal features; the network transmission module is used to package and transmit the signal features extracted by the processing module.

[0005] Optionally, the processing module includes: a first processor and a second processor, wherein the first processor is used to collect digital signals and perform preprocessing, and the second processor is used to perform data analysis and feature extraction on the preprocessed digital signals.

[0006] Optionally, the pre-shaping module includes: a first filter circuit, a second filter circuit, a third filter circuit, a fourth filter circuit and a fifth filter circuit, wherein the first filter circuit, the second filter circuit, the third filter circuit, the fourth filter circuit and the fifth filter circuit have the same circuit structure and all include: a preliminary filter branch for performing preliminary filtering on the wheel sensor signal; a voltage divider branch for performing voltage division on the wheel sensor signal after preliminary filtering; a limiting branch for limiting the wheel sensor signal after voltage division; a low-pass filter branch for filtering out high-frequency noise in the wheel sensor signal after limiting; an amplification branch for amplifying the wheel sensor signal after high-frequency noise filtering to obtain an amplified wheel sensor signal; a feedback branch for providing negative feedback to stabilize the amplification gain of the amplification branch; and an output branch for outputting the amplified wheel sensor signal to the conversion module.

[0007] Optionally, the network transmission module includes: an Ethernet control module and a network transformer, wherein the Ethernet control module is used to convert the signal features extracted by the processing module into data frames suitable for Ethernet transmission and send them to the network transformer; and the network transformer is used to electrically isolate, protect and transmit the data frames sent by the Ethernet control module.

[0008] Optionally, the network transformer includes a first transformer and a second transformer; the network transmission module also includes: a bias and filtering circuit, used to provide a bias voltage for the network transformer and filter out common mode noise; a coupling circuit, used to isolate the DC component in the data frame sent by the Ethernet control module; a first impedance matching and filtering circuit, used to reduce the signal reflection of the data frame sent by the Ethernet control module and filter out high-frequency noise in the data frame; a second impedance matching and filtering circuit, used to further reduce the signal reflection of the data frame sent by the Ethernet control module and filter out common mode noise in the data frame.

[0009] Optionally, the bias and filtering circuit includes: a thirty-third resistor, a thirty-fourth resistor, a thirty-fifth resistor and an eighteenth capacitor, wherein the first end of the thirty-third resistor is connected to the primary side of the first transformer to form an eleventh node, and the second end of the thirty-third resistor is connected to a +3.3V power supply; the first end of the thirty-fourth resistor is connected to the +3.3V power supply, and the second end of the thirty-fourth resistor is connected to the second differential signal sending pin of the first transformer; the first end of the thirty-fifth resistor is connected to the +3.3V power supply, and the second end of the thirty-fifth resistor is connected to the first differential signal sending pin of the first transformer; the first end of the eighteenth capacitor is connected to the eleventh node, and the second end of the eighteenth capacitor is connected to the seventh ground terminal.

[0010] Optionally, the coupling circuit includes: a nineteenth capacitor, a first end of the nineteenth capacitor is connected to the third differential signal sending pin of the second transformer, and a second end of the nineteenth capacitor is connected to the fourth data pin of the Ethernet control module.

[0011] Optionally, the first impedance matching and filtering circuit includes: a thirty-first resistor, a thirty-second resistor, a sixteenth capacitor and a twentieth capacitor, wherein the first end of the thirty-first resistor is connected to the second end of the nineteenth capacitor, and the second end of the thirty-first resistor is connected to the primary side of the second transformer to form a twelfth node; the first end of the twentieth capacitor is connected to the fourth differential signal receiving pin of the second transformer, the second end of the twentieth capacitor is connected to the first end of the thirty-second resistor to form a thirteenth node, and the second end of the thirty-second resistor is connected to the twelfth node; the first end of the sixteenth capacitor is connected to the twelfth node, and the second end of the sixteenth capacitor is connected to the sixth ground terminal.

[0012] Optionally, the second impedance matching and filtering circuit includes: a thirty-sixth resistor, a thirty-seventh resistor, a thirty-eighth resistor, a thirty-ninth resistor, a seventeenth capacitor and a twenty-first capacitor, wherein the first end of the thirty-sixth resistor is connected to the secondary side of the first transformer, the first end of the thirty-seventh resistor is connected to the secondary side of the second transformer, and the second end of the thirty-sixth resistor is connected to the second end of the thirty-seventh resistor to form a fourteenth node; the first end of the thirty-eighth resistor is connected to the third differential signal receiving pin of the second transformer, the first end of the thirty-ninth resistor is connected to the fourth differential signal receiving pin of the second transformer, and the second end of the thirty-eighth resistor is connected to the second end of the thirty-ninth resistor; the first end of the twenty-first capacitor is connected to the fourteenth node, and the second end of the twenty-first capacitor is connected to the sixth ground terminal through the seventeenth capacitor.

[0013] Optionally, the wheel sensor digitization device further comprises: a self-test module, the self-test module comprising a self-test source and a self-test control circuit, the self-test source being used to provide a test signal to simulate various input conditions encountered under actual working conditions; the self-test control circuit being used to introduce the test signal provided by the self-test source into each filter branch of the pre-shaping circuit to detect whether each filter branch is working normally; Wherein, the self-test source includes: a NE555 timer, a 40th resistor, a 41st resistor, a 42nd resistor, a 21st capacitor, a 22nd capacitor and an inverter, the first end of the 41st resistor is connected to the discharge pin of the NE555 timer to form a 15th node, and the second end of the 41st resistor is connected to a +5V power supply; the first end of the 40th resistor is connected to the 15th node, the second end of the 40th resistor is connected to the trigger pin of the NE555 timer to form a 16th node, the first end of the 21st capacitor is connected to the 16th node, and the second end of the 21st capacitor is connected to the eighth ground terminal; the first end of the 22nd capacitor is connected to the control voltage pin of the NE555 timer, and the second end of the 22nd capacitor is connected to the eighth ground terminal; the first end of the 42nd resistor is connected to the +5V power supply, and the second end of the 42nd resistor is connected to the output pin of the NE555 timer; the input end of the inverter is connected to the second end of the 42nd resistor, and the output end of the inverter is connected to the data input / output pin of the self-test control circuit.

[0014] The beneficial effects brought by this application are: 1. This application can effectively filter out high-frequency interference signals in wheel sensor signals through a pre-shaping module to improve the quality of wheel sensor signals.

[0015] 2. This application adopts a dual-processor architecture, which not only improves the computing power and response speed of the device, but also realizes fault detection and recovery mechanism through mutual monitoring; 3. This application sets a self-check module to allow regular checking of the status of each filter branch in the pre-shaping circuit to ensure that the entire device maintains good performance during long-term operation. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 It is a structural schematic diagram of a wheel sensor digitization device provided by an embodiment of the present application; Figure 2 It is a connection diagram of a conversion module, a processing module, a storage module, a self-checking control circuit and an Ethernet control module provided by another embodiment of the present application; Figure 3It is a schematic diagram of the connection between the pre-shaping module and the self-checking control circuit and the conversion module provided by another embodiment of the present application; Figure 4 is a schematic diagram of the structure of a network transmission module provided by another embodiment of the present application; Figure 5 It is a structural diagram of a self-test module provided in another embodiment of the present application. DETAILED DESCRIPTION

[0017] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0018] It should be noted that all directional indications (such as up, down, left, right, front, back, etc.) in the embodiments of the present invention are only used to explain the relative position relationship, movement status, etc. between the components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication will also change accordingly.

[0019] In the present invention, unless otherwise clearly specified and limited, the terms "connection", "fixation", etc. should be understood in a broad sense. For example, "fixation" can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0020] In addition, if there are descriptions involving "first", "second", etc. in the embodiments of the present invention, the descriptions of "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In addition, the meaning of "and / or" appearing in the full text includes three parallel schemes. Taking "A and / or B" as an example, it includes scheme A, or scheme B, or a scheme that satisfies both A and B. In addition, the technical solutions between the various embodiments can be combined with each other, but it must be based on the ability of ordinary technicians in the field to implement. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such a combination of technical solutions does not exist and is not within the scope of protection required by the present invention.

[0021] Figure 1 FIG. 1 is a schematic diagram of the structure of a wheel sensor digitization device according to an embodiment of the present application, as shown in FIG. Figure 1 As shown, the device includes: a pre-shaping module 10, a conversion module 20, a processing module 30 and a network transmission module 40, wherein the pre-shaping module 10 is used to shape the wheel sensor signal to filter out the high-frequency interference signal therein; the conversion module 20 is used to convert the shaped wheel sensor signal into a digital signal; the processing module 30 is used to collect the digital signal and extract signal features; the network transmission module 40 is used to package and transmit the signal features extracted by the processing module 30.

[0022] The present application creatively introduces a pre-shaping module 10, which can effectively filter out high-frequency interference signals in the wheel sensor signals, thereby significantly improving the quality of the wheel sensor signals and reducing the possibility of false alarms and missed alarms.

[0023] In another exemplary embodiment, the processing module 30 includes a first processor and a second processor, wherein the first processor is used to collect digital signals and perform preprocessing, and the second processor is used to perform data analysis and feature extraction on the preprocessed digital signals.

[0024] In this embodiment, Figure 2 As shown, the first processor is denoted as UA, the second processor is denoted as UB, and the first processor UA and the second processor UB both adopt STM32L4R9 chip, wherein the connection relationship between the first processor UA and the conversion module 20 is as follows: the first input-output pin B6 of the first processor UA is connected to the first serial data output pin DB7 / DoutA of the conversion module 20; the second input-output pin B7 of the first processor UA is connected to the second serial data output pin DB8 / DoutB of the conversion module 20; the third input-output pin A5 of the first processor UA is connected to the state output pin FRSTDATA of the conversion module 20; the fourth input-output pin B5 of the first processor UA is connected to the output pin BUSY of the conversion module 20 (this pin is used to indicate the working state of the conversion module); the fifth input-output pin B4 of the first processor UA is connected to the chip select pin CS (ChipSelect) of the conversion module 20; the sixth input-output pin A3 of the first processor UA is connected to the RD / SCLK pin of the conversion module 20 (this pin has dual functions, which can be used as a read (Read, RD) signal and as a serial clock (SerialClock, SCLK), SCLK is used to synchronize data transmission on the SPI bus, while the RD signal is used to trigger data read operations).

[0025] The connection relationship between the second processor UB and the conversion module 20 is as follows: the first input-output pin A2 of the second processor UB is connected to the conversion start pin CONVSTB of the conversion module 20; the second input-output pin B3 of the second processor UB is connected to the reset pin _RESET of the conversion module 20.

[0026] It should be noted that, in this embodiment, by using two processors to simultaneously perform different tasks (the first processor UA is responsible for the acquisition and preprocessing of digital signals, and the second processor UB is responsible for data analysis and feature extraction of the preprocessed digital signals), the overall processing capacity of the processing module 30 can be significantly improved. In addition, by assigning tasks to two processors, the computing load can be shared more evenly, preventing a single processor from being overloaded, thereby improving the operating efficiency of the processing module 30. Furthermore, the two processors can monitor each other's status, and once a problem occurs in one of the processors, it can be quickly switched or restarted, thereby reducing the downtime of the processing module 30.

[0027] In another exemplary embodiment, Figure 3 As shown, the pre-shaping module 10 includes a first filter circuit, a second filter circuit, a third filter circuit, a fourth filter circuit and a fifth filter circuit, wherein the first filter circuit, the second filter circuit, the third filter circuit, the fourth filter circuit and the fifth filter circuit have the same circuit structure and are respectively used to perform pre-shaping on the first wheel sensor signal, the second wheel sensor signal, the third wheel sensor signal, the fourth wheel sensor signal and the fifth wheel sensor signal to filter out high-frequency interference signals in each wheel sensor signal.

[0028] Specifically, the first filtering circuit includes: a first capacitor C1, a second capacitor C2, a third capacitor C3, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a first diode D1, a second diode D2 and a first filtering amplifier U1; wherein, the first capacitor C1 is connected in parallel with the first resistor R1, the first end of the first resistor R1 is connected with the first end of the second resistor R2, the second end of the first resistor R1 is connected with the first end of the third resistor R3, the second end of the second resistor R2 is connected with the reverse input end of the first filtering amplifier U1 to form a first node N1; the second end of the third resistor R3 is connected with the forward input end of the first filtering amplifier U1 to form a second node N2; the anode of the first diode D1 is connected with the cathode of the first diode D1 to form a cathode of the first filtering amplifier U1 to form a cathode of the first filtering amplifier U1 to form an ... The anode of the second diode D2 is connected to the first node N1, the anode of the second diode D2 is connected to the second node N2, and the cathode of the first diode D1 is connected to the cathode of the second diode D2; the first end of the fifth resistor R5 is connected to the first node N1, and the second end of the fifth resistor R5 is connected to the output end of the first filter amplifier U1; the third capacitor C3 and the fifth resistor R5 are connected in parallel; the first end of the second capacitor C2 is connected to the second node N2, and the second end of the second capacitor C2 is connected to the first ground terminal GND1; the first end of the fourth resistor R4 is connected to the second node N2, and the second end of the fourth resistor R4 is connected to the first ground terminal GND1; the first end of the sixth resistor R6 is connected to the output end of the first filter amplifier U1, and the second end of the sixth resistor R6 is connected to the output end of the first filter amplifier U1. Figure 3 The first analog signal input pin V5 of the conversion module 20 is shown.

[0029] In the first filtering circuit, the first resistor R1 and the first capacitor C1 form a first preliminary filtering branch for preliminary filtering of the first wheel sensor signal to reduce the high-frequency noise in the first wheel sensor signal; specifically, the first resistor R1 and the first capacitor C1 form an RC filtering network, and when the first wheel sensor signal passes through the RC filtering network, the high-frequency component thereof is short-circuited to the first ground terminal GND1 through the first capacitor C1 to be weakened or filtered; and the low-frequency component in the first wheel sensor signal can enter the subsequent circuit through the first resistor R1 due to the high impedance characteristics of the capacitor. The RC filtering network formed by the first resistor R1 and the first capacitor C1 can filter the high-frequency noise in the first wheel sensor signal, thereby helping to improve the purity of the first wheel sensor signal.

[0030] The second resistor R2 and the third resistor R3 form a first voltage-dividing branch for dividing the voltage of the first wheel sensor signal after preliminary filtering; specifically, the second resistor R2 and the third resistor R3 form a voltage divider, and the first wheel sensor signal is divided into two parts through the voltage divider after preliminary filtering, and respectively input into the reverse input terminal and the forward input terminal of the first filter amplifier U1. Through voltage division, the level of the first wheel sensor signal entering the reverse input terminal and the forward input terminal of the first filter amplifier U1 can be accurately controlled, which helps to improve the stability of the first filter amplifier U1 and can prevent saturation or distortion caused by the excessive first wheel sensor signal.

[0031] The first diode D1 and the second diode D2 form a first amplitude limiting branch for limiting the amplitude of the first wheel sensor signal after voltage division. Specifically, when the voltage of the first wheel sensor signal exceeds the normal working range, the first diode D1 and the second diode D2 will be turned on, thereby limiting the voltage level of the first wheel sensor signal input to the first filter amplifier U1. Specifically, the anode of the first diode D1 is connected to the first node N1 (the reverse input terminal of U1), the anode of the second diode D2 is connected to the second node N2 (the forward input terminal of U1), and the cathodes of the first diode D1 and the second diode D2 are connected. In this way, if the voltage of the first node N1 or the second node N2 is too high relative to the cathode, the corresponding diode will be turned on, thereby preventing excessive voltage from being directly applied to the input terminal of the first filter amplifier U1. By limiting the voltage amplitude of the first wheel sensor signal, the first amplitude limiting branch can protect the first filter amplifier U1 from being damaged by transient high voltage or abnormal signal in the first wheel sensor signal after voltage division.

[0032] The second capacitor C2 and the fourth resistor R4 form a first low-pass filter branch, which is used to further filter out the high-frequency noise in the first wheel sensor signal after limiting. Specifically, the second capacitor C2 and the fourth resistor R4 form a low-pass filter, and the high-frequency component in the first wheel sensor signal after voltage division is bypassed to the first ground terminal GND1 by the second capacitor C2, while the low-frequency component enters the first filter amplifier U1 through the fourth resistor R4. Further filtering the first wheel sensor signal after voltage division by the low-pass filter composed of the second capacitor C2 and the fourth resistor R4 helps to prevent the first filter amplifier U1 from generating unnecessary oscillation or distortion due to high-frequency interference, thereby improving its working stability and reliability. It is worth noting that the low-pass filter composed of the second capacitor C2 and the fourth resistor R4 is connected to the positive input terminal of the first filter amplifier U1. In the first filter amplifier U1, the positive input terminal is used as a reference voltage point. By adding a low-pass filter to the positive input terminal of the first filter amplifier U1, the stability of the reference voltage point can be ensured, thereby improving the stability of the first filter amplifier U2. And by Figure 3 It can be seen that the inverting input terminal of the first filter amplifier U1 and its output terminal form a negative feedback. If the low-pass filter composed of the second capacitor C2 and the fourth resistor R4 is connected to the inverting input terminal, firstly, the frequency response characteristics of the feedback path will be affected, resulting in changes in the amplification gain and phase response of the first filter amplifier U1; secondly, the common-mode rejection ratio of the first filter amplifier U1 will be affected, thereby reducing its ability to suppress common-mode signals.

[0033] The first filter amplifier U1 is used as a first amplification branch to amplify the first wheel sensor signal after high-frequency noise is filtered out. Through the amplification of the first filter amplifier U1, the weak wheel sensor signal can be boosted to a sufficiently strong level so that the subsequent circuit (such as the conversion module) can accurately process and convert it.

[0034] The fifth resistor R5 and the third capacitor C3 form a first feedback branch for providing negative feedback to stabilize the amplification gain of the first filter amplifier U1; specifically, the third capacitor C3 and the fifth resistor R5 are connected in parallel to form an RC network, which can control the amplification gain of the first filter amplifier U1 within a stable range to reduce the amplification gain drift caused by factors such as temperature changes and power supply fluctuations.

[0035] The sixth resistor R6 forms a first output branch for transmitting the first wheel sensor signal amplified by the first filter amplifier U1 to the conversion module 20. The sixth resistor R6 is connected between the output end of the first filter amplifier U1 and the conversion module 20, and also plays a role in impedance matching to ensure that the output signal of the first filter amplifier U1 can be effectively transmitted to the next stage circuit without being affected by reflection or other interference (when a signal is transmitted from one circuit to another, if the impedance of the two circuits does not match, part of the signal will be reflected back to the source end. This reflection will not only reduce the transmission efficiency of the signal, but also may cause oscillation or distortion. The sixth resistor R6 provides an appropriate impedance value so that the output impedance of the first filter amplifier U1 matches the input impedance of the conversion module 20. In this way, the signal reflection caused by impedance mismatch can be minimized).

[0036] The second filtering circuit includes: a fourth capacitor C4, a fifth capacitor C5, a sixth capacitor C6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, a third diode D3, a fourth diode D4 and a second filtering amplifier U2; wherein the fourth capacitor C4 is connected in parallel with the seventh resistor R7, the first end of the seventh resistor R7 is connected to the first end of the eighth resistor R8, and the second end of the seventh resistor R7 is connected to the first end of the ninth resistor R9; the second end of the eighth resistor R8 is connected to the positive input end of the second filtering amplifier U2 to form a third node N3, and the second end of the ninth resistor R9 is connected to the second filtering amplifier U2 to form a third node N3. The inverting input terminal of the filter U2 is connected to form a fourth node N4; the first end of the fifth capacitor C5 is connected to the third node N3, and the second end of the fifth capacitor C5 is connected to the second ground terminal GND2; the first end of the tenth resistor R10 is connected to the third node N3, and the second end of the tenth resistor R10 is connected to the second ground terminal GND2; the first end of the eleventh resistor R11 is connected to the fourth node N4, and the second end of the eleventh resistor R11 is connected to the output end of the second filter amplifier U2, and the sixth capacitor C6 and the eleventh resistor R11 are connected in parallel; the first end of the twelfth resistor R12 is connected to the output end of the second filter amplifier U2, and the second end of the twelfth resistor R12 is connected to the output end of the second filter amplifier U2. Figure 3The second analog signal input pin V4 of the conversion module 20 is shown. Among them, the fourth capacitor C4 and the seventh resistor R7 form a second preliminary filtering branch for preliminary filtering of the second wheel sensor signal to reduce the high-frequency noise in the second wheel sensor signal; the eighth resistor R8 and the ninth resistor R9 form a second voltage dividing branch for voltage dividing the second wheel sensor signal after preliminary filtering; the third diode D3 and the fourth diode D4 form a second limiting branch for limiting the second wheel sensor signal after voltage division; the fifth capacitor C5 and the tenth resistor R10 form a second low-pass filtering branch for further filtering out the high-frequency noise in the second wheel sensor signal after limiting; the second filter amplifier U2 serves as a second amplification branch for amplifying the second wheel sensor signal after high-frequency noise is filtered out; the eleventh resistor R11 and the sixth capacitor C6 form a second feedback branch for providing negative feedback to stabilize the amplification gain of the second filter amplifier U2; the twelfth resistor R12 forms a second output branch for transmitting the second wheel sensor signal amplified by the second filter amplifier U2 to the conversion module 20.

[0037] The third filtering circuit includes: a seventh capacitor C7, an eighth capacitor C8, a ninth capacitor C9, a thirteenth resistor R13, a fourteenth resistor R14, a fifteenth resistor R15, a sixteenth resistor R16, a seventeenth resistor R17, an eighteenth resistor R18, a fifth diode D5, a sixth diode D6 and a third filtering amplifier U3; wherein the seventh capacitor C7 is connected in parallel with the thirteenth resistor R13, a first end of the thirteenth resistor R13 is connected to a first end of the fourteenth resistor R14, a second end of the thirteenth resistor R13 is connected to a first end of the fifteenth resistor R15, a second end of the fourteenth resistor R14 is connected to a reverse input end of the third filtering amplifier U3 to form a fifth node N5, and a second end of the fifteenth resistor R15 is connected to a reverse input end of the third filtering amplifier U3 to form a fifth node N5. The first end of the seventeenth resistor R17 is connected to the fifth node N5, the second end of the seventeenth resistor R17 is connected to the output end of the third filter amplifier U3, and the ninth capacitor C9 is connected in parallel with the seventeenth resistor R17; the first end of the eighth capacitor C8 is connected to the sixth node N6, and the second end of the eighth capacitor C8 is connected to the third ground terminal GND3; the first end of the sixteenth resistor R16 is connected to the sixth node N6, and the second end of the sixteenth resistor R16 is connected to the third ground terminal GND3; the first end of the eighteenth resistor R18 is connected to the output end of the third filter amplifier U3, and the second end of the eighteenth resistor R18 is connected to the output end of the third filter amplifier U3. Figure 3The third analog signal input pin V7 of the conversion module 20 shown in the figure. Among them, the seventh capacitor C7 and the thirteenth resistor R13 form a third preliminary filtering branch, which is used to perform preliminary filtering on the third wheel sensor signal to reduce the high-frequency noise in the third wheel sensor signal; the fourteenth resistor R14 and the fifteenth resistor R15 form a third voltage dividing branch, which is used to divide the third wheel sensor signal after preliminary filtering; the fifth diode D5 and the sixth diode D6 form a third amplitude limiting branch, which is used to limit the amplitude of the third wheel sensor signal after voltage division; the eighth capacitor C8 and the sixteenth resistor R16 form a third voltage dividing branch, which is used to divide the third wheel sensor signal after voltage division; The third low-pass filter branch is formed to further filter out the high-frequency noise in the third wheel sensor signal after limiting; the third filter amplifier U3 serves as a third amplification branch to amplify the third wheel sensor signal after the high-frequency noise is filtered out; the seventeenth resistor R17 and the ninth capacitor C9 form a third feedback branch to provide negative feedback to stabilize the amplification gain of the third filter amplifier U3; the eighteenth resistor R18 forms a third output branch to transmit the third wheel sensor signal amplified by the third filter amplifier U3 to the conversion module 20.

[0038] The fourth filtering circuit includes: a tenth capacitor C10, an eleventh capacitor C11, a twelfth capacitor C12, a nineteenth resistor R19, a twentieth resistor R20, a twenty-first resistor R21, a twenty-second resistor R22, a twenty-third resistor R23, a twenty-fourth resistor R24, a seventh diode D7, an eighth diode D8 and a fourth filtering amplifier U4; wherein the tenth capacitor C10 is connected in parallel with the nineteenth resistor R19, a first end of the nineteenth resistor R19 is connected to a first end of the twentieth resistor R20, a second end of the nineteenth resistor R19 is connected to a first end of the twenty-first resistor R21, a second end of the twentieth resistor R20 is connected to a positive input end of the fourth filtering amplifier U4 to form a seventh node N7, and a second end of the twenty-first resistor R21 is connected to a positive input end of the fourth filtering amplifier U4 to form a seventh node N7. The first end of the 22nd resistor R22 is connected to the seventh node N7, and the second end of the 22nd resistor R22 is connected to the fourth ground terminal GND4; the first end of the 23rd resistor R23 is connected to the eighth node N8, and the second end of the 23rd resistor R23 is connected to the output end of the fourth filter amplifier U4, and the twelfth capacitor C12 is connected in parallel with the 23rd resistor R23; the first end of the 24th resistor R24 ​​is connected to the output end of the fourth filter amplifier U4, and the second end of the 24th resistor R24 ​​is connected to the output end of the fourth filter amplifier U4. Figure 3 The fourth analog signal input pin V6 of the conversion module 20 shown in the figure. Among them, the tenth capacitor C10 and the nineteenth resistor R19 form a fourth preliminary filtering branch, which is used to perform preliminary filtering on the fourth wheel sensor signal to reduce the high-frequency noise in the fourth wheel sensor signal; the twentieth resistor R20 and the twenty-first resistor R21 form a fourth voltage dividing branch, which is used to divide the voltage of the fourth wheel sensor signal after preliminary filtering; the seventh diode D7 and the eighth diode D8 form a fourth amplitude limiting branch, which is used to limit the amplitude of the fourth wheel sensor signal after voltage division; the eleventh capacitor C11 and the twenty-second resistor R22 form a fourth voltage dividing branch, which is used to divide the voltage of the fourth wheel sensor signal after voltage division; The fourth low-pass filter branch is formed to further filter out the high-frequency noise in the fourth wheel sensor signal after limiting; the fourth filter amplifier U4 serves as a fourth amplification branch to amplify the fourth wheel sensor signal after the high-frequency noise is filtered out; the twenty-third resistor R23 and the twelfth capacitor C12 form a fourth feedback branch to provide negative feedback to stabilize the amplification gain of the fourth filter amplifier U4; the twenty-fourth resistor R24 ​​forms a fourth output branch to transmit the fourth wheel sensor signal amplified by the fourth filter amplifier U4 to the conversion module 20.

[0039] The fifth filtering circuit includes: a thirteenth capacitor C10, a fourteenth capacitor C11, a fifteenth capacitor C12, a twenty-fifth resistor R25, a twenty-sixth resistor R26, a twenty-seventh resistor R27, a twenty-eighth resistor R28, a twenty-ninth resistor R29, a thirtieth resistor R30, a ninth diode D9, a tenth diode D10 and a fifth filtering amplifier U5; wherein the thirteenth capacitor C13 is connected in parallel with the twenty-fifth resistor R25, a first end of the twenty-fifth resistor R25 is connected to a first end of the twenty-sixth resistor R26, a second end of the twenty-fifth resistor R25 is connected to a first end of the twenty-seventh resistor R27, a second end of the twenty-sixth resistor R26 is connected to a reverse input end of the fifth filtering amplifier U5 to form a ninth node N9, and the twenty-seventh resistor R27 is connected to a first end of the twenty-seventh resistor R27. The second end of is connected to the positive input end of the fifth filter amplifier U5 to form a tenth node N10; the first end of the twenty-ninth resistor R29 is connected to the ninth node N9, the second end of the twenty-ninth resistor R29 is connected to the output end of the fifth filter amplifier U5, and the fifteenth capacitor C15 is connected in parallel with the twenty-ninth resistor R29; the first end of the fourteenth capacitor C14 is connected to the tenth node N10, the second end of the fourteenth capacitor C14 is connected to the fifth ground terminal GND5, the first end of the twenty-eighth resistor R28 is connected to the tenth node N10, and the second end of the twenty-eighth resistor R28 is connected to the fifth ground terminal GND5; the first end of the thirtieth resistor R30 is connected to the output end of the fifth filter amplifier U5, and the second end of the thirtieth resistor R30 is connected to Figure 3The fifth analog signal input pin V8 of the conversion module 20 shown in the figure. Among them, the thirteenth capacitor C13 and the twenty-fifth resistor R25 form a fifth preliminary filtering branch, which is used to perform preliminary filtering on the fifth wheel sensor signal to reduce the high-frequency noise in the fifth wheel sensor signal; the twenty-sixth resistor R26 and the twenty-seventh resistor R27 form a fifth voltage dividing branch, which is used to divide the voltage of the fifth wheel sensor signal after preliminary filtering; the ninth diode D9 and the tenth diode D10 form a fifth amplitude limiting branch, which is used to limit the amplitude of the fifth wheel sensor signal after voltage division; the fourteenth capacitor C14 and the twenty-eighth resistor R2 8 constitutes a fifth low-pass filter branch for further filtering out the high-frequency noise in the fifth wheel sensor signal after limiting; the fifth filter amplifier U5 serves as a fifth amplifying branch for amplifying the fifth wheel sensor signal after the high-frequency noise is filtered out; the twenty-ninth resistor R29 and the fifteenth capacitor C15 constitute a fifth feedback branch for providing negative feedback to stabilize the amplification gain of the fifth filter amplifier U5; the thirtieth resistor R30 constitutes a fifth output branch for transmitting the fifth wheel sensor signal amplified by the fifth filter amplifier U5 to the conversion module 20.

[0040] It is worth noting that since the circuit structure of the second to fifth filter branches is the same as that of the first filter branch, and their working principles are also the same, this application only provides an illustrative description of the circuit principle and corresponding technical effects of the first filter branch, and the circuit principle of the second to fifth filter branches is no longer repeated.

[0041] It should be noted that in railway vehicles, there are usually multiple wheel sensors for monitoring axle temperature data at different locations or of different types. Each sensor may correspond to different physical properties or working environments, so an independent filter branch is required to process their respective signals. The present application sets five filter branches, which can simultaneously pre-process five different sensor signals. In addition, multiple filter branches provide a redundant design. If a filter branch fails, other filter branches can still work normally, ensuring that the device will not fail completely. This redundant mechanism improves the overall reliability of the system. Furthermore, multiple filter branches also facilitate the realization of the self-test function. The test signal generated by the self-test source can be selectively imported into each filter branch through the self-test control circuit, thereby individually detecting the working status of each branch. In this way, problems can be quickly located and maintenance can be performed.

[0042] In summary, the present application provides the pre-shaping module 10, through which the sensor signal is preliminarily filtered and shaped, which can effectively reduce the influence of external electromagnetic interference and other noises, thereby improving the quality and reliability of the sensor signal.

[0043] In another exemplary embodiment, Figure 4 As shown, the network transmission module 40 includes: an Ethernet control module and a network transformer, wherein the Ethernet control module is used to convert the signal features extracted by the processing module 30 into data frames suitable for Ethernet transmission and send them to the network transformer; the network transformer is used to electrically isolate, protect and transmit the data frames sent by the Ethernet control module.

[0044] In this embodiment, the Ethernet control module adopts chip W5500, for example, and the connection relationship between the first processor UA and the chip W5500 is as follows: the seventh input-output pin C8 of the first processor UA is connected to the chip select pin SCSn (Chip Select Not) of the chip W5500; the eighth input-output pin B8 of the first processor UA is connected to the serial clock pin SCLK (Serial Clock) of the chip W5500; the ninth input-output pin A8 of the first processor UA is connected to the first master in slave out pin MISO (Master In Slave Out) of the chip W5500; the tenth input-output pin C7 of the first processor UA is connected to the second master out slave in pin MOSI (Master Out Slave In) of the chip W5500; the eleventh input-output pin B9 of the first processor UA is connected to the interrupt request pin INTn (Interrupt Request) of the chip W5500; and the twelfth input-output pin A9 of the first processor UA is connected to the reset pin RSTN (Reset) of the chip W5500. The Ethernet control module is responsible for processing the TCP / IP protocol stack, including encapsulating / decapsulating data packets, managing connection status, etc. It converts the data received from the processing module 30 into a format suitable for transmission via Ethernet, and can receive data from the network and convert it into a format recognizable by the processing module 30.

[0045] The network transformer adopts chip SM13072, for example. The chip SM13072 includes a first transformer T1 and a second transformer T2. The first transformer T1 is responsible for the isolation transformation of the transmission signal; and the second transformer T2 is responsible for the isolation transformation of the reception signal. The first differential signal sending pin TD+ (responsible for sending the positive pole of the differential signal) of the first transformer T1 is connected to the second data pin TXP (Transmit Positive, responsible for the positive pole of data transmission with the first transformer T1) of the chip W5500, and the second differential signal sending pin TD- (responsible for sending the negative pole of the differential signal) of the first transformer T1 is connected to the first data pin TXN (Transmit Negative, responsible for the negative pole of data transmission with the first transformer T1) of the chip W5500; the third differential signal sending pin RD+ (responsible for sending the positive pole of the differential signal) of the second transformer T2 is connected to the fourth data pin RXP (Receive Positive, responsible for the positive pole of data transmission with the second transformer T2) of the chip W5500, and the fourth differential signal sending pin RD- (responsible for sending the negative pole of the differential signal) of the second transformer T2 is connected to the third data pin RXN (Receive Negative, responsible for the negative pole of data transmission with the second transformer T2) of the chip W5500. The network transformer only allows the high-frequency changing voltage carrying data information (ie, the differential signal in the data frame) to pass through, but blocks the DC component in the data frame to ensure that only useful data signals are transmitted.

[0046] In another exemplary embodiment, continue to refer to Figure 4 The network transmission module 40 also includes a bias and filter circuit 100, which includes a thirty-third resistor R33, a thirty-fourth resistor R34, a thirty-fifth resistor R35 and an eighteenth capacitor C18, wherein a first end of the thirty-third resistor R33 is connected to the primary side of the first transformer T1 to form an eleventh node N11, and a second end of the thirty-third resistor R33 is connected to a +3.3V power supply; a first end of the thirty-fourth resistor R34 is connected to the +3.3V power supply, and a second end of the thirty-fourth resistor R34 is connected to a second differential signal sending pin TD- of the first transformer T1; a first end of the thirty-fifth resistor R35 is connected to the +3.3V power supply, and a second end of the thirty-fifth resistor R35 is connected to a first differential signal sending pin TD+ of the first transformer T1; a first end of the eighteenth capacitor C18 is connected to the eleventh node N11, and a second end of the eighteenth capacitor C18 is connected to a seventh ground terminal GND7.

[0047] In this embodiment, the thirty-fourth resistor R34 and the thirty-fifth resistor R35 are connected between the +3.3V power supply and the pin TD- and the pin TD+ of the first transformer T1, and their function is to provide a DC bias voltage for the pin TD- and the pin TD+. In the absence of data transmission, the pin TD+ and the pin TD- will each maintain about half of the +3.3V power supply voltage (about 1.65V), so that the signal line can be guaranteed to have a stable reference point and help reduce the influence of signal distortion and noise. In addition, by connecting the thirty-third resistor R33 to the +3.3V power supply, it can provide an additional stable reference level to the network transformer. The thirty-third resistor R33 can also help balance the impedance between the pin TD+ and the pin TD- to reduce signal reflection and improve the integrity of the Ethernet data signal. The eighteenth capacitor C18 is used as a low-pass filter to filter high-frequency common-mode noise in the data frames sent by the Ethernet control module (common-mode noise refers to the same noise signal that appears on the TD+ and TD- lines at the same time). By grounding the eighteenth capacitor C18, the common-mode noise can be effectively reduced, thereby improving the reliability and quality of the data frames sent by the Ethernet control module.

[0048] In summary, the bias and filtering circuit is mainly used to provide appropriate bias voltage for pin TD+ and pin TD- of the first transformer T1, and to filter out common-mode noise in the data frame sent by the Ethernet control module through the eighteenth capacitor C18, thereby improving the quality and reliability of the final output Ethernet data signal.

[0049] In another exemplary embodiment, continue to refer to Figure 4 The network transmission module 40 also includes a coupling circuit 200, and the coupling circuit 200 includes a nineteenth capacitor C19, a first end of the nineteenth capacitor C19 is connected to the third differential signal sending pin RD+ of the second transformer T, and a second end of the nineteenth capacitor C19 is connected to the fourth data pin RXP of the chip W5500.

[0050] In this embodiment, the first end of the nineteenth capacitor C19 is connected to the third differential signal sending pin RD+ of the second transformer T2, and the second end of the nineteenth capacitor C19 is connected to the fourth data pin RXP of the chip W5500. This configuration allows the high-frequency changing voltage carrying data information (i.e., the differential signal in the data frame) to be transmitted from the third differential signal sending pin RD+ of the second transformer T2 to the fourth data pin RXP of the chip W5500 and blocks the DC component in the data frame; in addition, the nineteenth capacitor C19 can also block any possible DC bias or level difference, thereby avoiding problems caused by ground potential differences between different devices, such as current flow or device damage.

[0051] In another exemplary embodiment, continue to refer to Figure 4 , the network transmission module 40 also includes a first impedance matching and filtering circuit 300, which includes a thirty-first resistor R31, a thirty-second resistor R32, a sixteenth capacitor C16 and a twentieth capacitor C20; wherein, the first end of the thirty-first resistor R31 is connected to the second end of the nineteenth capacitor C19, and the second end of the thirty-first resistor R31 is connected to the primary side of the second transformer T2 to form a twelfth node N12; the first end of the twentieth capacitor C20 is connected to the fourth differential signal sending pin RD- of the second transformer T2, the second end of the twentieth capacitor C20 is connected to the first end of the thirty-second resistor R32 to form a thirteenth node N13, and the second end of the thirty-second resistor R32 is connected to the twelfth node N12; the first end of the sixteenth capacitor C16 is connected to the twelfth node N12, and the second end of the sixteenth capacitor C16 is connected to the sixth ground terminal GND6.

[0052] In this embodiment, the thirty-first resistor R31 and the thirty-second resistor R32 are used to provide impedance matching to reduce the reflection of the data frame sent by the Ethernet control module, thereby ensuring the stable transmission of the data frame, helping to improve the integrity of the data frame and reduce distortion. The sixteenth capacitor C16, as a bypass capacitor, can provide a low impedance path so that the high-frequency noise in the data frame is quickly grounded to reduce the interference of the high-frequency noise on the data frame, thereby improving the quality and signal-to-noise ratio of the Ethernet data signal finally output. In addition, the twentieth capacitor C20 and the thirty-second resistor R32 form a low-pass filter to help filter out the high-frequency noise in the data frame and ensure that only useful signal components pass.

[0053] In another exemplary embodiment, continue to refer to Figure 4, the network transmission module 40 also includes a second impedance matching and filtering circuit 400, the second impedance matching and filtering circuit 400 includes a thirty-sixth resistor R36, a thirty-seventh resistor R37, a thirty-eighth resistor R38, a thirty-ninth resistor R39, a seventeenth capacitor C17 and a twenty-first capacitor C21; wherein, the first end of the thirty-sixth resistor R36 is connected to the secondary side of the first transformer T1, the first end of the thirty-seventh resistor R37 is connected to the secondary side of the second transformer T2, the second end of the thirty-sixth resistor R36 is connected to the second end of the thirty-seventh resistor R37 to form a fourteenth node N14; the first end of the thirty-eighth resistor R38 is connected to the third differential signal receiving pin RX+ (responsible for receiving the differential signal) of the second transformer T2 The positive electrode of the second transformer T2 is connected to the third differential signal receiving pin RX+ of the second transformer T2, and the first end of the thirty-ninth resistor R39 is connected to the fourth differential signal receiving pin RX- of the second transformer T2 (responsible for receiving the negative electrode of the differential signal). At the same time, the fourth differential signal receiving pin RX- of the second transformer T2 is connected to the first input pin 1 of the Ethernet control module (ENET), and the second end of the thirty-eighth resistor R38 is connected to the second end of the thirty-ninth resistor R39; the first end of the twenty-first capacitor C21 is connected to the fourteenth node N14, and the second end of the twenty-first capacitor C21 is connected to the sixth ground terminal GND6 through the seventeenth capacitor C17. In addition, the first differential signal receiving pin TX+ and the first differential signal receiving pin TX- of the first transformer T1 are connected to the fourth input pin 4 and the third input pin 3 of the Ethernet control module (ENET) respectively.

[0054] In this embodiment, the thirty-sixth resistor R36, the thirty-seventh resistor R37, the thirty-eighth resistor R38, and the thirty-ninth resistor R39 can provide appropriate impedance matching. Through appropriate impedance matching, the data frame will not be distorted due to reflection during the transmission process, and the waveform of the data frame can be further ensured to maintain its original shape, thereby improving the integrity of the data frame.

[0055] The seventeenth capacitor C17 and the twenty-first capacitor C21 form a common mode filter, allowing the differential signal to pass through and filtering out high-frequency common mode noise in the data frame. In addition, by grounding the seventeenth capacitor C17, the common mode noise can be directed to the ground, thereby reducing the impact of the common mode noise on the data frame.

[0056] In another exemplary embodiment, the wheel sensor digitization device further includes a self-test module 50, such as Figure 5As shown, the self-test module 50 includes: a self-test source and a self-test control circuit, wherein the self-test source is used to provide a test signal to simulate various input conditions encountered under actual working conditions; and the self-test control circuit is used to introduce the test signal provided by the self-test source into different filter branches of the pre-shaping circuit to detect whether each filter branch is working normally. In this embodiment, the self-test control circuit adopts a MUX507 control chip, the thirteenth input-output pin G11 of the first processor UA is connected to the enable pin EN (Enable) of the MUX507D; the third input-output pin H11 of the second processor UB is connected to the first address selection pin A0 of the MUX507D; the fourth input-output pin H12 of the second processor UB is connected to the second address selection pin A1 of the MUX507D; the fifth input-output pin J11 of the second processor UB is connected to the third address selection pin A2 of the MUX507.

[0057] The self-test source includes a NE555 timer, a 40th resistor R40, a 41st resistor R41, a 42nd resistor R42, a 21st capacitor C21, a 22nd capacitor C22 and an inverter Q, wherein a first end of the 41st resistor R41 is connected to a discharge pin DISCH (Discharge Pin) of the NE555 timer to form a 15th node N15, and a second end of the 41st resistor R41 is connected to a +5V power supply; a first end of the 40th resistor R40 is connected to the 15th node N15, a second end of the 40th resistor R40 is connected to a trigger pin TRIG (Trigger Pin) of the NE555 timer to form a 16th node N16, a first end of the 21st capacitor C21 is connected to the 16th node N16, and a second end of the 21st capacitor C21 is connected to an eighth ground terminal GND8; a first end of the 22nd capacitor C22 is connected to a control voltage pin CONT (Control Voltage Pin) of the NE555 timer Pin), the second end of the 22nd capacitor C22 is connected to the eighth ground terminal GND8; the first end of the 42nd resistor R42 is connected to the +5V power supply, and the second end of the 42nd resistor R42 is connected to the output pin OUT of the NE555 timer; the input end of the inverter Q is connected to the second end of the 42nd resistor R42, and the output end of the inverter Q is connected to the data input / output pin DA (Data Input / Output) of the MUX507 control chip. In addition, the threshold comparator input pin THRES (Threshold) of the NE555 timer is short-circuited with the trigger comparator input pin TRIG (Trigger); the power pin VCC and the reset pin RST (Reset) of the NE555 timer are both connected to the +5V power supply; the output pin OUT of the NE555 timer is also connected to the data pin DB (Data B, used to receive the signal of the output pin OUT of the NE555 timer) of the MUX507 control chip.

[0058] In the self-test source as described above, the NE555 timer is configured as an astable multivibrator mode for generating a stable square wave signal. Under this configuration, the NE555 timer will generate a continuous pulse output. The 40th resistor R40 and the 21st capacitor C21 form an RC charging network. When the 21st capacitor C21 starts to charge, the current flows from the +5V power supply to the 21st capacitor C21 through the 40th resistor R40. This process determines the speed of capacitor charging, which in turn affects the period of the square wave signal. When the voltage on the 21st capacitor C21 reaches the threshold set inside the NE555 timer, the NE555 timer will switch states and quickly discharge the 21st capacitor C21 through the discharge pin DISCH. In addition, by adjusting the resistance value of the 40th resistor R40, the time constant of the RC charging network can be changed, thereby controlling the frequency of the square wave signal. For example, increasing the resistance value of the 40th resistor R40 will slow down the charging and discharging rate of the 21st capacitor C21, thereby reducing the output frequency; conversely, reducing the resistance value of the 40th resistor R40 will speed up the charging and discharging rate of the 21st capacitor C21, thereby increasing the output frequency. In summary, the 40th resistor R40 has a direct impact on the frequency of the square wave signal generated by the NE555 timer. It participates in the charging and discharging process of the 21st capacitor C21 and is one of the key components that determine the working characteristics of the NE555 timer. By reasonably selecting the resistance value of the 40th resistor R40, the required test signal characteristics can be obtained to meet the self-test requirements.

[0059] The forty-first resistor R41 is used as part of the discharge path. When the comparator inside the NE555 timer detects that the voltage on the twenty-first capacitor C21 reaches the set threshold (usually two-thirds of the power supply voltage), the timer switches state, and the discharge pin DISCH becomes low impedance, allowing the twenty-first capacitor C21 to discharge quickly through the forty-first resistor R41. This process determines the low-level duration of the square wave signal. In addition, the forty-first resistor R41 can also help prevent external noise or interference from causing the NE555 timer to be falsely triggered, thereby enhancing the stability and reliability of the circuit.

[0060] The forty-second resistor R42 is mainly used as a pull-up resistor for the output signal of the NE555 timer in the self-test source. When the NE555 timer outputs a low level, the forty-second resistor R42 ensures that the output of the NE555 timer will not be suspended (i.e., in an uncertain state), but will be clearly pulled to a known level (GND in this example), which helps to maintain the stability and clarity of the signal. In addition, the forty-second resistor R42 also provides a load for the output of the NE555 timer to protect the NE555 timer from direct short circuits or other situations that may damage its output stage. At the same time, the forty-second resistor R42 also helps define the state of the NE555 timer outputting a high level, because when the NE555 timer outputs a high level, the voltage will be pulled to a level close to +5V through the forty-second resistor R42.

[0061] The inverter Q is used to perform logic inversion on the square wave test signal generated by the NE555 timer. If the NE555 timer outputs a positive square wave, a negative square wave is output after passing through the inverter Q. By setting the inverter Q, it can be ensured that the output signal of the self-test source has a clear and stable level conversion, thereby meeting the requirements of the subsequent circuit for signal quality and characteristics.

[0062] The 22nd capacitor C22 is connected between the control voltage pin CONT of the NE555 timer and the eighth ground terminal GND8. The control voltage pin CONT is used to provide a reference voltage, which can be used to adjust the threshold voltage of the internal comparator of the NE555 timer (there are two comparators inside the NE555 timer, namely a trigger comparator and a reset comparator, wherein the trigger comparator is used to monitor the voltage on the trigger pin TRIG. When the voltage on the trigger pin TRIG is lower than 1 / 3 Vcc, the trigger comparator will be set; the reset comparator is used to monitor the voltage on the threshold pin THRES. When the voltage on the threshold pin THRES is higher than 2 / 3 Vcc, the reset comparator will be triggered). By connecting the 22nd capacitor C22 to the control voltage pin CONT, a stable reference voltage point can be provided for the control voltage pin CONT, which helps to reduce the influence of external noise on the internal comparator of the NE555 timer, thereby improving the stability of the self-test source. In addition, the 22nd capacitor C22 can also help smooth any voltage fluctuations that may appear on the control voltage pin CONT, which helps to maintain the stability of the output frequency of the NE555 timer when the supply voltage or temperature changes.

[0063] In addition, the positive electrode S3A of the third differential input pin of the MUX507 control chip is connected to the first input end of the first filter branch, and the negative electrode S3B of the third differential input pin of the MUX507 control chip is connected to the second input end of the first filter branch; the negative electrode S1B of the first differential input pin of the MUX507 control chip is connected to the first input end of the second filter branch, and the positive electrode S1A of the first differential input pin of the MUX507 control chip is connected to the second input end of the second filter branch; the positive electrode S7A of the seventh differential input pin of the MUX507 control chip is connected to the first input end of the third filter branch. end, the negative pole S7B of the seventh differential input pin of the MUX507 control chip is connected to the second input end of the third filter branch; the negative pole S5B of the fifth differential input pin of the MUX507 control chip is connected to the first input end of the fourth filter branch, and the positive pole S5A of the fifth differential input pin of the MUX507 control chip is connected to the second input end of the fourth filter branch; the positive pole S8A of the eighth differential input pin of the MUX507 control chip is connected to the first input end of the fifth filter branch, and the negative pole S8B of the eighth differential input pin of the MUX507 control chip is connected to the second input end of the fifth filter branch.

[0064] Hereinafter, the present application describes in detail how the self-test control circuit and the self-test source selectively activate different filter branches to implement testing of each filter branch.

[0065] In the self-test source, the NE555 timer first generates a stable square wave signal as a test signal, and the inverter Q processes the square wave test signal (if the NE555 timer outputs a positive square wave, the inverter Q inverts the square wave and outputs a negative square wave), and then sends the processed signal to the MUX507 control chip. The MUX507 control chip is a multiplexer that allows one output to be selected from multiple inputs. In this embodiment, the MUX507 control chip is configured to select any one of five different filter branches and guide the test signal generated by the self-test source to the selected filter branch. When the processing module 30 sends a control signal to the MUX507 control chip to select the filter branch to be tested, the test signal generated by the self-test source is transmitted to the input end of the selected filter branch through the corresponding pin of the MUX507 control chip. After the test signal passes through the selected filter branch, its output is converted into a digital signal by the conversion module 20 and then input into the processing module 30. The processing module 30 analyzes the characteristics of the digital signal to determine the working state of the selected filter branch. For example, if the signal amplitude, frequency and other parameters of the digital signal are within a reasonable range, it means that the filter branch functions normally; otherwise, the filter branch may be faulty and needs further inspection or repair.

[0066] It should be noted that the processing module 30 can control the self-test control circuit to test each filter branch in turn, or can control the self-test control circuit to test any filter branch, thereby completing the self-test of the entire pre-shaping module 10 .

[0067] In summary, the present application sets a self-check module 50 and cooperates with the processing module 30 to analyze the test signal, so as to regularly check the status of each filter branch in the pre-shaping module 10, thereby ensuring that the entire device maintains good performance during long-term operation.

[0068] In another embodiment, the wheel sensor digitization device further includes a storage module 60 for storing the signal features extracted by the processing module 30 .

[0069] In this embodiment, please continue to refer to Figure 2The storage module 60 adopts the S27KL064 storage chip, and the connection relationship between the S27KL064 storage chip and the first processor UA is as follows: the fourteenth input-output pin L9 of the first processor UA is connected to the first data pin SIO1 of the S27KL064 storage chip; the fifteenth input-output pin M9 of the first processor UA is connected to the second data pin SIO7 of the S27KL064 storage chip; the sixteenth input-output pin L10 of the first processor UA is connected to the read-write data strobe pin RWDS (Read Write Data Strobe) of the S27KL064 storage chip; the seventeenth input-output pin J12 of the first processor UA is connected to the third data pin SIO4 of the S27KL064 storage chip.

[0070] The connection relationship between the S27KL064 memory chip and the second processor UB is as follows: the sixth input-output pin M10 of the second processor UB is connected to the clock pin CK (Clock) of the S27KL064 memory chip; the seventh input-output pin L8 of the second processor UB is connected to the fourth data pin SIO0 of the S27KL064 memory chip; the eighth input-output pin M11 of the second processor UB is connected to the chip select pin CS# (ChipSelect) of the S27KL064 memory chip; the ninth input-output pin M8 of the second processor UB is connected to the fifth data pin SIO6 of the S27KL064 memory chip; the tenth input-output pin K12 of the second processor UB is connected to the sixth data pin SIO2 of the S27KL064 memory chip; the eleventh input-output pin K11 of the second processor UB is connected to the seventh data pin SIO3 of the S27KL064 memory chip; the twelfth input-output pin J1 of the second processor UB is connected to the reset pin RESET# (Reset) of the S27KL064 memory chip.

[0071] In this embodiment, the processing module 30 first selects the S27KL064 memory chip by pulling down the chip select pin CS# of the S27KL064 memory chip, and resets the S27KL064 memory chip through the reset pin RESET#. The processing module 30 sends a command to the S27KL064 memory chip through the data pin SIOx of the S27KL064 memory chip, such as performing a read, write or erase operation. In a read operation, the processing module 30 receives data from the S27KL064 memory chip; in a write operation, the processing module 30 sends data to the S27KL064 memory chip. Once the data transmission is completed, the processing module 30 releases the chip select pin CS# of the S27KL064 memory chip, ending the current communication cycle.

[0072] In the present application, it should be noted that although the signal features extracted by the processing module 30 are transmitted through the network transmission module 40, in some cases, the network transmission module 40 may be unstable or interrupted. If there is only network transmission but no local storage, data loss may occur. By setting up a storage module 60, a copy of the data can be saved locally to ensure that key information will not be lost even when there is a network failure in the network transmission module 40. In addition, operators sometimes need to conduct a more in-depth analysis of sensor data or trace back historical data to diagnose problems. By setting up a storage module 60, data within a certain time range can be retained to facilitate subsequent offline analysis. In addition, another point is that not all data needs to be sent out immediately. Some non-urgent or low-priority data can be cached through the storage module 60 first, thereby increasing the transmission rate of the network transmission module 40 for key data.

[0073] The above are only preferred embodiments of the present application, and are not intended to limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. A wheel sensor digitization device, characterized in that: The device comprises: Pre-shaping module, conversion module, processing module and network transmission module, in, The pre-shaping module is used to shape the wheel sensor signal to filter out high-frequency interference signals therein; The conversion module is used to convert the shaped wheel sensor signal into a digital signal; The processing module is used to collect the digital signal and extract signal features; The network transmission module is used to package and transmit the signal features extracted by the processing module.

2. The wheel sensor digitization device according to claim 1, characterized in that: The processing module comprises: a first processor and a second processor, in, The first processor is used to collect digital signals and perform preprocessing. The second processor is used to perform data analysis and feature extraction on the preprocessed digital signal.

3. The wheel sensor digitization device according to claim 1, characterized in that: The pre-shaping module comprises: The first filter circuit, the second filter circuit, the third filter circuit, the fourth filter circuit and the fifth filter circuit, wherein the first filter circuit, the second filter circuit, the third filter circuit, the fourth filter circuit and the fifth filter circuit have the same circuit structure and all include: A preliminary filtering branch, used for performing preliminary filtering on the wheel sensor signal; A voltage dividing branch, used for dividing the voltage of the wheel sensor signal after preliminary filtering; A limiting branch, used for limiting the wheel sensor signal after voltage division; A low-pass filter branch, used to filter out high-frequency noise in the wheel sensor signal after limiting; an amplifying branch, used for amplifying the wheel sensor signal after high-frequency noise is filtered out, so as to obtain an amplified wheel sensor signal; A feedback branch, used for providing negative feedback to stabilize the amplification gain of the amplification branch; The output branch is used to output the amplified wheel sensor signal to the conversion module.

4. The wheel sensor digitization device according to claim 1, characterized in that: The network transmission module includes: Ethernet control modules and network transformers, in, The Ethernet control module is used to convert the signal features extracted by the processing module into data frames suitable for Ethernet transmission and send them to the network transformer; The network transformer is used to electrically isolate, protect and transmit the data frames sent by the Ethernet control module.

5. The wheel sensor digitization device according to claim 4, characterized in that: The network transformer comprises a first transformer and a second transformer; The network transmission module also includes: A bias and filter circuit, used to provide a bias voltage for the network transformer and filter out common mode noise; A coupling circuit for isolating a DC component in a data frame sent by the Ethernet control module; A first impedance matching and filtering circuit, used to reduce signal reflection of the data frame sent by the Ethernet control module and filter out high-frequency noise in the data frame; The second impedance matching and filtering circuit is used to further reduce the signal reflection of the data frame sent by the Ethernet control module and filter out the common mode noise in the data frame.

6. The wheel sensor digitization device according to claim 5, characterized in that: The bias and filter circuit comprises: a thirty-third resistor, a thirty-fourth resistor, a thirty-fifth resistor and an eighteenth capacitor, in, The first end of the thirty-third resistor is connected to the primary side of the first transformer to form an eleventh node, and the second end of the thirty-third resistor is connected to a +3.3V power supply; the first end of the thirty-fourth resistor is connected to the +3.3V power supply, and the second end of the thirty-fourth resistor is connected to the second differential signal sending pin of the first transformer; the first end of the thirty-fifth resistor is connected to the +3.3V power supply, and the second end of the thirty-fifth resistor is connected to the first differential signal sending pin of the first transformer; the first end of the eighteenth capacitor is connected to the eleventh node, and the second end of the eighteenth capacitor is connected to the seventh ground terminal.

7. The wheel sensor digitization device according to claim 5, characterized in that: The coupling circuit comprises: A nineteenth capacitor, wherein a first end of the nineteenth capacitor is connected to the third differential signal sending pin of the second transformer, and a second end of the nineteenth capacitor is connected to the fourth data pin of the Ethernet control module.

8. The wheel sensor digitization device according to claim 5, characterized in that: The first impedance matching and filtering circuit comprises: a thirty-first resistor, a thirty-second resistor, a sixteenth capacitor, and a twentieth capacitor, in, The first end of the thirty-first resistor is connected to the second end of the nineteenth capacitor, and the second end of the thirty-first resistor is connected to the primary side of the second transformer to form a twelfth node; the first end of the twentieth capacitor is connected to the fourth differential signal receiving pin of the second transformer, the second end of the twentieth capacitor is connected to the first end of the thirty-second resistor to form a thirteenth node, and the second end of the thirty-second resistor is connected to the twelfth node; the first end of the sixteenth capacitor is connected to the twelfth node, and the second end of the sixteenth capacitor is connected to the sixth ground terminal.

9. The wheel sensor digitization device according to claim 5, characterized in that: The second impedance matching and filtering circuit comprises: a thirty-sixth resistor, a thirty-seventh resistor, a thirty-eighth resistor, a thirty-ninth resistor, a seventeenth capacitor and a twenty-first capacitor, in, The first end of the thirty-sixth resistor is connected to the secondary side of the first transformer, the first end of the thirty-seventh resistor is connected to the secondary side of the second transformer, and the second end of the thirty-sixth resistor is connected to the second end of the thirty-seventh resistor to form a fourteenth node; the first end of the thirty-eighth resistor is connected to the third differential signal receiving pin of the second transformer, the first end of the thirty-ninth resistor is connected to the fourth differential signal receiving pin of the second transformer, and the second end of the thirty-eighth resistor is connected to the second end of the thirty-ninth resistor; the first end of the twenty-first capacitor is connected to the fourteenth node, and the second end of the twenty-first capacitor is connected to the sixth ground terminal through the seventeenth capacitor.

10. The wheel sensor digitization device according to claim 3, characterized in that: The wheel sensor digitization device also includes: A self-check module, the self-check module comprising a self-check source and a self-check control circuit, The self-test source is used to provide a test signal to simulate various input conditions encountered under actual working conditions; The self-test control circuit is used to introduce the test signal provided by the self-test source into each filter branch of the pre-shaping circuit to detect whether each filter branch is working normally; Wherein, the self-test source includes: NE555 timer, the 40th resistor, the 41st resistor, the 42nd resistor, the 21st capacitor, the 22nd capacitor and the inverter, The first end of the forty-first resistor is connected to the discharge pin of the NE555 timer to form a fifteenth node, and the second end of the forty-first resistor is connected to a +5V power supply; the first end of the fortieth resistor is connected to the fifteenth node, the second end of the fortieth resistor is connected to the trigger pin of the NE555 timer to form a sixteenth node, the first end of the twenty-first capacitor is connected to the sixteenth node, and the second end of the twenty-first capacitor is connected to the eighth ground terminal; the first end of the twenty-second capacitor is connected to the control voltage pin of the NE555 timer, and the second end of the twenty-second capacitor is connected to the eighth ground terminal; the first end of the forty-second resistor is connected to the +5V power supply, and the second end of the forty-second resistor is connected to the output pin of the NE555 timer; the input end of the inverter is connected to the second end of the forty-second resistor, and the output end of the inverter is connected to the data input / output pin of the self-test control circuit.

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