Back contact solar cell and preparation method thereof, and battery assembly

Abstract

The present invention relates to a solar cell, and specifically provides a back-contact solar cell and a preparation method thereof, and a cell assembly. In the preparation method of the back-contact solar cell, oxygen is injected into a film layer area of ​​a first semiconductor opening area or a second semiconductor opening area to be opened to form an oxygen-containing film layer that is easily corroded by acid, thereby forming a large difference in corrosion rate with the film layer area without oxygen injection, and then solution corrosion is performed to form an opening. This opening method is not easy to damage the body silicon layer or the functional film layer, thereby ensuring the conversion efficiency of the battery.

Description

Technical Field

[0001] The present invention belongs to the technical field of solar cells, and in particular relates to a back-contact solar cell and a preparation method thereof, and a cell assembly. Background Art

[0002] When preparing existing back-contact solar cells, laser etching is generally used to form a first semiconductor opening area and a second semiconductor opening area on the back of the silicon wafer, so that corresponding film layers are deposited in the corresponding opening areas. However, laser etching of the openings requires a certain energy and etching depth, otherwise it is easy to excessively damage the bulk silicon layer or the functional film layer, thereby affecting the passivation effect and further causing the performance of the cell to deteriorate.

[0003] It should be noted that this part of the present invention only provides background technology related to the present invention and does not necessarily constitute prior art or known technology. Summary of the invention

[0004] The purpose of the present invention is to provide a back-contact solar cell and a preparation method and a cell assembly, so as to solve the technical problem that when laser etching is used to form the first semiconductor opening area and the second semiconductor opening area in the preparation of the existing back-contact solar cell, the body silicon layer or the functional film layer is easily excessively damaged, resulting in a decrease in the performance of the cell.

[0005] In order to achieve the above object, in a first aspect, the present invention provides a method for preparing a back-contact solar cell, comprising:

[0006] S1. Provide a double-sided polished silicon wafer;

[0007] S2, forming a first semiconductor layer and a mask layer on the back side of the silicon wafer; the first semiconductor layer comprises a first tunneling silicon oxide layer and an N-type doped polysilicon layer;

[0008] S3, injecting oxygen into the mask layer of the preset area on the back of the silicon wafer for the first time, and then performing solution etching to form a second semiconductor opening area;

[0009] The width of the oxygen injection is 400-600 μm, the depth of the oxygen injection is 80-200 nm, the injection energy is 100 keV-200 keV, the injection temperature is 500°C-650°C, and the injection dose is 1×10 17 cm -2 ~1×10 18 cm -2 The effective doping amount of the highly doped oxygen formed after the ion implantation is 1×10 18 cm -3 ~1×10 19 cm -3 ;

[0010] The corrosion rate ratio of the oxygen-injected mask layer to the non-oxygen-injected mask layer in 5% HF acid solution is 1:(5-15);

[0011] S4, performing texturing and cleaning on the second semiconductor opening areas on the front and back sides of the silicon wafer;

[0012] S5, forming a second semiconductor layer on the back side of the silicon wafer; the second semiconductor layer is a stack of a second tunneling silicon oxide layer and a P-type doped polysilicon layer;

[0013] S6, forming a passivation layer and an anti-reflection layer in sequence on the front side of the silicon wafer;

[0014] S7, performing a second oxygen implantation etching on the second semiconductor layer in a preset area on the back side of the silicon wafer to form a first semiconductor opening area;

[0015] The width of the oxygen injection is 200-300 μm, the depth of the oxygen injection is 50-90 nm, and the oxygen injection adopts high-temperature, high-dose oxygen ion implantation. The injection energy is 100 keV-200 keV, the injection temperature is 500°C-650°C, and the injection dose is 1×10 17 cm -2 -1×10 18 cm -2 The effective doping amount of the highly doped oxygen formed after the ion implantation is 1×10 18 cm -3 -1×10 19 cm -3 ;

[0016] The corrosion rate ratio of the second semiconductor layer injected with oxygen to the second semiconductor layer without oxygen injection in 5% HF acid solution is 1:(3-12);

[0017] S8, depositing a conductive film layer on the back side of the silicon wafer;

[0018] S9, etching an opening on the back side of the silicon wafer for the third time to form an insulating groove;

[0019] S10, forming metal electrodes in the first semiconductor opening region and the second semiconductor opening region on the back side of the silicon wafer respectively.

[0020] Optionally, step S2 includes:

[0021] The thickness of the first tunneling silicon oxide layer is 1-2 nm, the thickness of the N-type doped polysilicon layer is 70-120 nm, and the thickness of the mask layer is 40-90 nm. The first tunneling silicon oxide layer, the N-type doped polysilicon layer, and the mask layer are sequentially deposited and annealed at high temperature using a tubular polysilicon deposition furnace, and the deposition temperature is 400-500° C. When depositing the tunneling oxide layer, the mass flow rate of laughing gas is 8000-1200 sccm, the pressure is 100-200 Pa, the power is 3-20 KW, and the time is 20-100 seconds;

[0022] When depositing the N-type doped polysilicon layer, the mass flow rate of silane is 1000-3000sccm, the mass flow rate of phosphine is 1000-2500sccm, the mass flow rate of hydrogen is 7000-9000sccm, the pressure is 200-500 Pa, the power is 5-20KW, and the time is 800-1300 seconds;

[0023] When depositing the mask layer, the mass flow rate of silane is 1000-2000 sccm, the mass flow rate of nitrogen is 2000-5000 sccm, the pressure is 200-300 Pa, the power is 3-20 KW, and the time is 300-800 seconds.

[0024] Optionally, step S3 includes:

[0025] The oxygen-injected silicon wafer is etched with acid solution, wherein the acid solution is HF acid, the mass percentage of HF acid is 0.5%-3%, the mass percentage of deionized water is 95%-99.5%, the processing temperature is 20° C.-30° C., and the removal time is 50-200s.

[0026] Optionally, step S4 includes:

[0027] The front and back opening areas of the silicon wafer are cleaned by texturing, wherein the texturing liquid is a mixture of potassium hydroxide or sodium hydroxide, a texturing additive and water, wherein the mass percentage of potassium hydroxide or sodium hydroxide is 1% to 5%, the mass percentage of the texturing additive is 0.5% to 1%, the texturing time is 8 to 45 minutes, and the texturing temperature is 75° C. to 85° C.;

[0028] During the texturing and cleaning process, the silicon nitride mask layer on the back of the silicon wafer is also removed by the final cleaning solution. The solution used to remove the mask layer is HF acid solution, the mass percentage of HF acid in the HF acid solution is 0.5%~5%, the mass percentage of deionized water is 95%~99.5%, the processing temperature is 20℃~30℃, and the removal time is 60~300s.

[0029] Optionally, step S6 includes:

[0030] The passivation layer is one or a combination of an amorphous silicon passivation layer, a silicon oxide passivation layer and an aluminum oxide passivation layer; the anti-reflection layer is one or a combination of silicon nitride, aluminum oxide and a silicon oxide layer.

[0031] Optionally, the step S8 includes:

[0032] A transparent conductive film is deposited on the back of a silicon wafer using physical vapor deposition technology or activated plasma deposition technology. The thickness of the transparent conductive film is 40-80nm. The material of the transparent conductive film includes an indium oxide-based film doped with tin / tungsten / titanium / zinc or a zinc oxide-based film doped with aluminum / boron.

[0033] Optionally, the step S9 includes:

[0034] An opening is etched on the back of the silicon wafer by mask etching or laser to form an insulating groove between the first semiconductor and the second semiconductor. The width W3 of the insulating groove is 20-100 μm. After etching, the resistance between the first semiconductor and the second semiconductor is greater than 1 KΩ.

[0035] Optionally, the step S10 includes:

[0036] Metal electrodes are formed on the surfaces of the first semiconductor opening area and the second semiconductor opening area on the back side of the silicon wafer by using screen printing technology.

[0037] In a second aspect, the present invention further provides a back-contact solar cell, which is obtained using the method for preparing a back-contact solar cell as described in the first aspect.

[0038] In a third aspect, the present invention further provides a battery assembly, comprising: a back-contact solar cell as in the second aspect.

[0039] The embodiments of the present invention have at least the following beneficial effects:

[0040] The present invention adopts the above-mentioned technical scheme, by injecting oxygen into the film layer area of ​​the first semiconductor opening area or the second semiconductor opening area to be opened, so as to form an oxygen-containing film layer that is easily corroded by acid, thereby forming a large difference in corrosion rate with the film layer area without oxygen injection, and then performing solution corrosion to form an opening. This opening method is not easy to damage the bulk silicon layer or the functional film layer, thereby ensuring the conversion efficiency of the battery. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for use in the embodiments are briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without creative work.

[0042] Figure 1 A flow chart of a method for preparing a back-contact solar cell provided in an embodiment of the present invention;

[0043] Figure 2 A process structure diagram corresponding to step S1 in a method for preparing a back-contact solar cell provided in an embodiment of the present invention;

[0044] Figure 3 A process structure diagram corresponding to step S1 in a method for preparing a back-contact solar cell provided in an embodiment of the present invention;

[0045] Figure 4 A process structure diagram corresponding to step S1 in a method for preparing a back-contact solar cell provided in an embodiment of the present invention;

[0046] Figure 5 A process structure diagram corresponding to step S1 in a method for preparing a back-contact solar cell provided in an embodiment of the present invention;

[0047] Figure 6 A process structure diagram corresponding to step S1 in a method for preparing a back-contact solar cell provided in an embodiment of the present invention;

[0048] Figure 7 A process structure diagram corresponding to step S1 in a method for preparing a back-contact solar cell provided in an embodiment of the present invention;

[0049] Figure 8 This is a process structure diagram corresponding to step S1 in a method for preparing a back-contact solar cell provided in an embodiment of the present invention.

[0050] Description of Figure Numbers.

[0051] 1-silicon wafer; 2-first tunneling silicon oxide layer; 3-N-type doped polysilicon layer; 4-mask layer; 5-second tunneling silicon oxide layer; 6-P-type doped polysilicon layer; 7-passivation layer; 8-anti-reflection layer; 9-transparent conductive film layer; 10-metal electrode. DETAILED DESCRIPTION

[0052] In the present invention, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0053] In the present invention, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may mean that the first and second features are in direct contact, or the first and second features are in indirect contact through an intermediate medium. Moreover, a first feature being "above", "above" or "above" a second feature may mean that the first feature is directly above or obliquely above the second feature, or simply means that the first feature is higher in level than the second feature. A first feature being "below", "below" or "below" a second feature may mean that the first feature is directly below or obliquely below the second feature, or simply means that the first feature is lower in level than the second feature.

[0054] The endpoints and any values ​​of the ranges disclosed herein are not limited to the precise ranges or values, and these ranges or values ​​should be understood to include values ​​close to these ranges or values. For numerical ranges, the endpoint values ​​of each range, the endpoint values ​​of each range and the individual point values, and the individual point values ​​can be combined with each other to obtain one or more new numerical ranges, which should be considered as specifically disclosed in this article. Among them, the terms "optional" and "optional" all mean that they may be included or not included (or may be present or not).

[0055] like Figure 1 As shown, an embodiment of the present invention provides a method for preparing a back-contact solar cell, comprising the following steps S1 to S10:

[0056] S1. Provide a double-sided polished silicon wafer 1.

[0057] Specifically, the silicon wafer 1 is an N-type single crystal silicon wafer 1, and both the front and back sides of the silicon wafer 1 are polished and cleaned. Optionally, the silicon wafer 1 is a Czochralski single crystal silicon wafer 1 or a cast single crystal silicon wafer 1.

[0058] S2, forming a first semiconductor layer and a mask layer 4 on the back side of the silicon wafer 1; the first semiconductor layer includes a first tunneling silicon oxide layer 2 and an N-type doped polysilicon layer 3.

[0059] Optionally, see Figure 2 The thickness of the first tunneling silicon oxide layer 2 is 1-2nm, the thickness of the N-type doped polysilicon layer 3 is 70-120nm, and the thickness of the mask layer 4 is 40-90nm. The first tunneling silicon oxide layer 2, the N-type doped polysilicon layer 3, and the mask layer 4 are sequentially deposited and annealed at high temperature using a tubular polysilicon deposition furnace, and the deposition temperature is 400-500°C; when depositing the tunneling oxide layer, the mass flow rate of laughing gas is 8000-1200sccm, the pressure is 100-200 Pa, the power is 3-20KW, and the time is 20-100 seconds.

[0060] When depositing the N-type doped polysilicon layer 3, the mass flow rate of silane is 1000-3000 sccm, the mass flow rate of phosphine is 1000-2500 sccm, the mass flow rate of hydrogen is 7000-9000 sccm, the pressure is 200-500 Pa, the power is 5-20 KW, and the time is 800-1300 seconds.

[0061] When the mask layer 4 is deposited, the mass flow rate of silane is 1000-2000 sccm, the mass flow rate of nitrogen is 2000-5000 sccm, the pressure is 200-300 Pa, the power is 3-20 KW, and the time is 300-800 seconds.

[0062] S3, performing a first oxygen implantation on the mask layer 4 in the preset area on the back side of the silicon wafer 1, and then performing solution etching to form a second semiconductor opening area.

[0063] Specifically, see Figure 3 and Figure 4 , oxygen is injected into the mask layer 4 on the back of the silicon wafer 1 to form a locally oxygen-rich mask layer W02, which is easily corroded by acid. The width of oxygen injection is 400~600μm, the depth of oxygen injection is 80~200nm, the injection energy is 100keV~200keV, the injection temperature is 500℃~650℃, and the injection dose is 1×10 17 cm -2 ~1×10 18 cm -2 The effective doping amount of highly doped oxygen formed after ion implantation is 1×10 18 cm -3 ~1×10 19 cm -3 The corrosion rate ratio of the mask layer 4 injected with oxygen to the mask layer 4 without oxygen injection in 5% HF acid solution is 1:(5-15).

[0064] The above-mentioned oxygen-implanted silicon wafer 1 is subjected to acid corrosion, wherein the acid used is HF acid, the mass percentage of HF acid is 0.5%-3%, the mass percentage of deionized water is 95%-99.5%, the processing temperature is 20°C-30°C, and the removal time is 50-200s; after acid corrosion, a second semiconductor opening area is formed, and the width of the second semiconductor opening area is W2.

[0065] S4, performing texturing and cleaning on the second semiconductor opening areas on the front and back sides of the silicon wafer 1.

[0066] Alternatively, if Figure 5As shown, the front and back opening areas of the silicon wafer 1 are cleaned by texturing, and the texturing liquid is a mixture of potassium hydroxide or sodium hydroxide, a texturing additive and water, wherein the mass percentage of potassium hydroxide or sodium hydroxide is 1% to 5%, and the mass percentage of the texturing additive is 0.5% to 1%. The texturing time is 8 to 45 minutes, and the texturing temperature is 75°C to 85°C.

[0067] During the texturing and cleaning process, the silicon nitride mask layer 44 on the back of the silicon wafer 1 is also removed by the final cleaning solution. The solution used to remove the mask layer 4 is HF acid solution, the mass percentage of HF acid in the HF acid solution is 0.5%-5%, the mass percentage of deionized water is 95%-99.5%, the processing temperature is 20℃-30℃, and the removal time is 60-300s.

[0068] S5 , forming a second semiconductor layer on the back side of the silicon wafer 1 ; the second semiconductor layer is a stack of a second tunneling silicon oxide layer 5 and a P-type doped polysilicon layer 6 .

[0069] Alternatively, if Figure 6 As shown, the second semiconductor layer is a stack of a second tunneling silicon oxide layer 5 and a P-type doped polysilicon layer 6. The thickness of the P-type doped polysilicon layer 6 is 50-90 nm.

[0070] S6. Forming a passivation layer 7 and an anti-reflection layer 8 in sequence on the front side of the silicon wafer 1.

[0071] Optionally, the passivation layer 7 may be one or a combination of an amorphous silicon passivation layer 7, a silicon oxide passivation layer 7 and an aluminum oxide passivation layer 7. Preferably, the passivation layer 7 is a combination of silicon oxide and aluminum oxide passivation layers 7, the thickness of silicon oxide is 1-2nm, and the thickness of aluminum oxide is 3-4nm.

[0072] Optionally, the anti-reflection layer 8 can be one or a combination of silicon nitride, aluminum oxide and silicon oxide. Preferably, the anti-reflection layer 8 is a combination of silicon nitride and silicon oxide, the thickness of silicon nitride is 50-100nm, and the thickness of silicon oxide is 80-150nm.

[0073] S7, performing a second oxygen implantation and etching on the second semiconductor layer in a preset area on the back side of the silicon wafer 1 to form a first semiconductor opening area.

[0074] Specifically, Figure 6 and Figure 7As shown, the back side of the silicon wafer 1 is partially oxygen-injected for the second time, so that the second semiconductor layer covering the first semiconductor layer forms a locally oxygen-rich second semiconductor layer W01, which is easily corroded by acid. The width of the oxygen injection is 200-300 μm, the depth of the oxygen injection is 50-90 nm, and the oxygen injection adopts high-temperature, high-dose oxygen ion implantation, with an injection energy of 100 keV~200 keV, an injection temperature of 500℃~650℃, and an injection dose of 1×10 17 cm -2 -1×10 18 cm -2 The effective doping amount of highly doped oxygen formed after ion implantation is 1×10 18 cm -3 -1×10 19 cm -3 ; The corrosion rate ratio of the second semiconductor layer injected with oxygen and the second semiconductor layer not injected with oxygen in 5% HF acid solution is 1:(3-12), and the width of the first semiconductor opening area is W1.

[0075] S8. Depositing a conductive film layer on the back side of the silicon wafer 1.

[0076] Alternatively, if Figure 8 As shown, a transparent conductive film layer 9 is deposited on the back of the silicon wafer 1 by physical vapor deposition technology (PVD) or activated plasma deposition technology (RPD). The thickness of the transparent conductive film layer 9 is 40-80nm. The material of the transparent conductive film layer 9 can be a tin / tungsten / titanium / zinc doped indium oxide-based film or an aluminum / boron doped zinc oxide-based film.

[0077] S9, etching an opening on the back side of the silicon wafer 1 for the third time to form an insulating groove.

[0078] Alternatively, if Figure 8 As shown, mask etching or laser etching is used to etch an opening on the back of the silicon wafer 1 to form an insulating groove between the first semiconductor and the second semiconductor. The width W3 of the insulating groove is 20-100 μm. After etching, the resistance between the first semiconductor and the second semiconductor is greater than 1 KΩ.

[0079] S10 , forming metal electrodes 10 in the first semiconductor opening region and the second semiconductor opening region on the back side of the silicon wafer 1 .

[0080] Alternatively, if Figure 8 As shown, metal electrodes 10 are formed on the surfaces of the first semiconductor opening region and the second semiconductor opening region on the back side of the silicon wafer 1 by using screen printing technology.

[0081] The method for preparing a back-contact battery provided in an embodiment of the present invention forms an oxygen-containing film layer that is easily corroded by acid by injecting oxygen into the film layer area of ​​the first semiconductor opening area or the second semiconductor opening area to be opened, thereby forming a large difference in corrosion rate from the film layer area without oxygen injection, and then performing solution corrosion to form an opening. This opening method is not easy to damage the bulk silicon layer or the functional film layer, thereby ensuring the conversion efficiency of the battery.

[0082] In the second aspect, an embodiment of the present invention further provides a back-contact solar cell, comprising: obtained by the preparation method of the back-contact solar cell of the above embodiment. The back-contact solar cell comprises: a silicon wafer 1, a first semiconductor layer, a second semiconductor layer and a passivation layer 7. Among them, the silicon wafer 1 has a front side and a back side, wherein the front side refers to the light-receiving surface of the silicon wafer 1, and the back side is the opposite back side of the light-receiving surface. In the embodiment of the present invention, the side close to the silicon wafer 1 is usually considered as the inside, and the side far from the silicon wafer 1 is considered as the outside.

[0083] The first semiconductor layer is arranged on the back side of the silicon wafer 1 , and the first semiconductor layer includes a first tunneling silicon oxide layer 2 and an N-type doped polysilicon layer 3 which are sequentially formed on the silicon wafer 1 .

[0084] The first semiconductor layer is separated by a plurality of second semiconductor opening regions, and the second semiconductor opening regions and the surface of the first semiconductor layer around the second semiconductor opening regions are covered with a second semiconductor layer, and the second semiconductor layer is composed of a second tunneling silicon oxide layer and a P-type doped polysilicon layer; a first semiconductor opening region is provided between adjacent second semiconductor opening regions, and the first semiconductor opening region separates the second semiconductor layer. The first semiconductor opening region and the second semiconductor opening region are sequentially arranged on the front side of the silicon wafer 1 through a passivation layer 7 and an anti-reflection layer 8, and the passivation layer 7 includes an oxide layer and a three-aluminum oxide layer stacked and arranged on the front side of the silicon wafer 1.

[0085] In a third aspect, an embodiment of the present invention further provides a battery assembly, comprising: a back-contact solar cell as described in the above embodiment.

[0086] The embodiments of the present invention are described in detail below, which are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.

[0087] Example 1

[0088] A method for preparing a back-contact solar cell, comprising:

[0089] S1. Provide a double-sided polished silicon wafer 1.

[0090] S2, forming a first semiconductor layer and a mask layer 4 on the back side of the silicon wafer 1; the first semiconductor layer includes a first tunneling silicon oxide layer and an N-type doped polysilicon layer 3.

[0091] S3, performing a first oxygen implantation on the mask layer 4 in the preset area on the back side of the silicon wafer 1, and then performing solution etching to form a second semiconductor opening area.

[0092] The oxygen injection width is 500 μm, the oxygen injection depth is 100 nm, the injection energy is 150 keV, the injection temperature is 580 ° C, and the injection dose is 5×10 17 cm -2 The effective doping amount of highly doped oxygen formed after ion implantation is 5.5×10 18 cm -3 The corrosion rate ratio of the oxygen-injected mask layer 4 to the non-oxygen-injected mask layer 4 in 5% HF acid solution is 1:10.

[0093] S4, performing texturing and cleaning on the second semiconductor opening areas on the front and back sides of the silicon wafer 1.

[0094] S5. Form a second semiconductor layer on the back side of the silicon wafer 1; the second semiconductor layer is a stack of a second tunneling silicon oxide layer and a P-type doped polysilicon layer.

[0095] S6. Forming a passivation layer 7 and an anti-reflection layer 8 in sequence on the front side of the silicon wafer 1.

[0096] S7, performing a second oxygen implantation and etching on the second semiconductor layer in a preset area on the back side of the silicon wafer 1 to form a first semiconductor opening area.

[0097] The width of the oxygen injection is 200 μm, the depth of the oxygen injection is 75 nm, the injection energy is 130 keV, the injection temperature is 560°C, and the injection dose is 3.5×10 17 cm -2 The effective doping amount of the highly doped oxygen formed after the ion implantation is 3.5×10 18 cm -3 The corrosion rate ratio of the second semiconductor layer injected with oxygen to the second semiconductor layer without oxygen injection in 5% HF acid solution is 1: 8.5.

[0098] S8. Depositing a conductive film layer on the back side of the silicon wafer 1.

[0099] S9, etching an opening on the back side of the silicon wafer 1 for the third time to form an insulating groove.

[0100] S10 , forming metal electrodes 10 in the first semiconductor opening region and the second semiconductor opening region on the back side of the silicon wafer 1 .

[0101] Example 2

[0102] The method for preparing a back-contact solar cell is described with reference to Example 1, except that the oxygen injection depth in step S3 is adjusted to 90 nm.

[0103] Example 3

[0104] Referring to the method for preparing the back-contact solar cell of Example 1, the difference is that the injection energy in step S3 is adjusted to 110 keV, and the corresponding corrosion rate ratio of the mask layer 4 injected with oxygen and the mask layer 4 without oxygen injection in 5% HF acid solution is 1:9.1.

[0105] Example 4

[0106] Referring to the method for preparing a back-contact solar cell of Example 1, the difference lies in that the oxygen injection temperature in step S3 is adjusted to 500°C, and the corresponding corrosion rate ratio of the mask layer 4 injected with oxygen and the mask layer 4 not injected with oxygen in 5% HF acid solution is 1:7.35.

[0107] Example 5

[0108] Referring to the method for preparing a back contact solar cell in Example 1, the difference is that the oxygen injection dose in step S3 is adjusted to 1×10 17 cm -2 The corresponding etching rate ratio of the mask layer 4 with oxygen injection and the mask layer 4 without oxygen injection in 5% HF acid solution is 1:6.5.

[0109] Example 6

[0110] Referring to the method for preparing a back-contact solar cell of Example 1, the difference lies in that the oxygen injection depth in step S7 is adjusted to 85 nm, and the corresponding corrosion rate ratio of the mask layer 4 injected with oxygen and the mask layer 4 not injected with oxygen in 5% HF acid solution is 1:6.9.

[0111] Example 7

[0112] Referring to the method for preparing the back-contact solar cell of Example 1, the difference is that the injection energy in step S7 is adjusted to 105 keV, and the corresponding corrosion rate ratio of the mask layer 4 injected with oxygen and the mask layer 4 without oxygen injection in 5% HF acid solution is 1:7.8.

[0113] Example 8

[0114] Referring to the method for preparing a back-contact solar cell of Example 1, the difference lies in that the oxygen injection temperature in step S7 is adjusted to 505°C, and the corresponding corrosion rate ratio of the mask layer 4 injected with oxygen and the mask layer 4 not injected with oxygen in 5% HF acid solution is 1:6.7.

[0115] Example 9

[0116] Referring to the method for preparing a back contact solar cell in Example 1, the difference is that the oxygen injection dose in step S7 is adjusted to 1×10 17 cm -2 The corresponding etching rate ratio of the mask layer 4 with oxygen injection and the mask layer 4 without oxygen injection in 5% HF acid solution is 1:5.2.

[0117] Comparative Example 1

[0118] Referring to the method for preparing a back-contact solar cell of Example 1, the difference is that in step S3, oxygen is not implanted into the first semiconductor layer and the mask layer 4, and the second semiconductor opening region is formed by laser scribing.

[0119] Comparative Example 2

[0120] The method for preparing a back-contact solar cell is described with reference to Example 1, except that the oxygen injection depth in step S3 is 55 nm.

[0121] Comparative Example 3

[0122] The method for preparing a back-contact solar cell is described with reference to Example 1, except that the oxygen injection temperature in step S3 is 250°C.

[0123] Comparative Example 4

[0124] Referring to the method for preparing a back-contact solar cell in Example 1, the difference is that the oxygen injection dosage in step S3 is 8×10 16 .

[0125] Comparative Example 5

[0126] Referring to the method for preparing a back-contact solar cell of Example 1, the difference is that in step S7, oxygen is not implanted into the second semiconductor layer, and the first semiconductor opening region is formed by laser scribing.

[0127] Comparative Example 6

[0128] The method for preparing a back-contact solar cell is described with reference to Example 1, except that the oxygen injection depth in step S7 is 45 nm.

[0129] Comparative Example 7

[0130] The method for preparing a back-contact solar cell is described with reference to Example 1, except that the oxygen injection temperature in step S7 is 160°C.

[0131] Comparative Example 8

[0132] Referring to the method for preparing a back-contact solar cell in Example 1, the difference is that the oxygen injection dosage in step S7 is 3×10 16 .

[0133] Test Case

[0134] The back contact cells obtained in the above embodiments and comparative examples were subjected to performance tests, and the results are shown in Table 1. Among them, the performance indicators of each embodiment and comparative example were converted using embodiment 1 as a reference benchmark, the data of embodiment 1 was normalized benchmark 1, and other examples were converted based on embodiment 1, such as the conversion efficiency of comparative example 1 / the conversion efficiency of embodiment 1 was 0.968. In the normalization process, the unit of open circuit voltage is V, the unit of fill factor is %, and the unit of battery conversion efficiency is %.

[0135] Table 1 Comparison of performance parameters of various embodiments and comparative examples

[0136]

[0137] It can be seen from the above results that, compared with the comparative example, the embodiment scheme of the present invention can take into account both the open circuit voltage and the fill factor, which is beneficial to the improvement of conversion efficiency. Furthermore, according to Example 1 and Examples 2-9, it can be seen that the preferred parameter scheme of the present invention can obtain superior conversion efficiency, which is more conducive to a breakthrough in conversion efficiency.

[0138] The preferred embodiments of the present invention are described in detail above, but the present invention is not limited thereto. Within the technical concept of the present invention, the technical solution of the present invention can be subjected to a variety of simple modifications, including the combination of various technical features in any other suitable manner, and these simple modifications and combinations should also be regarded as the contents disclosed by the present invention and belong to the protection scope of the present invention.

Claims

1. A method for preparing a back-contact solar cell, characterized in that: include: S1. Provide a double-sided polished silicon wafer; S2, forming a first semiconductor layer and a mask layer on the back side of the silicon wafer; The first semiconductor layer includes a first tunneling silicon oxide layer and an N-type doped polysilicon layer; S3, injecting oxygen into the mask layer of the preset area on the back of the silicon wafer for the first time, and then performing solution etching to form a second semiconductor opening area; The oxygen injection width is 400-600 μm, the oxygen injection depth is 80-200 nm, the injection energy is 100 keV-200 keV, the injection temperature is 500°C-650°C, and the injection dose is 1×10 17 cm -2 ~1×10 18 cm -2 The effective doping amount of highly doped oxygen formed after ion implantation is 1×10 18 cm -3 ~1×10 19 cm -3 ; The corrosion rate ratio of the oxygen-injected mask layer to the non-oxygen-injected mask layer in 5% HF acid solution is 1:(5-15); S4, performing texturing and cleaning on the second semiconductor opening areas on the front and back sides of the silicon wafer; S5, forming a second semiconductor layer on the back side of the silicon wafer; the second semiconductor layer is a stack of a second tunneling silicon oxide layer and a P-type doped polysilicon layer; S6, forming a passivation layer and an anti-reflection layer in sequence on the front side of the silicon wafer; S7, performing a second oxygen implantation etching on the second semiconductor layer in a preset area on the back side of the silicon wafer to form a first semiconductor opening area; The oxygen injection width is 200-300 μm, the oxygen injection depth is 50-90 nm, and the oxygen injection adopts high temperature and large dose oxygen ion injection, the injection energy is 100 keV-200 keV, the injection temperature is 500°C-650°C, and the injection dose is 1×10 17 cm -2 -1×10 18 cm -2 The effective doping amount of highly doped oxygen formed after ion implantation is 1×10 18 cm -3 -1×10 19 cm -3 ; The corrosion rate ratio of the second semiconductor layer injected with oxygen to the second semiconductor layer without oxygen injection in 5% HF acid solution is 1:(3-12); S8, depositing a conductive film layer on the back side of the silicon wafer; S9, etching an opening on the back side of the silicon wafer for the third time to form an insulating groove; S10, forming metal electrodes in the first semiconductor opening region and the second semiconductor opening region on the back side of the silicon wafer respectively.

2. The method for preparing a back-contact solar cell according to claim 1, characterized in that: The step S2 comprises: The thickness of the first tunneling silicon oxide layer is 1-2 nm, the thickness of the N-type doped polysilicon layer is 70-120 nm, and the thickness of the mask layer is 40-90 nm; the first tunneling silicon oxide layer, the N-type doped polysilicon layer, and the mask layer are sequentially deposited and annealed at high temperature using a tubular polysilicon deposition furnace, and the deposition temperature is 400-500° C. When depositing the tunneling oxide layer, the mass flow rate of laughing gas is 8000-1200 sccm, the pressure is 100-200 Pa, the power is 3-20 KW, and the time is 20-100 seconds; When depositing the N-type doped polysilicon layer, the mass flow rate of silane is 1000-3000sccm, the mass flow rate of phosphine is 1000-2500sccm, the mass flow rate of hydrogen is 7000-9000sccm, the pressure is 200-500 Pa, the power is 5-20KW, and the time is 800-1300 seconds; When depositing the mask layer, the mass flow rate of silane is 1000-2000 sccm, the mass flow rate of nitrogen is 2000-5000 sccm, the pressure is 200-300 Pa, the power is 3-20 KW, and the time is 300-800 seconds.

3. The method for preparing a back-contact solar cell according to claim 1, characterized in that: The step S3 comprises: The oxygen-injected silicon wafer is etched with acid solution, wherein the acid solution is HF acid, the mass percentage of HF acid is 0.5%-3%, the mass percentage of deionized water is 95%-99.5%, the processing temperature is 20° C.-30° C., and the removal time is 50-200s.

4. The method for preparing a back-contact solar cell according to claim 1, characterized in that: The step S4 comprises: The front and back opening areas of the silicon wafer are cleaned by texturing, the texturing liquid is a mixture of potassium hydroxide or sodium hydroxide, a texturing additive and water, wherein the mass percentage of potassium hydroxide or sodium hydroxide is 1% to 5%, the mass percentage of the texturing additive is 0.5% to 1%, the texturing time is 8 to 45 minutes, and the texturing temperature is 75°C to 85°C; During the texturing and cleaning process, the silicon nitride mask layer on the back of the silicon wafer is also removed through the final cleaning solution. The solution used to remove the mask layer is HF acid solution. The mass percentage of HF acid in the HF acid solution is 0.5%~5%, the mass percentage of deionized water is 95%~99.5%, the processing temperature is 20℃~30℃, and the removal time is 60~300s.

5. The method for preparing a back-contact solar cell according to claim 1, characterized in that: The step S6 comprises: The passivation layer is one or a combination of an amorphous silicon passivation layer, a silicon oxide passivation layer and an aluminum oxide passivation layer; the anti-reflection layer is one or a combination of silicon nitride, aluminum oxide and a silicon oxide layer.

6. The method for preparing a back-contact solar cell according to claim 1, characterized in that: The step S8 comprises: A transparent conductive film is deposited on the back of a silicon wafer using physical vapor deposition technology or activated plasma deposition technology. The thickness of the transparent conductive film is 40-80nm. The material of the transparent conductive film includes an indium oxide-based film doped with tin / tungsten / titanium / zinc or a zinc oxide-based film doped with aluminum / boron.

7. The method for preparing a back-contact solar cell according to claim 1, characterized in that: The step S9 comprises: An opening is etched on the back of the silicon wafer by mask etching or laser to form an insulating groove between the first semiconductor and the second semiconductor. The width of the insulating groove is 20-100 μm. After etching, the resistance between the first semiconductor and the second semiconductor is greater than 1 KΩ.

8. The method for preparing a back-contact solar cell according to claim 1, characterized in that: The step S10 comprises: Metal electrodes are formed on the surfaces of the first semiconductor opening area and the second semiconductor opening area on the back side of the silicon wafer by using screen printing technology.

9. A back contact solar cell, characterized in that: include: The method for preparing a back-contact solar cell is used as claimed in any one of claims 1 to 8.

10. A battery assembly, characterized in that: include: A back contact solar cell as claimed in claim 9.

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