Display device and method for manufacturing display device

Abstract

Provided are a display device and a method of manufacturing the same, the display device including: a base layer including a first base layer having a first base hole, a second base layer having a second base hole, and a barrier layer disposed between the first and second base layers and having a barrier hole; a display layer; a driving chip; a first conductive layer including a (1-1) th conductive layer electrically connected to a part of the display layer and a (1-2) th conductive layer electrically connected to the driving chip; and a contact structure including a connection portion electrically connecting the (1-1) and (1-2) conductive layers. The first base layer includes 1-1 and 1-2 base layers spaced apart from each other in the thickness direction. The second base layer includes 2-1 and 2-2 base layers spaced apart from each other in the thickness direction. The barrier layer includes first and second barrier layers spaced apart in a thickness direction. A portion of the connection portion is disposed within the first base hole. The first base layer includes a tapered surface in which a connection portion is disposed without an undercut structure in a region adjacent to the first base hole.

Description

Technical Field

[0001] The present disclosure relates to a display device and a method for manufacturing the display device. Background Art

[0002] In recent years, as information displays have received increasing attention, research and development of display devices has been continuously conducted.

[0003] The location of the driver chip for driving the pixels of the display device can be determined in various ways. For example, the driver chip can be arranged on the back of the display device. In this case, the wiring for electrically connecting the driver chip and the display device can be arranged in the outer contour area of ​​the display device.

[0004] On the other hand, pixels may not be arranged in the outer frame area, in which case the outer frame area may be an invalid space where no light is recognized. In order to improve the display quality of the display device, it is preferable to sufficiently reduce the range where the invalid space is formed. Summary of the invention

[0005] An object of the present disclosure is to provide a display device and a method for manufacturing the display device with reduced dead space.

[0006] An object of the present disclosure is to provide a display device and a method for manufacturing the display device that reduce risks that may occur during a process to prevent damage to components within the display device and improve structural stability.

[0007] The display device involved in the embodiment of the present disclosure may include: a substrate layer including a first substrate layer having a first substrate hole, a second substrate layer having a second substrate hole, and a barrier layer disposed between the first substrate layer and the second substrate layer and having a barrier hole; a display layer including a light-emitting element; a driving chip; a first conductive layer including a 1-1 conductive layer electrically connected to at least a portion of the display layer and a 1-2 conductive layer electrically connected to the driving chip; and a contact structure including a connection portion electrically connecting the 1-1 conductive layer and the 1-2 conductive layer. It may be that the first substrate layer includes a 1-1 substrate layer and a 1-2 substrate layer spaced apart from each other in the thickness direction of the substrate layer. It may be that the second substrate layer includes a 2-1 substrate layer and a 2-2 substrate layer spaced apart from each other in the thickness direction. It may be that the barrier layer includes a first barrier layer and a second barrier layer spaced apart from each other in the thickness direction, the first barrier layer being disposed between the 1-1 substrate layer and the 2-1 substrate layer, and the second barrier layer being disposed between the 1-2 substrate layer and the 2-2 substrate layer. It may be that the 2-1 substrate layer forms the front surface on which the display layer and the 1-1 conductive layer are configured. It may be that the 2-2 substrate layer forms the back surface on which the driver chip and the 1-2 conductive layer are configured. It may be that at least a portion of the connecting portion is configured in the first substrate hole. It may be that the first substrate hole is defined in the 1-1 substrate layer and the 1-2 substrate layer, respectively, and the 1-1 substrate layer and the 1-2 substrate layer respectively include a conical surface on which the connecting portion is configured without an undercut structure in a region adjacent to the first substrate hole.

[0008] According to an embodiment, the first base layer may include an organic material, the barrier layer may include an inorganic material, or the second base layer may include an organic material.

[0009] According to an embodiment, the display device may further include: a first insulating layer, disposed on the second substrate layer, including a first hole; and a second insulating layer, disposed on the first insulating layer, including a second hole. The first insulating layer and the second insulating layer may include inorganic materials respectively. The first hole, the second hole, the first substrate hole, and the second substrate hole may be fluidically connected to each other.

[0010] According to an embodiment, the display layer may include: a transistor electrically connected to the light emitting element, including a transistor electrode. The transistor electrode and the first conductive layer may include the same material.

[0011] According to an embodiment, it may be that, when viewed on a plane, a size of the second substrate hole and a size of the blocking hole correspond to each other.

[0012] According to an embodiment, an upper surface of the barrier layer may be in entirety in contact with a lower surface of the second base layer.

[0013] According to an embodiment, when viewed on a plane, the size of the first substrate hole may be smaller than the size of the blocking hole and the size of the second substrate hole.

[0014] According to an embodiment, the display device may further include: an adhesive layer disposed between the 1-1 substrate layer and the 1-2 substrate layer, including an adhesive hole. The first substrate hole and the adhesive hole may have an hourglass shape when viewed in a cross section of the display device.

[0015] According to an embodiment, the display device may further include: an adhesive layer disposed between the 1-1 substrate layer and the 1-2 substrate layer, including an adhesive hole. The first substrate hole and the adhesive hole may have a trapezoidal shape when viewed in a cross section of the display device.

[0016] According to an embodiment, the display device may further include: a first insulating layer, disposed on the second substrate layer, including a first hole, and including an inorganic material. At least a portion of the blocking layer may protrude from the second substrate layer when viewed on a plane. The first hole and the blocking hole may have sizes corresponding to each other when viewed on a plane.

[0017] According to an embodiment, the first substrate hole and the blocking hole may have sizes corresponding to each other when viewed on a plane.

[0018] According to an embodiment, the first substrate hole may include an area where a portion of the first substrate layer is removed by an etching process and an area where a portion of the first substrate layer is removed by a laser process. When viewed on a plane, the area removed by the etching process may be larger than the area removed by the laser process.

[0019] According to an embodiment, the display device may further include: a second conductive layer disposed on the first conductive layer. The second conductive layer may be disposed on the same layer as at least a portion of wiring of the display layer.

[0020] According to an embodiment, the contact structure may include a plurality of contact structures arranged in a zigzag pattern.

[0021] The display device involved in the embodiment of the present disclosure may include: a display area and a non-display area; a first substrate layer and a second substrate layer, each including an organic material; a barrier layer, a first surface of which contacts the first substrate layer, and a second surface of which contacts the second substrate layer, including an inorganic material; a light-emitting element, which is arranged on the second substrate layer in the display area; and a contact structure, which is formed in the non-display area and includes a conductive connection part. The first surface of the barrier layer may be in contact with the first substrate layer as a whole.

[0022] The manufacturing method of the display device involved in the embodiment of the present disclosure may include: a step of manufacturing a substrate layer including a first substrate layer, a barrier layer and a second substrate layer and including a first region and a second region; a step of overlapping a portion of the substrate layer within the first region and another portion of the substrate layer within the second region; a step of exposing at least a portion of the first substrate layer within a hole forming region; and a step of forming a first substrate hole penetrating the first substrate layer within the hole forming region after the exposing step.

[0023] According to an embodiment, the manufacturing method of the display device may further include: configuring a display layer in the first region on the second substrate layer and configuring a driving chip in the second region. The first substrate layer may include a 1-1 substrate layer configured in the first region and a 1-2 substrate layer configured in the second region, and the barrier layer may include a first barrier layer configured in the first region and a second barrier layer configured in the second region. The second substrate layer may include a 2-1 substrate layer configured in the first region and a 2-2 substrate layer configured in the second region.

[0024] According to an embodiment, the manufacturing method of the display device may further include: a step of folding the base layer; and a step of removing at least a portion of the folded base layer during the folding step. The folding step may include: a step of configuring the display layer on one side of the base layer in the first region; and a step of configuring the driving chip on the other side of the base layer in the second region.

[0025] According to an embodiment, the step of forming the first substrate hole may include: removing at least a portion of the first substrate layer using a laser. When performing the step of forming the first substrate hole, no layer including an inorganic material is arranged in the hole forming region.

[0026] According to an embodiment, the laser light may include a first laser light and a second laser light defined toward directions different from each other.

[0027] (Effects of the Invention)

[0028] According to the embodiments of the present disclosure, a display device having a reduced dead space and a method for manufacturing the display device may be provided.

[0029] An object of the present disclosure is to provide a display device and a method for manufacturing the display device that reduce risks that may occur during a process to prevent damage to components within the display device and improve structural stability. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 and Figure 2 It is a schematic plan view showing a display device according to the embodiment.

[0031] Figure 3 is a schematic cross-sectional view showing a display device according to an embodiment of the present invention, Figure 2 A schematic cross-sectional view related to A~A′.

[0032] Figures 4 to 9 is a schematic cross-sectional view showing a display device including a contact structure according to an embodiment.

[0033] Fig.10 It is a schematic plan view showing the first hole, the second hole, and the third hole involved in the embodiment.

[0034] Figures 11 to 17 The present invention is a schematic cross-sectional view showing a method for manufacturing a display device according to an embodiment of the present invention in accordance with the steps of each process. DETAILED DESCRIPTION

[0035] The present invention can be implemented in various changes and can have various forms, and specific embodiments are illustrated in the drawings and described in detail herein. However, this is not intended to limit the present disclosure to a specific disclosed form, and it should be understood that it includes all changes, equivalents and substitutes included in the concept and technical scope of the present disclosure.

[0036] The terms first, second, etc. may be used to describe various constituent elements, but the constituent elements shall not be limited to the terms. The terms are used only for the purpose of distinguishing one constituent element from other constituent elements. For example, without exceeding the scope of the present disclosure, the first constituent element may be named as the second constituent element, and similarly, the second constituent element may be named as the first constituent element. The singular expression also includes the plural expression when it is not clearly stated in the text that only the singular is included.

[0037] In the present disclosure, the terms "including" or "having" should be understood to refer to the existence of features, numbers, steps, operations, constituent elements, parts or combinations thereof recorded in the specification, and do not exclude in advance the existence or additional possibility of one or more other features, numbers, steps, operations, constituent elements, parts or combinations thereof. In addition, when a layer, film, region, plate or other part is located on other parts, it includes not only the case where it is directly located on other parts, but also the case where other parts exist between them. In addition, in the present specification, when a layer, film, region, plate or other part is formed on other parts (on), the direction of formation is not limited to the upper direction, and includes the case where it is formed in the side direction or the lower direction. On the contrary, when a layer, film, region, plate or other part is located under other parts, it includes not only the case where it is directly located under other parts, but also the case where other parts exist between them.

[0038] The present disclosure relates to a display device and a method for manufacturing the display device. Hereinafter, a display device and a method for manufacturing the display device according to an embodiment will be described with reference to the accompanying drawings.

[0039] Figure 1 and Figure 2 It is a schematic plan view showing a display device according to the embodiment.

[0040] Reference Figure 1 and Figure 2 The display device DD is configured to include a base layer BS and pixels PXL (or sub-pixels SPX) arranged (or formed) on the base layer BS to display light. The display device DD may also include a driving circuit unit (for example, a driving chip IC including a scanning driving unit and / or a data driving unit) for driving the pixels PXL, a scanning line SL, a data line DL, wiring, and a contact structure CS.

[0041] The display device DD may include a display area DA and a non-display area NDA. The non-display area NDA may indicate an area outside the display area DA. The non-display area NDA may surround at least a portion of the display area DA. The non-display area NDA may be a dead space.

[0042] The base layer BS may form a base portion of the display device DD. The base layer BS may include various materials. For example, the base layer BS may include a rigid or flexible substrate or film.

[0043] According to an embodiment, the base layer BS may include a plurality of layers. According to an embodiment, the base layer BS may have a multilayer structure in which an organic material layer, an inorganic material layer, and an organic material layer are stacked. For example, the base layer BS may include a first base layer BS1 (refer to Figure 3), a barrier layer BAR containing an inorganic material (refer to Figure 3 ) and a second base layer BS2 containing an organic material (refer to Figure 3 ). For detailed description of this, please refer to Figure 3 The following pictures will be described later.

[0044] The display area DA may represent a region where pixels PXL (or sub-pixels SPX, light-emitting elements LD (see Figure 3 The non-display area NDA may indicate an area where no pixels PXL are configured.

[0045] According to an embodiment, the pixels PXL may be arranged in various arrangement structures. For example, the pixels PXL may be arranged in stripes or pentiles. However, the present disclosure is not limited thereto.

[0046] According to an embodiment, the pixel PXL (or sub-pixel SPX) may include first, second, and third sub-pixels SPX1, SPX2, and SPX3. At least one of the first, second, and third sub-pixels SPX1, SPX2, and SPX3 may form one pixel unit capable of emitting light of various colors.

[0047] The first subpixel SPX1 may be a red subpixel that emits red light (as an embodiment, the first color) and the second subpixel SPX2 may be a green subpixel that emits green light (as an embodiment, the second color) and the third subpixel SPX3 may be a blue subpixel that emits blue light (as an embodiment, the third color).

[0048] The scan line SL may be electrically connected to the scan driving unit. According to an embodiment, the scan driving unit may be included in a driver chip IC. A scan connection line (not shown) electrically connected to the scan line SL may be arranged in the non-display area NDA, and the scan connection line may be electrically connected to the driver chip IC arranged on the back side of the base layer BS through a contact structure CS.

[0049] The scan lines SL may extend along the pixel rows. For example, the scan lines SL may extend along the first direction DR1 and may be spaced apart from each other along the second direction DR2. Each scan line SL may be electrically connected to a pixel circuit of each sub-pixel SPX.

[0050] The data line DL may be electrically connected to the data driving unit. According to an embodiment, the data driving unit may be included in a driving chip IC. A data connection line (not shown) electrically connected to the data line DL may be disposed in the non-display area NDA, and the data connection line may be electrically connected to the driving chip IC disposed on the back side of the base layer BS through a contact structure CS.

[0051] The data lines DL may extend along the pixel columns. For example, the data lines DL may extend along the second direction DR2 and may be spaced apart from each other along the first direction DR1. Each data line DL may be electrically connected to a pixel circuit of each sub-pixel SPX.

[0052] The contact structure CS may be disposed in the non-display area NDA. The contact structure CS may include a conductive structure disposed in a hole formed in the base layer BS. Thus, the contact structure CS may be a conductive structure for electrically connecting the front surface 100 (refer to FIG. 1 ) disposed on the base layer BS. Figure 3 ) and a structure of wirings configured on the back side 200 of the base layer BS. According to an embodiment, when viewed on a plane, the contact structure CS may overlap the driving chip IC along the second direction DR2.

[0053] The contact structure CS may be provided in plurality. For example, a portion of the plurality of contact structures CS may be electrically connected to the scan connection line. Another portion of the plurality of contact structures CS may be electrically connected to the data connection line. Thus, the data signal output by the driver chip IC may be provided to the sub-pixel SPX via the contact structure CS, the data connection line, and the data line DL. The scan signal output by the driver chip IC may be provided to the sub-pixel SPX via the contact structure CS, the scan connection line, and the scan line SL. However, the present disclosure is not limited thereto, and the contact structure CS may electrically connect various types of wiring to each other.

[0054] According to an embodiment, the contact structure CS may be arranged in a zigzag structure. For example, the contact structure CS may be arranged in the first row and the second row in sequence along the row direction (e.g., the first direction DR1), and at least a portion of the contact structure CS arranged in the nth column may not overlap with the contact structure CS arranged in the n-1th column and the n+1th column along the column direction (e.g., the second direction DR2). At least a portion of the contact structure CS arranged in the nth column may be configured to be staggered with the contact structure CS arranged in the n-1th column and the n+1th column along the column direction (e.g., the second direction DR2). In this case, the contact structure CS may be more compactly arranged in the non-display area NDA, and crosstalk of electrical signals may be prevented.

[0055] According to the embodiment, the contact structure CS may have various shapes on a plane. For example, the contact structure CS may have an n-gonal (n is a natural number greater than 3) shape. However, the present disclosure is not limited thereto. For example, the contact structure CS may also have a circular shape or an elliptical shape.

[0056] When viewed on a plane, the driver chip IC may overlap the display area DA. The driver chip IC may be configured on the back side 200 of the base layer BS. The driver chip IC may include a scan driver and a data driver. The driver chip IC may output a data signal for applying to the data line DL. The driver chip IC may output a scan signal for applying to the scan line SL.

[0057] On the other hand, although not shown, the display device DD may further include a printed circuit substrate. The printed circuit substrate may also be arranged on the back side 200 of the base layer BS according to the embodiment, so as to overlap with the display area DA when viewed in a plane. The printed circuit substrate may be electrically connected to the driver chip IC and the contact structure CS.

[0058] Figure 3 is a schematic cross-sectional view showing a display device according to an embodiment. Figure 3 is with Figure 2 A schematic cross-sectional view related to A~A′.

[0059] Reference Figure 3 The display device DD may include a display layer DP disposed on the front surface 100 of the base layer BS and one or more insulating layers. The display device DD may include a driving chip IC disposed on the back surface 200 of the base layer BS and one or more insulating layers.

[0060] According to the embodiment, the display layer DP may be implemented by various light sources. For example, the display layer DP may include an inorganic light-emitting element (e.g., micro-LED or nano-LED) containing an inorganic semiconductor or an organic light-emitting element (OLED: Organic Light Emitting Diode). However, the present disclosure is not particularly limited thereto, and for ease of description, the following description is based on an embodiment in which the display layer DP includes an organic light-emitting element.

[0061] According to an embodiment, the base layer BS may include a layer forming the front surface 100 and a layer forming the back surface 200. At this time, the layer forming the front surface 100 and the layer forming the back surface 200 may be patterned in the same process as each other and then attached to each other through the adhesive layer ADS. According to an embodiment, the adhesive layer ADS may combine the 1-1 base layer BS1-1 and the 1-2 base layer BS1-2 with each other and may include various adhesive materials.

[0062] The base layer BS may include a first base layer BS1, a barrier layer BAR, and a second base layer BS2 stacked in sequence. The base layer BS may include the first base layer BS1 adjacent to the inner side, the second base layer BS2 adjacent to the outer side and defining the front surface 100 or the back surface 200, and the barrier layer BAR disposed between the first base layer BS1 and the second base layer BS2.

[0063] One side of the first base layer BS1 may face the adhesive layer ADS, and the other side of the first base layer BS1 may face the barrier layer BAR. According to an embodiment, the first base layer BS1 may include a 1-1th base layer BS1-1 adjacent to the front surface 100 and a 1-2th base layer BS1-2 adjacent to the back surface 200. According to an embodiment, the 1-1th base layer BS1-1 and the 1-2th base layer BS1-2 may be spaced apart in a thickness direction (e.g., a third direction DR3) of the base layer BS.

[0064] The second base layer BS2 may be disposed on the barrier layer BAR, forming the front surface 100 or the back surface 200. According to an embodiment, the second base layer BS2 may include a 2-1st base layer BS2-1 adjacent to the front surface 100 and a 2-2nd base layer BS2-2 adjacent to the back surface 200. According to an embodiment, the 2-1st base layer BS2-1 and the 2-2nd base layer BS2-2 may be spaced apart in a thickness direction (e.g., a third direction DR3) of the base layer BS.

[0065] The first base layer BS1 and the second base layer BS2 may include various materials. According to an embodiment, the first base layer BS1 and the second base layer BS2 may include organic materials. For example, the first base layer BS1 and the second base layer BS2 may include the same material, which may include polyimide. However, the present disclosure is not necessarily limited thereto.

[0066] One side of the barrier layer BAR may be in contact with the first base layer BS1, and the other side of the barrier layer BAR may be in contact with the second base layer BS2. According to an embodiment, the barrier layer BAR may include a first barrier layer BAR1 disposed between the 1-1 base layer BS1-1 and the 2-1 base layer BS2-1, and a second barrier layer BAR2 disposed between the 1-2 base layer BS1-2 and the 2-2 base layer BS2-2. According to an embodiment, the first barrier layer BAR1 and the second barrier layer BAR2 may be spaced apart in a thickness direction (e.g., a third direction DR3) of the base layer BS.

[0067] The barrier layer BAR may include a material different from the first base layer BS1 and the second base layer BS2, and may include an inorganic material according to an embodiment. For example, the barrier layer BAR may include amorphous silicon (a-Si), silicon oxide (SiOx ), silicon nitride (SiN x ), silicon oxynitride (SiO x N y ), aluminum oxide (AlO x ) and titanium oxide (TiO x For example, the barrier layer BAR may have a plurality of layers including silicon nitride (SiN x ) layer and a layer including silicon oxynitride (SiO x N y Alternatively, the barrier layer BAR may have a structure in which a layer including amorphous silicon (a-Si) and a layer including silicon oxide (SiO x ) layer structure. However, the present disclosure is not necessarily limited to this.

[0068] According to an embodiment, the first base layer BS1, the barrier layer BAR, and the second base layer BS2 may form a hole for forming a contact structure CS including a connection portion COS. The hole may be formed by penetrating the first base layer BS1, the barrier layer BAR, and the second base layer BS2, and a connection portion COS having conductivity may be introduced into the hole. For details, please refer to Figure 4 The following pictures will be described later.

[0069] According to an embodiment, a first insulating layer INS1 and a second insulating layer INS2 may be disposed on the second base layer BS2 .

[0070] The first insulating layer INS1 may be a buffer film that can prevent impurities from diffusing from the outside. The first insulating layer INS1 may include a 1-1 insulating layer INS1-1 disposed on the front surface 100 and a 1-2 insulating layer INS1-2 disposed on the back surface 200. The 1-1 insulating layer INS1-1 and the 1-2 insulating layer INS1-2 may be deposited in the same process and include the same material.

[0071] The second insulating layer INS2 may be disposed on the first insulating layer INS1. According to an embodiment, a portion of the second insulating layer INS2 may cover the active layer ACT and the gate electrode GE. The second insulating layer INS2 may include a 2-1st insulating layer INS2-1 disposed on the front surface 100 and a 2-2nd insulating layer INS2-2 disposed on the back surface 200. The 2-1st insulating layer INS2-1 and the 2-2nd insulating layer INS2-2 may be deposited in the same process and include the same material.

[0072] According to an embodiment, the first insulating layer INS1 and the second insulating layer INS2 may each independently include an inorganic material, and the inorganic material may include silicon oxide (SiO x ), silicon nitride (SiNx ), silicon oxynitride (SiO x N y ), aluminum oxide (AlO x ) and titanium oxide (TiO x )

[0073] According to an embodiment, the display device DD may include an active layer ACT, a gate insulating layer GI, a gate electrode GE, a first transistor electrode TE1, a second transistor electrode TE2, a first conductive layer ICL1, a first interlayer insulating layer ILD1, a bridge pattern layer BRP, and a second interlayer insulating layer ILD2.

[0074] The active layer ACT may be disposed on the 1-1 insulating layer INS1-1 and may be covered by the 2-1 insulating layer INS2-1 when viewed in a plane. According to an embodiment, the active layer ACT may include one or more of the group consisting of polysilicon, LTPS (Low Temperature Polycrystalline Silicon), amorphous silicon, and an oxide semiconductor. The active layer ACT may include a first contact region in contact with the first transistor electrode TE1 and a second contact region in contact with the second transistor electrode TE2. The first contact region and the second contact region may be semiconductor patterns doped with impurities. The region between the first contact region and the second contact region may be a channel region. The channel region may be an intrinsic semiconductor pattern not doped with impurities.

[0075] The gate insulating layer GI may be disposed between the gate electrode GE and the active layer ACT. The gate insulating layer GI may include one or more of the inorganic materials described above with reference to the first insulating layer INS1 and the second insulating layer INS2.

[0076] The gate electrode GE may be disposed on the gate insulating layer GI, and may be disposed on the channel region of the active layer ACT with the gate insulating layer GI interposed therebetween. The gate electrode GE may include a conductive material.

[0077] The first transistor electrode TE1 and the second transistor electrode TE2 may be disposed on the 2-1 insulating layer INS2-1. The first transistor electrode TE1 may pass through the second insulating layer INS2 to electrically contact the first contact region of the active layer ACT, and the second transistor electrode TE2 may pass through the second insulating layer INS2 to electrically contact the second contact region of the active layer ACT. For example, the first transistor electrode TE1 may be a drain electrode, and the second transistor electrode TE2 may be a source electrode, but the present disclosure is not limited thereto. According to an embodiment, the first transistor electrode TE1 may be electrically connected to the first electrode ELT1 through a contact portion.

[0078] Here, the active layer ACT, the gate electrode GE, the first transistor electrode TE1 , and the second transistor electrode TE2 may constitute a transistor TR.

[0079] The first conductive layer ICL1 may include a 1-1 conductive layer ICL1-1 disposed on a 2-1 insulating layer INS2-1 and a 1-2 conductive layer ICL1-2 disposed on a 2-2 insulating layer INS2-2. The first conductive layer ICL1 may be patterned in the same process as the first transistor electrode TE1 and the second transistor electrode TE2 and may include the same material. The first conductive layer ICL1 may be a source electrode layer / drain electrode layer.

[0080] The first conductive layer ICL1 may be electrically connected to one or more wirings (e.g., pixel circuits or wirings electrically connected to pixel circuits) included in the display layer DP. The first conductive layer ICL1 may be electrically connected to the connection portion COS. For example, the 1-1 conductive layer ICL1-1 may be electrically connected to a portion of the connection portion COS adjacent to the front surface 100, and the 1-2 conductive layer ICL1-2 may be electrically connected to another portion of the connection portion COS adjacent to the back surface 200.

[0081] According to an embodiment, the first conductive layer ICL1 may not be in contact with the first base layer BS1 when performing a process for forming the connection portion COS. As an experiment, when a conductive material is disposed on the first base layer BS1 including an organic material, there may be a risk that the conductive material diffuses into the inside of the first base layer BS1. However, according to an embodiment, when performing a laser process for forming a hole in the base layer BS, the first conductive layer ICL1 is not directly adjacent to the first base layer BS1, and the aforementioned risk can be reduced.

[0082] The first interlayer insulating layer ILD1 may include a 1-1 interlayer insulating layer ILD1-1 disposed on the front surface 100 and a 1-2 interlayer insulating layer ILD1-2 disposed on the back surface 200. The 1-1 interlayer insulating layer ILD1-1 and the 1-2 interlayer insulating layer ILD1-2 may be deposited in the same process and include the same material. The first interlayer insulating layer ILD1 may include an organic material. However, the present disclosure is not limited thereto.

[0083] According to an embodiment, a 1-1 interlayer insulating layer ILD1-1 may be disposed on a 1-1 conductive layer ICL1-1, and a 1-2 interlayer insulating layer ILD1-2 may be disposed on a 1-2 conductive layer ICL1-2.

[0084] The bridge pattern layer BRP may be disposed on the 1-1 interlayer insulating layer ILD1 - 1 to be electrically connected to the first transistor electrode TE1 , and may be electrically connected to the first electrode ELT1 .

[0085] The second interlayer insulating layer ILD2 may include a 2-1 interlayer insulating layer ILD2-1 disposed on the front surface 100 and a 2-2 interlayer insulating layer ILD2-2 disposed on the back surface 200. The 2-1 interlayer insulating layer ILD2-1 and the 2-2 interlayer insulating layer ILD2-2 may be deposited in the same process and include the same material. The second interlayer insulating layer ILD2 may include an organic material. However, the present disclosure is not limited thereto.

[0086] According to an embodiment, the 2-1 interlayer insulating layer ILD2-1 may be disposed on the 1-1 interlayer insulating layer ILD1-1, and the 2-2 interlayer insulating layer ILD2-2 may be disposed on the 1-2 interlayer insulating layer ILD1-2. According to an embodiment, the 2-1 interlayer insulating layer ILD2-1 may be a via layer and may be a planarization layer.

[0087] According to an embodiment, the driver chip IC may be disposed on the 2-2 insulating layer INS2-2. The driver chip IC may be electrically connected to the 1-2 conductive layer ICL1-2 electrically connected to the connection portion COS. Thus, the driver chip IC may be electrically connected to the wiring on the front surface 100.

[0088] According to an embodiment, the display device DD may include a light emitting element LD, a pixel definition layer PDL, and an encapsulation layer TFE disposed on the 2-1 interlayer insulating layer ILD2-1 as a configuration for forming a display layer DP.

[0089] The light emitting element LD may be arranged on the 2-1 interlayer insulating layer ILD2-1 (e.g., a through-hole layer). The light emitting element LD may include a first electrode ELT1, a light emitting layer EL, and a second electrode ELT2. According to an embodiment, the light emitting layer EL may be arranged in a region defined by a pixel definition film PDL. The pixel definition film PDL may be adjacent to the periphery of the light emitting layer EL. One side of the light emitting layer EL may be electrically connected to the first electrode ELT1, and the other side of the light emitting layer EL may be electrically connected to the second electrode ELT2.

[0090] The first electrode ELT1 may be an anode relative to the light emitting layer EL, and the second electrode ELT2 may be a common electrode (or cathode) relative to the light emitting layer EL. According to an embodiment, the first electrode ELT1 and the second electrode ELT2 may include a conductive material. For example, the first electrode ELT1 may include a conductive material having a reflective property, and the second electrode ELT2 may include a transparent conductive material. However, the present disclosure is not limited thereto.

[0091] The light emitting layer EL may have a multi-layer thin film structure including a light generation layer. The light emitting layer EL may include a hole injection layer for injecting holes, a hole transport layer for suppressing the movement of uncombined electrons in the light generation layer to increase the chance of recombination of holes and electrons by having excellent hole transportability, a light generation layer for emitting light by recombination of injected electrons and holes, a hole blocking layer for suppressing the movement of uncombined holes in the light generation layer, an electron transport layer for smoothly transporting electrons to the light generation layer, and an electron injection layer for injecting electrons. The light emitting layer EL may emit light based on an electrical signal provided from the first electrode ELT1 and the second electrode ELT2.

[0092] The pixel definition film PDL may be disposed on the 2-1 interlayer insulating layer ILD2-1 (eg, via layer) to define a position where the light emitting layer EL is disposed. According to an embodiment, a portion of the pixel definition film PDL may be disposed at an edge position of the display area DA adjacent to the non-display area NDA.

[0093] According to an embodiment, the pixel definition film PDL may include an organic material. According to an embodiment, the pixel definition film PDL may include one or more of the group consisting of acrylic resin, epoxy resin, phenol resin, polyamide resin, and polyimide resin. However, the present disclosure is not limited thereto. The pixel definition film PDL may also include an inorganic material.

[0094] The encapsulation film TFE may be disposed on the light emitting element LD (or the second electrode ELT2). The encapsulation film TFE may offset the height difference generated by the light emitting element LD and the pixel definition film PDL. The encapsulation film TFE may include a plurality of insulating films covering the light emitting element LD. According to an embodiment, the encapsulation film TFE may have a structure in which inorganic films and organic films are alternately stacked. According to an embodiment, the encapsulation film TFE may be an encapsulation film having a structure in which a first inorganic film TFE1, an organic film TFE2, and a second inorganic film TFE3 are sequentially stacked. According to an embodiment, the encapsulation film TFE may be a thin film encapsulation film.

[0095] The following, with Figure 3 Reference Figures 4 to 10, the contact structure CS involved in the embodiment is described. The contents that may be repeated with the above contents are simplified or not described repeatedly.

[0096] Figures 4 to 9 is a schematic cross-sectional view showing a display device including a contact structure according to an embodiment. Fig.10 It is a schematic plan view showing the first hole, the second hole, and the third hole involved in the embodiment.

[0097] First, refer to Figure 4 , describing a display device DD including the contact structure CS involved in the first embodiment. Figure 4 is a schematic cross-sectional view showing a display device DD including the contact structure CS according to the first embodiment.

[0098] According to an embodiment, a contact structure CS may be formed in the non-display area NDA to electrically connect the wiring on the front surface 100 and the wiring on the back surface 200. For example, the contact structure CS may include a connection portion COS that electrically connects the wiring on the front surface 100 and the wiring on the back surface 200, and may include a hole for forming the connection portion COS.

[0099] According to an embodiment, the contact structure CS may include a hole for configuring the connection portion COS. For example, the contact structure CS may include a first substrate hole BH1, an adhesive hole AH, a blocking hole BAH, a second substrate hole BH2, a first hole H1, a second hole H2, and a wiring hole LH. The first substrate hole BH1, the adhesive hole AH, the blocking hole BAH, the second substrate hole BH2, the first hole H1, the second hole H2, and the wiring hole LH may be fluidically connected (or communicated) with each other.

[0100] The first substrate holes BH1 may be included in the first substrate layer BS1. The first substrate holes BH1 may be formed through the first substrate layer BS1. For example, the first substrate holes BH1 may include holes formed through the 1-1th substrate layer BS1-1 and holes formed through the 1-2th substrate layer BS1-2.

[0101] The blocking hole BAH may be included in the blocking layer BAR. The blocking hole BAH may be formed through the blocking layer BAR. For example, the blocking hole BAH may include a hole formed through the first blocking layer BAR1 and a hole formed through the second blocking layer BAR2.

[0102] The second substrate holes BH2 may be included in the second substrate layer BS2. The second substrate holes BH2 may be formed through the second substrate layer BS2. For example, the second substrate holes BH2 may include holes formed through the 2-1st substrate layer BS2-1 and holes formed through the 2-2nd substrate layer BS2-2.

[0103] The first hole H1 may be included in the first insulating layer INS1. The first hole H1 may be formed through the first insulating layer INS1. For example, the first hole H1 may include a hole formed through the 1-1 insulating layer INS1-1 and a hole formed through the 1-2 insulating layer INS1-2.

[0104] The second hole H2 may be included in the second insulating layer INS2. The second hole H2 may be formed through the second insulating layer INS2. For example, the second hole H2 may include a hole formed through the 2-1st insulating layer INS2-1 and a hole formed through the 2-2nd insulating layer INS2-2.

[0105] The wiring hole LH may be included in the first conductive layer ICL1. The wiring hole LH may be formed through the first conductive layer ICL1. For example, the wiring hole LH may include a hole formed through the 1-1 conductive layer ICL1-1 and a hole formed through the 1-2 conductive layer ICL1-2.

[0106] According to an embodiment, a process for forming the first substrate hole BH1 formed in the 1-1 substrate layer BS1-1 and a process for forming the first substrate hole BH1 formed in the 1-2 substrate layer BS1-2 may be performed in a single process. For example, in order to form the first substrate hole BH1, a laser process may be performed, and laser may be applied in a direction from an area adjacent to the back surface 200 toward an area adjacent to the front surface 100. According to an embodiment, when viewed on a cross section of the contact structure CS, the first substrate hole BH1 and the bonding hole AH may have a trapezoidal shape. In this case, a technical effect of simplifying the process steps for forming the first substrate hole BH1 for the first substrate layer BS1 may be provided.

[0107] According to an embodiment, the size of the blocking hole BAH on the plane and the size of the second substrate hole BH2 on the plane may correspond to each other. For example, the blocking hole BAH and the second substrate hole BH2 may be formed in the same process as each other. For example, the etching masks used to form the blocking hole BAH and the second substrate hole BH2 may be the same as each other. The second substrate layer BS2 and the blocking layer BAR may be etched in the same process as each other.

[0108] In this specification, when holes different from each other have sizes corresponding to each other, it can be referred to as a case where they are manufactured in the same etching process.

[0109] According to an embodiment, the upper surface of the blocking layer BAR may be in contact with the second base layer BS2 as a whole. Thus, the blocking layer BAR does not substantially protrude from the lower surface of the second base layer BS2. According to an embodiment, in the region adjacent to the blocking hole BAH and the second base hole BH2, the blocking layer BAR and the second base layer BS2 may form a continuous side surface.

[0110] According to an embodiment, the blocking hole BAH may be larger than the first substrate hole BH1. The blocking hole BAH may be larger than the first hole H1, the second hole H2, and the wiring hole LH. According to an embodiment, the first hole H1, the second hole H2, and the wiring hole LH may have sizes corresponding to each other. For example, in an area adjacent to the first hole H1 and the second hole H2, the first insulating layer INS1 and the second insulating layer INS2 may form a continuous side surface.

[0111] On the other hand, according to an embodiment, in a region adjacent to the region where the holes are formed, the second substrate layer BS2 may form an angle with the substrate surface. For example, the side surface of the second substrate layer BS2 may form a non-obtuse angle with the plane where the first substrate layer BS1 is disposed.

[0112] According to an embodiment, the first substrate layer BS1 may not include an undercut structure at a position adjacent to a region where the first substrate hole BH1 is formed. For example, the first substrate hole BH1 may include a side surface directly adjacent to a region where the connection portion COS is configured, and here, the directly adjacent side surface may include a tapered surface.

[0113] As an experiment, in the case where the first base layer BS1 includes an undercut structure in the region where the connection portion COS is provided, there may be a risk that at least a portion of the layer including the inorganic material penetrates into the undercut region.

[0114] However, according to an embodiment, the first base layer BS1 may include a tapered surface without an undercut structure, thereby preventing the aforementioned risks and improving structural stability. This technical effect may be produced by not configuring a layer including an inorganic material on the first base layer BS1 when performing a laser process for forming the first base hole BH1 and the adhesive hole AH penetrating the first base layer BS1 and the adhesive layer ADS. Details of this will be described later.

[0115] According to an embodiment, the connection portion COS may be disposed in the first base hole BH1 , the adhesive hole AH, the barrier hole BAH, the second base hole BH2 , the first hole H1 , the second hole H2 , and the wiring hole LH.

[0116] At least a portion of the connection portion COS may be electrically connected to the 1-1 conductive layer ICL1-1 disposed on the front surface 100, and another portion of the connection portion COS may be electrically connected to the 1-2 conductive layer ICL1-2 disposed on the back surface 200. A portion of the connection portion COS adjacent to the front surface 100 may include a curved surface. A portion of the connection portion COS adjacent to the back surface 200 may include a curved surface. The connection portion COS may be covered by the resin portion RES.

[0117] The connection portion COS may include a metal. For example, the connection portion COS may include silver (Ag) as a conductive material. The connection portion COS may include a structure in which an ink containing a metal material is solidified. For example, the connection portion COS may have a state in which an ink containing silver is solidified (for example, photocured). However, the present disclosure is not limited thereto. For example, the connection portion COS may also be formed by a sputtering process, or may also be provided by applying a conductive paste.

[0118] The resin part RES may be arranged on the connection part COS and cover the upper surface of the connection part COS. The resin part RES may cover the entire upper surface of the exposed connection part COS. The resin part RES may include a first resin part RES1 arranged adjacent to the front surface 100 in the second substrate hole BH2 and a second resin part RES2 arranged adjacent to the back surface 200 in the second substrate hole BH2. The resin part RES may protect the connection part COS from foreign substances such as moisture. The resin part RES may include various polymer resins, and the examples thereof are not particularly limited.

[0119] On the other hand, the first hole H1, the second hole H2, and the blocking hole BAH may have various shapes when viewed in a plane. Fig.10 , the first hole H1, the second hole H2, and the blocking hole BAH may have a quadrangular shape. However, the present disclosure is not necessarily limited thereto.

[0120] In addition, when viewed in a plane, the size relationship between the first hole H1, the second hole H2, and the blocking hole BAH can be changed in various ways. Fig.10 As shown, the blocking hole BAH may have a size larger than the first hole H1 and the second hole H2. However, the present disclosure is not necessarily limited thereto, and the size relationship may be appropriately changed according to the timing of etching the blocking layer BAR, the first insulating layer INS1, and the second insulating layer INS2 to form the blocking hole BAH, the first hole H1, and the second hole H2, respectively.

[0121] Next, refer to Figure 5 , describing a display device DD including the contact structure CS according to the second embodiment. Figure 5 is a schematic cross-sectional view showing a display device DD including a contact structure CS according to the second embodiment.

[0122] The contact structure CS according to the second embodiment is different from the contact structure CS according to the previous embodiment in that the barrier hole BAH is formed in a process different from the process for patterning the second base layer BS2 .

[0123] According to an embodiment, after performing an etching process for forming the second substrate hole BH2, an etching process for forming the blocking hole BAH is performed. According to an embodiment, the size of the blocking hole BAH may be smaller than the size of the second substrate hole BH2. According to an embodiment, when viewed on a plane, at least a portion of the blocking layer BAR and the second substrate layer BS2 may not overlap each other. At least a portion of the blocking layer BAR may protrude from the lower surface of the second substrate layer BS2 toward the connection portion COS.

[0124] According to an embodiment, the etching masks used to form the blocking hole BAH and the first hole H1 may be the same as each other. The blocking layer BAR and the first insulating layer INS1 may be etched in the same process as each other. According to an embodiment, the etching process for the second insulating layer INS2 may be performed after the etching process for the first insulating layer INS1 is performed.

[0125] According to an embodiment, the blocking hole BAH and the first hole H1 may have corresponding sizes. The second hole H2 may have a larger size than the blocking hole BAH and the first hole H1.

[0126] Next, refer to Figure 6 , describing a display device DD including the contact structure CS according to the third embodiment. Figure 6 is a schematic cross-sectional view showing a display device DD including a contact structure CS according to the third embodiment.

[0127] The contact structure CS of the third embodiment is different from the contact structure CS of the previous embodiment in that, in the region penetrating the first base layer BS1 and the adhesive layer ADS, the shape of the connection portion COS has a wider cross section toward the front surface 100 or the back surface 200 .

[0128] According to an embodiment, a process for forming the first substrate hole BH1 formed in the 1-1 substrate layer BS1-1 and a process for forming the first substrate hole BH1 formed in the 1-2 substrate layer BS1-2 may be performed in different processes. For example, a first laser process may be performed in order to form the first substrate hole BH1 formed in the 1-1 substrate layer BS1-1, in which a laser may be applied in a direction from an area adjacent to the front surface 100 toward an area adjacent to the back surface 200. In order to form the first substrate hole BH1 formed in the 1-2 substrate layer BS1-2, a second laser process different from the first laser process may be performed in which a laser may be applied in a direction from an area adjacent to the back surface 200 toward an area adjacent to the front surface 100. According to an embodiment, the first substrate hole BH1 and the bonding hole AH may have an hourglass shape when viewed in a cross section of the contact structure CS. In this case, laser light for forming the first base hole BH1 can be applied only to a relatively thin region, thereby reducing the necessity of applying laser light with excessive intensity, thereby reducing the risk of damaging the base layer BS and the like due to the laser light.

[0129] Next, refer to Figure 7 , describing a display device DD including the contact structure CS according to the fourth embodiment. Figure 7 is a schematic cross-sectional view showing a display device DD including a contact structure CS according to a fourth embodiment.

[0130] The contact structure CS involved in the fourth embodiment is different from the contact structure CS involved in the previous embodiment in that a portion of the first base layer BS1 is removed, so that at least a portion of each of the blocking layer BAR, the first insulating layer INS1 and the second insulating layer INS2 is configured in the cavity formed in the first base layer BS1.

[0131] According to an embodiment, a first substrate hole BH1 having a size larger than an area for configuring the connection portion COS may be formed. For example, a portion of the first substrate hole BH1 defined outside the area where the connection portion COS is directly configured may be formed by an etching process, and then a laser process may be performed to provide another portion of the first substrate hole BH1. According to this embodiment, an etching process for a wider area and a deeper area may be performed to manufacture the first substrate hole BH1. In this case, the laser process for the first substrate layer BS1 and the adhesive layer ADS may be applied from a relatively deeper position, which may reduce the risk of damaging the substrate layer BS due to the laser.

[0132] According to an embodiment, the barrier hole BAH and the second base hole BH2 may be formed in the same etching process, and thus, the upper surface of the barrier layer BAR may be in contact with the lower surface of the second base layer BS2 as a whole.

[0133] Next, refer to Figure 8 , describing a display device DD including the contact structure CS involved in the fifth embodiment. Figure 8 is a schematic cross-sectional view showing a display device DD including a contact structure CS according to the fifth embodiment.

[0134] The contact structure CS involved in the fifth embodiment is different from the contact structure CS involved in the previous embodiment in that a portion of the first base layer BS1 is removed and at least a portion of each of the blocking layer BAR, the first insulating layer INS1 and the second insulating layer INS2 is arranged in the cavity formed in the first base layer BS1, but the process for forming the first base hole BH1 and the blocking hole BAH and the process for forming the second base hole BH2 are formed in different processes.

[0135] According to an embodiment, after the second base layer BS2 is etched in order to form the second base holes BH2 , the first base holes BH1 and the blocking holes BAH may be formed in a relatively narrow region compared to the second base holes BH2 .

[0136] According to the embodiment, similar to the above-mentioned example, the risk of damaging the base layer BS due to the laser process can be prevented, and the connection portion COS can be appropriately formed in a relatively wide area.

[0137] Next, refer to Fig. 9 , describing a display device DD including the contact structure CS involved in the sixth embodiment. Fig. 9 2 is a schematic cross-sectional view showing a display device DD including a contact structure CS according to the sixth embodiment.

[0138] The contact structure CS involved in the sixth embodiment is different from the contact structure CS involved in the previous embodiments in that a second conductive layer ICL2 is further arranged on the first conductive layer ICL1.

[0139] According to an embodiment, the connection portion COS may be electrically connected to the first conductive layer ICL1 and the second conductive layer ICL2 at the same time. The second conductive layer ICL2 may be configured on one side of the first conductive layer ICL1. For example, the second conductive layer ICL2 may include a 2-1 conductive layer ICL2-1 on the front surface 100 and a 2-2 conductive layer ICL2-2 on the back surface 200. The 2-1 conductive layer ICL2-1 may be configured on the 1-1 conductive layer ICL1-1. The 2-2 conductive layer ICL2-2 may be configured on the 1-2 conductive layer ICL1-2. According to an embodiment, the second conductive layer ICL2 may be formed in the same process as the bridge pattern layer BRP described above and include the same material. However, the present disclosure is not limited thereto.

[0140] A portion of the connection portion COS is a wiring on the front surface 100, which can be electrically connected to the 1-1 conductive layer ICL1-1 and the 2-1 conductive layer ICL2-1. Another portion of the connection portion COS is a wiring on the back surface 200, which can be electrically connected to the 1-2 conductive layer ICL1-2 and the 2-2 conductive layer ICL2-2.

[0141] According to the present embodiment, the resistance of the wiring connected to the connection portion COS is relatively reduced, so that the reliability of the electric signal supplied through the connection portion COS can be improved.

[0142] Below, refer to Figures 11 to 17 , a method for manufacturing a display device DD according to an embodiment is described. The contents that may overlap with the above contents are simplified or not described repeatedly.

[0143] Figures 11 to 17 The present invention is a schematic cross-sectional view showing a method for manufacturing a display device according to an embodiment of the present invention in accordance with the steps of each process. Fig.11 and Fig.12 It may be a cross-sectional view showing a process step before the first area A1 and the second area A2 are overlapped on a plane. Fig.11 and Fig.12 It may be a cross-sectional view showing a process step after the first area A1 and the second area A2 are overlapped on a plane.

[0144] Reference Fig.11 and Fig.12 , a base layer BS including a first area A1 and a second area A2 can be manufactured. For example, a display layer DP can be arranged in the first area A1 on the base layer BS, and a driver chip IC can be arranged in the second area A2 on the base layer BS. Although not shown, a printed circuit board can also be arranged in the second area A2 on the base layer BS.

[0145] According to an embodiment, the first area A1 and the second area A2 may be distinguished by a distinction line FL which is folded or cut in a subsequent process.

[0146] Hereinafter, for convenience of description, the display layer DP is simply shown in the drawings.

[0147] In this step, a base layer BS may be prepared. For example, a first base layer BS1, a barrier layer BAR, and a second base layer BS2 may be stacked in this order.

[0148] In this step, a first insulating layer INS1 , a second insulating layer INS2 , a first conductive layer ICL1 , a first interlayer insulating layer ILD1 , and a second interlayer insulating layer ILD2 may be disposed on the second base layer BS2 .

[0149] According to an embodiment, the first barrier layer BAR1, the 2-1 base layer BS2-1, the 1-1 insulating layer INS1-1, the 2-1 insulating layer INS2-1, and the 1-1 conductive layer ICL1-1 may form a hole structure in the first area A1. The hole structure formed in the first area A1 may be a hole structure for providing at least a portion of the connection portion COS on the front surface 100. The second barrier layer BAR2, the 2-2 base layer BS2-2, the 1-2 insulating layer INS1-2, the 2-2 insulating layer INS2-2, and the 1-2 conductive layer ICL1-2 may form a hole structure in the second area A2. The hole structure formed in the second area A2 may be a hole structure for providing at least a portion of the connection portion COS on the back surface 200. The hole structures formed in the first area A1 and the second area A2 may represent Figures 4 to 9 The hole described in .

[0150] According to an embodiment, when forming the hole structure, at least a portion of the first base layer BS1 may not be etched ( Fig.11 However, the present disclosure is not limited thereto. For example, when forming the hole structure, at least a portion of the first base layer BS1 may also be etched ( Fig.12 ). In this case, as referenced Figure 7 and Figure 8 As described above, the risk of damage caused by subsequent laser processing can be reduced.

[0151] According to the embodiment, the process for patterning the base layer BS and the conductive layer and the insulating layer on the base layer BS may be performed based on a general photolithography process, and the etching method and the deposition method are not limited to the specific examples.

[0152] On the other hand, in order to form the display layer DP, the light emitting element LD may be formed in various ways. For example, in the case where the light emitting element LD includes an organic light emitting diode, the light emitting layer EL of the light emitting element LD may be manufactured by sequentially depositing organic materials. The display layer DP may be configured in at least a portion of the region to define the display area DA. At the same time, when the display layer DP is formed, an organic layer formed on the base layer BS may be formed. At this time, the organic layer formed in the hole forming area HFA as a structure formed in the same process as a portion of the organic layer of the display layer DP (e.g., the encapsulation film TFE) may be removed.

[0153] According to an embodiment, in this step, the first conductive layer ICL1 may be removed quickly in the hole forming area HFA after being patterned. In the case where the first conductive layer ICL1 is in contact with the first base layer BS1, the conductive material of the first conductive layer ICL1 may diffuse in the first base layer BS1. However, according to an embodiment, the first conductive layer ICL1 may not be in contact with the first base layer BS1 substantially, and the risk of contamination of the first base layer BS1 due to the conductive material may be prevented.

[0154] According to an embodiment, the 1-1th conductive layer ICL1-1 may be electrically connected to at least a portion of wirings of the display layer DP, and the 1-2th conductive layer ICL1-2 may be electrically connected to the driving chip IC.

[0155] According to an embodiment, in this step, at least a portion of the first base layer BS1 may be exposed. Before performing a subsequent process, at least a portion of the first base layer BS1 may be exposed in the hole forming area HFA which is a position corresponding to the formed hole structure. For example, the barrier layer BAR, the first insulating layer INS1, and the second insulating layer INS2 may not cover at least a portion of the hole forming area HFA of the first base layer BS1. The hole forming area HFA is an area where the laser of the subsequent laser process is applied, and at least a portion of the first base layer BS1 in the area where the laser process is performed and overlaps with the hole forming area HFA when viewed on a plane may be removed.

[0156] Reference Fig.13 , a portion of the base layer BS in the first area A1 and a portion of the base layer BS in the second area A2 are manufactured to overlap in a plane.

[0157] For example, the previously manufactured base layer BS and the structure on the base layer BS may be folded based on the dividing line FL. Thus, at least a portion of the first area A1 and the second area A2 may be provided in the non-folding area NFA, and at least another portion of the first area A1 and the second area A2 may be provided in the folding area FA. In addition, an adhesive layer ADS may be interposed between the 1-1 base layer BS1-1 and the 1-2 base layer BS1-2, and the 1-1 base layer BS1-1 and the 1-2 base layer BS1-2 may be combined with each other.

[0158] However, the present disclosure is not necessarily limited thereto. For example, according to an embodiment, the previously manufactured base layer BS and the structure on the base layer BS may be cut to be combined with each other (eg, laminated) based on the dividing line FL. In this case, the ineffective space of the display device DD may be further reduced.

[0159] In this step, the front surface 100 and the back surface 200 may be defined. For example, the area where the display layer DP is configured may be defined as the area corresponding to the front surface 100 , and the area where the driving chip IC is configured may be defined as the area corresponding to the back surface 200 .

[0160] In this step, when viewed on a plane, the holes defined in the front surface 100 and the holes defined in the back surface 200 may overlap with each other. For example, when viewed on a plane, the holes defined by the first barrier layer BAR1, the 2-1st base layer BS2-1, the 1-1st insulating layer INS1-1, the 2-1st insulating layer INS2-1, and the 1-1st conductive layer ICL1-1 and the holes defined by the second barrier layer BAR2, the 2-2nd base layer BS2-2, the 1-2nd insulating layer INS1-2, the 2-2nd insulating layer INS2-2, and the 1-2nd conductive layer ICL1-2 may overlap with each other.

[0161] In this step, at least a portion of the first base layer BS1 may be kept exposed. For example, at least a portion of the 1-1 base layer BS1-1 may be exposed, and at least a portion of the 1-2 base layer BS1-2 may be exposed.

[0162] Reference Fig.14 and Fig.15 , a laser process is performed, so that a space for configuring (or providing) the connecting portion COS can be prepared.

[0163] In this step, a laser process may be performed in the hole forming area HFA. For example, laser LAS may be applied to the hole forming area HFA, and a portion of the first base layer BS1 and a portion of the adhesive layer ADS that overlap the hole forming area HFA in plane may be removed.

[0164] According to the embodiment (refer to Fig.14 ), laser LAS can be applied in one direction in a single process. In this case, holes can be formed in the 1-1 base layer BS1-1, the 1-2 base layer BS1-2, and the adhesive layer ADS in a single process.

[0165] Or, according to the embodiment (refer to Fig.15 ), in the hole forming area HFA, the first laser LAS1 applied in one direction and the second laser LAS2 applied in the other direction can be applied to the hole forming area HFA, respectively. Thus, similarly, a portion of the first base layer BS1 and a portion of the adhesive layer ADS overlapping with the hole forming area HFA on the plane can be removed, and a hole structure having an hourglass shape in cross section can be provided.

[0166] As an experiment, when performing a laser process, the laser transmittance of the layer including inorganic materials can be higher than that of the layer including organic materials. For example, the layer including inorganic materials (e.g., the barrier layer BAR) can substantially transmit the laser. In this case, there may be a possibility that laser energy is applied to other adjacent areas other than the hole forming area HFA so that a portion of the first base layer BS1 is removed. In this case, an undercut structure may be generated and the first base layer BS1 may be damaged.

[0167] However, according to the embodiment, the laser process can be performed in a state where the layer including the inorganic material is not arranged in the hole formation area HFA, and there is no possibility that the undercut structure described above may be generated.

[0168] Reference Fig.16 The connection part COS may be supplied (or arranged) to the hole structure formed in the hole forming area HFA, and the resin part RES may be applied on the connection part COS. Thus, the contact structure CS capable of electrically connecting the wiring on the front surface 100 and the wiring on the back surface 200 may be manufactured.

[0169] In this step, the connection part COS may be arranged in the hole structure to electrically connect the wiring of the front surface 100 with the wiring of the back surface 200. For example, the connection part COS may be cured after supplying the ink including metal in the hole structure. At the same time, the connection part COS may be covered by the resin part RES to be protected from external influences.

[0170] On the other hand, according to an embodiment, an inspection process for the display device DD may be performed after performing this step. For example, the inspection process may be a process for determining whether the display layer DP emits light normally. For example, in order for the display layer DP to operate normally, an electrical signal needs to be normally supplied from the driver chip IC to the display layer DP. At this time, the supplied electrical signal may be supplied to the display layer DP through the connection portion COS or the wiring within the folding area FA. According to an embodiment, the aforementioned inspection process may be performed before the folding area FA is removed, so that the inspection process is appropriately performed with high reliability.

[0171] Reference Fig.17 , the stacked structure can be removed in the folding area FA. Thus, the side wiring and a part of the structure of the base layer BS can be removed. The structure in the folding area FA can be removed by a laser process, etc., but the method of removal is not particularly limited in the present disclosure.

[0172] As an experiment, when the side wiring is formed, the non-display area NDA as the invalid space may be over-expanded. However, the side wiring can be removed, so that the connection structure between the front surface 100 and the back surface 200 involved in the embodiment can be realized by the contact structure CS, which can substantially reduce the invalid space.

[0173] On the other hand, the side wiring can be removed from the display device DD according to the embodiment, and no additional protection structure is required for protecting the side wiring. For example, in the prior art, when the side wiring is used to electrically connect the wiring between the front surface 100 and the back surface 200, a structure for protecting the side wiring is required, but according to the embodiment, such a structure is not required, so the process cost can be substantially saved.

[0174] Next, although not shown in the drawings, a cover resin layer or the like may be disposed in order to protect the non-display area NDA and at least a portion of its side surfaces.

[0175] As described above, the preferred embodiments of the present disclosure are described with reference to the embodiments, but those skilled in the art should understand that various modifications and changes can be made to the present disclosure without departing from the concept of the present disclosure and the technical scope described in the claims.

[0176] Therefore, the technical scope of the present disclosure is not limited to the contents described in the detailed description of the specification, but should be determined only by the claims.

Claims

1. A display device, comprising: A base layer, comprising a first base layer having a first base hole, a second base layer having a second base hole, and a barrier layer disposed between the first base layer and the second base layer and having a barrier hole; A display layer including a light emitting element; Driver chip; The first conductive layer includes a 1-1 conductive layer electrically connected to at least a portion of the display layer and a 1-2 conductive layer electrically connected to the driving chip; as well as a contact structure, comprising a connection portion electrically connecting the 1-1 conductive layer and the 1-2 conductive layer, The first substrate layer includes a 1-1 substrate layer and a 1-2 substrate layer spaced apart from each other in a thickness direction of the substrate layer, and the second substrate layer includes a 2-1 substrate layer and a 2-2 substrate layer spaced apart from each other in the thickness direction. The barrier layer includes a first barrier layer and a second barrier layer spaced apart from each other in the thickness direction, the first barrier layer being arranged between the 1-1 base layer and the 2-1 base layer, and the second barrier layer being arranged between the 1-2 base layer and the 2-2 base layer, The 2-1 base layer forms a front surface on which the display layer and the 1-1 conductive layer are arranged, and the 2-2 base layer forms a back surface on which the driving chip and the 1-2 conductive layer are arranged. At least a portion of the connecting portion is configured in the first substrate hole, and the first substrate hole is defined in the 1-1 substrate layer and the 1-2 substrate layer, respectively. The 1-1 substrate layer and the 1-2 substrate layer respectively include a conical surface of the connecting portion configured without an undercut structure in an area adjacent to the first substrate hole.

2. The display device according to claim 1, wherein: The first substrate layer comprises an organic material, The barrier layer comprises an inorganic material, The second base layer includes an organic material.

3. The display device according to claim 2, further comprising: A first insulating layer, disposed on the second base layer, comprising a first hole; as well as A second insulating layer, disposed on the first insulating layer, comprises a second hole, The first insulating layer and the second insulating layer respectively include inorganic materials, The first hole, the second hole, the first substrate hole, and the second substrate hole are fluidly connected to each other.

4. The display device according to claim 1, wherein: The display layer includes: a transistor, electrically connected to the light emitting element, including a transistor electrode, The transistor electrode and the first conductive layer include the same material as each other.

5. The display device according to claim 1, wherein: When viewed on a plane, the size of the second substrate hole and the size of the blocking hole correspond to each other.

6. The display device according to claim 5, wherein: The upper surface of the barrier layer is in contact with the lower surface of the second substrate layer as a whole.

7. The display device according to claim 1, wherein: When viewed on a plane, the size of the first substrate hole is smaller than the size of the blocking hole and the size of the second substrate hole.

8. The display device according to claim 1, further comprising: The adhesive layer is disposed between the 1-1 base layer and the 1-2 base layer and includes an adhesive hole. The first substrate hole and the adhesive hole have an hourglass shape when viewed in a cross section of the display device.

9. The display device according to claim 1, further comprising: The adhesive layer is disposed between the 1-1 base layer and the 1-2 base layer and includes an adhesive hole. The first substrate hole and the adhesive hole have a trapezoidal shape when viewed in a cross section of the display device.

10. The display device according to claim 1, further comprising: A first insulating layer, disposed on the second base layer, includes a first hole and includes an inorganic material. At least a portion of the barrier layer protrudes from the second base layer when viewed in a plan view, When viewed on a plane, the first hole and the blocking hole have sizes corresponding to each other.

11. The display device according to claim 1, wherein: When viewed on a plane, the first substrate hole and the blocking hole have sizes corresponding to each other.

12. The display device according to claim 1, wherein: The first base hole includes a region where a portion of the first base layer is removed by an etching process and a region where a portion of the first base layer is removed by a laser process. When viewed in a planar manner, the area removed by the etching process is larger than the area removed by the laser process.

13. The display device according to claim 1, further comprising: a second conductive layer, disposed on the first conductive layer; The second conductive layer is arranged on the same layer as at least a part of the wiring of the display layer.

14. The display device according to claim 1, wherein: The contact structure includes a plurality of contact structures arranged in a zigzag pattern.

15. A display device, comprising: Display area and non-display area; The first substrate layer and the second substrate layer each include an organic material; a barrier layer, a first side in contact with the first substrate layer, a second side in contact with the second substrate layer, and comprising an inorganic material; a light emitting element, arranged on the second base layer in the display area; as well as A contact structure is formed in the non-display area and includes a conductive connection portion. The first surface of the barrier layer is in contact with the first substrate layer as a whole.

16. A method for manufacturing a display device, comprising: The step of manufacturing a substrate layer including a first substrate layer, a barrier layer and a second substrate layer and including a first region and a second region; a step of overlapping a portion of the base layer within the first region and another portion of the base layer within the second region; A step of exposing at least a portion of the first substrate layer in the hole forming area; as well as A step of forming a first base material hole penetrating the first base layer in the hole forming region after the step of exposing.

17. The method for manufacturing a display device according to claim 16, further comprising: The step of configuring a display layer in the first area on the second base layer and configuring a driving chip on the second area, The first substrate layer includes a 1-1 substrate layer arranged in the first region and a 1-2 substrate layer arranged in the second region, and the barrier layer includes a first barrier layer arranged in the first region and a second barrier layer arranged in the second region. The second base layer includes a 2-1 base layer disposed in the first region and a 2-2 base layer disposed in the second region.

18. The method for manufacturing a display device according to claim 17, further comprising: a step of folding the base layer; as well as a step of removing at least a portion of the folded base layer during the step of folding, The step of folding includes: configuring the display layer on one side of the base layer in the first area; and configuring the driving chip on the other side of the base layer in the second area.

19. The method for manufacturing a display device according to claim 16, wherein: The step of forming the first substrate hole comprises: removing at least a portion of the first substrate layer by using a laser, When performing the step of forming the first base material pores, a layer including an inorganic material is not arranged in the pore formation region.

20. The method for manufacturing a display device according to claim 19, wherein: The laser light includes a first laser light and a second laser light defined toward directions different from each other.

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