Self-transmitting and self-receiving driving circuit of ultrasonic sensor

Abstract

The invention discloses a self-transmitting and self-receiving driving circuit of an ultrasonic sensor, which comprises a driving transmitting circuit and a receiving circuit, and is characterized in that the driving transmitting circuit comprises a booster circuit and an MOS (Metal Oxide Semiconductor) tube driving circuit; the booster circuit is used for generating a high-voltage power supply for driving the ultrasonic transducer, the MOS tube driving circuit is used for converting an input low-level control signal into a high-level ultrasonic frequency pulse driving signal, and a high-voltage pulse enables the ultrasonic transducer to emit an ultrasonic signal through a piezoelectric effect. Wherein the receiving circuit comprises a biasing circuit, a clamping protection circuit, an amplifying circuit and a detection filter circuit, the ultrasonic transducer receives reflected ultrasonic signals, and after weak voltage signals are amplified, detected and filtered through the receiving circuit, low-frequency voltage signals convenient to process are obtained. The boost driving mode is flexible and can be applied to a small-size structure.

Description

Technical Field

[0001] The invention relates to the technical field of ultrasonic sensor circuit design, and in particular to a self-transmitting and self-receiving driving circuit of an ultrasonic sensor. Background Art

[0002] At present, an ultrasonic transducer is an energy converter that converts electrical energy into mechanical energy. When the ultrasonic transducer is working, it can convert electrical signals into mechanical vibrations, thereby driving the air to vibrate, thereby generating ultrasonic waves.

[0003] Due to the needs of scenarios and designs, ultrasonic sensors require higher driving high voltage to be effectively driven. However, the current boost MOS tube driving circuits mostly use independent transceiver or one-transmitter-multiple-receiver structures, which are large in size and bloated in structure, and cannot be applied to small-size structures.

[0004] Patent document with application number 202311354223.3 discloses an ultrasonic sensor MOS tube driving circuit, which uses an ultrasonic sensor as a transmitting side circuit and has a signal generating circuit, an amplifier and a matching circuit. The application scheme can provide an ultrasonic sensor MOS tube driving circuit that can shorten the duration of the reverberation generated by the ultrasonic vibrator. However, this scheme also has the problem of separate transmission and reception of the ultrasonic transducer, complex driving, and is not conducive to cost savings and small-size deployment. Summary of the invention

[0005] In view of the above problems, the object of the present invention is to provide an ultrasonic sensor self-transmitting and self-receiving driving circuit, which has a flexible boost driving mode and can be applied to small-sized structures.

[0006] The purpose of the present invention can be achieved through the following technical solutions: An ultrasonic sensor self-transmitting and self-receiving driving circuit, comprising: a boost circuit, a MOS tube driving circuit, a receiving circuit and an ultrasonic transducer P1:

[0007] The boost circuit generates a driving high voltage, the MOS tube driving circuit performs a double-pulse control on the driving high voltage, and the ultrasonic transducer P1 performs a self-transmitting and self-receiving operation according to the double-pulse control signal.

[0008] As a further scheme of the present invention, the boost circuit includes a primary boost circuit, and the primary boost circuit includes a boost chip U2; port 5 of U2 is connected to HVIN, port 4 of U2, one end of inductor L1 and one end of capacitor C4, and the other end of C4 is grounded GND, port 1 of U2 is connected to one end of diode D2 and the other end of L1, the other end of D2 is connected to one end of resistor R2, capacitor C5 and one end of capacitor C6, and outputs a 28V voltage; the other ends of C5 and C6 are grounded GND; port 3 of U2 is connected to the other end of R2 and one end of R3, and the other end of R3 is grounded GND; port 2 of U2 is grounded GND.

[0009] As a further solution of the present invention, the boost circuit also includes an auxiliary boost circuit, which includes a diode D6, one end of which is connected to the 28V voltage output by the primary boost circuit, the other end of which is connected to one end of the inductor L2, the other end of which is connected to one end of the capacitor C7, and outputs the HV_VDD voltage, and the other end of C7 is grounded GND.

[0010] As a further solution of the present invention, the MOS transistor driving circuit includes a PMOS transistor Q1, an NMOS transistor Q2 and an NMOS transistor Q3, wherein:

[0011] The S pole of Q1 is connected to one end of the resistor R1, one end of the diode D1 and the HV_VDD voltage input by the boost circuit, and the G pole of Q1 is connected to the other end of R1 and the D pole of Q2;

[0012] The G pole of Q2 is connected to the other end of D1 and the DV_PULSE_P signal, and the S pole of Q2 is grounded GND;

[0013] The G pole of Q3 is connected to the DV_PULSE_N signal, and the S pole of Q3 is grounded GND;

[0014] The D terminal of Q1 is connected to the D terminal of Q3 and outputs a DV_P signal.

[0015] As a further solution of the present invention, a bidirectional diode is connected between the G pole and the S pole of Q2, and a bidirectional diode is also connected between the G pole and the S pole of Q3.

[0016] As a further solution of the present invention, ports 1 and 3 of the ultrasonic transducer P1 are both grounded, and port 2 of P1 is connected to the DV_P signal.

[0017] As a further solution of the present invention, the receiving circuit includes a bias circuit, a clamp protection circuit and an operational amplifier circuit, wherein the bias circuit includes a resistor R9, one end of the R9 is connected to port 2 of P1, the DV_P signal and the clamp protection circuit, the other end of the R9 is connected to one end of the resistor R6 and one end of the capacitor C9, the other end of the C9 is grounded to AGND, and the other end of the R6 is connected to a 5V power supply;

[0018] The clamping protection circuit includes a diode D7 and a diode D8, wherein the positive terminal of D7 and the negative terminal of D8 are grounded, the negative terminal of D7 and the positive terminal of D8 are connected to one end of a capacitor C11 and an amplifier circuit, the other end of C11 is connected to one end of R10, and the other end of R10 is connected to port 2 of P1, a DV_P signal and a bias circuit.

[0019] As a further scheme of the present invention, the operational amplifier circuit includes a first-stage amplifier circuit, wherein: the first-stage amplifier circuit includes an operational amplifier U7A, port 2 of the U7A is connected to one end of a capacitor C12, an INA- signal and one end of a resistor R7; port 3 of the U7A is connected to an INA+ signal, one end of a resistor R15, one end of a resistor R16, one end of a capacitor C16 and an INB+ signal of the second-stage amplifier circuit, and the other end of C12 is connected to a clamping protection circuit; port 8 of the U7A is connected to a 3V3 power supply, one end of a capacitor C10, the other end of C10 is grounded AGND, and ports 4 and 9 of the U7A are grounded AGND; port 1 of the U7A is connected to an OUTA signal, the other end of R7 and C13 of the second-stage amplifier circuit.

[0020] As a further solution of the present invention, the operational amplifier circuit also includes a secondary amplifier circuit, wherein: the secondary amplifier circuit includes an operational amplifier U7B, port 6 of the U7B is connected to one end of a resistor R11, an INB- signal and one end of a resistor R8, the other end of the R11 is connected to one end of a capacitor C13, and the other end of C13 is connected to a primary amplifier circuit; port 5 of the U7B is connected to an INB+ signal and an INA+ signal of a primary amplifier circuit; port 7 of the U7B is connected to an OUTB signal, the other end of R8 and one end of a diode D9, the other end of D9 is connected to one end of a resistor R12, one end of a resistor R14 and one end of a capacitor C15, the other end of the resistor R14 and the other end of the capacitor C15 are grounded AGND, the other end of R12 is connected to one end of a capacitor C14, and outputs an ADC1 signal, and the other end of the capacitor C14 is grounded AGND.

[0021] Beneficial effects of the present invention:

[0022] The present invention uses a self-generating and self-receiving MOS tube driving circuit, and a boost circuit generates a driving high voltage input to an ultrasonic transducer. The MOS tube driving circuit uses a DV_PULSE_P signal and a DV_PULSE_N signal to perform pulse control on the input driving high voltage, and converts the input low-level pulse control signal into a high-level ultrasonic frequency pulse driving signal. The high-voltage pulse enables the ultrasonic transducer to emit an ultrasonic signal through a piezoelectric effect, and performs self-generating and self-receiving work. The receiving circuit performs biasing, clamping protection, and operational amplification processing on the ultrasonic signal. The boost driving mode is flexible. The self-generating and self-receiving circuit of the present invention can avoid structures that require multiple ultrasonic transducers such as one-transmitting and one-receiving, one-transmitting and multiple-receiving, etc., can reduce costs, reduce opening size, and is more compact as a whole, and can be applied to small-size structures. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 It is a schematic diagram of the principle structure of the self-transmitting and self-receiving MOS tube driving circuit of the present invention;

[0024] Figure 2 It is a structural schematic diagram of the primary boost circuit of the present invention;

[0025] Figure 3 This is a schematic diagram of the auxiliary boost circuit structure of the present invention;

[0026] Figure 4 This is a schematic diagram of the structure of the MOS tube driving circuit of the present invention;

[0027] Figure 5 It is a schematic diagram of the structure of the receiving circuit of the present invention;

[0028] Figure 6 This is a timing control diagram of the MOS tube driving circuit of the present invention. DETAILED DESCRIPTION

[0029] The embodiments of the present invention are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar symbols throughout represent the same or similar elements or elements with the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and cannot be understood as limiting the present invention.

[0030] like Figure 1 As shown, the present invention discloses a self-generating and self-receiving driving circuit of an ultrasonic sensor, comprising: a boost circuit, a MOS tube driving circuit, a receiving circuit and an ultrasonic transducer P1, wherein the boost circuit generates a driving high voltage, the MOS tube driving circuit performs a double-pulse control on the driving high voltage, and the ultrasonic transducer P1 performs a self-generating and self-receiving operation according to the double-pulse control signal.

[0031] like Figure 2As shown, the primary boost circuit includes a boost chip U2; port 5 of U2 is connected to HVIN, port 4 of U2, one end of inductor L1 and one end of capacitor C4, and the other end of C4 is grounded GND; port 1 of U2 is connected to one end of diode D2 and the other end of L1, and the other end of D2 is connected to one end of resistor R2, capacitor C5 and one end of capacitor C6, and outputs a 28V voltage; the other ends of C5 and C6 are grounded GND; port 3 of U2 is connected to the other end of R2 and one end of R3, and the other end of R3 is grounded GND; port 2 of U2 is grounded GND.

[0032] like Figure 3 As shown, the auxiliary boost circuit includes a diode D6, one end of D6 is connected to the 28V voltage output by the primary boost circuit, the other end of D6 is connected to one end of the inductor L2, the other end of L2 is connected to one end of the capacitor C7, and outputs the HV_VDD voltage, and the other end of C7 is grounded GND.

[0033] In some embodiments, the high-voltage power supply is an adjustable voltage source. Within the working range of the ultrasonic transducer, the higher the voltage provided by the high-voltage power supply to the ultrasonic transducer, the greater the power of the ultrasonic transducer; the lower the voltage provided by the high-voltage power supply to the ultrasonic transducer, the lower the power of the ultrasonic transducer. The embodiments of the present application can provide different power requirements for the ultrasonic transducer by adjusting the voltage value of the high-voltage power supply.

[0034] like Figure 4 As shown, the MOS transistor driving circuit includes a PMOS transistor Q1, an NMOS transistor Q2 and an NMOS transistor Q3.

[0035] The S pole of Q1 is connected to one end of the resistor R1, one end of the diode D1 and the HV_VDD voltage input by the boost circuit, and the G pole of Q1 is connected to the other end of R1 and the D pole of Q2;

[0036] The G pole of Q2 is connected to the other end of D1 and the DV_PULSE_P signal, and the S pole of Q2 is grounded to GND;

[0037] The G pole of Q3 is connected to the DV_PULSE_N signal, and the S pole of Q3 is grounded to GND;

[0038] The D terminal of Q1 is connected to the D terminal of Q3 and outputs a DV_P signal.

[0039] In some embodiments, a MOS tube is used as a switch circuit in a MOS tube driving circuit of an ultrasonic transducer. Since the MOS tube is a semiconductor device that uses the electric field effect of a control loop to control the output loop current, when the voltage between the gate and source of the MOS tube reaches the turn-on voltage of the MOS tube, the drain and source of the MOS tube are connected; when the voltage between the gate and source of the MOS tube does not reach the turn-on voltage of the MOS tube, the drain and source of the MOS tube are disconnected. The on and off of the MOS tube can be directly controlled by a pulse signal of the input switch circuit.

[0040] In some embodiments, the pulse signal can be provided by a pulse generator. The MOS transistor driving circuit includes a pulse generator for providing a pulse signal, enabling the MOS transistor driving circuit of the ultrasonic transducer to obtain the pulse signal by itself, without externally connecting a pulse generator or a device such as an MCU (Microcontroller Unit) that can provide a pulse signal.

[0041] In some embodiments, the MOS transistor driving circuit does not include a device that can provide a pulse signal. In this case, the MOS transistor driving circuit obtains the pulse signal by externally connecting a pulse generator or a device such as an MCU that can provide a pulse signal.

[0042] As Figure 6 shown, the MOS transistor driving circuit controls the HV_VDD input using the DV_PULSE_P signal and the DV_PULSE_N signal. The process is as follows:

[0043] When using the dual-pulse signals DV_PULSE_P and DV_PULSE_N for driving control, DV_PULSE_P and DV_PULSE_N alternately emit high and low level pulses of a specified frequency, with a certain dead time interval in the middle, ensuring that the upper transistor is fully turned off before turning on the lower transistor. The drive output terminal DV_P outputs a drive pulse with a high level that is the boosted level.

[0044] The condition for the DV_P to output a high-voltage drive is that DV_PULSE_P outputs a high level and DV_PULSE_N outputs a low level. The drive current path is as follows: Since DV_PULSE_P outputs a high level, the DS of Q2 conducts (the NMOS conduction condition is VG>VS), HV_VDD passes through the current-limiting resistor to GND. At this time, the G pole input of Q1 is at a low level, and then Q1 conducts (the PMOS conduction condition is VG<VS). Also, since DV_PULSE_N outputs a low level, Q3 does not conduct, and HV_VDD directly reaches DV_P.

[0045] After the drive ends, both the DV_PULSE_P and DV_PULSE_N terminals are pulled low to a low level, making the output terminal present a high-impedance state, and the echo signal received by the ultrasonic transducer P1 can be transmitted into the receiving circuit.

[0046] Further, as Figure 4 shown, a bidirectional diode is connected between the G pole and the S pole of Q2, and a bidirectional diode is also connected between the G pole and the S pole of Q3.

[0047] The NMOS tube itself has a parasitic diode, which is used to prevent the NMOS tube from burning out in the case of overvoltage. By using a bidirectional diode, the diode can reversely break down before the overvoltage damages the NMOS tube, and the large current will be directly to the ground, thereby avoiding the NMOS tube from being burned out.

[0048] like Figure 5 As shown, ports 1 and 3 of the ultrasonic transducer P1 are both grounded, and port 2 of P1 is connected to the DV_P signal.

[0049] like Figure 5 As shown, the receiving circuit includes a bias circuit, a clamp protection circuit and an operational amplifier circuit, and the receiving circuit performs bias, clamp protection and operational amplification processing on the received ultrasonic signal.

[0050] Among them, the bias circuit includes a resistor R9, one end of R9 is connected to port 2 of P1, the DV_P signal and the clamp protection circuit, the other end of R9 is connected to one end of the resistor R6 and one end of the capacitor C9, the other end of C9 is grounded AGND, and the other end of R6 is connected to a 5V power supply.

[0051] The bias circuit is used to provide a bias voltage to the ultrasonic transducer to enhance the transmission or reception performance of the ultrasonic transducer P1.

[0052] The clamp protection circuit includes a diode D7 and a diode D8, wherein the positive terminal of D7 and the negative terminal of D8 are grounded, the negative terminal of D7 and the positive terminal of D8 are connected to one end of a capacitor C11 and an amplifier circuit, the other end of C11 is connected to one end of R10, and the other end of R10 is connected to port 2 of P1, a DV_P signal and a bias circuit.

[0053] The clamping protection circuit can prevent the transient voltage / current input of the previous circuit from being too high or too low and affect the subsequent circuit. It clamps the voltage within a certain range to ensure that the subsequent circuit works normally within the allowable voltage range.

[0054] The operational amplifier circuit includes a primary amplifier circuit and a secondary amplifier circuit, wherein the primary amplifier circuit includes an operational amplifier U7A, port 2 of U7A is connected to one end of capacitor C12, INA- signal and one end of resistor R7; port 3 of U7A is connected to INA+ signal, one end of resistor R15, one end of resistor R16, one end of capacitor C16 and INB+ signal of the secondary amplifier circuit, and the other end of C12 is connected to a clamping protection circuit; port 8 of U7A is connected to a 3V3 power supply, one end of capacitor C10, and the other end of C10 is grounded to AGND, ports 4 and 9 of U7A are grounded to AGND; port 1 of U7A is connected to the OUTA signal, the other end of R7 and C13 of the secondary amplifier circuit.

[0055] The secondary amplifier circuit includes an operational amplifier U7B, wherein port 6 of U7B is connected to one end of resistor R11, INB- signal and one end of resistor R8, the other end of R11 is connected to one end of capacitor C13, and the other end of C13 is connected to the primary amplifier circuit; port 5 of U7B is connected to the INB+ signal and the primary amplifier circuit INA+ signal; port 7 of U7B is connected to the OUTB signal, the other end of R8 and one end of diode D9, the other end of D9 is connected to one end of resistor R12, one end of resistor R14 and one end of capacitor C15, the other end of resistor R14 and the other end of capacitor C15 are grounded AGND, the other end of R12 is connected to one end of capacitor C14, and ADC1 signal is output, and the other end of capacitor C14 is grounded AGND.

[0056] The function of the operational amplifier circuit is to amplify the weak electrical signal reflected by the ultrasonic transducer P1 to facilitate effective sampling by the back-end ADC.

[0057] The above description is only a preferred specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any technician familiar with the technical field can make equivalent replacements or changes according to the technical scheme and inventive concept of the present invention within the technical scope disclosed by the present invention, which should be covered by the protection scope of the present invention.

Claims

1. An ultrasonic sensor self-transmitting and self-receiving driving circuit, characterized in that: include: Boost circuit, MOS tube drive circuit, receiving circuit and ultrasonic transducer P1: The boost circuit generates a driving high voltage, the MOS tube driving circuit performs a double-pulse control on the driving high voltage, and the ultrasonic transducer P1 performs a self-transmitting and self-receiving operation according to the double-pulse control signal.

2. The ultrasonic sensor self-transmitting and self-receiving driving circuit according to claim 1, characterized in that: The boost circuit includes a primary boost circuit, which includes a boost chip U2; port 5 of U2 is connected to HVIN, port 4 of U2, one end of inductor L1 and one end of capacitor C4, and the other end of C4 is grounded GND; port 1 of U2 is connected to one end of diode D2 and the other end of L1, and the other end of D2 is connected to one end of resistor R2, capacitor C5 and one end of capacitor C6, and outputs a 28V voltage; the other ends of C5 and C6 are grounded GND; port 3 of U2 is connected to the other end of R2 and one end of R3, and the other end of R3 is grounded GND; port 2 of U2 is grounded GND.

3. The ultrasonic sensor self-transmitting and self-receiving driving circuit according to claim 2, characterized in that: The boost circuit also includes an auxiliary boost circuit, which includes a diode D6, one end of which is connected to the 28V voltage output by the primary boost circuit, the other end of which is connected to one end of the inductor L2, the other end of which is connected to one end of the capacitor C7, and outputs the HV_VDD voltage, and the other end of C7 is grounded GND.

4. The ultrasonic sensor self-transmitting and self-receiving driving circuit according to claim 3, characterized in that: The MOS transistor driving circuit includes a PMOS transistor Q1, an NMOS transistor Q2 and an NMOS transistor Q3, wherein: The S pole of Q1 is connected to one end of the resistor R1, one end of the diode D1 and the HV_VDD voltage input by the boost circuit, and the G pole of Q1 is connected to the other end of R1 and the D pole of Q2; The G pole of Q2 is connected to the other end of D1 and the DV_PULSE_P signal, and the S pole of Q2 is grounded to GND; The G pole of Q3 is connected to the DV_PULSE_N signal, and the S pole of Q3 is grounded GND; The D terminal of Q1 is connected to the D terminal of Q3 and outputs a DV_P signal.

5. The ultrasonic sensor self-transmitting and self-receiving driving circuit according to claim 4, characterized in that: A bidirectional diode is connected between the G pole and the S pole of Q2, and a bidirectional diode is also connected between the G pole and the S pole of Q3.

6. The ultrasonic sensor self-transmitting and self-receiving driving circuit according to claim 5, characterized in that: Ports 1 and 3 of the ultrasonic transducer P1 are both grounded to AGND, and port 2 of P1 is connected to the DV_P signal.

7. The ultrasonic sensor self-transmitting and self-receiving driving circuit according to claim 6, characterized in that: The receiving circuit includes a bias circuit, a clamp protection circuit and an operational amplifier circuit, wherein The bias circuit includes a resistor R9, one end of which is connected to port 2 of P1, a DV_P signal and a clamp protection circuit, the other end of which is connected to one end of a resistor R6 and one end of a capacitor C9, the other end of which is grounded to AGND, and the other end of which is connected to a 5V power supply; The clamping protection circuit includes a diode D7 and a diode D8, wherein the positive terminal of D7 and the negative terminal of D8 are grounded, the negative terminal of D7 and the positive terminal of D8 are connected to one end of a capacitor C11 and an amplifier circuit, the other end of C11 is connected to one end of R10, and the other end of R10 is connected to port 2 of P1, a DV_P signal and a bias circuit.

8. The ultrasonic sensor self-transmitting and self-receiving driving circuit according to claim 7, characterized in that: The operational amplifier circuit comprises a first-stage amplifier circuit, wherein: The first-stage amplifier circuit includes an operational amplifier U7A, wherein port 2 of U7A is connected to one end of capacitor C12, INA- signal and one end of resistor R7; port 3 of U7A is connected to INA+ signal, one end of resistor R15, one end of resistor R16, one end of capacitor C16 and INB+ signal of the second-stage amplifier circuit, and the other end of C12 is connected to a clamping protection circuit; port 8 of U7A is connected to a 3V3 power supply, one end of capacitor C10, the other end of C10 is grounded AGND, and ports 4 and 9 of U7A are grounded AGND; port 1 of U7A is connected to an OUTA signal, the other end of R7 and C13 of the second-stage amplifier circuit.

9. The ultrasonic sensor self-transmitting and self-receiving driving circuit according to claim 8, characterized in that: The operational amplifier circuit also includes a secondary amplifier circuit, wherein: The secondary amplifier circuit includes an operational amplifier U7B, wherein port 6 of U7B is connected to one end of a resistor R11, an INB- signal and one end of a resistor R8, the other end of R11 is connected to one end of a capacitor C13, and the other end of C13 is connected to a primary amplifier circuit; port 5 of U7B is connected to an INB+ signal and an INA+ signal of a primary amplifier circuit; port 7 of U7B is connected to an OUTB signal, the other end of R8 and one end of a diode D9, the other end of D9 is connected to one end of a resistor R12, one end of a resistor R14 and one end of a capacitor C15, the other end of the resistor R14 and the other end of the capacitor C15 are grounded AGND, the other end of R12 is connected to one end of a capacitor C14 and outputs an ADC1 signal, and the other end of the capacitor C14 is grounded AGND.

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