Method for accurate alignment and assembly of silicon wafers in a system on chip

Abstract

The present application relates to the technical field of integrated circuits, in particular to a method for accurate alignment and assembly of a silicon wafer in a system on a chip, wherein a plurality of notch feet are uniformly formed on the edge of the silicon wafer to be assembled, and a positioning coarse adjustment hole is formed in the non-wafer pattern area of the silicon wafer to be assembled; a sunken groove matched with the silicon wafer is formed on the surface of the component to be assembled assembled with the silicon wafer, and a plurality of convex structures matched with the notch feet are arranged in the sunken groove to lock the silicon wafer; a positioning pin corresponding to the positioning coarse adjustment hole is arranged in the area corresponding to the silicon wafer of the component to be assembled, and a plurality of positioning holes and mounting holes are formed in the area not corresponding to the silicon wafer of the component to be assembled; then the silicon wafer and the component to be assembled are assembled. The present application effectively realizes the accurate alignment and assembly of the silicon wafer and the heat dissipation component or support plate of the system on a chip, can accurately assemble the silicon wafer on the heat dissipation component or support plate of the system on a chip, and can realize reliable assembly of the entire system on a chip.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of integrated circuits, in particular to a precise alignment and assembly method of a silicon wafer in a system on a chip. BACKGROUND

[0002] The system on a chip aims to realize a new path of chip and system wisdom integration through system engineering theory and complex network method, utilize a complete wafer substrate as the interconnection base of each module inside the system, define the connection between the modules and the function of the modules through software, thereby breaking through the limitation of traditional process on improving chip integration, and providing strong flexibility and scalability.

[0003] The Dojo system is a multi-chip integrated computing system based on a wafer level, which adopts wafer level packaging interconnection technology, and the wafer and the structure of the Dojo system are assembled in the vertical direction. The connection mode of the wafer and other components in the Dojo system is to open positioning installation holes on the wafer to be screwed and assembled with other components. The fixing screw passes through the positioning installation holes on the wafer and the heat dissipation component to position and lock the wafer and the heat dissipation component, or the fixing screw passes through the positioning installation holes on the wafer and the support plate to position and lock the wafer and the support plate. The wafer used in the Dojo system is not a silicon wafer, but a wafer prepared by the INFO_SOW process of TSMC. Its essence is a wafer with an organic material as a dielectric layer for wiring and reconstruction, not a silicon wafer. Therefore, the positioning and assembly method of the wafer and other components of the Dojo system can punch various positioning holes and installation holes on the wafer to realize the positioning and assembly of the wafer and other components of the Dojo system.

[0004] However, when a silicon wafer is used to build a system on a chip, the silicon wafer itself is hard and brittle, and needs to be thinned during the preparation of the silicon substrate. The silicon wafer cannot punch a large number of positioning installation holes like the wafer in the Dojo system. Therefore, when the prior art builds a system on a chip using a silicon wafer, the silicon wafer cannot be precisely aligned and assembled with the heat dissipation assembly or the support plate. SUMMARY

[0005] To solve the problem that the prior art builds a system on a chip using a silicon wafer, the silicon wafer cannot be precisely aligned and assembled with the heat dissipation assembly or the support plate, the present application provides a precise alignment and assembly method of a silicon wafer in a system on a chip. Through this method, the precise alignment and assembly of the silicon wafer and the heat dissipation assembly or the support plate of the system on a chip are effectively realized, the silicon wafer can be accurately assembled on the heat dissipation assembly or the support plate of the system on a chip, and reliable assembly of the entire system on a chip can be realized.

[0006] In order to achieve the above object, the technical scheme of the present application is as follows: a method for precise alignment and assembly of a silicon wafer in a system on a chip, comprising the following steps:

[0007] Step 1: a plurality of notch feet are uniformly formed on the edge of the silicon wafer to be assembled, and a positioning coarse adjustment hole is formed in the non-wafer pattern area of the silicon wafer to be assembled.

[0008] Step 2: a sinking groove matched with the silicon wafer is formed on the surface of the component to be assembled, and a plurality of protruding structures matched with the notch feet are arranged in the sinking groove to lock the silicon wafer.

[0009] Step 3: a positioning pin corresponding to the positioning coarse adjustment hole is arranged in the area corresponding to the silicon wafer of the component to be assembled, and a plurality of positioning holes and mounting holes are formed in the area not corresponding to the silicon wafer of the component to be assembled.

[0010] Step 4: the silicon wafer and the component to be assembled are assembled, the positioning coarse adjustment hole on the silicon wafer is matched with the positioning pin on the component to be assembled, then the silicon wafer is adjusted through the positioning coarse adjustment hole, the notch feet on the silicon wafer are aligned with the protruding structures in the sinking groove of the component to be assembled, the silicon wafer is embedded in the sinking groove, the protruding structures on the component to be assembled are matched with the notch feet on the silicon wafer to clamp and lock the silicon wafer, thus the positioning and assembly of the silicon wafer and the component to be assembled are completed.

[0011] Further, in step 1, the number of notch feet is three, the angle between adjacent two notch feet is 120°, and the notch feet have an arc structure.

[0012] Further, in step 1, two positioning coarse adjustment holes are symmetrically formed in the non-wafer pattern area of the silicon wafer to be assembled.

[0013] Further, in step 1, a punching mark is made in the non-wafer pattern area of the silicon wafer, and the positioning coarse adjustment hole is punched in the punching mark of the silicon wafer by laser punching.

[0014] Further, in step 2, the sinking groove is formed in the area where the component to be assembled contacts the silicon wafer, the diameter of the sinking groove is the same as the diameter of the silicon wafer, and the depth of the sinking groove is the same as the thickness of the silicon wafer.

[0015] Further, in step 2, the component to be assembled is a heat dissipation assembly or a support plate, the number of protruding structures is also three, the protruding structures have an arc structure and are matched with the notch feet.

[0016] Further, in step 3, the number of positioning pins is two, and the position of the silicon wafer to be assembled is coarsely adjusted and positioned through the cooperation of the positioning pins on the component to be assembled and the positioning coarse adjustment hole.

[0017] Through the technical scheme, the application has the following beneficial effects:

[0018] 1. The application provides a precise positioning and assembling method for a silicon wafer in a system on chip, which effectively realizes precise alignment and assembling of the silicon wafer and a heat dissipation component or a support plate of the system on chip, can accurately assemble the silicon wafer on the heat dissipation component or the support plate of the system on chip, and realizes reliable assembling of the whole system on chip.

[0019] 2. The precise alignment method for the silicon wafer and the component to be assembled is realized by cooperation of a positioning coarse adjustment hole in a non-pattern area of the silicon wafer and a positioning pin on the heat dissipation component or the support plate, the positioning pin passes through the positioning coarse adjustment hole on the silicon wafer to coarsely adjust and position the position of the silicon wafer, and the silicon wafer is accurately assembled on the heat dissipation component or the support plate of the system on chip.

[0020] 3. The reliable assembling method for the silicon wafer and the component to be assembled is realized by embedding the silicon wafer in a sunken groove on the heat dissipation component or the support plate, and cooperating a protruding structure on the heat dissipation component or the support plate with a notch foot on the silicon wafer, and clamping and locking the silicon wafer under the action of the protruding structure, to realize reliable assembling of the silicon wafer and the heat dissipation component or the support plate.

[0021] 4. The positioning hole and the mounting hole in the non-corresponding area of the component to be assembled and the silicon wafer are provided, the positioning and assembling of other components of the system on chip can be completed through the bolt, so that the effect of realizing reliable assembling of the whole system on chip is achieved. BRIEF DESCRIPTION OF DRAWINGS

[0022] Figure 1 is a structural schematic diagram of the silicon wafer.

[0023] In the drawings, 1 is the silicon wafer, 101 is the positioning coarse adjustment hole, and 102 is the notch foot. DETAILED DESCRIPTION

[0024] The application will be further described below in combination with the drawings and specific embodiments:

[0025] As shown in the drawings, a precise alignment and assembling method for a silicon wafer in a system on chip includes the following steps: Figure 1

[0026] ​Step 1: A plurality of notch feet 102 are evenly formed on the edge of the silicon wafer 1 to be assembled, the number of notch feet 102 is three, the angle between adjacent two notch feet 102 is 120°, the notch feet 102 are arc-shaped structures, and a positioning coarse adjustment hole 101 is formed in the non-wafer pattern area of the silicon wafer 1 to be assembled, a punching mark is made in the non-wafer pattern area of the silicon wafer 1, the positioning coarse adjustment hole 101 is punched in the punching mark of the silicon wafer 1 by laser punching, and two positioning coarse adjustment holes 101 are symmetrically formed in the non-wafer pattern area of the silicon wafer 1 to be assembled, which can be circular or square.

[0027] Step 2: A sunken groove matched with the silicon wafer 1 is formed on the surface of the component to be assembled, and a plurality of protruding structures matched with the notch feet 102 are arranged in the sunken groove to lock the silicon wafer 1; the component to be assembled is a heat dissipation assembly or a support plate, the number of protruding structures is also three, the protruding structures are arc-shaped structures matched with the notch feet 102, the sunken groove is formed in the area where the component to be assembled contacts the silicon wafer 1, the diameter of the sunken groove is the same as the diameter of the silicon wafer 1, and the depth of the sunken groove is the same as the thickness of the silicon wafer 1, so that the silicon wafer 1 can be completely embedded in the sunken groove.

[0028] Step 3: Positioning pins corresponding to the positioning coarse adjustment holes 101 are arranged in the corresponding area of the component to be assembled, the number of positioning pins is two, the position of the silicon wafer 1 assembled is coarsely adjusted and positioned through the cooperation of the positioning pins on the component to be assembled and the positioning coarse adjustment holes 101, and a plurality of positioning holes and mounting holes are formed in the non-corresponding area of the component to be assembled and the silicon wafer 1, and the assembly of other components in the system on wafer is completed step by step through the cooperation of the positioning holes and mounting holes and the fixed bolts, thereby forming a system on wafer, such as a system configuration board.

[0029] Step 4: The silicon wafer 1 and the component to be assembled are assembled, the positioning coarse adjustment holes 101 on the silicon wafer 1 correspond to the positioning pins on the component to be assembled, the two positioning coarse adjustment holes 101 on the silicon wafer 1 correspond to each other, and the two positioning pins are respectively inserted into the two positioning coarse adjustment holes 101 on the silicon wafer 1, then the silicon wafer 101 is adjusted through the positioning coarse adjustment holes 101, so that the notch feet 102 on the silicon wafer 1 are aligned with the protruding structures in the sunken groove of the component to be assembled, the three protruding structures correspond to the three notch feet 102 respectively, then the silicon wafer 1 is embedded in the sunken groove, the three protruding structures are embedded in the three notch feet 102 respectively, the protruding structures on the component to be assembled cooperate with the notch feet 102 on the silicon wafer 1 to clamping lock the silicon wafer 1, thereby completing the positioning and assembly of the silicon wafer 1 and the component to be assembled.

[0030] It should be noted that according to the structure of the on-chip system, the silicon wafer 1 is assembled with the heat dissipation assembly or the support plate, wherein when the on-chip system power is low and the heat dissipation assembly is not needed, the component to be assembled is the support plate, and the silicon wafer 1 is precisely positioned and assembled with the support plate; and when the on-chip system power is high and the heat dissipation assembly is needed, the component to be assembled is the heat dissipation assembly, and the silicon wafer 1 is precisely positioned and assembled with the heat dissipation assembly.

[0031] Based on the precise positioning and assembling method of the silicon wafer in the on-chip system, when the on-chip system is constructed by using the wafer made of silicon material, the precise positioning and reliable assembling of the silicon wafer and other components of the on-chip system are realized by comprehensively considering the warping of the silicon wafer and the characteristics of the silicon wafer itself; and the positioning and assembling of the wafer and other components of the on-chip system are suitable for various wafers made of different materials and shapes.

[0032] The above-described embodiments are only preferred embodiments of the application and are not intended to limit the scope of the application. Any equivalent changes or modifications made to the technical solutions described in the patent scope of the application should be included in the patent scope of the application.

Claims

1. A method for precise alignment and assembly of silicon wafers in a wafer-on-chip system, characterized in that, Includes the following steps: Step 1: A plurality of notch pins (102) are uniformly opened on the edge of the silicon wafer (1) to be assembled, and positioning coarse adjustment holes (101) are opened in the non-wafer pattern area of ​​the silicon wafer (1) to be assembled. Step 2: A recessed groove matching the silicon wafer (1) is opened on the surface of the component to be assembled with the silicon wafer (1), and multiple protrusions matching the notch pin (102) are set inside the recessed groove to lock the silicon wafer (1). Step 3: Set positioning pins corresponding to the positioning coarse adjustment holes (101) in the area where the component to be assembled corresponds to the silicon wafer (1), and open multiple positioning holes and mounting holes in the area where the component to be assembled does not correspond to the silicon wafer (1); Step 4: Assemble the silicon wafer (1) and the component to be assembled. Align the positioning coarse adjustment hole (101) on the silicon wafer (1) with the positioning pin on the component to be assembled. Then adjust the silicon wafer (101) through the positioning coarse adjustment hole (101) so that the notch pin (102) on the silicon wafer (1) is aligned with the protrusion structure in the recessed groove of the component to be assembled. Embed the silicon wafer (1) into the recessed groove. The protrusion structure on the component to be assembled cooperates with the notch pin (102) on the silicon wafer (1) to lock the silicon wafer (1). The positioning assembly of the silicon wafer (1) and the component to be assembled is thus completed.

2. The method for precise alignment and assembly of silicon wafers in a wafer-on-chip system according to claim 1, characterized in that, In step 1, there are three notch feet (102), the angle between two adjacent notch feet (102) is 120°, and the notch feet (102) have an arc-shaped structure.

3. The method for precise alignment and assembly of silicon wafers in a wafer-on-chip system according to claim 1, characterized in that, In step 1, two positioning coarse adjustment holes (101) are symmetrically opened in the non-wafer pattern area of ​​the silicon wafer (1) to be assembled.

4. The method for precise alignment and assembly of silicon wafers in a wafer-on-chip system according to claim 3, characterized in that, In step 1, a hole mark is made in the non-wafer pattern area of ​​the silicon wafer (1), and a positioning coarse adjustment hole (101) is made at the hole mark of the silicon wafer (1) by laser drilling.

5. The method for precise alignment and assembly of silicon wafers in a wafer-on-chip system according to claim 1, characterized in that, In step 2, the sinking groove is opened in the area where the component to be assembled contacts the silicon wafer (1). The diameter of the sinking groove is the same as the diameter of the silicon wafer (1), and the depth of the sinking groove is the same as the thickness of the silicon wafer (1).

6. The method for precise alignment and assembly of silicon wafers in a wafer-on-chip system according to claim 1, characterized in that, In step 2, the component to be assembled is a heat dissipation assembly or a support plate, and the number of protrusions is also three. The protrusions are arc-shaped and match the notch foot (102).

7. The method for precise alignment and assembly of silicon wafers in a wafer-on-chip system according to claim 1, characterized in that, In step 3, there are two positioning pins. With the cooperation of the positioning pins on the component to be assembled and the positioning coarse adjustment hole (101), the position of the silicon wafer (1) to be assembled is coarsely adjusted and positioned.

Images