Preparation method of thin film array
By implanting hydrogen ion in the first substrate and forming prefabricated protrusions, bonding with the second substrate and laser annealing, the problem of insufficient mobility of thin film transistors in the prior art is solved, and a large area and low cost is achieved Film array preparation meets high resolution display and sensing needs.
Patent Information
- Application Number
- CN202310855064.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-07-12
- Publication Date
- 2025-01-17
AI Technical Summary
The mobility of existing low-temperature polysilicon thin film transistors and oxide thin film transistors cannot meet the needs of high-resolution flat panel display and sensing arrays, and SiOG thin film transistors are limited by device size and high process costs in large-area applications.
By performing hydrogen ion implantation in part of the first substrate, a preformed projection is formed, bonded to the second substrate and laser annealed to form a SiOG thin film array, thereby achieving a large area and low-cost thin film array preparation.
It realizes the preparation of high-resolution thin film arrays at low cost, suitable for large-area flat panel displays and sensor components, reducing process costs and improving mobility.
Smart Images
Figure CN119325276A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure belongs to the technical field of thin film transistors, and in particular relates to a method for preparing a thin film array. Background Art
[0002] In the prior art, thin film transistors used in flat panels and sensor arrays can be mainly divided into: low-temperature polysilicon thin film transistors and oxide thin film transistors. However, the mobility of existing low-temperature polysilicon thin film transistors is 100 cm 2 / Vs, the mobility of oxide thin film transistors is only 40cm 2 / Vs, which cannot meet the high-resolution requirements of flat-panel displays and sensor arrays. Therefore, how to improve the mobility of materials has become a difficult problem that the industry needs to solve urgently.
[0003] The most effective way to improve the mobility of thin film transistors is to use SiOG thin film transistors with higher mobility. However, in the existing technology, due to the limitations of the processing size of wafer bonding equipment and CMP equipment, the SiOG substrate area is usually 8-12 inch wafer size, which cannot be well applied to large-area glass-based flat panel displays and sensor devices. In addition, the traditional LTPS and oxide film preparation process costs are extremely high, which is not conducive to large-area applications. Therefore, how to make large-area, low-cost SiOG thin film arrays has become a key issue. Summary of the invention
[0004] The present invention aims to solve at least one of the technical problems existing in the prior art and provide a method for preparing a large-area, low-cost thin film array.
[0005] The technical solution adopted to solve the technical problem of the present invention is a method for preparing a thin film array, characterized in that the preparation method includes: providing a first substrate, the first substrate having a first surface and a second surface arranged opposite to each other along its thickness direction; providing a second substrate, the second substrate having a first surface and a second surface arranged opposite to each other along its thickness direction; performing hydrogen ion implantation on at least a portion of the first surface of the first substrate, the implantation depth being a first depth, so that the chemical bonds at the first depth position of at least a portion of the first substrate are broken; performing implantation on the first surface of the first substrate to form a pattern including a plurality of prefabricated protrusions, the height of the prefabricated protrusions being greater than the first depth; forming the prefabricated protrusions on the second substrate, and processing them to form a plurality of protrusions to form a thin film array.
[0006] Optionally, the step of forming a prefabricated protrusion on the second substrate and processing it to form a plurality of protrusions to form a thin film array includes: laminating a side of the first substrate having the prefabricated protrusion with a first surface of the second substrate; performing laser annealing on the second surface of the second substrate and at least part of the position of the prefabricated protrusion, removing the position of the first substrate that has not been laser annealed, and forming the thin film array; the height of the protrusion is less than the height of the prefabricated protrusion.
[0007] Optionally, the side of the first substrate having the prefabricated protrusion is bonded to the second substrate.
[0008] Optionally, the step of performing hydrogen ion implantation on at least a portion of the first surface of the first substrate at a first depth so as to break chemical bonds in at least a portion of the first substrate at the first depth position includes: forming a photoresist layer on the first surface of the first substrate, and patterning the photoresist layer to form a plurality of first openings; performing hydrogen ion implantation on the first substrate at the position of the first openings at a first depth so as to break chemical bonds at positions of the first substrate corresponding to the first openings at the first depth position; and removing the photoresist layer.
[0009] Optionally, the step of forming a prefabricated protrusion on the second substrate and processing it to form a plurality of protrusions to form a thin film array includes: laminating a side of the first substrate having the prefabricated protrusion with a first surface of the second substrate; performing laser annealing on the second surface of the second substrate and at least part of the position of the prefabricated protrusion, removing the position of the first substrate that has not been laser annealed, and forming the thin film array; the height of the protrusion is less than the height of the prefabricated protrusion.
[0010] Optionally, the side of the first substrate having the prefabricated protrusion is bonded to the second substrate.
[0011] Optionally, the step of forming a prefabricated protrusion on the second substrate and processing it to form a plurality of protrusions to form a thin film array includes: performing processing on the first surface of the second substrate to form a pattern including a plurality of auxiliary protrusions; bonding the side of the first substrate having the prefabricated protrusions to the auxiliary protrusions; performing laser annealing on the second surface of the second substrate at the position of the auxiliary protrusions, removing the positions of the first substrate that have not been laser annealed, and forming the thin film array; the height of the protrusion is less than the height of the prefabricated protrusion.
[0012] Optionally, the side of the first substrate having the prefabricated protrusion is bonded to the auxiliary protrusion.
[0013] Optionally, the steps of performing processing on the first surface of the first substrate to form a pattern including a plurality of prefabricated protrusions, wherein the height of the prefabricated protrusions is greater than the first depth; forming the prefabricated protrusions on the second substrate, and processing them to form a plurality of protrusions to form a thin film array include: providing a carrier plate, and bonding the carrier plate to the first surface of the first substrate; performing laser annealing on the second surface side of the first substrate, removing the positions of the first substrate that have not been laser annealed, and forming a protrusion layer; the height of the protrusion layer is equal to the first depth; performing processing on the surface of the protrusion layer to form a pattern including a plurality of protrusions; transferring the plurality of protrusions to the first surface of the second substrate, and bonding them to the second substrate to form the thin film array.
[0014] Optionally, the carrier is bonded to the first surface of the first substrate via an intermediate bonding medium.
[0015] Optionally, the step of transferring the plurality of protrusions to the first surface of the second substrate and bonding them to the second substrate to form the thin film array includes: transferring the plurality of protrusions to the first surface of the second substrate by a mounting process or a pin mass transfer method; bonding the plurality of protrusions to the second substrate by bonding to form a thin film array.
[0016] Optionally, the step of forming prefabricated protrusions on the second substrate and processing them to form a plurality of protrusions to form a thin film array includes: performing laser annealing on the second surface side of the first substrate; transferring the plurality of protrusions to the first surface of the second substrate and bonding them to the second substrate to form the thin film array.
[0017] Optionally, the step of transferring the plurality of protrusions to the first surface of the second substrate and bonding them to the second substrate to form the thin film array includes: transferring the plurality of protrusions to the first surface of the second substrate by a roll-to-roll laminator; and bonding the plurality of protrusions to the second substrate by bonding to form a thin film array.
[0018] Optionally, the material of the first substrate includes single crystal silicon; and the material of the second substrate includes glass.
[0019] Optionally, the hydrogen ion implantation dose is 5*10 16 -10*10 16 / cm 2 , the injection energy is 70-90keV. BRIEF DESCRIPTION OF THE DRAWINGS
[0020] Figure 1 A schematic diagram of the structure of the SiOG thin film array provided by the present disclosure;
[0021] Figure 2 A flow chart of preparing a thin film array provided by the present disclosure;
[0022] Figure 3 A preparation flow chart of an embodiment of a SiOG thin film array provided by the present disclosure;
[0023] Figure 4 A schematic structural diagram of a preparation process of an embodiment of a publicly provided SiOG thin film array;
[0024] Figure 5 A preparation flow chart of another embodiment of the SiOG thin film array provided by the present disclosure;
[0025] Figure 6 A schematic structural diagram of another embodiment of the SiOG thin film array disclosed in the preparation process;
[0026] Figure 7 A preparation flow chart of another embodiment of the SiOG thin film array provided by the present disclosure;
[0027] Figure 8 A schematic structural diagram of another embodiment of the SiOG thin film array disclosed in the preparation process;
[0028] Fig. 9 A preparation flow chart of another embodiment of the SiOG thin film array provided by the present disclosure;
[0029] Fig.10 A schematic structural diagram of another embodiment of the SiOG thin film array disclosed in the preparation process;
[0030] Fig.11 A preparation flow chart of another embodiment of the SiOG thin film array provided by the present disclosure;
[0031] Fig.12 A schematic structural diagram of another embodiment of the SiOG thin film array disclosed in the preparation process;
[0032] The figures are marked as follows: 10, SiOG thin film array; 101, silicon substrate; 102, glass substrate; 103, silicon column; 104, prefabricated silicon column; 105, silicon column to be transferred; 201, photoresist; 301, auxiliary silicon column; 401, carrier; 402, intermediate bonding medium; 403, surface silicon; 404, ejector pin; 501, laminator. DETAILED DESCRIPTION
[0033] In order to enable those skilled in the art to better understand the technical solution of the present invention, the present invention is further described in detail below in conjunction with the accompanying drawings and specific implementation methods.
[0034] Unless otherwise defined, the technical terms or scientific terms used in the present disclosure should be understood by people with ordinary skills in the field to which the present disclosure belongs. The "first", "second" and similar words used in the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. Similarly, similar words such as "one", "one" or "the" do not indicate quantity restrictions, but indicate that there is at least one. Similar words such as "include" or "comprise" mean that the elements or objects appearing before the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. Similar words such as "connect" or "connected" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.
[0035] The present disclosure provides a method for preparing a thin film array, the method comprising:
[0036] S01. Provide a first substrate, wherein the first substrate has a first surface and a second surface that are oppositely disposed along a thickness direction thereof; provide a second substrate, wherein the second substrate has a first surface and a second surface that are oppositely disposed along a thickness direction thereof.
[0037] S02. Perform hydrogen (H) ion implantation in at least a portion of the first surface of the first substrate, with the implantation depth being a first depth, so as to break chemical bonds in at least a portion of the first substrate at the first depth.
[0038] S03, forming a pattern including a plurality of prefabricated protrusions on the first surface of the first substrate, wherein the height of the prefabricated protrusions is greater than the first depth.
[0039] S04, forming a protrusion on the second substrate, and processing to form a plurality of protrusions to form a thin film array.
[0040] The present disclosure provides a method for preparing a thin film array with simple process and low cost, and can prepare the thin film array required in flat panel displays and sensor arrays at a relatively low cost, and can meet the high resolution requirements of display devices.
[0041] In some examples, the material of the first substrate may be single crystal silicon, polycrystalline silicon, silicon oxide, gallium nitride, gallium arsenide, aluminum gallium nitrogen, lithium phosphate, aluminum oxide, silicon nitride, zirconium oxide, etc. The material of the second substrate may be glass, plastic, paper, etc. For ease of understanding and description, in the embodiments of the present disclosure, only the material of the first substrate is single crystal silicon and the material of the second substrate is glass as an example for explanation. However, the material of the first substrate is single crystal silicon and the material of the second substrate is glass does not constitute a limitation on the protection scope of the embodiments of the present disclosure. Among them, when the material of the first substrate is single crystal silicon, the prefabricated protrusion is referred to as a prefabricated silicon column, and the protrusion is referred to as a silicon column. At least part of the silicon column to be transferred is the silicon column before transfer, and the height of the silicon column to be transferred is the first depth. The part of the prefabricated silicon column located in the H ion layer close to the first surface of the silicon substrate in the prefabricated silicon column is the silicon column to be transferred. In some embodiments, the prefabricated silicon column is a protruding portion formed after photolithography of the first surface of the silicon substrate, and the height of the prefabricated silicon column is greater than the first depth. In some embodiments, the surface silicon refers to a portion of the silicon substrate where the H ion layer is close to the first surface of the silicon substrate after the H ions are implanted into the silicon substrate.
[0042] In order to clarify the preparation method in the embodiment of the present disclosure, the preparation method of the thin film array in the embodiment of the present disclosure is described in combination with the following five examples.
[0043] First example: Figure 3 FIG. 1 is a flow chart of a method for preparing a thin film array according to a first example of an embodiment of the present disclosure, see Figure 4 , the preparation method may include the following steps:
[0044] S11. Provide a silicon substrate.
[0045] In some examples, step S11 may specifically include: cleaning the silicon substrate 101 by a standard cleaning process. The cleaning method of the silicon substrate 101 may include: alkaline cleaning, soaking the silicon substrate 101 in a solution containing sodium hydroxide or ammonium hydroxide, the common solution concentration is 5% to 10%, which can clean the organic matter and metal ions on the surface of the silicon substrate 101; acid cleaning, soaking the silicon substrate 101 in a solution containing hydrofluoric acid or hydrochloric acid, the common solution concentration is 10% to 30%, which can clean the oxide and silica gel impurities on the surface of the silicon substrate 101; oxidation cleaning, soaking the silicon substrate 101 in a solution containing potassium hydroxide or hydrogen peroxide, the common solution concentration is 5% to 10%, which can clean the carbon and metal elements on the surface of the silicon substrate 101; ultrapure water cleaning, soaking or spraying the silicon substrate 101 in ultrapure water, which can clean the tiny particles on the surface of the silicon substrate 101.
[0046] S12, implanting H ions into the first surface of the silicon substrate 101, with the implantation depth being a first depth.
[0047] In some examples, step S12 may specifically include: bombarding the first surface of the silicon substrate 101 with H ions, such as Figure 4 As shown in (b), when H ions bombard the silicon substrate 101, they gradually lose energy by colliding with silicon atoms and finally stay in the silicon substrate 101, breaking the silicon-silicon bond and forming local defects. When injecting H ions, the dose and energy of the H ions can be precisely controlled to control the depth of the H ion injection for subsequent stripping. The H ion injection dose is 5*10 16 -10*10 16 / cm 2 , the injection energy is 70-90keV.
[0048] S13, etching the prefabricated silicon pillars 104 on the first surface of the silicon substrate 101, and performing patterning.
[0049] In some examples, step S13 may specifically include: patterning the surface silicon by photolithography, deep silicon etching DRIE, and strip processes. The etching process may be dry etching or wet etching. Among them, dry etching is to expose the surface of the silicon wafer to plasma generated in the gaseous state, and the plasma physically or chemically reacts with the silicon wafer through the window opened in the photoresist, thereby removing the exposed surface material. Dry etching may specifically include: ion milling etching, plasma etching, and reactive ion etching.
[0050] Wet etching is to immerse the silicon wafer in a certain chemical reagent or reagent solution, so that the part of the film surface not masked by the resist reacts chemically with the reagent and is removed. Compared with dry etching, wet etching is simple to operate, has low equipment requirements, and is easy to achieve mass production. However, dry etching greatly improves the anisotropic properties of etching and can ensure the accuracy of the pattern.
[0051] S14 , bonding the side of the silicon substrate 101 having the prefabricated silicon pillars 104 to the glass substrate 102 .
[0052] In some examples, step S14 may specifically include: bonding one side of the silicon substrate 101 having the prefabricated silicon pillars 104 to the glass substrate 102 by a silicon-glass anodic bonding process or an Au-Au metal thermal bonding process, such as Figure 4(d) is shown. The process principle of silicon-glass anodic bonding is to connect the positive electrode of the DC power supply to the silicon substrate 101 and the negative electrode to the glass substrate 102. Glass is similar to an electrolyte at high temperature, and the resistivity of silicon will decrease due to intrinsic excitation at 300-400°C. When an external electric field is applied, the conductive ions in the glass substrate 102 will drift to the surface of the glass substrate 102 at the negative electrode, and leave a negative charge on the first surface of the glass substrate 102 adjacent to the silicon substrate 101. Due to the directional movement of the charged ions, current flows through the entire circuit, and a very thin space charge region is formed on the first surface of the glass substrate 102. Since the space charge region is negatively charged and the silicon substrate 101 is positively charged, there is a large electrostatic attraction between the silicon substrate 101 and the glass substrate 102, so that the two are in close contact, and a physical and chemical reaction occurs on the bonding surface to form a strong Si-O covalent bond, thereby completing the bonding. This bonding method does not require melting of glass for bonding. It only requires heating the glass until the charged ions can break free from the constraints of the glass grid. It has good airtightness and high bonding strength.
[0053] The metal thermal bonding process is to first prepare metal layers on the first surface of the silicon substrate 101 and the first surface of the glass substrate 102 respectively, and then perform plasma treatment on them respectively, and then perform a thermal bonding process on the treated first surface of the silicon substrate 101 and the first surface of the glass substrate 102 to form covalent bonds, such as Au-Au bonds, thereby completing bonding.
[0054] S15, separating the silicon pillars 103 from the silicon substrate portion that has not been laser annealed by laser annealing technology, and separating the silicon substrate portion that has not been laser annealed from the glass substrate 102 by a mechanical separation process, to form a SiOG thin film array, such as Figure 4 (e) as shown.
[0055] Among them, annealing technology is a heat treatment process for materials, including metal materials and non-metallic materials. The traditional heating annealing technology is to place the entire workpiece in a vacuum furnace and anneal it at a certain temperature, which is time-consuming and labor-intensive. In step S15 of the present embodiment, a near-infrared laser is used for laser annealing. The advantage of using a near-infrared laser is that the annealing position of the glass substrate can be flexibly selected, and the thermal impact on the parts of the glass substrate that do not need annealing is small. In some examples, the infrared wavelength used in step S15 can be 808nm or 1064nm.
[0056] Second example: Figure 5 FIG. 1 is a flow chart of a method for preparing a thin film array according to a second example of an embodiment of the present disclosure, see Figure 6 , the preparation method may include the following steps:
[0057] S21. Provide a silicon substrate.
[0058] In some examples, step S21 may specifically include: cleaning the silicon substrate 101 by a standard cleaning process. The cleaning method of the silicon substrate 101 may include: alkaline cleaning, soaking the silicon substrate 101 in a solution containing sodium hydroxide or ammonium hydroxide, the common solution concentration is 5% to 10%, which can clean the organic matter and metal ions on the surface of the silicon substrate 101; acid cleaning, soaking the silicon substrate 101 in a solution containing hydrofluoric acid or hydrochloric acid, the common solution concentration is 10% to 30%, which can clean the oxide and silica gel impurities on the surface of the silicon substrate 101; oxidation cleaning, soaking the silicon substrate 101 in a solution containing potassium hydroxide or hydrogen peroxide, the common solution concentration is 5% to 10%, which can clean the carbon and metal elements on the surface of the silicon substrate 101; ultrapure water cleaning, soaking or spraying the silicon substrate 101 in ultrapure water, which can clean the tiny particles on the surface of the silicon substrate 101.
[0059] S22 , applying photoresist 201 on at least a portion of the first surface of the silicon substrate 101 .
[0060] In some examples, step S22 may specifically include: applying photoresist 201 on the area of the first surface of the silicon substrate 101 that does not need to be laser annealed, such as Figure 6 (b) is shown. Among them, applying photoresist 201 can mask the injection of H ions in the area that does not need laser annealing, and it is easier to separate the glass substrate 102 and the part of the silicon substrate that is not laser annealed during laser annealing. Among them, photoresist is a large class of high molecular polymer materials with photosensitive chemical effects (or sensitive to electron energy), and is a medium for transferring ultraviolet exposure or electron beam exposure patterns. When photoresist is applied to the surface of the substrate, when ultraviolet light or electron beam is irradiated, the properties of the photoresist material itself will change. After being developed with a developer, the exposed negative photoresist or the unexposed positive photoresist will remain on the surface of the substrate, so that the designed structure is transferred to the photoresist, and subsequent etching, deposition and other processes can further transfer this pattern to the substrate under the photoresist.
[0061] S23 , implanting H ions into the first surface of the silicon substrate 101 , with the implantation depth being a first depth.
[0062] In some examples, step S23 may specifically include: bombarding the first surface of the silicon substrate 101 with H ions, wherein a portion of the silicon substrate 101 covered by the photoresist 201 along the thickness direction of the silicon substrate 101 is not implanted with H ions, such as Figure 6(c) As shown. When H ions bombard the silicon substrate 101, they will gradually lose energy by colliding with silicon atoms and finally stay in the silicon substrate 101, breaking the silicon-silicon bond and forming local defects. When injecting H ions, the dose and energy of the H ions can be precisely controlled to control the depth of H ion injection for subsequent stripping. The H ion injection dose is 5*10 16 -10*10 16 / cm 2 , the injection energy is 70-90keV.
[0063] S24, etching the prefabricated silicon pillars 104 on the first surface of the silicon substrate 101 and performing patterning.
[0064] In some examples, step S24 may specifically include: patterning the surface silicon by photolithography, deep silicon etching DRIE, and strip processes. The etching process may be dry etching or wet etching. Among them, dry etching is to expose the surface of the silicon wafer to plasma generated in the gaseous state, and the plasma reacts physically or chemically with the silicon wafer through the window opened in the photoresist, thereby removing the exposed surface material. Dry etching may specifically include: ion milling etching, plasma etching, and reactive ion etching.
[0065] Wet etching is to immerse the silicon wafer in a certain chemical reagent or reagent solution, so that the part of the film surface not masked by the resist reacts chemically with the reagent and is removed. Compared with dry etching, wet etching is simple to operate, has low equipment requirements, and is easy to achieve mass production. However, dry etching greatly improves the anisotropic properties of etching and can ensure the accuracy of the pattern.
[0066] S25 , bonding the side of the silicon substrate 101 having the prefabricated silicon pillars 104 to the glass substrate 102 .
[0067] In some examples, step S25 may specifically include: bonding the side of the silicon substrate 101 having the prefabricated silicon pillars 104 to the glass substrate 102 by a silicon-glass anodic bonding process or an Au-Au metal thermal bonding process, such as Figure 6(d) is shown. The process principle of silicon-glass anodic bonding is to connect the positive electrode of the DC power supply to the silicon substrate 101 and the negative electrode to the glass substrate 102. Glass is similar to an electrolyte at high temperature, and the resistivity of silicon will decrease due to intrinsic excitation at 300-400°C. When an external electric field is applied, the conductive ions in the glass substrate 102 will drift to the surface of the glass substrate 102 at the negative electrode, and leave a negative charge on the first surface of the glass substrate 102 adjacent to the silicon substrate 101. Due to the directional movement of the charged ions, current flows through the entire circuit, and a very thin space charge region is formed on the first surface of the glass substrate 102. Since the space charge region is negatively charged and the silicon substrate 101 is positively charged, there is a large electrostatic attraction between the silicon substrate 101 and the glass substrate 102, so that the two are in close contact, and a physical and chemical reaction occurs on the bonding surface to form a strong Si-O covalent bond, thereby completing the bonding. This bonding method does not require melting of glass for bonding. It only requires heating the glass until the charged ions can break free from the constraints of the glass grid. It has good airtightness and high bonding strength.
[0068] The metal thermal bonding process is to first prepare metal layers on the first surface of the silicon substrate 101 and the first surface of the glass substrate 102 respectively, and then perform plasma treatment on them respectively, and then perform a thermal bonding process on the treated first surface of the silicon substrate 101 and the first surface of the glass substrate 102 to form covalent bonds, such as Au-Au bonds, thereby completing bonding.
[0069] S26, separating the silicon pillars 103 from the silicon substrate portion that has not been laser annealed by laser annealing technology, and separating the silicon substrate portion that has not been laser annealed from the glass substrate 102 by a mechanical separation process to form a SiOG thin film array.
[0070] Among them, annealing technology is a heat treatment process for materials, including metal materials and non-metallic materials. The traditional heating annealing technology is to place the entire workpiece in a vacuum furnace and anneal it at a certain temperature, which is time-consuming and labor-intensive. In step S26 of the present embodiment, a near-infrared laser is used for laser annealing. The advantage of using a near-infrared laser is that the annealing position of the glass substrate can be flexibly selected, and the thermal impact on the parts of the glass substrate that do not need annealing is small. In some examples, the infrared wavelength used in step S26 can be 808nm or 1064nm.
[0071] The third example: Figure 8 FIG. 1 is a flow chart of a method for preparing a thin film array according to a third exemplary embodiment of the present disclosure, see Fig. 9 , the preparation method may include the following steps:
[0072] S31. Provide a silicon substrate.
[0073] In some examples, step S31 may specifically include: cleaning the silicon substrate 101 by a standard cleaning process. The cleaning method of the silicon substrate 101 may include: alkaline cleaning, soaking the silicon wafer in a solution containing sodium hydroxide or ammonium hydroxide, the common solution concentration is 5% to 10%, which can clean the organic matter and metal ions on the surface of the silicon wafer; acid cleaning, soaking the silicon wafer in a solution containing hydrofluoric acid or hydrochloric acid, the common solution concentration is 10% to 30%, which can clean the oxide and silica gel impurities on the surface of the silicon wafer; oxidation cleaning, soaking the silicon wafer in a solution containing potassium hydroxide or hydrogen peroxide, the common solution concentration is 5% to 10%, which can clean the carbon and metal elements on the surface of the silicon wafer; ultrapure water cleaning, soaking or spraying the silicon wafer in ultrapure water, which can clean the tiny particles on the surface of the silicon wafer.
[0074] S32 , implanting H ions into the first surface of the silicon substrate 101 , with the implantation depth being a first depth.
[0075] In some examples, step S32 may specifically include: bombarding the first surface of the silicon substrate 101 with H ions, such as Figure 8 As shown in (b), when H ions bombard the silicon substrate 101, they gradually lose energy by colliding with silicon atoms and finally stay in the silicon substrate 101, breaking the silicon-silicon bond and forming local defects. When injecting H ions, the dose and energy of the H ions can be precisely controlled to control the depth of the H ion injection for subsequent stripping. The H ion injection dose is 5*10 16 -10*10 16 / cm 2 , the injection energy is 70-90keV.
[0076] S33, etching the prefabricated silicon pillars 104 on the first surface of the silicon substrate 101, and performing patterning.
[0077] In some examples, step S33 may specifically include: patterning the surface silicon by photolithography, deep silicon etching DRIE, and strip processes. The etching process may be dry etching or wet etching. Among them, dry etching is to expose the surface of the silicon wafer to plasma generated in the gaseous state, and the plasma physically or chemically reacts with the silicon wafer through the window opened in the photoresist, thereby removing the exposed surface material. Dry etching may specifically include: ion milling etching, plasma etching, and reactive ion etching.
[0078] Wet etching is to immerse the silicon wafer in a certain chemical reagent or reagent solution, so that the part of the film surface not masked by the resist reacts chemically with the reagent and is removed. Compared with dry etching, wet etching is simple to operate, has low equipment requirements, and is easy to achieve mass production. However, dry etching greatly improves the anisotropic properties of etching and can ensure the accuracy of the pattern.
[0079] S34, preparing an auxiliary part 301 in the area to be transferred of the glass substrate 101, and performing patterning.
[0080] In some examples, step S34 may specifically include: preparing an auxiliary portion 301 at a position of the glass substrate 101 that requires laser annealing, such as Figure 8 (d) is shown. The bonding of the auxiliary part 301 can avoid at least part of the prefabricated silicon pillar 104 from contacting the glass substrate 102, and facilitates the subsequent separation of the silicon pillar 103 from the unannealed part. In some examples, the material of the auxiliary part 301 can be silicon oxide (SiOx). The chemical properties of the SiOx film are stable and it is not easy to chemically react. The thickness of the film can be set to 400-700nm.
[0081] S35 , bonding the side of the silicon substrate 101 having the prefabricated silicon pillar 104 to the auxiliary silicon pillar 301 .
[0082] In some examples, step S35 may specifically include: bonding the side of the silicon substrate 101 having the prefabricated silicon pillar 104 to the auxiliary silicon pillar 301 through an anodic bonding process or an Au-Au metal thermal bonding process. By adding a surface protrusion patterning process before bonding with the glass substrate 102, the silicon pillar that is not laser annealed is not in contact with the first surface of the glass substrate 102, so that the silicon substrate portion that is not laser annealed is directly separated from the glass substrate 102.
[0083] Among them, the process principle of anodic bonding is to connect the positive electrode of the DC power supply to the silicon substrate 101, and the negative electrode to the glass substrate 102. Glass is similar to an electrolyte at high temperature, and the resistivity of silicon will decrease due to intrinsic excitation at 300-400°C. When an external electric field is applied, the conductive ions in the glass substrate 102 will drift to the surface of the auxiliary silicon column 301, and leave negative charges on the surface of the auxiliary silicon column 301 adjacent to the silicon substrate 101. Due to the directional movement of the charged ions, current flows through the entire circuit, and a very thin space charge region is formed on the surface of the auxiliary silicon column 301. Since the space charge region is negatively charged and the silicon substrate 101 is positively charged, there is a large electrostatic attraction between the silicon substrate 101 and the auxiliary silicon column 301, so that the two are in close contact, and a physical and chemical reaction occurs on the bonding surface, thereby completing the bonding. This bonding method has good air tightness and high bonding strength.
[0084] The metal thermal bonding process is to first prepare metal layers on the first surface of the silicon substrate 101 and the first surface of the glass substrate 102 respectively, and then perform plasma treatment on them respectively, and then perform a thermal bonding process on the treated first surface of the silicon substrate 101 and the first surface of the glass substrate 102 to form covalent bonds, such as Au-Au bonds, thereby completing bonding.
[0085] S36, separating the silicon pillars 103 from the silicon substrate portion that has not been laser annealed by laser annealing technology, and separating the silicon substrate portion that has not been laser annealed from the glass substrate 102 by a mechanical separation process to form a SiOG thin film array.
[0086] Among them, annealing technology is a heat treatment process for materials, including metal materials and non-metallic materials. The traditional heating annealing technology is to place the entire workpiece in a vacuum furnace and anneal it at a certain temperature, which is time-consuming and labor-intensive. In step S36 of the present embodiment, a near-infrared laser is used for laser annealing. The advantage of using a near-infrared laser is that the annealing position of the glass substrate can be flexibly selected, and the thermal impact on the parts of the glass substrate that do not need annealing is small. In some examples, the infrared wavelength used in step S36 can be 808nm or 1064nm.
[0087] Fourth example: Fig. 9 FIG. 1 is a flow chart of a method for preparing a thin film array according to a first example of an embodiment of the present disclosure, see Fig.10 , the preparation method may include the following steps:
[0088] S41. Provide a silicon substrate.
[0089] In some examples, step S41 may specifically include: cleaning the silicon substrate 101 by a standard cleaning process. The cleaning method of the silicon substrate 101 may include: alkaline cleaning, soaking the silicon wafer in a solution containing sodium hydroxide or ammonium hydroxide, the common solution concentration is 5% to 10%, which can clean the organic matter and metal ions on the surface of the silicon wafer; acid cleaning, soaking the silicon wafer in a solution containing hydrofluoric acid or hydrochloric acid, the common solution concentration is 10% to 30%, which can clean the oxide and silica gel impurities on the surface of the silicon wafer; oxidation cleaning, soaking the silicon wafer in a solution containing potassium hydroxide or hydrogen peroxide, the common solution concentration is 5% to 10%, which can clean the carbon and metal elements on the surface of the silicon wafer; ultrapure water cleaning, soaking or spraying the silicon wafer in ultrapure water, which can clean the tiny particles on the surface of the silicon wafer.
[0090] S42 , implanting H ions into the first surface of the silicon substrate 101 , with the implantation depth being a first depth.
[0091] In some examples, step S42 may specifically include: bombarding the first surface of the silicon substrate 101 with H ions, such as Fig.10 As shown in (b), when H ions bombard the silicon substrate 101, they gradually lose energy by colliding with silicon atoms and finally stay in the silicon substrate 101, breaking the silicon-silicon bond and forming local defects. When injecting H ions, the dose and energy of the H ions can be precisely controlled to control the depth of the H ion injection for subsequent stripping. The H ion injection dose is 5*1016 -10*10 16 / cm 2 , the injection energy is 70-90keV.
[0092] S43 , bonding the first surface of the silicon substrate 101 to the carrier 401 .
[0093] In some examples, step S43 may specifically include: bonding the first surface of the silicon substrate 101 to the carrier 401 through an intermediate bonding medium. The intermediate bonding medium may be BCB or SU8. BCB is widely used in the field of advanced microelectronics due to its excellent properties such as low dielectric constant, low dielectric loss, low water absorption, high thermal stability, chemical stability, high film flatness and low curing temperature, including multi-layer wiring, stress buffer / passivation layer, GaAs dielectric inner layer, high-frequency device, filter, MEMS. In particular, in multi-layer wiring applications, BCB dielectric is often used as an interlayer insulating dielectric material for high-density thin-film multi-layer wiring substrates.
[0094] SU8 is a high-performance photoresist material, mainly composed of epoxy resin, photosensitizer, diluent, etc. SU8 has good mechanical properties, chemical corrosion resistance and thermal stability, and can be used directly as an insulating layer during electroplating.
[0095] S44, separating the surface silicon 402 and the silicon substrate portion that has not been laser annealed.
[0096] In some examples, the step of S44 may specifically include: performing laser annealing on the second surface side of the silicon substrate 101, separating the surface silicon 402 from the portion of the silicon substrate that has not been laser annealed, and transferring the surface silicon 402 to the carrier 401 for the next step of etching. Among them, annealing technology is a heat treatment process for materials, including metal materials and non-metallic materials. The traditional heating annealing technology is to place the entire workpiece in a vacuum furnace and anneal it at a certain temperature, which is time-consuming and labor-intensive. In step S44 of the present embodiment, a near-infrared laser is used for laser annealing. The advantage of using a near-infrared laser is that the annealing position of the glass substrate can be flexibly selected, and the thermal impact on the parts of the glass substrate that do not need annealing is small. In some examples, the infrared wavelength used in step S44 can be 808nm or 1064nm.
[0097] S45, etching the silicon pillars 105 to be transferred on the surface silicon 402, and patterning, such as Fig.10 (e) as shown.
[0098] In some examples, step S45 may specifically include: patterning the surface silicon by photolithography, deep silicon etching DRIE, and strip processes. The etching process may be dry etching or wet etching. Among them, dry etching is to expose the surface of the silicon wafer to plasma generated in the gaseous state, and the plasma physically or chemically reacts with the silicon wafer through the window opened in the photoresist, thereby removing the exposed surface material. Dry etching may specifically include: ion milling etching, plasma etching, and reactive ion etching.
[0099] Wet etching is to immerse the silicon wafer in a certain chemical reagent or reagent solution, so that the part of the film surface not masked by the resist reacts chemically with the reagent and is removed. Compared with dry etching, wet etching is simple to operate, has low equipment requirements, and is easy to achieve mass production. However, dry etching greatly improves the anisotropic properties of etching and can ensure the accuracy of the pattern.
[0100] S46, transferring at least part of the silicon pillars 105 to be transferred on the carrier 401 to the glass substrate 102 to form a SiOG thin film array.
[0101] In some examples, step S46 may specifically include: transferring at least a portion of the silicon pillars 105 to be transferred on the carrier 401 to the glass substrate 102 by means of a pin mass transfer method, so as to form a SiOG thin film array. Fig.10 (f) as shown.
[0102] Mechanical ejector mass transfer technology refers to transferring silicon pillars 103 from silicon liner 101 to glass substrate 102 by high-precision equipment. The specific transfer steps may include: separating the silicon pillars from the silicon substrate with a certain force; transferring the separated silicon pillars from the silicon substrate to a specific position on the glass substrate with high precision by mechanical ejector pins to form a SiOG thin film array.
[0103] The fifth example: Fig.11 FIG. 1 is a flowchart of a method for preparing a thin film array according to a fifth example of an embodiment of the present disclosure, see Fig.12 , the preparation method may include the following steps:
[0104] S51. Provide a silicon substrate.
[0105] In some examples, step S51 may specifically include: cleaning the silicon substrate 101 by a standard cleaning process. The cleaning method of the silicon substrate 101 may include: alkaline cleaning, soaking the silicon wafer in a solution containing sodium hydroxide or ammonium hydroxide, the common solution concentration is 5% to 10%, which can clean the organic matter and metal ions on the surface of the silicon wafer; acid cleaning, soaking the silicon wafer in a solution containing hydrofluoric acid or hydrochloric acid, the common solution concentration is 10% to 30%, which can clean the oxide and silica gel impurities on the surface of the silicon wafer; oxidation cleaning, soaking the silicon wafer in a solution containing potassium hydroxide or hydrogen peroxide, the common solution concentration is 5% to 10%, which can clean the carbon and metal elements on the surface of the silicon wafer; ultrapure water cleaning, soaking or spraying the silicon wafer in ultrapure water, which can clean the tiny particles on the surface of the silicon wafer.
[0106] S52 , implanting H ions into the first surface of the silicon substrate 101 , with the implantation depth being a first depth.
[0107] In some examples, step S52 may specifically include: bombarding the first surface of the silicon substrate 101 with H ions, such as Fig.12 As shown in (b), when H ions bombard the silicon substrate 101, they gradually lose energy by colliding with silicon atoms and finally stay in the silicon substrate 101, breaking the silicon-silicon bond and forming local defects. When injecting H ions, the dose and energy of the H ions can be precisely controlled to control the depth of the H ion injection for subsequent stripping. The H ion injection dose is 5*10 16 -10*10 16 / cm 2 , the injection energy is 70-90keV.
[0108] S53 , etching the prefabricated silicon pillars 104 on the first surface of the silicon substrate 101 and performing patterning.
[0109] In some examples, step S53 may specifically include: patterning the surface silicon by photolithography, deep silicon etching DRIE, and strip processes. The etching process may be dry etching or wet etching. Among them, dry etching is to expose the surface of the silicon wafer to plasma generated in the gaseous state, and the plasma reacts physically or chemically with the silicon wafer through the window opened in the photoresist, thereby removing the exposed surface material. Dry etching may specifically include: ion milling etching, plasma etching, and reactive ion etching.
[0110] Wet etching is to immerse the silicon wafer in a certain chemical reagent or reagent solution, so that the part of the film surface not masked by the resist reacts chemically with the reagent and is removed. Compared with dry etching, wet etching is simple to operate, has low equipment requirements, and is easy to achieve mass production. However, dry etching greatly improves the anisotropic properties of etching and can ensure the accuracy of the pattern.
[0111] S54, using laser annealing technology to combine the silicon pillar 103 with the silicon substrate portion that has not been laser annealed by weak van der Waals force, so as to facilitate the subsequent transfer of the silicon pillar 103, such as Fig.12 (c) as shown.
[0112] Among them, the Van der Waals force is the intermolecular force.
[0113] Annealing technology is a heat treatment process for materials, including metal materials and non-metallic materials. The traditional heating annealing technology is to place the entire workpiece in a vacuum furnace and anneal it at a certain temperature, which is time-consuming and labor-intensive. In step S54 of the present embodiment, a near-infrared laser is used for laser annealing. The advantage of using a near-infrared laser is that the annealing position of the glass substrate can be flexibly selected, and the thermal impact on the parts of the glass substrate that do not need annealing is small. In some examples, the infrared wavelength used in step S54 can be 808nm or 1064nm.
[0114] S55, transferring the silicon pillar 103 to the position of the glass substrate 102 that needs laser annealing to form a SiOG thin film array, such as Fig.12 (d) as shown.
[0115] In some examples, step S55 may specifically include: transferring the silicon pillar 103 to a roller through a Roll to Roll flexible to hard substrate, and then transferring the silicon pillar 103 on the roller to a position on the glass substrate 102 requiring laser annealing through a flexible to hard substrate to form a SiOG thin film array.
[0116] The bonding method of the silicon column 103 and the glass substrate 102 can be silicon-glass anodic bonding or Au-Au metal thermal bonding. The process principle of silicon-glass anodic bonding is to connect the positive electrode of the DC power supply to the Si sheet and the negative electrode to the glass sheet. Glass is similar to an electrolyte at high temperature, and the resistivity of the Si sheet will decrease due to intrinsic excitation when it is at 300-400°C. When an external electric field is applied, the conductive ions in the glass will drift to the glass surface of the negative electrode, and leave a negative charge on the glass surface adjacent to the Si sheet. Due to the directional movement of the charged ions, current flows through the entire circuit, and a very thin space charge region is formed on the glass surface adjacent to the Si sheet. Since the space charge region is negatively charged and the Si sheet is positively charged, there is a large electrostatic attraction between the Si sheet and the glass, so that the two are in close contact, and a physical and chemical reaction occurs on the bonding surface to form a strong Si-O covalent bond, thereby completing the bonding. This bonding method does not require melting of glass for bonding. It only requires heating the glass until the charged ions can break free from the constraints of the glass grid. It has good airtightness and high bonding strength.
[0117] The metal thermal bonding process is to first prepare metal layers on the first surface of the silicon substrate 101 and the first surface of the glass substrate 102 respectively, and then perform plasma treatment on them respectively, and then perform a thermal bonding process on the treated first surface of the silicon substrate 101 and the first surface of the glass substrate 102 to form covalent bonds, such as Au-Au bonds, thereby completing bonding.
[0118] It is to be understood that the above embodiments are merely exemplary embodiments used to illustrate the principles of the present invention, but the present invention is not limited thereto. For those of ordinary skill in the art, various modifications and improvements can be made without departing from the spirit and essence of the present invention, and these modifications and improvements are also considered to be within the scope of protection of the present invention.
Claims
1. A method for preparing a thin film array, characterized in that: The preparation method comprises: Providing a first substrate, wherein the first substrate has a first surface and a second surface disposed opposite to each other along a thickness direction thereof; providing a second substrate, wherein the second substrate has a first surface and a second surface disposed opposite to each other along a thickness direction thereof; Performing hydrogen ion implantation in at least a portion of the first surface of the first substrate, with the implantation depth being a first depth, so as to break chemical bonds in at least a portion of the first substrate at the first depth; Performing on the first surface of the first substrate, forming a pattern including a plurality of prefabricated protrusions, wherein the height of the prefabricated protrusions is greater than the first depth; Prefabricated protrusions are formed on the second substrate and processed to form a plurality of protrusions to form a thin film array.
2. The method for preparing a thin film array according to claim 1, characterized in that: The step of forming the prefabricated protrusions on the second substrate and processing to form a plurality of protrusions to form a thin film array includes: Laying the side of the first substrate having the prefabricated protrusions to the first surface of the second substrate; Laser annealing is performed on the second surface of the second substrate and at least part of the prefabricated protrusions to remove the positions of the first substrate that are not laser annealed to form the thin film array; the height of the protrusions is smaller than the height of the prefabricated protrusions.
3. The method for preparing a thin film array according to claim 2, characterized in that: The step of bonding the side of the first substrate having the prefabricated protrusions to the first surface of the second substrate includes bonding the side of the first substrate having the prefabricated protrusions to the second substrate.
4. The method for preparing a thin film array according to claim 1, characterized in that: The step of implanting hydrogen ions into at least a portion of the first surface of the first substrate at a first depth so as to break chemical bonds in at least a portion of the first substrate at the first depth comprises: forming a photoresist layer on the first surface of the first substrate, and patterning the photoresist layer to form a plurality of first openings; Performing hydrogen ion implantation on the first substrate at the position of the first opening, with the implantation depth being a first depth, so as to break a chemical bond between the first substrate and a position corresponding to the first opening at the first depth; The photoresist layer is removed.
5. The method for preparing a thin film array according to claim 4, characterized in that: The step of forming the prefabricated protrusions on the second substrate and processing to form a plurality of protrusions to form a thin film array includes: Laying the side of the first substrate having the prefabricated protrusions to the first surface of the second substrate; Laser annealing is performed on the second surface of the second substrate and at least part of the prefabricated protrusions to remove the positions of the first substrate that are not laser annealed to form the thin film array; the height of the protrusions is smaller than the height of the prefabricated protrusions.
6. The method for preparing a thin film array according to claim 5, characterized in that: The step of bonding the side of the first substrate having the prefabricated protrusions to the first surface of the second substrate includes bonding the side of the first substrate having the prefabricated protrusions to the second substrate.
7. The method for preparing a thin film array according to claim 1, characterized in that: The step of forming the prefabricated protrusions on the second substrate and processing to form a plurality of protrusions to form a thin film array includes: forming a pattern including a plurality of auxiliary protrusions at the first surface of the second substrate; Laying the side of the first substrate having the prefabricated protrusions together with the auxiliary protrusions; Laser annealing is performed on the second surface of the second substrate and at the position of the auxiliary protrusions to remove the positions of the first substrate that have not been laser annealed, thereby forming the thin film array; the height of the protrusions is smaller than the height of the prefabricated protrusions.
8. The method for preparing a thin film array according to claim 7, characterized in that: The step of bonding the side of the first substrate having the prefabricated protrusion to the auxiliary protrusion includes: bonding the side of the first substrate having the prefabricated protrusion to the auxiliary protrusion by bonding.
9. The method for preparing a thin film array according to claim 1, characterized in that: The step of forming a pattern including a plurality of prefabricated protrusions on the first surface of the first substrate, wherein the height of the prefabricated protrusions is greater than the first depth; The step of forming a prefabricated protrusion on the second substrate and processing the prefabricated protrusion to form a plurality of protrusions to form a thin film array includes: Providing a carrier, and attaching the carrier to the first surface of the first substrate; Performing laser annealing on the second surface side of the first substrate to remove the position of the first substrate that has not been laser annealed to form a protruding layer; the height of the protruding layer is equal to the first depth; Performing on the surface of the protrusion layer to form a pattern including a plurality of protrusions; The plurality of protrusions are transferred to the first surface of the second substrate and bonded to the second substrate to form the thin film array.
10. The method for preparing a thin film array according to claim 9, characterized in that: The step of providing a carrier and bonding the carrier to the first surface of the first substrate includes: bonding the carrier to the first surface of the first substrate via an intermediate bonding medium.
11. The method for preparing a thin film array according to claim 9, characterized in that: The step of transferring the plurality of protrusions onto the first surface of the second substrate and attaching them to the second substrate to form the thin film array comprises: Transferring the plurality of protrusions to the first surface of the second substrate by a mounting process or a pin mass transfer method; The plurality of protrusions are bonded to the second substrate to form a thin film array.
12. The method for preparing a thin film array according to claim 1, characterized in that: The step of forming the prefabricated protrusions on the second substrate and processing to form a plurality of protrusions to form a thin film array includes: Performing laser annealing on the second surface side of the first substrate; The plurality of protrusions are transferred to the first surface of the second substrate and bonded to the second substrate to form the thin film array.
13. The method for preparing a thin film array according to claim 12, characterized in that: The step of transferring the plurality of protrusions onto the first surface of the second substrate and attaching the protrusions to the second substrate to form the thin film array comprises: The plurality of protrusions are transferred to the first surface of the second substrate by a roll-to-roll laminator; The plurality of protrusions are bonded to the second substrate to form a thin film array.
14. The method for preparing a thin film array according to any one of claims 1 to 13, characterized in that: The material of the first substrate includes single crystal silicon; the material of the second substrate includes glass.
15. The method for preparing a thin film array according to any one of claims 1 to 13, characterized in that: The hydrogen ion implantation dose is 5*10 16 -10*10 16 / cm 2 , the injection energy is 70-90keV.