Processing method of semiconductor device and clamp for processing semiconductor device

Abstract

The invention provides a processing method of a semiconductor device and a clamp for processing the semiconductor device, and the processing method of the semiconductor device comprises the steps: obtaining a substrate; arranging a chip on the substrate; a packaging body is formed on the base body, the packaging body is provided with a top through hole, and the top through hole exposes the temperature measurement area of the chip; a stop piece is arranged in the top through hole in a penetrating manner, and the end part of the stop piece covers the temperature measurement area; and filling an insulating colloid among the packaging body, the substrate and the stopper. According to the technical scheme, the problem that the semiconductor device may be damaged due to the fact that the shell of the semiconductor device needs to be removed when the junction temperature of the semiconductor device is measured in the prior art is effectively solved.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor device packaging, and in particular to a method for processing a semiconductor device and a fixture for processing a semiconductor device. Background Art

[0002] With the advancement of semiconductor technology, power semiconductor devices are becoming more and more common in the fields of power grids, electric vehicles, charging piles, and white appliances, playing an increasingly important role. In particular, as the user side has higher and higher requirements for the voltage and current levels, power density, and application environment of power devices, high voltage, high current, high power density, high temperature, and high switching speed have gradually become hard indicators pursued by power device design. All of the above indicators will increase the loss of the device and cause the temperature of the chip to rise. The increase in chip temperature will in turn have a negative impact on the thermal, electrical, and mechanical performance of the chip itself and the device as a whole. For example, the increase in chip junction temperature will increase the increase in chip loss, the increase in chip internal resistance will lead to a decrease in current carrying capacity, and the increase in temperature will also cause inconsistent thermal expansion performance of the internal materials of the device package, and thermal stress will be generated inside the packaging material, causing some materials to bend and deform.

[0003] In the prior art, when it is necessary to measure the junction temperature of a power semiconductor device, a chip junction temperature measurement method based on electrical parameters can be used. However, this method requires measuring the K coefficient first, and then calculating the junction temperature through the K coefficient. The measurement time is long, and the normal service of the power device needs to be suspended, and the device needs to be connected to a dedicated test circuit for measurement. At the same time, the K coefficient will also change with the aging of the package, resulting in inaccurate measurement. The outer shell of the power semiconductor device can also be destroyed to expose the chip, and then the temperature of the chip can be measured. However, when the outer shell is destroyed, the chip may be damaged, affecting the normal use of the power semiconductor device. Summary of the invention

[0004] The main purpose of the present invention is to provide a method for processing a semiconductor device and a fixture for processing a semiconductor device, so as to solve the problem in the related art that when measuring the junction temperature of a semiconductor device, the outer shell of the semiconductor device needs to be removed, which may cause damage to the semiconductor device.

[0005] In order to achieve the above object, according to one aspect of the present invention, a method for processing a semiconductor device is provided, comprising:

[0006] obtaining a matrix;

[0007] Disposing a chip on a substrate;

[0008] A package body is formed on the substrate, wherein the package body has a top through hole, and the top through hole exposes a temperature measurement area of ​​the chip;

[0009] A stopper is provided in the top through hole, and an end of the stopper covers the temperature measuring area;

[0010] Insulating colloid is filled between the packaging body, the substrate and the stopper.

[0011] Further, the stopper is a hollow structure; or,

[0012] The stopper is a temperature measuring structure.

[0013] Furthermore, when the stopper is a hollow structure, the stopper includes: a tube body and a blocking column nested on the top of the tube body.

[0014] Furthermore, after the step of filling the insulating colloid between the package body, the substrate and the stopper, the processing method further comprises:

[0015] Solidify the insulating colloid;

[0016] The stopper is removed from the package body to expose the temperature measuring area.

[0017] Furthermore, between the step of arranging the chip on the substrate and the step of forming the package on the substrate, the processing method further comprises:

[0018] The first power terminal and the second power terminal are connected to the substrate, and both the first power terminal and the second power terminal are electrically conductively connected to the chip.

[0019] Furthermore, the step of forming a package body on a substrate includes:

[0020] obtaining a cover body and a shell;

[0021] The shell is connected between the base body and the cover body;

[0022] Wherein, the top through hole is formed on the cover body;

[0023] A first downward convex surrounding structure is formed on one side of the cover body facing the base body, and the first downward convex surrounding structure is arranged to wrap around the periphery of the first power terminal;

[0024] A second downward convex surrounding structure is formed on a side of the cover body facing the base body, and the second downward convex surrounding structure is wrapped around the periphery of the second power terminal.

[0025] Furthermore, the step of filling the insulating colloid between the packaging body, the substrate and the stopper comprises:

[0026] An insulating colloid is formed between the packaging body, the substrate and the stopper, and a side of the insulating colloid away from the substrate is higher than the bottom surface of the first downward convex surrounding structure and the bottom surface of the second downward convex surrounding structure.

[0027] According to another aspect of the present invention, a fixture for semiconductor device processing is provided. The fixture is used in the semiconductor device processing method described above. The fixture includes a frame and a limiting member arranged on the frame. The limiting member cooperates with the stopper to limit the position.

[0028] Furthermore, the clamp also includes a pressing member arranged on the frame, the pressing member is movably arranged along the vertical direction, and the pressing member is abutted and matched with the top end of the stopper.

[0029] Furthermore, the clamp also includes a mounting tube and a rod body, the rod body is movably arranged in the mounting tube along the vertical direction, and the clamping member includes a pressing plate, a first end of the pressing plate is connected to the rod body, and a second end of the pressing plate is abutted against the stopper.

[0030] Furthermore, a mounting groove is provided on the rod body, the pressure plate is hingedly connected to the rod body, and the pressure plate has an outward-swinging working position and a retracted position located in the mounting groove.

[0031] Furthermore, the limiting member is movably arranged on the frame, the limiting member comprises a limiting hole, and the stopper is passed through the limiting hole and abuts against the chip.

[0032] Furthermore, the frame includes a base and a support frame arranged on the base, and the mounting tube is movably arranged on the support frame.

[0033] Furthermore, the support frame includes a support beam and a support leg arranged between the support beam and the base, and the clamp also includes an adjusting beam, which is arranged crosswise with the support beam, and the adjusting beam is movably arranged on the support beam along the length direction of the support beam, and the limiting member is movably arranged on the adjusting beam along the length direction of the adjusting beam.

[0034] Furthermore, the supporting beam and the adjusting beam are arranged vertically.

[0035] When the technical solution of the present invention is applied, when processing a semiconductor device, a substrate is first obtained, and then a chip is arranged on the substrate. A package is formed on the substrate, and the top through hole of the package can expose the temperature measurement area of ​​the chip. A stopper is inserted into the top through hole, and the end of the stopper covers the temperature measurement area. An insulating colloid is filled between the package, the substrate and the stopper. Through the above-mentioned setting, the end of the stopper covers the temperature measurement area, so that when the insulating colloid is filled between the package, the substrate and the stopper, the insulating colloid will not cover the temperature measurement area, thereby facilitating the measurement of the junction temperature of the semiconductor device through the temperature measurement area, avoiding the need to stop the semiconductor device from being used when measuring the junction temperature of the semiconductor device, and then removing the outer shell of the semiconductor device to expose the chip, thereby avoiding possible damage to the semiconductor device when removing the outer shell of the semiconductor device. Therefore, the technical solution of the present application effectively solves the problem in the related art that when measuring the junction temperature of the semiconductor device, the outer shell of the semiconductor device needs to be removed, which may cause damage to the semiconductor device. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] The drawings constituting a part of the present application are used to provide a further understanding of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings:

[0037] Figure 1 A schematic flow chart of an embodiment of a method for processing a semiconductor device according to the present invention is shown;

[0038] Figure 2 Shows Figure 1 A schematic flow chart of steps S31 to S34 of a method for processing a semiconductor device;

[0039] Figure 3 Shows Figure 1 A schematic flow chart of step S51 of a method for processing a semiconductor device;

[0040] Figure 4 A schematic diagram of the three-dimensional structure of a semiconductor device processed by the method for processing a semiconductor device according to the present invention is shown;

[0041] Figure 5 Shows Figure 4 Schematic diagram of the exploded structure of a semiconductor device;

[0042] Figure 6 Shows Figure 5 A schematic diagram of a three-dimensional structure of a substrate of a semiconductor device;

[0043] Figure 7 Shows Figure 5 A schematic diagram of a three-dimensional structure of a cover body of a semiconductor device;

[0044] Figure 8 A schematic diagram of the three-dimensional structure of an embodiment of a fixture for semiconductor device processing according to the present invention is shown;

[0045] Fig. 9 Shows Figure 8 A schematic diagram of a three-dimensional structure of a fixture connected to a semiconductor device;

[0046] Fig.10 Shows Figure 8 A schematic diagram of the exploded structure of the mounting tube and the rod body of the clamp;

[0047] Fig.11 Shows Figure 8 Schematic cross-sectional view of the fixture.

[0048] The above drawings include the following reference numerals:

[0049] 10. substrate; 20. chip; 30. package body; 31. top through hole; 32. cover body; 321. first downward convex surrounding structure; 322. second downward convex surrounding structure; 33. shell; 40. stopper; 41. tube body; 42. blocking column; 50. first power terminal; 60. second power terminal; 100. rack; 101. base; 102. support frame; 1021. support beam; 1022. support leg; 110. limiter; 111. limiter hole; 120. clamping member; 121. pressure plate; 130. mounting tube; 140. rod body; 141. mounting groove; 150. adjusting beam. DETAILED DESCRIPTION

[0050] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all the embodiments. The following description of at least one exemplary embodiment is actually only illustrative and is by no means intended to limit the present invention and its application or use. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0051] It should be noted that the terms used herein are only for describing specific embodiments and are not intended to limit the exemplary embodiments according to the present application. As used herein, unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. In addition, it should be understood that when the terms "comprise" and / or "include" are used in this specification, it indicates the presence of features, steps, operations, devices, components and / or combinations thereof.

[0052] Unless otherwise specifically stated, the relative arrangement, numerical expressions and numerical values ​​of the parts and steps set forth in these embodiments do not limit the scope of the present invention. Meanwhile, it should be understood that, for ease of description, the sizes of the various parts shown in the accompanying drawings are not drawn according to the actual proportional relationship. The technology, method and equipment known to those of ordinary skill in the relevant art may not be discussed in detail, but in appropriate cases, the technology, method and equipment should be considered as a part of the specification. In all examples shown and discussed here, any specific value should be interpreted as being merely exemplary, rather than as a limitation. Therefore, other examples of exemplary embodiments may have different values. It should be noted that similar reference numerals and letters represent similar items in the following drawings, and therefore, once a certain item is defined in an accompanying drawing, it does not need to be further discussed in subsequent drawings.

[0053] In view of the current situation that the temperature of semiconductor devices is measured based on the electrical parameter method commonly used, the device can only be removed and installed in a special test circuit for testing, and the test cycle is long, this embodiment proposes a non-contact infrared temperature measurement method that does not require the operation of the semiconductor device to be suspended, and can simply, conveniently and quickly obtain the junction temperature of the chip. Based on this method, a processing fixture for semiconductor devices suitable for infrared temperature measurement is proposed. The junction temperature of semiconductor devices is measured by infrared temperature measurement, and there is no need to build a special test circuit for the device. The junction temperature of the semiconductor device can be measured online during operation, and the temperature distribution of the chip surface within a certain range can be obtained. The chip junction temperature can be obtained conveniently and intuitively, which helps to speed up the packaging structure design and process development iteration. The fixture can directly fix the semiconductor device, has a three-dimensional movement function, and is suitable for power devices of different sizes. That is, the processing method of the semiconductor device using the present embodiment can meet the requirement of measuring the junction temperature of the power semiconductor chip during service after packaging, overcome the shortcomings of the existing power devices such as the inability to measure the junction temperature during early service and shorten the service cycle, realize the online monitoring of the chip junction temperature of the semiconductor device, meet the requirements of the junction temperature measurement of the semiconductor device, and timely understand the health status of the device so as to formulate reasonable control strategies and take countermeasures to ensure the safe and stable operation of the device.

[0054] Advantages of the technical solution of this embodiment:

[0055] (1) In this embodiment, by providing a top through hole 31 and designing a set of three-dimensional movable potting fixtures, a certain area on the surface of the chip 20 is not covered by the potting material during the potting process, so that the surface temperature of the chip can be measured using infrared temperature measurement technology;

[0056] (2) It can realize the junction temperature measurement of semiconductor devices during service, without the need to build a special chip junction temperature measurement circuit, which is convenient and efficient;

[0057] (3) Junction temperature measurement during the service life of semiconductor devices facilitates timely understanding of the health status of the devices and extends the service life of the devices;

[0058] (4) The existing electrical parameter junction temperature measurement requires a special test circuit and the device needs to be tested when the device is not in service. The junction temperature measurement during service improves the efficiency of device life monitoring and operational reliability.

[0059] Highlights of the technical solution of this embodiment:

[0060] (1) Compared with the current power device that completely covers the chip surface with potting, this solution can achieve a certain area of ​​the chip surface without potting material coverage;

[0061] (2) Compared with the current electrical junction temperature measurement of power devices, the semiconductor device processed by the processing method of this embodiment does not need to be disassembled when measuring the temperature, and a dedicated independent junction temperature measurement circuit is built separately;

[0062] (3) It can realize the measurement of power devices in service, which can extend the service life of the devices, avoid disassembly, and improve the service reliability of the devices;

[0063] (4) A top through hole 31 is provided on the cover 32 to enable infrared measurement of the chip junction temperature.

[0064] like Figure 1 and Figure 4 As shown, the processing method of the semiconductor device of this embodiment includes:

[0065] Step S10: obtaining a substrate 10;

[0066] Step S20: placing a chip 20 on the substrate 10;

[0067] Step S30: forming a package body 30 on the substrate 10, wherein the package body 30 has a top through hole 31, and the top through hole 31 exposes the temperature measurement area of ​​the chip 20;

[0068] Step S40: a stopper 40 is inserted into the top through hole 31, and an end of the stopper 40 covers the temperature measurement area;

[0069] Step S50 : filling insulating colloid between the package body 30 , the base body 10 and the stopper 40 .

[0070] When the technical solution of this embodiment is applied, when processing a semiconductor device, a substrate 10 is first obtained, and then a chip 20 is arranged on the substrate 10. A package 30 is formed on the substrate 10, and the top through hole of the package 30 can expose the temperature measurement area of ​​the chip 20. A stopper 40 is inserted into the top through hole 31, and the end of the stopper 40 covers the temperature measurement area. An insulating colloid is filled between the package 30, the substrate 10 and the stopper 40. Through the above-mentioned setting, the end of the stopper 40 covers the temperature measurement area, so that when the insulating colloid is filled between the package 30, the substrate 10 and the stopper 40, the insulating colloid will not cover the temperature measurement area, thereby facilitating the measurement of the junction temperature of the semiconductor device through the temperature measurement area, avoiding the need to stop the semiconductor device from being used when measuring the junction temperature of the semiconductor device, and then removing the outer shell of the semiconductor device to expose the chip, thereby avoiding possible damage to the semiconductor device when removing the outer shell of the semiconductor device. Therefore, the technical solution of this embodiment effectively solves the problem in the related art that when measuring the junction temperature of a semiconductor device, the outer shell of the semiconductor device needs to be removed, which may cause damage to the semiconductor device.

[0071] It should be noted that the shape of the temperature measurement area is circular, quadrilateral or other geometric shapes, and correspondingly, the shape of the top through hole can also be circular, quadrilateral or other geometric shapes.

[0072] The area of ​​the temperature measurement region of the chip 20 of the present embodiment is smaller than the area of ​​the side of the chip 20 away from the substrate 10, that is, the top through hole 31 exposes a partial area of ​​the side of the chip 20 away from the substrate 10, but does not expose the entire area of ​​the side of the chip 20 away from the substrate 10, that is, the area of ​​the chip 20 exposed to the external environment is reduced, which can reduce the probability of physical damage to the side of the chip 20 away from the substrate 10, and can also reduce the probability of dust adhering to the surface of the chip 20, reduce the erosion of the chip 20 by water vapor, and also make it possible to achieve temperature measurement by opening a smaller top through hole 31.

[0073] Furthermore, the top through hole 31 of the present embodiment exposes a partial area of ​​the chip 20, so that the area of ​​the chip 20 not exposed by the top through hole 31 can be connected to the bonding wire, that is, the chip also has a first conductive area, and the bonding wire is connected to the first conductive area, which facilitates the connection of the bonding wire and makes it easier to set the structure of the chip 20 and the structure of the substrate 10.

[0074] The insulating colloid can be silicone gel, which is required to have a temperature resistance of at least greater than 175°C. Considering the insulation requirements, the potting silicone gel should meet certain thickness requirements. The potting process is vacuum potting to ensure that bubbles are completely removed.

[0075] By setting the top through hole 31 and making the top through hole 31 cooperate with the stopper 40, the surface of the temperature measuring area of ​​the chip and the inside of the packaging potting material can be kept unfilled during the potting process and after the potting material is solidified, providing a transmission path for the infrared signal.

[0076] Step S10: The step of obtaining the substrate 10 comprises:

[0077] Step S11: obtaining a substrate;

[0078] Step S12: forming a first conductive portion and a second conductive portion on the substrate;

[0079] Step S13: forming a third conductive portion and a fourth conductive portion on the substrate.

[0080] Through the above arrangement, the first conductive part, the second conductive part, the third conductive part and the fourth conductive part can be obtained, which is convenient for the subsequent connection of chips.

[0081] Step S20: The step of arranging the chip 20 on the substrate 10 includes:

[0082] Step S21: connecting a chip to the first conductive portion.

[0083] Through the above arrangement, the chip 20 can be connected to the first conductive part, thereby achieving connection between the chip 20 and the substrate.

[0084] Specifically, the first conductive part and the chip 20 may be connected by a sintering process, or may be connected by a welding process.

[0085] The sintering process may be a nano-silver sintering process.

[0086] The nano-silver sintering process is an innovative material connection technology, which is particularly suitable for the manufacture of electronic packaging and high-power devices. This process forms a connection layer with high conductivity and high thermal conductivity by sintering nano-scale silver particles at low temperature, which has significant technical advantages and wide application potential. The nano-silver sintering process has become an important technology in the manufacture of electronic packaging and high-power devices due to its low-temperature sintering, high conductivity, high thermal conductivity, mechanical strength and environmental protection characteristics. It not only improves the performance and reliability of electronic devices, but also provides a green and environmentally friendly solution. The benefits of using the nano-silver sintering process are as follows:

[0087] 1. Low-temperature sintering: A major advantage of the nanosilver sintering process is its low-temperature sintering characteristics. Conventional metal sintering processes usually require high temperatures (over 800°C) to achieve effective sintering, while nanosilver sintering can be completed between 200°C and 300°C. This low-temperature sintering characteristic makes the process particularly suitable for temperature-sensitive electronic components and materials, such as certain semiconductors and organic materials, thereby avoiding thermal damage and material degradation that may be caused by high temperatures.

[0088] 2. High conductivity: The connection layer formed by the nanosilver particles after sintering has excellent conductivity. As a metal, silver has the highest conductivity among all metals. The nanosilver sintering process can achieve close connection between silver particles at a lower temperature, thereby forming a low-resistance connection layer. This can significantly improve the performance and efficiency of electronic devices and circuit boards that require efficient electrical transmission.

[0089] 3. High thermal conductivity: In addition to high electrical conductivity, the nanosilver sintered layer also has high thermal conductivity. This means that it can effectively dissipate heat and avoid failure or performance degradation of electronic devices due to overheating. In high-power devices such as power semiconductors, LEDs, and high-frequency communication equipment, good thermal management is a key factor in ensuring their stability and long life.

[0090] 4. Mechanical strength and stability: The nanosilver sintering process can achieve close bonding of silver particles at a lower temperature, forming a connection layer with high mechanical strength and stability. Compared with traditional welding methods, the nanosilver sintered layer has higher reliability and durability, and can better resist fatigue and damage caused by mechanical stress and thermal cycles.

[0091] 5. Environmentally friendly features: The nanosilver sintering process does not contain lead and meets environmental protection requirements. Traditional soldering processes often use lead-containing solder, which, despite its superior performance, is harmful to the environment and health. Nanosilver sintering provides a green alternative that is in line with the environmental development trend in the future electronic packaging and manufacturing fields.

[0092] 6. Process flexibility: Nanosilver sintering materials are usually in the form of paste, which can be coated and printed by a variety of methods such as screen printing, spraying or dispensing. This flexibility enables the process to adapt to different manufacturing needs and design requirements, providing higher design freedom and manufacturing efficiency.

[0093] like Fig.11 As shown, in this embodiment, the stopper 40 is a hollow structure; or, the stopper 40 is a temperature measuring structure.

[0094] Through the above arrangement, when the stopper 40 is a hollow structure, it is convenient to use an infrared temperature measuring element to measure the temperature measuring area of ​​the chip 20, thereby obtaining the junction temperature of the semiconductor device. Of course, the temperature measuring probe can also be inserted into the stopper, and the temperature measuring probe contacts the temperature measuring area to achieve temperature measurement of the chip 20. The stopper 40 is a temperature measuring structure, so that the stopper 40 can not only stop the insulating colloid to prevent the insulating colloid from covering the temperature measuring area, but also play a temperature measuring role to achieve temperature measurement of the chip.

[0095] like Fig.11 As shown, in this embodiment, when the stopper 40 is a hollow structure, the stopper 40 includes: a tube body 41 and a blocking column 42 nested on the top of the tube body 41 .

[0096] Through the above arrangement, the tube body 41 can abut against the temperature measurement area of ​​the chip 20, so as to avoid the insulating colloid covering the temperature measurement area and affecting the measurement of the junction temperature of the semiconductor device when the insulating colloid is filled between the package body 30, the substrate 10 and the stopper 40. The blocking column 42 can block the tube body 41 and isolate the temperature measurement area of ​​the chip 20 from the external environment.

[0097] It should be noted that the first end of the tube body 41 is in contact with the temperature measurement area, and the blocking column 42 is connected to the second end of the tube body 41. The blocking column 42 and the second end of the tube body 41 can be connected by threads, and of course, the blocking column 42 and the second end of the tube body 41 can also be connected by a buckle. Specifically, the first end of the blocking column 42 is located in the tube body 41, and the middle part of the blocking column 42 is connected to the second end of the tube body 41.

[0098] like Fig.11 As shown, in this embodiment, after step S50: filling the insulating colloid between the package body 30, the substrate 10 and the stopper 40, the processing method further includes:

[0099] Step S60: solidifying the insulating colloid;

[0100] Step S70: taking the stopper 40 out of the packaging body 30 to expose the temperature measurement area.

[0101] Through the above method, after the insulating colloid is cured, the insulating colloid can protect the chip 20. The stopper 40 is taken out from the package 30 to expose the temperature measurement area, which is convenient for the infrared temperature measuring element to measure the temperature of the temperature measurement area of ​​the chip. Of course, it is also convenient for the temperature measuring probe to extend into the package 30 and contact the chip 20 to measure the temperature of the chip 20.

[0102] When the insulating colloid is solidified, the fixture and the semiconductor device are placed in a high-temperature furnace for solidification. After the encapsulation material is solidified, the semiconductor device is removed from the fixture, and the stopper 40 or the blocking column 42 is removed separately to expose the temperature measurement area of ​​the chip 20, and the temperature of the clean chip surface is measured using an infrared thermometer.

[0103] When the stopper 40 is completely removed, the top through hole 31 can be sealed with a plate to reduce the probability of physical damage to the side of the chip 20 away from the substrate 10, reduce the probability of dust adhering to the surface of the chip 20, and reduce the erosion of the chip 20 by water vapor.

[0104] When the blocking column 42 is removed separately, after the temperature measurement is completed, the blocking column 42 can be connected to the tube body 41 to achieve blocking.

[0105] like Figure 5 and Figure 6 As shown, in this embodiment, between step S20: the step of arranging the chip 20 on the substrate 10 and step S30: the step of forming the package body 30 on the substrate 10, the processing method further includes:

[0106] Step S25 : connecting the first power terminal 50 and the second power terminal 60 on the substrate 10 , and making the first power terminal 50 and the second power terminal 60 both conductively connected to the chip 20 .

[0107] Through the above arrangement, the first power terminal 50 and the second power terminal 60 can be conductively connected to the chip 20, so that current can flow between the first power terminal 50, the chip 20 and the second power terminal 60, ensuring the normal use of the semiconductor device.

[0108] The first power terminal 50 is connected to the drain of the chip 20 . The second power terminal 60 is connected to the source of the chip 20 .

[0109] Step S25: The step of connecting the first power terminal 50 and the second power terminal 60 on the substrate 10 and making the first power terminal 50 and the second power terminal 60 conductively connected to the chip 20 includes:

[0110] Step S251: connecting the first power terminal 50 to the first conductive part;

[0111] Step S252: connecting the second power terminal 60 to the second conductive portion;

[0112] Step S253: connecting the first conductive region of the chip 20 to the second conductive portion.

[0113] Through the above configuration, current can flow between the first power terminal 50 , the chip 20 and the second power terminal 60 .

[0114] The first conductive area of ​​the chip 20 is connected to the second conductive part by a bonding wire. The first conductive area of ​​the chip 20 is connected to the second conductive part by a bonding wire, and the temperature measurement area should avoid the bonding wire connection area. The first conductive area refers to the drain of the chip 20.

[0115] Step S25: Connecting the first power terminal 50 and the second power terminal 60 on the substrate 10, and making the first power terminal 50 and the second power terminal 60 both conductively connected to the chip 20. The following steps include:

[0116] Step S26: connecting the control terminal to the substrate 10, and making the control terminal conductively connected to the chip;

[0117] Step S27: Connect a Kelvin source terminal to the substrate 10 and make the Kelvin source terminal conductively connected to the chip.

[0118] Through the above configuration, the control terminal can control the operation and stop of the chip 20. The Kelvin source terminal can reduce the loss during the switching process of the semiconductor device.

[0119] Step S26: Connecting the control terminal to the substrate 10 and making the control terminal conductively connected to the chip 20 includes:

[0120] Step S261: connecting the control terminal to the third conductive part;

[0121] Step S262 : connecting the third conductive portion to the second conductive region of the chip 20 .

[0122] Through the above arrangement, the connection between the control terminal and the chip 20 can be achieved, so that the control terminal can control whether the chip 20 is running.

[0123] The second conductive region refers to the gate of the chip 20. The first conductive portion and the second conductive portion are arranged at intervals in the first direction, the third conductive portion and the fourth conductive portion are arranged at intervals in the first direction, the second conductive portion and the third conductive portion are arranged at intervals in the second direction, and the first conductive portion and the fourth conductive portion are arranged at intervals in the second direction. This makes the arrangement of the semiconductor device more reasonable, and thus makes the structure of the package body 30 more reasonable.

[0124] The substrate, the first conductive part, the second conductive part, the third conductive part and the fourth conductive part form a copper-clad ceramic substrate.

[0125] The above copper-clad ceramic structure can be made in the following ways:

[0126] DBC (Direct Bonded Copper): A composite substrate is made by sintering copper foil directly to the surface of Al2O3 and AlN ceramics at high temperature through hot melt bonding. Due to the high eutectic bonding strength between copper foil and ceramics, the copper thickness of DBC substrates can generally be 100μm-600μm. At the same time, ceramics and copper have good thermal conductivity, and DBC substrates also have good thermal stability.

[0127] DPC (Direct Plating Copper): It is a ceramic circuit processing technology developed on the basis of ceramic thin film processing. Ceramic is used as the circuit substrate, a metal layer is composited on the surface of the substrate by sputtering, and the circuit is formed by electroplating and photolithography.

[0128] AMB (Active Metal Brazing): AMB is developed based on DBC technology. At high temperature, AgCu solder containing active elements Ti and Zr wets and reacts at the interface between ceramic and metal, thereby achieving heterogeneous bonding between ceramic and metal.

[0129] Step S27: The step of connecting the Kelvin source terminal to the substrate 10 and making the Kelvin source terminal conductively connected to the chip includes:

[0130] Step S271: connecting the Kelvin source terminal to the fourth conductive portion;

[0131] Step S272: connecting the fourth conductive portion to the third conductive region of the chip.

[0132] Through the above arrangement, the Kelvin source terminal can be connected to the chip, thereby reducing the loss during the switching process of the semiconductor device.

[0133] The third conductive region refers to the Kelvin source of the chip 20 .

[0134] like Figure 2 , Figure 5 as well as Figure 7 As shown, in this embodiment, step S30: the step of forming the package body 30 on the substrate 10 includes:

[0135] Step S31: obtaining the cover 32 and the shell 33;

[0136] Step S32: the housing 33 is connected between the base 10 and the cover 32;

[0137] Wherein, the top through hole 31 is formed on the cover body 32;

[0138] Step S33: forming a first downward convex surrounding structure 321 on the side of the cover body 32 facing the base body 10 , wherein the first downward convex surrounding structure 321 wraps around the outer periphery of the first power terminal 50 ;

[0139] Step S34 : forming a second downward convex surrounding structure 322 on the side of the cover body 32 facing the base body 10 , wherein the second downward convex surrounding structure 322 wraps around the outer periphery of the second power terminal 60 .

[0140] Through the above arrangement, the housing 33 is connected between the base 10 and the cover 32, so that the chip 20 can be covered under the action of the cover 32 and the base 10. The top through hole 31 is formed on the cover 32, so that the stopper 40 can pass through the cover 32 and contact the chip 20. The first lower convex surrounding structure 321 can wrap the first power terminal 50, so that the first lower convex surrounding structure 321 can protect the first power terminal 50. The second lower convex surrounding structure 322 can wrap the second power terminal 60, so that the second lower convex surrounding structure 322 can protect the second power terminal 60.

[0141] It should be noted that the cover 32 and the housing 33 can be obtained by injection molding. The cover 32 and the housing 33 can be connected by bonding, or of course, by screws.

[0142] The cover body 32 is provided with a first terminal extension hole and a second terminal extension hole, the first power terminal 50 extends out of the package body 30 from the first terminal extension hole, and the second power terminal 60 extends out of the package body 30 from the second terminal extension hole. The cover body 32 is provided with a third terminal extension hole and a fourth terminal extension hole, the control terminal extends out of the package body 30 from the third terminal extension hole, and the Kelvin source terminal extends out of the package body 30 from the fourth terminal extension hole.

[0143] The cover body 32 has a concave portion, and the third terminal extension hole and the fourth terminal extension hole are arranged on the concave portion.

[0144] The cover body 32 is designed with sunken grooves or multiple raised baffles around the first terminal extension hole to extend the creepage distance, and the cover body 32 is also designed with sunken grooves or multiple raised baffles around the second terminal extension hole to extend the creepage distance.

[0145] The shape of the sunken groove surrounding the first terminal extension hole on the cover body 32 is the same as the geometric shape of the first terminal extension hole, or adopts a ring-shaped rectangular geometric structure. The shape of the sunken groove surrounding the second terminal extension hole on the cover body 32 is the same as the geometric shape of the second terminal extension hole, or adopts a ring-shaped rectangular geometric structure.

[0146] The outer shell 33 may be designed with multiple grooves around it, but is not limited to, to increase the creepage distance between the upper and lower surfaces of the package body 30 .

[0147] The housing 33 may be made of, but is not limited to, sheet molding compound (SMC), and connected to the substrate by bonding.

[0148] The housing 33 may also be integrally formed by epoxy resin. When the epoxy resin is used for integral forming, except for the first power terminal 50 and the second power terminal 60, the epoxy resin wraps around the substrate as a whole, and the bottom surface of the substrate is exposed to the outside, and an external heat sink or radiator may be connected.

[0149] The insulation design of the package body 30 is in accordance with the standard, and the insulation gap and creepage distance meet the required insulation requirements.

[0150] Step S30: The step of forming the package body 30 on the substrate 10 further includes:

[0151] Step S35: forming a third downward convex surrounding structure on the side of the cover body 32 facing the base body 10, wherein the third downward convex surrounding structure wraps around the periphery of the control terminal;

[0152] Step S36: forming a fourth downward convex surrounding structure on the side of the cover body 32 facing the base body 10, wherein the fourth downward convex surrounding structure wraps the periphery of the Kelvin source terminal.

[0153] Through the above arrangement, the third downward convex surrounding structure can wrap the control terminal, thereby protecting the control terminal. The fourth downward convex surrounding structure can wrap the Kelvin source terminal, thereby protecting the Kelvin source terminal.

[0154] The encapsulated silicone gel should at least submerge to a certain depth below the first downward convex enclosing structure 321, the second downward convex enclosing structure 322, the third downward convex enclosing structure, and the fourth downward convex enclosing structure. This can isolate the interior of the package 30 from the external environment, and compared with completely encapsulating the silicone gel between the shell 33, the cover 32, and the base 10, the manufacturing cost can be reduced.

[0155] After the insulating colloid is encapsulated, the cover body 32 is placed on the outer shell 33. Under the extrusion of the first downward convex enclosing structure 321, the second downward convex enclosing structure 322, the third downward convex enclosing structure and the fourth downward convex enclosing structure, the insulating colloid can flow, and then the side of the insulating colloid away from the substrate is higher than the bottom surface of the first downward convex enclosing structure 321, the bottom surface of the second downward convex enclosing structure 322, the bottom surface of the third downward convex enclosing structure and the bottom surface of the fourth downward convex enclosing structure, and then the insulating colloid is solidified.

[0156] The encapsulating silicone gel completely fills all the space areas except the temperature measuring area of ​​the chip 20 corresponding to the top through hole 31 which is not covered by the encapsulating material, and completely wraps around the stopper 40 in contact with the upper surface of the chip 20 .

[0157] By providing the first downward convex enclosing structure 321 , the second downward convex enclosing structure 322 , the third downward convex enclosing structure and the fourth downward convex enclosing structure, the creepage distance of the semiconductor device can be increased, the insulation performance of the semiconductor device can be ensured, and the possibility of breakdown of the semiconductor device can be reduced.

[0158] The first downward convex enclosing structure 321 includes at least one annular enclosing plate. The second downward convex enclosing structure 322 , the third downward convex enclosing structure and the fourth downward convex enclosing structure are similar in structure to the first downward convex enclosing structure 321 .

[0159] When the first downward convex enclosing structure 321 includes a plurality of annular enclosure plates, the plurality of annular enclosure plates are spaced apart and nested.

[0160] like Figure 3 As shown, in this embodiment, step S50: the step of filling the insulating colloid between the package body 30, the substrate 10 and the stopper 40 includes:

[0161] Step S51 : forming an insulating colloid between the packaging body 30 , the substrate 10 , and the stopper 40 , and a side of the insulating colloid away from the substrate 10 is higher than the bottom surface of the first downward convex enclosing structure 321 and the bottom surface of the second downward convex enclosing structure 322 .

[0162] Through the above-mentioned arrangement, when the insulating colloid is formed, the side of the insulating colloid away from the substrate 10 is higher than the bottom surface of the first downward convex enclosing structure 321 and the bottom surface of the second downward convex enclosing structure 322, so that the insulating colloid can submerge at least a portion of the first downward convex enclosing structure 321 and at least a portion of the second downward convex enclosing structure 322, that is, the gap between the insulating colloid and the cover body 32 can be isolated from the outside of the package body 30, and then the insulating colloid can isolate the inside of the package body 30 from the outside of the package body 30, thereby realizing the insulation and sealing of the semiconductor device.

[0163] It should be noted that the side of the insulating colloid away from the substrate 10 is also higher than the bottom surface of the third and fourth downward convex surrounding structures. All spaces between the package body 30 and the substrate 10 may be filled with insulating colloid.

[0164] like Figure 8 As shown, the fixture for semiconductor device processing of this embodiment is used in the above-mentioned semiconductor device processing method. The fixture includes a frame 100 and a limit member 110 arranged on the frame 100, and the limit member 110 cooperates with the stop member 40 in a limiting manner. The frame can support the limit member. The limit member 110 can cooperate with the stop member 40 in a limiting manner, that is, the limit member 110 can limit the position of the stop member 40, so that the stop member 40 passes through the top through hole 31 and extends into the package body 30. When the stop member 40 contacts the temperature measurement area of ​​the chip 20, the position of the stop member 40 is more stable. The stop member 40 can stop the insulating colloid to prevent the insulating colloid from covering the temperature measurement area of ​​the chip 20.

[0165] like Figure 8 and Fig. 9 As shown, in this embodiment, the clamp further includes a pressing member 120 disposed on the frame 100, the pressing member 120 is movably disposed in the vertical direction, and the pressing member 120 is abutted against the top end of the stopper 40. The frame 100 can support the pressing member 120, and the pressing member 120 is movably disposed in the vertical direction, so that the pressing member 120 can press the stopper 40, so that the stopper 40 can stably contact with the temperature measurement area of ​​the chip 20, and then the stopper 40 can play a stopping role, so as to prevent the insulating colloid from covering the temperature measurement area of ​​the chip 20 and affecting the measurement of the junction temperature of the semiconductor device.

[0166] The second end of the blocking column 42 is in abutment with the pressing member 120 .

[0167] like Fig. 9 and Fig.10 As shown, in this embodiment, the clamp further includes a mounting tube 130 and a rod body 140, the rod body 140 is movably disposed in the mounting tube 130 along the vertical direction, and the pressing member 120 includes a pressing plate 121, the first end of the pressing plate 121 is connected to the rod body 140, and the second end of the pressing plate 121 is in abutment with the stopper 40. The rod body 140 can move vertically in the mounting tube 130, and the first end of the pressing plate 121 is connected to the rod body 140, so that when the pressing plate 121 moves, the rod body 140 can also move therewith, so that the pressing plate 121 presses the stopper 40, that is, the second end of the pressing plate 121 presses the stopper 40.

[0168] like Fig.10As shown, in this embodiment, the rod body 140 is provided with a mounting groove 141, and the pressing plate 121 is hingedly connected to the rod body 140, and the pressing plate 121 has a working position of swinging outward and a retracted position located in the mounting groove 141. The pressing plate 121 is hingedly connected to the rod body 140, so that the pressing plate 121 is convenient to swing relative to the rod body 140, and then convenient to switch between the working position and the retracted position. When the pressing plate 121 is in the working position, the second end of the pressing plate 121 is located outside the mounting groove 141, so that the second end of the pressing plate 121 is convenient to abut against the stopper 40 and press the stopper 40. When the pressing plate 121 is in the retracted position, the pressing plate 121 can be completely located in the mounting groove 141. At this time, the pressing plate 121 will not interfere with the movement of the rod body 140 relative to the mounting cylinder 130, that is, the rod body 140 and the pressing plate 121 can be moved into the mounting cylinder 130, reducing the space occupied by the mounting cylinder 130.

[0169] The pressing plate 121 is hingedly connected to the rod body 140 , which means that the pressing plate 121 is connected to the rod body 140 via a connecting shaft, and the pressing plate 121 is rotatably arranged around the axis of the connecting shaft.

[0170] The clamp further includes a locking structure, which is connected between the pressing plate 121 and the rod body 140. The locking structure includes a locking pin. When the pressing plate 121 is in the working position, the locking structure is in a locked state, at which time the locking pin passes through the rod body 140 and the pressing plate 121 to fix the rod body 140 and the pressing plate 121. When the locking structure is in an unlocked state, the locking pin is separated from the rod body 140 and the pressing plate 121.

[0171] like Figure 8 As shown, in this embodiment, the limiter 110 is movably arranged on the frame 100, and the limiter 110 includes a limiter hole 111. The stopper 40 is penetrated in the limiter hole 111 and abuts against the chip 20. The limiter 110 is movably arranged, so that the limiter 110 can be moved according to the specific position of the top through hole 31, so that the limiter 110 moves to the top of the top through hole 31, so that the limiter hole 111 is located below the top through hole 31, so that the stopper 40 abuts against the chip 20 after passing through the limiter hole 111 and the top through hole 31 in sequence.

[0172] like Fig. 9 and Fig.10 As shown, in this embodiment, the frame 100 includes a base 101 and a support frame 102 disposed on the base 101, and the mounting cylinder 130 is movably disposed on the support frame 102. The base 101 can support the support frame 102. The mounting cylinder 130 is movably disposed on the support frame 102, so that the mounting cylinder 130 can drive the pressing plate 121 to move, so that the pressing plate 121 moves to the position where the stopper 40 is located, so that the pressing plate 121 can press the stopper 40.

[0173] A plurality of connection holes are formed on the base 101, and the substrate 10 is connected to parts of the plurality of connection holes, so that the semiconductor device can be easily fixed.

[0174] like Fig. 9 As shown, in this embodiment, the support frame 102 includes a support beam 1021 and a support leg 1022 disposed between the support beam 1021 and the base 101, and the fixture further includes an adjustment beam 150, which is disposed crosswise with the support beam 1021, and the adjustment beam 150 is movably disposed on the support beam 1021 along the length direction of the support beam 1021, and the limiter 110 is movably disposed on the adjustment beam 150 along the length direction of the adjustment beam 150. The support leg 1022 can support the support beam 1021. This allows the support beam 1021 to more stably support the mounting cylinder 130. The adjustment beam 150 is movably disposed on the support beam 1021 along the length direction of the support beam 1021, so that the adjustment beam 150 can drive the limiter 110 to move along the length direction of the support beam 1021. The limit member 110 can move on the adjusting beam 150 along the length direction of the adjusting beam 150, so that the limit member 110 can move along the length direction of the supporting beam 1021 and along the length direction of the adjusting beam 150, thereby enabling the limit member 110 to move to more positions, that is, the limit member 110 moves to the position where the stop member 40 is located, and can play a limiting role on the stop member 40.

[0175] like Fig. 9 As shown, in this embodiment, the support beam 1021 and the adjustment beam 150 are vertically arranged. Through the above arrangement, the limiter 110 can move more accurately, so that the limiter 110 can cooperate with the stopper 40 more accurately, so that the position of the stopper 40 is more stable.

[0176] The support beam 1021 is provided with a first guide convex plate, and the adjustment beam 150 is provided with a first guide groove, and the first guide convex plate cooperates with the first guide groove in a guiding manner. The mounting cylinder 130 is also provided with a first guide groove. The limiting member 110 includes a limiting plate and a limiting block provided on the limiting plate, and a slide groove is provided on the limiting block. The adjustment beam 150 is inserted into the slide groove, and the adjustment beam cooperates with the slide groove in a guiding manner. The limiting hole is provided on the limiting plate.

[0177] The supporting frame 102 includes a plurality of support frames 102 disposed at intervals, and the adjusting beam 150 includes a plurality of support beams 150 disposed at intervals.

[0178] The frame further includes a lifting member movably disposed on the stopper 110 or the frame 100. The lifting member has a lifting position and an avoidance position. When the lifting member is in the lifting position, the lifting member lifts the cover 32. When the lifting member is in the avoidance position, the lifting member avoids the cover 32. The cover 32 can move along the height direction of the frame so that the cover 32 moves toward or away from the housing 33.

[0179] When the lifting member is at the lifting position, the lifting member can lift the cover 32 so that there is a gap between the cover 32 and the shell 33 . At this time, the insulating colloid can be poured into the shell 33 .

[0180] Specifically, before glue pouring, the stopper 40 passes through the cover 32, enters the shell 33, and abuts against the chip, and then the cover 32 is moved upward along the extension direction of the stopper 40 to allow a gap between the cover 32 and the shell 33, and then the cover 32 is lifted by the lifting member. Under the action of the lifting member, the cover 32 can maintain a gap with the shell 33, so that the insulating glue can flow into the shell 33 to achieve glue pouring. After the glue pouring is completed, the lifting member is moved to the avoidance position, and the cover 32 can move along the extension direction of the stopper 40 toward the shell 33 until the cover is set on the shell 33.

[0181] The extending direction of the stopper 40 is the same as the height direction of the frame 100 . The extending direction of the stopper 40 is the axial direction of the tube body 41 and also the axial direction of the blocking column 42 .

[0182] In this embodiment, the lifting member is movably arranged on the limiting member 110. The lifting member includes two lifting members arranged at intervals, and the two lifting members are respectively arranged on two side walls of the limiting member 110 that are opposite in the length direction. The limiting member 110 is provided with a second guide groove, and the lifting member includes a moving plate, a supporting plate, and a connecting plate connected between the moving plate and the supporting plate. The moving plate and the supporting plate extend toward the same side of the connecting plate. The moving plate is movably arranged on the limiting member 110, and the connecting plate extends along the height direction of the frame 100. When the lifting member is in the lifting position, the lifting plate supports the cover body.

[0183] The second guide groove is arranged on the limiting plate. The movable plate has a second guide convex plate, and the second guide convex plate is movably arranged in the second guide groove.

[0184] In this embodiment, the second guide groove extends along the length direction of the limiting member.

[0185] In other embodiments, the lifting member is movably disposed on the frame 100. The lifting member includes a block and a support plate disposed on the block. When the lifting member is in the lifting position, the support plate lifts the cover 32, and when the lifting member is in the avoiding position, the support plate avoids the cover 32.

[0186] Step S51: forming an insulating colloid between the package body 30, the substrate 10, and the stopper 40, wherein the side of the insulating colloid away from the substrate 10 is higher than the bottom surface of the first downward convex enclosing structure 321 and the bottom surface of the second downward convex enclosing structure 322, comprises:

[0187] Step S511: Cover the cover 32 on the housing 33;

[0188] Step S512: passing the stopper 40 through the top through hole 31 and abutting against the chip 20;

[0189] Step S513: moving the cover 32 upward along the extending direction of the stopper 40 to move the cover 32 away from the housing;

[0190] Step S514: moving the lifting member from the avoidance position to the lifting position to lift the cover body 32;

[0191] Step S515 : forming an insulating colloid between the packaging body 30 , the substrate 10 , and the stopper 40 .

[0192] Through the above-mentioned arrangement, an insulating colloid can be formed between the packaging body 30, the substrate 10, and the stopper 40, and after the insulating colloid is formed, the cover body 32 can move downward along the extension direction of the stopper 40 and be covered on the cover body 32 to avoid the insulating colloid being formed first. When the pressing member 120 is pressed on the stopper 40, the pressing member 120 and the stopper 40 limit the movement of the cover body 32, thereby avoiding the inability to cover the cover body 32 on the outer shell 33.

[0193] Step S51: forming an insulating colloid between the package body 30, the substrate 10, and the stopper 40, and the side of the insulating colloid away from the substrate 10 is higher than the bottom surface of the first downward convex enclosing structure 321 and the bottom surface of the second downward convex enclosing structure 322. The following steps include:

[0194] Step S52: moving the lifting member from the lifting position to the avoidance position to separate from the cover body 32;

[0195] Step S53 : moving the cover 32 toward the direction approaching the housing 33 and covering the housing 33 .

[0196] Through the above-mentioned arrangement, after the insulating colloid is formed, the cover body can be moved toward the direction close to the shell, and then the cover body 32 is covered on the shell 33. The cover body 32 squeezes the insulating colloid so that the side of the insulating colloid away from the substrate 10 is higher than the bottom surface of the first downward convex enclosing structure 321, the bottom surface of the second downward convex enclosing structure 322, the bottom surface of the third downward convex enclosing structure and the bottom surface of the fourth downward convex enclosing structure.

[0197] When the semiconductor device processing method of the present embodiment is used, a certain area is reserved on the non-bonding area on the surface of the chip 20 when the semiconductor device is packaged and potted, that is, the reserved area is not covered with potting material, so that the area on the surface of the chip 20 can be measured by infrared thermal imaging technology. Therefore, to achieve this purpose, it is necessary to use a hollow tubular tool to locate the non-bonding area on the surface of the chip 20 in advance when the semiconductor device is packaged and filled with potting material, and then take out the tool after the semiconductor device is packaged and the potting material is filled on the surface of the chip 20 and high-temperature cured, so that a certain area on the chip surface is reserved and not covered by the potting material, exposing the chip surface, which can be detected by the infrared thermometer.

[0198] It should be noted that the reserved area refers to the temperature measurement area of ​​the chip 20 . The hollow tubular tool refers to the stopper 40 .

[0199] This embodiment also designs a three-dimensional movable potting fixture (i.e., a fixture for semiconductor device processing), which is designed with a support beam 1021 and an adjustment beam 150 in the horizontal direction, and a mounting tube 130 and a rod body 140 in the vertical direction. It has the function of adjusting the dimensions in three coordinate directions, and can be adjusted according to the geometric dimensions of different semiconductor devices, and has strong compatibility. By adjusting the height of the rod body 140, the top of the stopper 40 can be pressurized and fixed during potting.

[0200] By providing the package body 30 with a top through hole 31 and using a fixture suitable for potting, it can be achieved that a certain area on the surface of the semiconductor device package chip 20 is not covered by the potting material, and the infrared signal can directly reach the exposed surface of the chip 20 (i.e., the temperature measurement area), thereby realizing infrared measurement of the junction temperature of the semiconductor device chip.

[0201] The concave design of the upper surface of the cover body 32 around the first terminal extension hole can meet the insulation design of the power terminals inside and outside the semiconductor device package. The concave design of the upper surface of the cover body 32 around the second terminal extension hole can meet the insulation design of the power terminals inside and outside the semiconductor device package. The design of the outer shell convex creepage multilayer wall can meet the insulation design of the power terminals inside and outside the semiconductor device package.

[0202] The fixture can fix the stopper 40 and the semiconductor device during the encapsulation and curing process, and has the functions of sliding in the horizontal direction and adjusting the height in the vertical direction, and is suitable for encapsulating devices of different sizes.

[0203] The processing method of this embodiment is applicable to the junction temperature measurement of a single-chip packaged device, and is also applicable to the junction temperature measurement of a multi-chip packaged device.

[0204] In the description of the present invention, it is necessary to understand that the directions or positional relationships indicated by directional words such as "front, back, up, down, left, right", "lateral, vertical, perpendicular, horizontal" and "top, bottom" are usually based on the directions or positional relationships shown in the drawings. They are only for the convenience of describing the present invention and simplifying the description. Unless otherwise specified, these directional words do not indicate or imply that the devices or elements referred to must have a specific direction or be constructed and operated in a specific direction. Therefore, they cannot be understood as limiting the scope of protection of the present invention. The directional words "inside and outside" refer to the inside and outside relative to the contours of each component itself.

[0205] For ease of description, spatially relative terms such as "above", "above", "on the upper surface of", "above", etc. may be used herein to describe the spatial positional relationship between a device or feature and other devices or features as shown in the figure. It should be understood that spatially relative terms are intended to include different orientations of the device in use or operation in addition to the orientation described in the figure. For example, if the device in the accompanying drawings is inverted, the device described as "above other devices or structures" or "above other devices or structures" will be positioned as "below other devices or structures" or "below other devices or structures". Thus, the exemplary term "above" may include both "above" and "below". The device may also be positioned in other different ways (rotated 90 degrees or in other orientations), and the spatially relative descriptions used herein are interpreted accordingly.

[0206] In addition, it should be noted that the use of terms such as "first" and "second" to limit components is only for the convenience of distinguishing the corresponding components. If not otherwise stated, the above terms have no special meaning and therefore cannot be understood as limiting the scope of protection of the present invention.

[0207] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A method for processing a semiconductor device, characterized in that: include: Obtaining a matrix (10); Arranging a chip (20) on the substrate (10); A package body (30) is formed on the substrate (10), wherein the package body (30) has a top through hole (31), and the top through hole (31) exposes a temperature measurement area of ​​the chip (20); A stopper (40) is inserted into the top through hole (31), and an end of the stopper (40) covers the temperature measurement area; An insulating colloid is filled between the packaging body (30), the base body (10) and the stopper (40).

2. The method for processing a semiconductor device according to claim 1, wherein: The stopper (40) is a hollow structure; or, The stopper (40) is a temperature measuring structure.

3. The method for processing a semiconductor device according to claim 2, wherein: When the stopper (40) is a hollow structure, the stopper (40) comprises: a tube body (41) and a blocking column (42) nested on the top of the tube body (41).

4. The method for processing a semiconductor device according to any one of claims 1 to 3, characterized in that: After the step of filling insulating colloid between the packaging body (30), the substrate (10) and the stopper (40), the processing method further comprises: solidifying the insulating colloid; The stopper (40) is taken out from the packaging body (30) to expose the temperature measurement area.

5. The method for processing a semiconductor device according to claim 3, wherein: Between the step of arranging a chip (20) on the substrate (10) and the step of forming a package (30) on the substrate (10), the processing method further comprises: A first power terminal (50) and a second power terminal (60) are connected to the substrate (10), and both the first power terminal (50) and the second power terminal (60) are electrically conductively connected to the chip (20).

6. The method for processing a semiconductor device according to claim 5, characterized in that: The step of forming a package body (30) on the substrate (10) comprises: Obtaining a cover body (32) and a shell (33); The outer shell (33) is connected between the base body (10) and the cover body (32); Wherein, the top through hole (31) is formed on the cover body (32); A first downward convex surrounding structure (321) is formed on a side of the cover body (32) facing the base body (10), wherein the first downward convex surrounding structure (321) wraps around the outer periphery of the first power terminal (50); A second downward convex surrounding structure (322) is formed on a side of the cover body (32) facing the base body (10), and the second downward convex surrounding structure (322) is wrapped around the periphery of the second power terminal (60).

7. The method for processing a semiconductor device according to claim 6, wherein: The step of filling insulating colloid between the packaging body (30), the substrate (10) and the stopper (40) comprises: An insulating colloid is formed between the packaging body (30), the substrate (10) and the stopper (40), and a side of the insulating colloid away from the substrate (10) is higher than the bottom surface of the first downward convex enclosing structure (321) and the bottom surface of the second downward convex enclosing structure (322).

8. A fixture for semiconductor device processing, characterized in that: The clamp is used in the semiconductor device processing method according to any one of claims 1 to 7, and comprises a frame (100) and a limiting member (110) arranged on the frame (100), and the limiting member (110) cooperates with the stop member (40) in limiting manner.

9. The clamp according to claim 8, characterized in that The clamp further comprises a pressing member (120) arranged on the frame (100), the pressing member (120) being movably arranged in a vertical direction, and the pressing member (120) being in abutment with a top end of the stop member (40).

10. The clamp according to claim 9, characterized in that The clamp further comprises a mounting tube (130) and a rod body (140), wherein the rod body (140) is movably arranged in the mounting tube (130) along the vertical direction, and the pressing member (120) comprises a pressing plate (121), wherein a first end of the pressing plate (121) is connected to the rod body (140), and a second end of the pressing plate (121) is in abutment with the stop member (40).

11. The clamp according to claim 10, characterized in that The rod body (140) is provided with a mounting groove (141), the pressing plate (121) is hingedly connected to the rod body (140), and the pressing plate (121) has an outward-swinging working position and a retracted position located in the mounting groove (141).

12. The clamp according to claim 10 or 11, characterized in that: The limiting member (110) is movably arranged on the frame (100), the limiting member (110) comprises a limiting hole (111), and the stopper (40) is inserted into the limiting hole (111) and abuts against the chip (20).

13. The clamp according to claim 12, characterized in that The frame (100) comprises a base (101) and a support frame (102) arranged on the base (101), and the mounting cylinder (130) is movably arranged on the support frame (102).

14. The clamp according to claim 13, characterized in that The support frame (102) comprises a support beam (1021) and a support leg (1022) arranged between the support beam (1021) and the base (101); the clamp further comprises an adjustment beam (150); the adjustment beam (150) is arranged crosswise with the support beam (1021); the adjustment beam (150) is movably arranged on the support beam (1021) along the length direction of the support beam (1021); and the limit member (110) is movably arranged on the adjustment beam (150) along the length direction of the adjustment beam (150).

15. The clamp according to claim 14, characterized in that The support beam (1021) and the adjustment beam (150) are arranged vertically.

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