Wide-gain light-load control method for resonant converter

Abstract

The invention discloses a wide-gain light-load control method of a resonant converter, which is applied to the light-load working condition of LLC and CLLC resonant converters, and comprises the following steps of: constructing three control loops with sequentially connected voltage gains by setting different driving duty ratios and control quantities of a primary-side full-bridge switch tube and a secondary-side full-bridge switch tube; the three control loops are respectively a positive logic switching frequency loop, a duty ratio loop and an anti-logic switching frequency loop, and voltage regulation of light-load gain is realized through sequential switching of the three control loops, so that the problem of upwarp of voltage gain in an over-resonance interval of frequency conversion control is avoided, meanwhile, dependence on MHz sampling is eliminated, and the frequency conversion control loop can be applied to sampling requirements below 100kHz. The method can meet the full-load range wide-gain application requirements in the application fields of high-frequency and high-power-density power supplies such as a multi-port direct-current power adapter, an aerospace high-power-density satellite power supply and a user-side energy storage converter.

Description

Technical Field

[0001] The present invention relates to the field of resonant converter control, and in particular to a novel wide-gain light-load control method suitable for resonant conversion topologies such as LLC and CLLC. Background Art

[0002] In recent years, with the progress of science and technology and the continuous breakthroughs in power electronics technology, isolated resonant converters have been widely used in the fields of civil adaptation technology, new energy distributed power generation, distributed energy storage, aerospace power technology, etc., and the application technology of topology transformation technology and new wide bandgap devices has been continuously improved and broken through, making high efficiency and high power density the development direction of power electronic devices, especially in the application needs of civil adaptation technology, aerospace power technology and energy storage, which have strict requirements on efficiency, volume, wide gain and digital control technology. Traditional LLC, CLLC and other resonant topologies have received widespread attention due to their better switching voltage stress and good EMI characteristics. However, the isolated resonant topology often has the problem of gain upward in traditional frequency conversion control under light load conditions. At present, the Burst control method is usually used, but this method has strict requirements for sampling technology. For special application scenarios such as aerospace, the research on radiation-resistant sampling chips is not yet mature and cannot meet the sampling rate requirements, which will damage the stability of the output voltage, increase the output ripple, and affect normal power consumption. It is urgent to propose a new light-load control strategy to replace the Burst control method, which can solve the light-load voltage rise and achieve good output stability without relying on high-speed sampling. Summary of the invention

[0003] The purpose of the present invention is to overcome the deficiencies in the prior art, solve the problem of light load gain upward in the over-frequency range that is difficult to solve when the resonant converter represented by the traditional LLC and CLLC adopts the frequency modulation control method, and the light and heavy load ranges are inconsistent, and the application range is narrow. A wide gain light load control method for a resonant converter is provided, which is a light load multi-mode switching buck control method. Through the design and combination of frequency modulation and switch tube duty cycle, the light load is prevented from entering the over-resonance range, and at the same time, the converter can achieve the effect of rapid buck, broaden the light load gain range and reduce the frequency application range, which is beneficial to the design of magnetic parts and takes efficiency into consideration. A new light load buck closed-loop control method and converter suitable for LLC, CLLC and other resonant converters can meet the full load range wide gain application requirements in high frequency and high power density power supply application fields such as multi-port DC power adapters, aerospace high power density satellite power supplies, and user-side energy storage converters.

[0004] The objective of the present invention is achieved through the following technical solutions:

[0005] A wide gain light load control method for a resonant converter is applied to light load conditions of LLC and CLLC resonant converters, comprising:

[0006] By setting different driving duty ratios and control quantities for the primary-side full-bridge switch tube and the secondary-side full-bridge switch tube, three voltage gain sequential control loops are constructed, namely the positive logic switching frequency loop, the duty ratio loop and the negative logic switching frequency loop. The voltage regulation of the light-load gain is achieved by switching the above three control loops in sequence to avoid the voltage gain upward problem in the over-resonance range of the variable frequency control, and get rid of the dependence on MHz sampling, which can be applied to sampling requirements below 100kHz; Among them:

[0007] Positive logic switching frequency loop, in the sub-resonant frequency range, located at 0.5f r to f r Between r The main resonant frequency is used, and the variable frequency control method is adopted. The duty cycle of the full-bridge switch tube on the primary side is greater than that of the full-bridge switch tube on the secondary side. The gain gradually decreases as the switching frequency approaches the main resonant frequency. When the switching frequency decreases to the main resonant frequency, it enters the duty cycle loop;

[0008] Duty cycle loop, the duty cycle of the primary side full-bridge switch tube drive signal begins to decrease, and the duty cycle of the secondary side full-bridge switch tube drive signal remains unchanged until the duty cycle of the primary side full-bridge switch tube drive signal decreases to a set value, and the set value is lower than the duty cycle of the secondary side full-bridge switch tube drive signal, and enters the anti-logic switching frequency loop. In the anti-logic switching frequency loop, the voltage gain decreases as the duty cycle decreases;

[0009] Inverse logic switching frequency loop, when the duty cycle of the primary-side full-bridge switch tube drive reaches the set value and the gain cannot be further reduced, it enters the reverse logic switching frequency loop, starts to adjust the switching frequency, and enters the sub-resonant frequency range again. At this time, since the duty cycle of the secondary-side full-bridge switch tube drive signal is higher than the duty cycle of the primary-side full-bridge switch tube drive signal, current feedback is formed, and the output voltage decreases as the switching frequency decreases until the switching frequency boundary, forming reverse logic.

[0010] Furthermore, the duty cycle of the primary-side full-bridge switch tube driving signal in the positive logic switching frequency loop is 45%, and the duty cycle of the secondary-side full-bridge switch tube driving signal is 20%;

[0011] The boundary of the duty cycle of the primary side full-bridge switch tube in the duty cycle loop is [45%, 18%], and the duty cycle of the secondary side full-bridge switch tube is fixed at 20%; the set value is 18%;

[0012] When the duty cycle of the secondary side full-bridge switch tube drive signal in the anti-logic switching frequency loop is higher than the duty cycle of the primary side full-bridge switch tube drive signal, the duty cycle of the secondary side full-bridge switch tube drive signal and the duty cycle of the primary side full-bridge switch tube drive signal are 20% and 18% respectively.

[0013] Compared with the prior art, the technical solution of the present invention has the following beneficial effects:

[0014] 1. Improve the gain adjustment capability in the light load range: Through the sequential switching of the three logic control loops, the gain increase problem caused by the traditional frequency modulation control in the over-resonant frequency range is effectively solved, so that the converter can still maintain a stable output voltage under light load conditions.

[0015] 2. Taking into account both high efficiency and stability: The control strategy of the present invention combines the flexible configuration of frequency modulation and switch duty cycle to avoid over-resonance under light load conditions, ensure that the converter can respond quickly, achieve efficient voltage reduction control, and reduce output ripple, thereby improving the stability of the power supply.

[0016] 3. Adapt to a variety of application scenarios: The control method of the present invention does not rely on high-speed sampling technology, can work effectively under sampling conditions below 100kHz, is suitable for aerospace and other special application scenarios, and expands the application range of LLC and CLLC resonant topologies.

[0017] 4. Optimize magnetic design: While reducing the frequency application range, it helps to optimize the magnetic design, improve the overall power density and efficiency of the system, and meet the high requirements of modern power electronic devices for volume and performance.

[0018] 5. Simplify system design: By introducing a new control strategy, the reliance on the traditional Burst control mode is simplified, the requirements for the sampling rate are reduced, and a more flexible and reliable solution is provided for the design of light-load power supplies. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1a and Figure 1b They are respectively topological structure diagrams of the light-load wide-gain voltage regulation control using CLLC and LLC topologies as examples in the present invention;

[0020] Figure 2 The present invention uses the CLLC topology as an example to perform a light-load gain voltage regulation control method, and a schematic diagram of three-loop control switching;

[0021] Figure 3a to Figure 3c The present invention uses the CLLC topology as an example to perform a light-load gain regulation control method, and the control strategy and the respective driving signal illustration diagram; Figure 3a to Figure 3c Schematic diagrams of the simulation waveforms of the primary and secondary side full-bridge switch drive duty cycles corresponding to the three loops a, b, and c.

[0022] Figure 4 This is a schematic diagram of the closed-loop simulation effect of the light-load gain voltage regulation control method of the present invention taking the CLLC topology as an example. DETAILED DESCRIPTION

[0023] The present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0024] The technical problem to be solved by the present invention is to propose a light load control strategy applied to LLC, CLLC and other resonant topologies. The topological structures of CLLC and LLC are shown in FIG. Figure 1a and Figure 1b The duty cycle configuration of the full-bridge switch tube on the primary side (inverter side) and the full-bridge switch tube on the secondary side (rectifier side) is used to construct three sequential control loops:

[0025] In the sub-resonant frequency range, loop a (positive logic switching frequency loop) adopts variable frequency control, and the duty cycle of the full-bridge switch tube on the primary side is greater than the duty cycle of the full-bridge switch tube on the secondary side. The gain gradually decreases as the switching frequency approaches the resonant frequency. When the switching frequency decreases to the resonant frequency, loop b is entered.

[0026] In loop b (duty cycle loop), the duty cycle of the primary-side full-bridge switch tube begins to decrease, and the duty cycle of the secondary-side full-bridge switch tube remains unchanged until the duty cycle of the primary-side full-bridge switch tube decreases to the set value, and the set value is lower than the duty cycle of the secondary-side full-bridge switch tube, and then enters loop c. In this control loop, the voltage gain decreases as the duty cycle decreases.

[0027] Loop c (anti-logic switching frequency loop), when the duty cycle of the full-bridge switch tube on the primary side reaches the set value and the gain cannot be further reduced, it enters the anti-logic switching frequency loop, starts to adjust the switching frequency, and enters the sub-resonant frequency range again. At this time, since the duty cycle of the full-bridge switch tube on the secondary side is higher than that of the full-bridge switch tube on the primary side, current feedback is formed, and the output voltage decreases as the switching frequency decreases until the frequency boundary, forming an anti-logic. The three logic loops are connected and controlled in sequence to achieve wide-range voltage reduction in resonant topologies such as CLLC and LLC, solving the problem of light-load gain rising and voltage reduction in the over-resonant frequency range that cannot be solved by traditional frequency modulation control. At the same time, it can also get rid of the dependence of the traditional LLC light-load Burst control mode on the sampling rate, and solve the ripple stability problem caused by low-rate sampling in special scenarios.

[0028] Specifically, this embodiment takes a CLLC with a turns ratio of 2 to 1 as an example for explanation. The specific topological structure is as follows: Figure 1a As shown. Switch tubes Q1~Q4 construct the primary side full-bridge switch tube of CLLC, that is, the inverter side full-bridge structure, Cr1， C r2 is the resonant capacitor, L r1， L r2 is the resonant inductance, L m is the excitation inductance; the switch tube Q SR1 ~Q SR4 The secondary side full-bridge switch tube of CLLC is constructed, that is, the rectifier full-bridge structure; r1 , C r2 and L r1 , L r2 The main resonant frequency of the construction is f r , the control switching frequency range is [0.5f r ,f r ]; by controlling Q1~Q4 and Q SR1 ~Q SR4 The driving signal duty cycle and frequency configuration can achieve the effect of widening the light-load voltage gain.

[0029] Figure 2 In loop a (positive logic switching frequency loop), the switching frequency of the full-bridge switch tube on the primary side is the controlled quantity, the duty cycle on the primary side is fixed, and the duty cycle on the secondary side can be fitted with a frequency-duty cycle curve or fixed to a constant value through the conduction of the secondary diode. At this time, the duty cycle of the full-bridge switch tube on the secondary side is less than the duty cycle of the full-bridge switch tube on the primary side; in this embodiment, the duty cycle of the full-bridge switch tube on the primary side is 45%, and the duty cycle of the full-bridge switch tube on the secondary side is 20%. In this control loop, consistent with the traditional frequency modulation characteristics, the voltage gain decreases as the switching frequency increases, which is defined as a positive logic frequency control loop. In this loop, after the switching frequency is reduced to the main resonant frequency, it reaches the boundary of the adjustable switching frequency. If the switching frequency boundary value is reached for n consecutive cycles, it cannot further approach the control target value. It is believed that this loop cannot meet the voltage reduction requirements and needs to be switched to loop b, i.e., the duty cycle loop.

[0030] Figure 2In the b loop, the control duty cycle of the full-bridge switch tube on the primary side is taken as the controlled quantity, and the switching frequency of the full-bridge switch tubes on the primary side and the secondary side and the driving duty cycle of the full-bridge switch tube on the secondary side are maintained unchanged. By adjusting the driving duty cycle of the full-bridge switch tube on the primary side to linearly decrease to a duty cycle boundary lower than the duty cycle of the full-bridge switch tube on the secondary side, the duty cycle boundary of the full-bridge switch tube on the primary side in this embodiment is [45%, 18%]. In the process of linear decrease of the duty cycle of the full-bridge switch tube on the primary side, the gain decreases monotonically with the decrease of the duty cycle of the full-bridge switch tube on the primary side, which is defined as the duty cycle control voltage loop. In this loop, after the duty cycle of the full-bridge switch tube on the primary side is reduced to the lower boundary of 18%, if it is the duty cycle boundary value for n consecutive cycles, it is impossible to further approach the control target value. It is considered that this loop cannot meet the voltage reduction demand and needs to be switched to the c loop (anti-logic switching frequency loop). Correspondingly, during the boost process, if the duty cycle rises to the upper boundary of 45%, if the duty cycle boundary value of the primary-side full-bridge switch tube cannot further approach the control target value for n consecutive cycles, it is considered that the loop cannot meet the boost demand and needs to switch to loop a.

[0031] Figure 2 In the c loop (anti-logic switching frequency loop), the switching frequency of the full-bridge switch tube on the primary side is the controlled variable, and the duty cycles of the primary and secondary sides are fixed. At this time, the duty cycle of the full-bridge switch tube on the secondary side is greater than the duty cycle of the switch tube on the primary side. In this embodiment, the duty cycle of the full-bridge switch tube on the primary side is 17%, and the duty cycle of the full-bridge switch tube on the secondary side is 20%. At this time, the output side current is fed back to the resonant cavity, which can further reduce the output voltage and widen the gain range. At the same time, the gain decreases as the difference between the secondary side switching time and the primary side switch duty cycle time increases, that is, the gain decreases as the switching frequency decreases, which is defined as an anti-logic frequency control loop. In this loop, the switching frequency range is consistent with the positive logic loop, and is still [0.5f r ,f r ], down to 0.5f r The lowest output voltage of the entire converter can be obtained when the frequency is 1000. Correspondingly, during the boost process, if n consecutive cycles are at the switching frequency boundary value f r , unable to further approach the control target value, it is believed that this loop cannot meet the boost demand and needs to switch to control loop b.

[0032] Taking the CLLC resonant topology as an example, the primary and secondary full-bridge switch tube drive duty cycle simulation waveforms corresponding to the three loops a, b, and c are shown. g1 -v g4 is the primary side driving voltage signal waveform, v Srg1 -v Srg4 is the secondary side driving voltage signal. Figure 3aIn the a ring, in this embodiment, the primary side switch driving voltage duty cycle is fixed to 45%, and the secondary side duty cycle is fixed to 20%; see Figure 3b In loop b, in this embodiment, the duty cycle of the primary switch driving voltage is controlled to decrease linearly from 45% to 18%, and the duty cycle of the secondary side is fixed at 20%; see Figure 3c ,In the c loop, in this embodiment, the primary side switch driving voltage duty ratio is fixed to 18% linear, the secondary side duty ratio is fixed to 20%, and the switching frequency is the controlled quantity.

[0033] Figure 4 It can be seen that as the input voltage changes, under light load conditions, the resonant converter switches between the three loops "abc" by adjusting the duty cycle and switching frequency, and the output voltage can maintain a stable 90V.

[0034] It should be understood that the above description of the specific embodiments is relatively detailed, but it should not be understood as limiting the scope of patent protection of the present invention. The scope of patent protection of the present invention should be based on the attached claims.

[0035] The present invention is not limited to the embodiments described above. The above description of the specific embodiments is intended to describe and illustrate the technical solution of the present invention. The above specific embodiments are merely illustrative and not restrictive. Without departing from the scope of the present invention and the scope of protection of the claims, a person of ordinary skill in the art can also make many forms of specific changes under the guidance of the present invention, which all fall within the scope of protection of the present invention.

Claims

1. A wide gain light load control method for a resonant converter, applied to light load conditions of LLC and CLLC resonant converters, characterized in that: By setting different driving duty ratios and control quantities for the primary-side full-bridge switch tube and the secondary-side full-bridge switch tube, three voltage gain sequential control loops are constructed, namely the positive logic switching frequency loop, the duty ratio loop and the negative logic switching frequency loop. The voltage regulation of the light-load gain is achieved by switching the above three control loops in sequence to avoid the voltage gain upward problem in the over-resonance range of the variable frequency control, and get rid of the dependence on MHz sampling, which can be applied to sampling requirements below 100kHz; Among them: Positive logic switching frequency loop, in the sub-resonant frequency range, located at 0.5f r to f r Between r The main resonant frequency is used, and the variable frequency control method is adopted. The duty cycle of the full-bridge switch tube on the primary side is greater than that of the full-bridge switch tube on the secondary side. The gain gradually decreases as the switching frequency approaches the main resonant frequency. When the switching frequency decreases to the main resonant frequency, it enters the duty cycle loop; Duty cycle loop, the duty cycle of the primary side full-bridge switch tube drive signal begins to decrease, and the duty cycle of the secondary side full-bridge switch tube drive signal remains unchanged until the duty cycle of the primary side full-bridge switch tube drive signal decreases to a set value, and the set value is lower than the duty cycle of the secondary side full-bridge switch tube drive signal, and enters the anti-logic switching frequency loop. In the anti-logic switching frequency loop, the voltage gain decreases as the duty cycle decreases; Inverse logic switching frequency loop, when the duty cycle of the primary-side full-bridge switch tube drive reaches the set value and the gain cannot be further reduced, it enters the reverse logic switching frequency loop, starts to adjust the switching frequency, and enters the sub-resonant frequency range again. At this time, since the duty cycle of the secondary-side full-bridge switch tube drive signal is higher than the duty cycle of the primary-side full-bridge switch tube drive signal, current feedback is formed, and the output voltage decreases as the switching frequency decreases until the switching frequency boundary, forming reverse logic.

2. According to the wide gain light load control method of a resonant converter according to claim 1, it is characterized in that: The duty cycle of the primary-side full-bridge switch tube drive signal in the positive logic switching frequency loop is 45%, and the duty cycle of the secondary-side full-bridge switch tube drive signal is 20%; The boundary of the duty cycle of the primary side full-bridge switch tube in the duty cycle loop is [45%, 18%], and the duty cycle of the secondary side full-bridge switch tube is fixed at 20%; the set value is 18%; When the duty cycle of the secondary side full-bridge switch tube drive signal in the anti-logic switching frequency loop is higher than the duty cycle of the primary side full-bridge switch tube drive signal, the duty cycle of the secondary side full-bridge switch tube drive signal and the duty cycle of the primary side full-bridge switch tube drive signal are 20% and 18% respectively.

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