Non-fixed frequency software phase-locked loop with error correction

Abstract

The invention discloses a non-fixed frequency software phase-locked loop with error correction, which comprises the following steps of: setting a power grid voltage frequency as fO and a digital sampling frequency as fS, and carrying out digital sampling; compensating digital sampling; the orthogonal voltage of the phase locking voltage required by the component is constructed; alpha beta / dq coordinate transformation is carried out, and the voltage in the static coordinate system is converted into the voltage in the rotating coordinate system; and the phase locking angle is obtained through the relationship between the vq1 and the phase locking angle wt2 under the dq coordinate system. According to the non-fixed frequency software phase-locked loop with the error correction function, the problem of inaccurate frequency calculation caused by sampling errors in the software phase-locked loop is solved according to the geometrical relationship, and therefore the accuracy of the phase-locked loop is improved; when the sampling frequency and the power grid frequency fluctuate, algorithm parameters can be adjusted in real time, and rapidity, stability and accuracy of the phase-locked loop can be guaranteed.

Description

Technical Field

[0001] The invention relates to the technical field of software phase-locked loops, and in particular to a non-fixed frequency software phase-locked loop with error correction. Background Art

[0002] In the development process of energy Internet, clean energy will be rapidly developed and utilized, and the proportion of renewable energy in clean energy will gradually increase. Renewable energy generation is random and intermittent. The connection of renewable energy generation to the grid will have a huge impact on the traditional power grid, causing voltage fluctuations, frequency fluctuations and other conditions, endangering the safety of the power grid. Energy storage can not only improve the efficiency, safety and economy of conventional power generation and transmission, but also is an important means to achieve smooth fluctuations of renewable energy, peak load regulation and frequency regulation, and meet the large-scale access of renewable energy.

[0003] When energy storage equipment is connected to the grid, it is necessary to phase-lock the grid voltage to achieve unity power factor control. If the phase-lock angle is inaccurate, reactive power will be injected into the grid, which is not allowed under normal circumstances. When multiple energy storage devices are connected in parallel, inaccurate phase-lock angles will cause circulating currents between modules. The traditional software phase-locked loop has an inaccurate phase-lock angle due to the existence of digital sampling errors. In addition, the lower the digital sampling frequency and the higher the grid voltage frequency, the greater the error.

[0004] In order to overcome the above problems, a non-fixed frequency software phase-locked loop with error correction is proposed. Summary of the invention

[0005] The purpose of the present invention is to provide a non-fixed frequency software phase-locked loop with error correction, which can derive digital sampling errors through geometric relationships, thereby performing software compensation, greatly improving the accuracy of the phase-locked loop; by adjusting algorithm parameters in real time, the accuracy of the phase-locked loop can be well guaranteed when the sampling frequency and the power grid frequency change, so as to solve the problems raised in the above-mentioned background technology.

[0006] To achieve the above object, the present invention provides the following technical solution: a non-fixed frequency software phase-locked loop with error correction, comprising the following steps:

[0007] Step (1): Set the grid voltage frequency to f O , the digital sampling frequency is fS, and digital sampling is performed;

[0008] Step (2): Compensating the digital sampling;

[0009] Step (3): the orthogonal voltage required for the component to perform phase locking voltage;

[0010] Step (4): perform αβ / dq coordinate transformation to convert the voltage in the stationary coordinate system into the voltage in the rotating coordinate system;

[0011] Step (5): Obtain the phase-locking angle through the relationship between vq_1 and the phase-locking angle wt_2 in the dq coordinate system.

[0012] Preferably, the step (1) is specifically:

[0013] (1.1) When the sampling point happens to fall at the zero-crossing point of the grid voltage, f0=N*fS;

[0014] (1.2) When the sampling point does not fall on the zero-crossing point of the grid voltage, step (2) is used to compensate the digital sampling.

[0015] Preferably, the step (2) is specifically:

[0016] When digital sampling is performed, the controller can read and record the sampling time as t1, and the voltage value of this sampling is u1; the next sampling time is t2, and the voltage value of the next sampling is u2, so

[0017]

[0018] According to the geometric approximate triangle relationship, we can get

[0019]

[0020] u1 and u2 are the sampling results of discrete sampling, f S The controller analog-to-digital conversion register can be read by software and updated in real time; similarly, the time t0 when a grid cycle passes from negative voltage to positive voltage zero crossing can be obtained * , t1 * and t2 * , it is assumed that there are n digital sampling points between the two zero crossing points, and the sampling period is T S , which can be calculated

[0021]

[0022] f O It is a value corrected for discrete sampling errors and has high accuracy.

[0023] Preferably, when u1>0, u2<0, it is known that there is a positive zero crossing point between t1 and t2, and the software can calculate the positive zero crossing time as t0 according to the above algorithm; when u1<0, u2>0, it is known that at t1 * and t2 *There is a negative zero crossing point between them. The software can calculate the positive zero crossing point as t0* according to the above algorithm. When the sampling frequency changes in a grid voltage cycle, equation (4) needs to be changed to:

[0024]

[0025] a is the number of different sampling frequencies, k is the sampling period T in a power grid cycle sk The number of sampling points is k∈[1,a].

[0026] Preferably, the step (3) is specifically:

[0027] A single-phase grid voltage orthogonal voltage generator is used. When the phase-locked target grid voltage is single-phase, an orthogonal voltage of the phase-locked voltage is constructed. v is the grid voltage, v_1 ​​is the phase-locked voltage, v_1q is the orthogonal voltage of the phase-locked voltage, and K is the error amplifier. The algorithm parameters can be adjusted through software according to the actual situation of the system. f is the frequency of the phase-locked voltage. When f is calculated inaccurately, the obtained v_1 and v_1q will have deviations, which will lead to inaccurate phase locking. The method of generating orthogonal signals using generalized second-order integrator SOGI is adopted.

[0028] When the phase-locked target grid voltage is three-phase, this step (3) can be omitted.

[0029] Preferably, the step (4) is specifically as follows: v_1 and v_1q are two orthogonal voltages in the stationary coordinate system, wt_2 is the angle obtained by the phase-locked loop, and vd_1 and vq_1 in the rotating coordinate system are obtained, vd_1 and vq_1 are DC signals, and the αβ / dq coordinate transformation is performed using a software algorithm.

[0030] Preferably, when the phase-locked angle and the actual angle error are 0, the q-axis component vq_1 is 0, so the given value of the phase-locked loop is 0, vq_1 is the feedback signal, and considering the influence of high-frequency disturbances, a low-pass filter Lowpass is added to the loop, and then the phase-locked algorithm adjustment amount is obtained through the PID regulator, and then the phase-locked voltage frequency f is corrected to obtain the angular frequency w. After passing through the integral link 1 / s, the phase-locked angle is obtained, and the angle of the sinusoidal signal is repeated with a period of 2π, so the mod is rounded to 2π to obtain the phase-locked angle wt_2.

[0031] Compared with the prior art, the present invention has the following beneficial effects:

[0032] The non-fixed frequency software phase-locked loop with error correction has the following advantages:

[0033] 1. The inaccurate frequency calculation caused by sampling error in the software phase-locked loop is compensated according to the geometric relationship, thereby increasing the accuracy of the phase-locked loop;

[0034] 2. When the sampling frequency and grid frequency fluctuate, the algorithm parameters can be adjusted in real time to ensure the speed, stability and accuracy of the phase-locked loop. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] Figure 1 The fundamental wave of the grid voltage of the present invention is a sinusoidal signal waveform diagram;

[0036] Figure 2 It is the principle diagram of the single-phase grid voltage orthogonal voltage generator of the present invention;

[0037] Figure 3 It is the αβ / dq coordinate transformation algorithm diagram of the present invention;

[0038] Figure 4 This is a schematic diagram of the phase-locking angle calculation principle of the present invention. DETAILED DESCRIPTION

[0039] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0040] See also Figure 1-4 , a non-fixed frequency software phase-locked loop with error correction, comprising the following steps:

[0041] Step (1): Set the grid voltage frequency to f O , the digital sampling frequency is fS, and digital sampling is performed;

[0042] Step (2): Compensating the digital sampling;

[0043] Step (3): the orthogonal voltage required for the component to perform phase locking voltage;

[0044] Step (4): perform αβ / dq coordinate transformation to convert the voltage in the stationary coordinate system into the voltage in the rotating coordinate system;

[0045] Step (5): Obtain the phase-locking angle through the relationship between vq_1 and the phase-locking angle wt_2 in the dq coordinate system.

[0046] The specific step (1) is as follows:

[0047] (1.1) When the sampling point happens to fall at the zero-crossing point of the grid voltage, f0=N*fS;

[0048] (1.2) Since the digital sampling is discrete, i.e., non-continuous and random, the sampling point generally does not fall on the zero-crossing point of the grid voltage. When the sampling point does not fall on the zero-crossing point of the grid voltage, step (2) is used to compensate the digital sampling.

[0049] The specific step (2) is:

[0050] When digital sampling is performed, the controller can read and record the sampling time as t1, and the voltage value of this sampling is u1; the next sampling time is t2, and the voltage value of the next sampling is u2, so

[0051]

[0052] According to the geometric approximate triangle relationship, we can get

[0053]

[0054] u1 and u2 are the sampling results of discrete sampling, f S The controller analog-to-digital conversion register can be read by software and updated in real time; similarly, the time t0 when a grid cycle passes from negative voltage to positive voltage zero crossing can be obtained * , t1 * and t2 * , it is assumed that there are n digital sampling points between the two zero crossing points, and the sampling period is T S , which can be calculated

[0055]

[0056] Because f O It is a value corrected for discrete sampling errors, so it has high accuracy.

[0057] When u1>0, u2<0, it is known that there is a positive zero crossing point between t1 and t2. The software can calculate the positive zero crossing time as t0 according to the above algorithm; when u1<0, u2>0, it is known that at t1 * and t2 * There is a negative zero crossing point between them. The software can calculate the positive zero crossing point as t0* according to the above algorithm. When the sampling frequency changes in a grid voltage cycle, equation (4) needs to be changed to:

[0058]

[0059] a is the number of different sampling frequencies, k is the sampling period T in a power grid cycle sk The number of sampling points is k∈[1,a].

[0060] The specific step (3) is as follows:

[0061] A single-phase grid voltage orthogonal voltage generator is used. When the phase-locked target grid voltage is single-phase, an orthogonal voltage of the phase-locked voltage is constructed. v is the grid voltage, v_1 ​​is the phase-locked voltage, v_1q is the orthogonal voltage of the phase-locked voltage, and K is the error amplifier. The algorithm parameters can be adjusted through software according to the actual situation of the system. f is the frequency of the phase-locked voltage. When f is calculated inaccurately, the obtained v_1 and v_1q will have deviations, which will lead to inaccurate phase locking. The method of generating orthogonal signals using generalized second-order integrator SOGI is adopted.

[0062] When the phase-locked target grid voltage is three-phase, this step (3) can be omitted.

[0063] f is calculated by the above method O Real-time updates ensure the real-time and accuracy of vq_1.

[0064] The above v_1 and v_1q are two orthogonal voltages in the stationary coordinate system, wt_2 is the angle obtained by the phase-locked loop, and vd_1 and vq_1 in the rotating coordinate system are obtained. vd_1 and vq_1 are DC signals, and the αβ / dq coordinate transformation is performed using a software algorithm.

[0065] When the phase-locked angle and the actual angle error are 0, the q-axis component vq_1 is 0, so the given value of the phase-locked loop is 0, and vq_1 is the feedback signal. Considering the influence of high-frequency disturbances, a low-pass filter Lowpass is added to the loop, and then the phase-locked algorithm adjustment amount is obtained through the PID regulator. It is corrected on the basis of the phase-locked voltage frequency f to obtain the angular frequency w. After passing through the integral link 1 / s, the phase-locked angle is obtained. The angle of the sinusoidal signal is repeated with a period of 2π, so the mod is rounded to 2π to obtain the phase-locked angle wt_2.

[0066] For this non-fixed frequency software phase-locked loop with error correction, when the sampling point happens to fall at the zero-crossing point of the grid voltage, f0 = N*fS, which can be obtained by calculation Because f O It is a value corrected by discrete sampling error, so it has high accuracy. According to the geometric relationship, it compensates for the inaccurate frequency calculation caused by the sampling error in the software phase-locked loop, thereby increasing the accuracy of the phase-locked loop. When the sampling frequency and the power grid frequency fluctuate, a low-pass filter Lowpass is added to the loop, and then the phase-locked algorithm adjustment amount is obtained through the PID regulator. The phase-locked voltage frequency f is corrected to obtain the angular frequency w. After the integral link 1 / s, the phase-locked angle is obtained. The angle of the sinusoidal signal is repeated with a period of 2π. Therefore, mod is used to round to 2π to obtain the phase-locked angle wt_2. By adjusting the algorithm parameters in real time, the rapidity, stability and accuracy of the phase-locked loop can be guaranteed.

[0067] The above description is only a preferred specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any technician familiar with the technical field can make equivalent replacements or changes according to the technical scheme and inventive concept of the present invention within the technical scope disclosed by the present invention, which should be covered by the protection scope of the present invention.

Claims

1. A non-fixed frequency software phase-locked loop with error correction, characterized in that: The steps include: Step (1): Set the grid voltage frequency to f O , the digital sampling frequency is fS, and digital sampling is performed; Step (2): Compensating the digital sampling; Step (3): the orthogonal voltage required for the component to perform phase locking voltage; Step (4): perform αβ / dq coordinate transformation to convert the voltage in the stationary coordinate system into the voltage in the rotating coordinate system; Step (5): Obtain the phase-locking angle through the relationship between vq_1 and the phase-locking angle wt_2 in the dq coordinate system.

2. The non-fixed frequency software phase-locked loop with error correction according to claim 1, characterized in that: The step (1) is specifically: (1.1) When the sampling point happens to fall at the zero-crossing point of the grid voltage, f0=N*fS; (1.2) When the sampling point does not fall on the zero-crossing point of the grid voltage, step (2) is used to compensate the digital sampling.

3. The non-fixed frequency software phase-locked loop with error correction according to claim 1, characterized in that: The step (2) is specifically: When digital sampling is performed, the controller can read and record the sampling time as t1, and the voltage value of this sampling is u1; the next sampling time is t2, and the voltage value of the next sampling is u2, so According to the geometric approximate triangle relationship, we can get u1 and u2 are the sampling results of discrete sampling, f S The controller analog-to-digital conversion register can be read by software and updated in real time; similarly, the time t0 when a grid cycle passes from negative voltage to positive voltage zero crossing can be obtained * , t1 * and t2 * , it is assumed that there are n digital sampling points between the two zero crossing points, and the sampling period is T S , which can be calculated f O It is a value corrected for discrete sampling errors and has high accuracy.

4. The non-fixed frequency software phase-locked loop with error correction according to claim 3, characterized in that: When u1>0, u2<0, it is known that there is a positive zero crossing point between t1 and t2. The software can calculate the positive zero crossing time as t0 according to the above algorithm; when u1<0, u2>0, it is known that at t1 * and t2 * There is a negative zero crossing point between them. The software can calculate the positive zero crossing point as t0* according to the above algorithm. When the sampling frequency changes in a grid voltage cycle, equation (4) needs to be changed to: a is the number of different sampling frequencies, k is the sampling period T in a power grid cycle sk The number of sampling points is k∈[1,a].

5. The non-fixed frequency software phase-locked loop with error correction according to claim 1, characterized in that: The step (3) is specifically: A single-phase grid voltage orthogonal voltage generator is used. When the phase-locked target grid voltage is single-phase, an orthogonal voltage of the phase-locked voltage is constructed. v is the grid voltage, v_1 ​​is the phase-locked voltage, v_1q is the orthogonal voltage of the phase-locked voltage, and K is the error amplifier. The algorithm parameters can be adjusted through software according to the actual situation of the system. f is the frequency of the phase-locked voltage. When f is calculated inaccurately, the obtained v_1 and v_1q will have deviations, which will lead to inaccurate phase locking. The method of generating orthogonal signals using generalized second-order integrator SOGI is adopted. When the phase-locked target grid voltage is three-phase, this step (3) can be omitted.

6. The non-fixed frequency software phase-locked loop with error correction according to claim 1, characterized in that: The step (4) is specifically as follows: v_1 and v_1q are two orthogonal voltages in the stationary coordinate system, wt_2 is the angle obtained by the phase-locked loop, and vd_1 and vq_1 in the rotating coordinate system are obtained. vd_1 and vq_1 are DC signals, and the αβ / dq coordinate transformation is performed using a software algorithm.

7. The non-fixed frequency software phase-locked loop with error correction according to claim 5, characterized in that: When the phase-locked angle and the actual angle error are 0, the q-axis component vq_1 is 0, so the given value of the phase-locked loop is 0, and vq_1 is the feedback signal. Considering the influence of high-frequency disturbances, a low-pass filter Lowpass is added to the loop, and then the phase-locked algorithm adjustment amount is obtained through the PID regulator. It is corrected on the basis of the phase-locked voltage frequency f to obtain the angular frequency w. After passing through the integral link 1 / s, the phase-locked angle is obtained. The angle of the sinusoidal signal is repeated with a period of 2π, so the mod is rounded to 2π to obtain the phase-locked angle wt_2.

Images