Oscillation signal generation circuit, average current controller, method and LED driving system

Abstract

The invention provides an oscillation signal generation circuit, an average current controller, a method and an LED driving system, and the circuit comprises a PWM dimming signal frequency detection unit which is used for generating a first clock signal, the frequency of which is in direct proportion to the frequency of a PWM dimming signal; the PWM dimming signal duty ratio detection unit is used for detecting the duty ratio of the PWM dimming signal, outputting a detection signal in direct proportion to the duty ratio of the PWM dimming signal when the duty ratio of the PWM dimming signal is smaller than a threshold value, and outputting a detection signal corresponding to the threshold value when the duty ratio of the PWM dimming signal is larger than or equal to the threshold value; and the oscillation unit is used for generating an oscillation signal, and the frequency of the oscillation signal is reduced along with the increase of the detection signal. According to the invention, high system efficiency is obtained when the PWM dimming depth is small, a linear and stable dimming effect is obtained when the PWM dimming depth is large, the defect of light source jittering during high-depth PWM dimming is eliminated, and the customer experience is improved.

Description

Technical Field

[0001] The present invention relates to the field of integrated circuit design, and in particular to an oscillation signal generating circuit, an average current controller, a method and an LED driving system. Background Art

[0002] According to the light-emitting principle and characteristics of LED, constant current source is selected to drive LED lamp beads. Constant current source is usually divided into linear constant current source and switch mode constant current source. Switch mode constant current source stands out for its high efficiency and small size. Among them, average current control mode Buck driver is widely used in medium and high power LED driving occasions because of its excellent constant current accuracy and regulation rate.

[0003] In current client applications, dimming function is a very typical requirement; there are two types of dimming methods, linear dimming and PWM dimming. Among them, the advantages of PWM dimming are high precision and no color difference, and PWM dimming is more suitable for intelligent dimming applications, so constant current drivers with integrated PWM dimming function are widely used. With the development of intelligent dimming technology, customers' demand for PWM dimming depth has further increased; currently conventional PWM dimming cannot meet the high-depth PWM dimming requirements, and there is jitter at low brightness.

[0004] like Figure 1 As shown, in the PWM dimming method of the average current control mode, a switch drive signal is generated according to the difference between the inductor current and the reference current, and the compensation signal is pulse-width modulated based on the fixed-frequency oscillation signal OSC. When the PWM dimming signal is at a high level, the power switch tube in the LED switching power supply is periodically controlled to be turned on or off. Since the LED light string is connected in series with the inductor, in the steady-state working state, the LED current is also controlled to be the average value of the inductor current IL_AVG. When the PWM dimming signal is at a low level, the power switch tube remains in the off state, and the inductor current is 0.

[0005] Since the inductor current is IL_AVG when the PWM dimming signal is high and is 0 when the PWM is low, the average value of the LED current is ILED_AVG = IL_AVG*D, where D is the duty cycle of the PWM dimming signal. By changing the duty cycle D of the PWM dimming signal, the LED current can be controlled, thereby achieving the dimming function.

[0006] In the range of the duty cycle of the PWM dimming signal from 0 to 100%, the frequency of the oscillation signal OSC remains constant. Therefore, in a given frequency Buck system determined by the input and output voltages and the inductance, the ripple of the inductor current remains constant, such as Figure 2 As shown. Figure 1As shown in the figure, when the duty cycle D of the PWM dimming signal is within the range of △D between PWM1 and PWM2, the average current of the LED is the same, which means that in the range of △D, changing the duty cycle D of the PWM dimming signal cannot change the average current of the LED. Therefore, when the duty cycle D of the PWM dimming signal increases linearly, the LED brightness will not change in the range of △D. When the duty cycle D of the PWM dimming signal is greater than the duty cycle of PWM2, the LED brightness will change suddenly, thus affecting the linearity and continuity of dimming. When the duty cycle D of the PWM dimming signal is large, △D / D is small. Since the average current of the LED is large at this time, the human eye is not sensitive to small brightness changes, and the impact can be ignored. However, in the case of high-depth dimming, the duty cycle D of the PWM dimming signal is extremely small, while △D remains unchanged, resulting in a large △D / D. Since the average current of the LED is small at this time, the same △D causes a more significant problem of discontinuous brightness change, and the human eye feels the jitter of the light source, which deteriorates the customer experience.

[0007] Therefore, how to meet the high-depth PWM dimming requirements in the average current control mode, avoid jitter at low brightness, and improve customer experience has become one of the technical problems that technical personnel in this field need to solve urgently.

[0008] It should be noted that the above introduction to the technical background is only for the convenience of providing a clear and complete description of the technical solutions of the present invention and for the convenience of understanding by those skilled in the art. It cannot be considered that the above technical solutions are well known to those skilled in the art simply because these solutions are described in the background technology section of the present invention. Summary of the invention

[0009] In view of the shortcomings of the prior art mentioned above, the object of the present invention is to provide an oscillation signal generating circuit, an average current controller, a method and an LED driving system, which are used to solve the problems in the prior art that PWM dimming in the average current control mode cannot meet the high-depth PWM dimming requirements, there is jitter at low brightness, and the customer experience is poor.

[0010] To achieve the above-mentioned object and other related objects, the present invention provides an oscillation signal generating circuit, which is applied to an average current controller, and the oscillation signal generating circuit at least includes: a PWM dimming signal frequency detection unit, a PWM dimming signal duty cycle detection unit and an oscillation unit;

[0011] The PWM dimming signal frequency detection unit receives the PWM dimming signal and is used to generate a first clock signal, wherein the frequency of the first clock signal is proportional to the frequency of the PWM dimming signal;

[0012] The PWM dimming signal duty cycle detection unit is connected to the output end of the PWM dimming signal frequency detection unit, and detects the duty cycle of the PWM dimming signal; when the duty cycle of the PWM dimming signal is less than a threshold, a detection signal proportional to the duty cycle of the PWM dimming signal is output; when the duty cycle of the PWM dimming signal is greater than or equal to the threshold, a detection signal corresponding to the threshold is output;

[0013] The oscillation unit is connected to the output end of the PWM dimming signal duty cycle detection unit and is used to generate an oscillation signal, wherein the frequency of the oscillation signal decreases as the detection signal increases.

[0014] Optionally, the PWM dimming signal frequency detection unit includes: a PWM dimming signal frequency measurement module and a clock signal generation module;

[0015] The PWM dimming signal frequency measurement module counts the time when the PWM dimming signal is at a high level based on the second clock signal, and outputs a frequency count value after completing the counting, wherein the frequency count value is proportional to the frequency of the PWM dimming signal;

[0016] The clock signal generating module is connected to the output end of the PWM dimming signal frequency measuring module, and generates the first clock signal based on the frequency count value.

[0017] More optionally, the PWM dimming signal frequency measurement module includes: a first delay unit, a first counter, a first register and a first subtractor;

[0018] The first delay unit receives the PWM dimming signal, delays the PWM dimming signal and outputs a first delayed signal, wherein the delay time is no more than two cycles of the second clock signal;

[0019] The first counter is connected to the output end of the first delay unit and receives the second clock signal, and is reset and starts counting up at the rising edge of the first delay signal;

[0020] The first register is connected to the output end of the first counter, stores the value output by the first counter, and reads out the latched value at the rising edge of the PWM dimming signal;

[0021] The first subtractor is connected to the output end of the first register, and subtracts the value output by the first register from the preset value to obtain the frequency count value.

[0022] More optionally, the clock signal generating module comprises: a digital-to-analog converter and an oscillator;

[0023] The digital-to-analog converter is connected to the output end of the PWM dimming signal frequency measurement module to convert the frequency count value into an analog signal;

[0024] The oscillator is connected to the output terminal of the digital-to-analog converter, and generates the first clock signal based on the output signal of the digital-to-analog converter.

[0025] Optionally, the PWM dimming signal duty cycle detection unit includes: a second delay unit, a second counter and a second register;

[0026] The second delay unit receives the PWM dimming signal, delays the PWM dimming signal and outputs a second delayed signal, wherein the delay time is no more than two cycles of the first clock signal;

[0027] The second counter is connected to the output end of the second delay unit and receives the first clock signal, is reset at the falling edge of the second delay signal, counts up at the rising edge of the second delay signal, and latches the counting result when counting to a pre-designed value;

[0028] The second register is connected to the output end of the second counter, registers the value output by the second counter, and latches the output signal of the second counter at the falling edge of the PWM dimming signal.

[0029] Optionally, the oscillation unit includes: a first current source, a second current source, a capacitor, a switch and a comparator;

[0030] One end of the first current source is connected to the power supply voltage, and the other end is grounded via the capacitor;

[0031] One end of the second current source is connected to the upper electrode of the capacitor, and the other end is grounded; the second current source is controlled by the detection signal, and the larger the detection signal is, the larger the current flowing through the second current source is;

[0032] The input end of the comparator is respectively connected to a reference voltage and an upper plate of the capacitor, and an oscillation signal is generated based on a comparison result;

[0033] The switch is connected in parallel to both ends of the capacitor and is controlled by the oscillation signal; when the voltage on the capacitor is less than the reference voltage, the switch is turned off, and when the voltage on the capacitor is greater than the reference voltage, the switch is turned on.

[0034] In order to achieve the above-mentioned object and other related objects, the present invention further provides an average current controller, which at least comprises:

[0035] A driving signal generating circuit and the above-mentioned oscillation signal generating circuit;

[0036] The oscillation signal generating circuit is used to provide an oscillation signal;

[0037] The drive signal generating circuit is connected to the output end of the oscillation signal generating circuit, and receives the inductor current detection signal and the PWM dimming signal; when the PWM dimming signal is at a high level, the drive signal is generated based on the difference between the inductor current detection signal and the reference signal and the oscillation signal, and when the PWM dimming signal is at a low level, the drive signal remains at a low level.

[0038] Optionally, the average current controller includes: a compensation module, a pulse width modulation module, an AND logic module and a gate driving module;

[0039] The compensation module performs compensation based on the difference between the inductor current detection signal and the reference signal to obtain a compensation signal;

[0040] The pulse width modulation module is connected to the compensation module and the output end of the oscillation signal generating circuit, and performs pulse width modulation on the compensation signal based on the oscillation signal;

[0041] The logic module is connected to the output end of the pulse width modulation module, receives the PWM dimming signal, and outputs a control signal;

[0042] The gate driving module is connected to the output end of the AND logic module, and generates the driving signal based on the output signal of the AND logic module.

[0043] To achieve the above-mentioned object and other related objects, the present invention further provides an LED driving system, the LED driving system at least comprising:

[0044] Switching power supply module, LED load, sampling module and the above average current controller;

[0045] The sampling module detects the current of the inductor;

[0046] The LED load is connected to the switching power supply module and operates based on the output current of the switching power supply module;

[0047] The output end of the average current controller is connected to the gate of the power switch tube in the switching power supply module to provide a driving signal.

[0048] Optionally, the switching power supply module is a BUCK topology structure.

[0049] In order to achieve the above-mentioned object and other related objects, the present invention further provides an average current control method, which at least includes:

[0050] When the PWM dimming signal is at a high level, an oscillation signal is generated based on the PWM dimming signal, and the difference between the inductor current detection signal and the reference signal is modulated based on the oscillation signal to achieve average current control; wherein, when the duty cycle of the PWM dimming signal is less than a threshold value, the frequency of the oscillation signal decreases linearly with the increase of the duty cycle of the PWM dimming signal, and when the duty cycle of the PWM dimming signal is greater than or equal to the threshold value, the frequency of the oscillation signal remains unchanged;

[0051] When the PWM dimming signal is at a low level, the power switch tube in the switching power supply module is turned off.

[0052] Optionally, the method for generating the oscillation signal includes:

[0053] Measuring the frequency of the PWM dimming signal and generating a first clock signal, wherein the frequency of the first clock signal is proportional to the frequency of the PWM dimming signal;

[0054] The duty cycle of the PWM dimming signal is detected based on the first clock signal, and a detection signal proportional to the duty cycle of the PWM dimming signal is obtained when the duty cycle of the PWM dimming signal is less than a threshold value, and a detection signal corresponding to the threshold value is obtained when the duty cycle of the PWM dimming signal is greater than or equal to the threshold value;

[0055] The oscillation signal is generated based on the detection signal, and the frequency of the oscillation signal decreases as the detection signal increases.

[0056] More optionally, the method for implementing average current control includes:

[0057] Performing compensation according to the difference between the inductor current detection signal and the reference signal to obtain a compensation signal;

[0058] Performing pulse width modulation on the compensation signal based on the oscillation signal to obtain a control signal;

[0059] When the PWM dimming signal is at a high level, a driving signal for the power switch tube in the switching power supply module is generated based on the control signal; when the PWM dimming signal is at a low level, the power switch tube is turned off based on the driving signal.

[0060] As described above, the oscillation signal generating circuit, average current controller, method and LED driving system of the present invention have the following beneficial effects:

[0061] The oscillation signal generating circuit, average current controller, method and LED driving system of the present invention adjust the frequency of the oscillation signal based on the duty cycle of the PWM dimming signal. When the duty cycle of the PWM dimming signal is less than a threshold value, the frequency of the oscillation signal decreases linearly with the increase of the duty cycle, and maintains a minimum value when the duty cycle of the PWM dimming signal is greater than or equal to the threshold value. In this way, the inductor current ripple can be reduced, thereby reducing the value of △D / D to improve the accuracy of PWM dimming, avoiding the problem of light source jitter occurring during high-depth PWM dimming, and taking into account both the high efficiency of the system at a large dimming duty cycle and the dimming accuracy at a low dimming duty cycle. BRIEF DESCRIPTION OF THE DRAWINGS

[0062] Figure 1 Shown is a schematic diagram of the principle of a PWM dimming method.

[0063] Figure 2 Display as Figure 1 Schematic diagram of the inductor current ripple in the PWM dimming method.

[0064] Figure 3 Shown is a schematic structural diagram of the oscillation signal generating circuit of the present invention.

[0065] Figure 4 It is a schematic diagram showing the structure of the PWM dimming signal frequency detection unit of the present invention.

[0066] Figure 5 It is a schematic diagram showing the structure of the PWM dimming signal duty cycle detection unit of the present invention.

[0067] Figure 6 Shown is a schematic structural diagram of the oscillation unit of the present invention.

[0068] Figure 7 Shown is a schematic structural diagram of the average current controller of the present invention.

[0069] Figure 8 Shown is a structural schematic diagram of the LED driving system of the present invention.

[0070] Fig. 9 Another structural schematic diagram of the LED driving system of the present invention is shown.

[0071] Fig.10 Shown is another structural schematic diagram of the LED driving system of the present invention.

[0072] Fig.11 It is a schematic flow chart of the average current control method of the present invention.

[0073] Fig.12 It is a schematic diagram showing the principle of the average current control method of the present invention.

[0074] Component number description

[0075] 1Average current controller

[0076] 1a Oscillation signal generating circuit

[0077] 11PWM dimming signal frequency detection unit

[0078] 111PWM dimming signal frequency measurement module

[0079] 112 clock signal generation module

[0080] 11a First delay section

[0081] 11b First Counter

[0082] 11c first register

[0083] 11d first subtractor

[0084] 11e DAC

[0085] 11f Oscillator

[0086] 12PWM dimming signal duty cycle detection unit

[0087] 13 Oscillation units

[0088] 131 Second current source

[0089] 132 Second subtractor

[0090] 1b driving signal generating circuit

[0091] 14 Compensation module

[0092] 15 PWM module

[0093] 16 AND logic module

[0094] 17Gate drive module

[0095] 2 Switching power supply module

[0096] 3 Sampling Module DETAILED DESCRIPTION

[0097] The following describes the embodiments of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.

[0098] See also Figure 3 to Figure 12It should be noted that the illustrations provided in this embodiment are only used to illustrate the basic concept of the present invention in a schematic manner, and the drawings only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0099] The present invention provides an oscillation signal generating circuit, an average current controller, a method and an LED driving system. Aiming at the defects of the PWM dimming method under the average current control mode in the high-depth dimming situation, the frequency of the oscillation signal is increased to reduce the value of △D / D, thereby improving the accuracy of PWM dimming and avoiding the light source jitter problem that occurs during high-depth PWM dimming. The specific scheme is as follows.

[0100] like Figure 3 As shown, the present invention provides an oscillation signal generating circuit 1a, and the oscillation signal generating circuit 1a includes:

[0101] The PWM dimming signal frequency detection unit 11 , the PWM dimming signal duty cycle detection unit 12 and the oscillation unit 13 .

[0102] like Figure 3 As shown, the PWM dimming signal frequency detection unit 11 receives the PWM dimming signal PWM and generates a first clock signal Clock1 , and the frequency of the first clock signal Clock1 is proportional to the frequency of the PWM dimming signal PWM.

[0103] Specifically, any circuit structure capable of generating a clock signal having a frequency proportional to the frequency of the PWM dimming signal is applicable to the present invention, such as Figure 4 As shown, in this embodiment, the PWM dimming signal frequency detection unit 11 includes: a PWM dimming signal frequency measurement module 111 and a clock signal generation module 112. The PWM dimming signal frequency measurement module 111 counts the time of the high level of the PWM dimming signal PWM based on the second clock signal Clock2, and outputs a frequency count value after completing the counting, and the frequency count value is proportional to the frequency of the PWM dimming signal PWM. The clock signal generation module 112 is connected to the output end of the PWM dimming signal frequency measurement module 111, and generates the first clock signal Clock1 based on the frequency count value.

[0104] More specifically, if Figure 4As shown, as an example, the PWM dimming signal frequency measurement module 111 includes a first delay unit 11a, a first counter 11b, a first register 11c and a first subtractor 11d. The first delay unit 11a receives the PWM dimming signal PWM, delays the PWM dimming signal PWM and outputs a first delay signal PWMD1. As an example, the delay time is not greater than two cycles of the second clock signal Clock2. Further in this embodiment, the delay time is one clock cycle of the second clock signal Clock2. The first counter 11b is connected to the output end of the first delay unit 11a, and receives the second clock signal Clock2. It resets and starts counting up at the rising edge of the first delay signal PWMD1; that is, the first counter 11b repeatedly counts the frequency of the first delay signal PWMD1. The smaller the frequency of the first delay signal PWMD1 (the larger the cycle), the larger the count value of the first counter 11b. The first register 11c is connected to the output end of the first counter 11b, registers the value output by the first counter 11b, and reads out the latched value at the rising edge of the PWM dimming signal PWM, that is, the output value is the count value from the rising edge of the first delay signal PWMD1 to the rising edge of the PWM dimming signal PWM. The first subtractor 11d is connected to the output end of the first register 11c, subtracts the value output by the first register 11c from the preset value, and obtains the frequency count value, so that the frequency count value is proportional to the frequency of the PWM dimming signal PWM (linear change); in this embodiment, the preset value is the maximum value corresponding to the number of bits of the output value of the first register 11c. In actual use, the preset value can be set as needed, so that the relationship between the count value and the PWM dimming signal can be adjusted from inverse proportion to direct proportion, which is not limited to this embodiment.

[0105] It should be noted that the delay time is to prevent the first counter 11b from being reset when reading the data in the first register 11c, and the count value cannot be read from the first register 11c; by setting the delay time, the count value can be read out and then the reset step can be performed to ensure that the count value can be read smoothly. At this time, due to the existence of the delay time, the numerical value output from the first register 11 is approximately considered to represent the frequency of the PWM dimming signal, and the accuracy of the PWM dimming signal frequency will be lost. Therefore, the smaller the delay time, the more accurate the frequency of the PWM dimming signal measured. In this example, there will be a loss of 1-2 clock cycles. In actual use, the delay time can be set as needed to ensure that the count value is read out while meeting the accuracy requirements. In addition, any circuit structure that can detect the frequency of the PWM dimming signal is applicable to the present invention, and is not limited to this embodiment.

[0106] More specifically, if Figure 4 As shown, as an example, the clock signal generating module 112 includes a digital-to-analog converter 11e and an oscillator 11f. The digital-to-analog converter 11e is connected to the output end of the PWM dimming signal frequency measuring module 111, and converts the frequency count value into an analog signal. Any circuit structure that can realize digital-to-analog conversion is applicable, and it is not described in detail here. The oscillator 11f is connected to the output end of the digital-to-analog converter 11e, and generates the first clock signal Clock1 based on the output signal of the digital-to-analog converter 11e. In this example, the oscillator 11f is a voltage-controlled oscillator structure. In actual use, an RC oscillation structure or an LC oscillation structure can also be used, which is not described in detail here.

[0107] It should be noted that any circuit structure that can generate the first clock signal based on the frequency count value is applicable to the present invention, including but not limited to directly using a digital oscillator to generate the first clock signal, and is not limited to this embodiment.

[0108] like Figure 3 As shown, the PWM dimming signal duty cycle detection unit 12 is connected to the output end of the PWM dimming signal frequency detection unit 11, and detects the duty cycle of the PWM dimming signal PWM; when the duty cycle D of the PWM dimming signal is less than the threshold value D1, a detection signal proportional to the duty cycle D of the PWM dimming signal is output; when the duty cycle D of the PWM dimming signal is greater than or equal to the threshold value D1, a detection signal corresponding to the threshold value D1 is output.

[0109] Specifically, Figure 5As shown, in this embodiment, the PWM dimming signal duty cycle detection unit 12 includes a second delay unit 121, a second counter 122 and a second register 123. The second delay unit 122 receives the PWM dimming signal PWM, delays the PWM dimming signal PWM and outputs a second delayed signal PWMD2. As an example, the delay time is not greater than two cycles of the first clock signal Clock1. Further, in this embodiment, the delay time is one clock cycle of the first clock signal Clock1. The second counter 122 is connected to the output end of the second delay unit 121, and receives the first clock signal Clock1 and the latch signal Latch. It is reset at the falling edge of the second delay signal PWMD2, and counts up at the rising edge of the second delay signal PWMD2 to obtain a duty cycle count value Dn...D0, where n is the number of bits of the second counter; and when counting to a pre-designed value (corresponding to the duty cycle threshold D1), the counting result is latched based on the latch signal Latch. The second register 123 is connected to the output end of the second counter 122, registers the value output by the second counter 122, and latches the output signal of the second counter 122 at the falling edge of the PWM dimming signal PWM. That is, within the range where the duty cycle D of the PWM dimming signal PWM is less than the threshold value D1, the duty cycle count value increases with the increase of the duty cycle and is output via the second register 123. If the PWM dimming signal PWM jumps to a low level, the second register 123 latches the current count value until the PWM dimming signal PWM jumps to a high level and the second counter 122 counts again. After the duty cycle D of the PWM dimming signal PWM is greater than or equal to the threshold value D1, the duty cycle count value remains constant (latched by the second counter 122) and is output via the second register 123.

[0110] It should be noted that the function of delaying the PWM dimming signal in the PWM dimming signal duty cycle detection unit 12 is basically the same as that in the PWM dimming signal frequency detection unit 11, and the delay time can also be set as needed to ensure that the count value is read out while meeting the accuracy requirement. In addition, any circuit structure that can detect the duty cycle of the PWM dimming signal is applicable to the present invention, and the detection signal includes but is not limited to the count value. Any signal that can reflect the duty cycle of the PWM dimming signal is applicable, not limited to this embodiment. In this embodiment, the preset count value is the full-scale maximum count value of the second counter (11...111). The pre-designed value can be set as needed during use, and will not be described one by one here.

[0111] It should be noted that the frequency of the first clock signal Clock1 is recorded as f1=K*f PWM, K is a constant and needs to be set by the PWM dimming signal frequency detection unit 11. In this embodiment, the time T1 corresponding to the second counter being full is equal to 2 n / f1, then D1=T1*f PWM , substituting the expression of T1 into D1=f PWM *2 n / f1, since f1=K*f PWM , D1=2 n / K, then the value of K is designed to be K = 2 n / D1 can satisfy the function of adjusting the oscillation signal frequency when the duty cycle of the PWM dimming signal is lower than the threshold D1. n It can also be replaced by a count value corresponding to a duty cycle threshold D1, which will not be described in detail here. The duty cycle threshold D1 can be set according to specific process parameters as long as it can solve the light source jitter problem.

[0112] like Figure 3 As shown, the oscillation unit 13 is connected to the output end of the PWM dimming signal duty cycle detection unit 12, and is used to generate an oscillation signal OSC, the frequency of which decreases as the detection signal increases (i.e., it decreases linearly as the duty cycle of the PWM dimming signal increases).

[0113] Specifically, Figure 6 As shown, in this embodiment, the oscillation unit 13 includes: a first current source IREF, a second current source 131, a capacitor C1, a switch M1 and a comparator 132. One end of the first current source IREF is connected to the power supply voltage VCC, and the other end is grounded via the capacitor C1. One end of the second current source 131 is connected to the upper electrode of the capacitor C1, and the other end is grounded, and is controlled by the detection signal. The larger the detection signal, the larger the current flowing through the second current source 131. The input end of the comparator 132 is respectively connected to the reference voltage VREF1 and the upper plate of the capacitor C1, and an oscillation signal OSC is generated based on the comparison result. The switch M1 is connected in parallel to the two ends of the capacitor C1 and is controlled by the oscillation signal OSC; when the voltage V1 on the capacitor C1 is less than the reference voltage VREF1, the switch M1 is turned off, and when the voltage V1 on the capacitor C1 is greater than the reference voltage VREF1, the switch M1 is turned on.

[0114] More specifically, if Figure 6 As shown, the first current source IREF is used to charge the capacitor C1. In this example, the current of the first current source IREF is a fixed value.

[0115] More specifically, if Figure 6As shown, the second current source 131 is used to shunt the current of the first current source IREF to reduce the charging current of the capacitor C1, that is, the larger the detection signal is, the smaller the charging current of the capacitor C1 is. As an example, the second current source 131 includes n parallel current branches, each current branch is connected in series with a gate switch (S0~Sn), and the control end of each gate switch is respectively connected to the corresponding bit signal of the duty cycle count value (as an example, S0 corresponds to D0, S1 corresponds to D1, ... Sn corresponds to Dn), and when the corresponding bit signal is high, the current branch is turned on; as the second counter counts up, the number of gate switches turned on increases, and the current flowing through the second current source 131 gradually increases. When the duty cycle count value reaches a pre-designed value (that is, the duty cycle D of the PWM dimming signal is greater than or equal to the threshold D1), the current value of the second current source 131 reaches the maximum value Imax (the charging current reaches the minimum value), and the magnitude of the current in each current branch can be set as needed. The number of current branches is not limited to n (corresponding to the number of bits of the second counter), and can be set as needed, and need not be less than 2. The control relationship is adjusted accordingly, which is not elaborated here.

[0116] More specifically, if Figure 6 As shown, in this example, the switch M1 is implemented by an NMOS tube, the drain is connected to the upper plate of the capacitor C1, the source is grounded, and the gate is connected to the oscillation signal OSC. In actual use, any switch structure is applicable, not limited to this embodiment.

[0117] More specifically, if Figure 6As shown, as an example, the non-inverting input terminal of the comparator 132 is connected to the upper plate of the capacitor C1, and the inverting input terminal is connected to the reference voltage VREF1, and the comparison result is output as the oscillation signal OSC. When the voltage V1 across the capacitor C1 is higher than the reference voltage VREF1, the comparator 132 outputs a high level, controls the switch M1 to be turned on, and the capacitor C1 is quickly discharged to 0V. The voltage V1 across the capacitor C1 is lower than the reference voltage VREF1, and the comparator 132 outputs a low level. The OSC signal is generated repeatedly in the above manner, wherein the frequency of the oscillation signal OSC is proportional to the size of the charging current. When the duty cycle count values ​​Dn…D3D2D1D0 are all 0, the selection switches Sn…S3S2S1S0 are all disconnected, and only the first current source IREF charges the capacitor C1. At this time, the frequency of the oscillation signal OSC is the highest, Fosc=Fosc_max. When the duty cycle count values ​​Dn…D3D2D1D0 are all 1, the selection switches Sn…S3S2S1S0 are all turned on, the first current source IREF charges the capacitor C1, and the second current source 131 discharges the capacitor C1. At this time, the frequency of the oscillation signal OSC is the lowest, Fosc=Fosc_min; within the range where the duty cycle of the PWM dimming signal is less than the threshold D1, the frequency of the oscillation signal OSC decreases linearly as the duty cycle of the PWM dimming signal increases. When the duty cycle of the PWM dimming signal is greater than or equal to the threshold D1, the frequency of the oscillation signal OSC is at the lowest state.

[0118] It should be noted that any circuit structure that can generate the oscillation signal based on the duty cycle of the PWM dimming signal is applicable to the present invention, which will not be described in detail here.

[0119] When the PWM dimming signal PWM is at a low level, the frequency of the oscillation signal OCS is the oscillation frequency determined by the duty cycle of the previous PWM cycle. When the PWM dimming signal PWM is at a high level, when the duty cycle D of the PWM dimming signal changes in the range of 0 to D1, the oscillation frequency decreases linearly from Fosc_max=IREF / (C1*VREF1) to Fosc_min=(IREF-In-…-I3-I2-I1-I0) / (C1*VREF1); when the duty cycle D of the PWM dimming signal is greater than or equal to D1, the oscillation frequency remains unchanged at Fosc_min=(IREF-In-…-I3-I2-I1-I0) / (C1*VREF1). Accordingly, after the duty cycle of the PWM dimming signal is greater than D1, the inductor current ripple remains at the maximum value because the switching frequency remains at Fosc_min. When the duty cycle of the PWM dimming signal is lower than D1, the switching frequency increases linearly to Fosc_max as the duty cycle decreases, and the inductor current ripple is therefore linearly reduced, thereby improving the accuracy of high-depth PWM dimming to avoid the defect of light source jitter.

[0120] In summary, the oscillation signal generating circuit 1a of the present invention can control the frequency of the vibration signal according to the PWM dimming signal, and linearly decrease with the increase of the duty cycle within the range where the duty cycle of the PWM dimming signal is less than the threshold value D1, and maintain at the value (minimum value) corresponding to the duty cycle D1 when the duty cycle of the PWM dimming signal is greater than or equal to the threshold value D1.

[0121] like Figure 7 As shown, the present invention further provides an average current controller 1, which includes: an oscillation signal generating circuit 1a and a drive signal generating circuit 1b.

[0122] like Figure 7 As shown, the oscillation signal generating circuit 1a is used to provide an oscillation signal OSC. The structure and working principle of the oscillation signal generating circuit 1a are as mentioned above and will not be described in detail here.

[0123] like Figure 7 As shown, the drive signal generating circuit 1b is connected to the output end of the oscillation signal generating circuit 1a, and receives the inductor current detection signal Vcs and the PWM dimming signal PWM. When the PWM dimming signal PWM is at a high level, the drive signal Drv is generated based on the difference between the inductor current detection signal Vcs and the reference signal and the oscillation signal OSC. When the PWM dimming signal PWM is at a low level, the drive signal Drv remains at a low level.

[0124] Specifically, the driving signal generating circuit 1b is used to control the power switch tube in the LED switching power supply, thereby realizing average current control. Figure 7 As shown, as an example, the drive signal generating circuit 1b includes a compensation module 14, a pulse width modulation module 15, an AND logic module 16 and a gate driving module 17. The compensation module 14 performs compensation based on the difference between the inductor current detection signal Vcs and the reference signal VREF2 to obtain a compensation signal EA. The pulse width modulation module 15 is connected to the output end of the compensation module 14 and the oscillation signal generating circuit 1a, and performs pulse width modulation on the compensation signal EA based on the oscillation signal OSC. The AND logic module 16 is connected to the output end of the pulse width modulation module 15, receives the PWM dimming signal PWM, and outputs a control signal; when the PWM dimming signal PWM is at a high level, the control signal is input into the gate driving module 17, and when the PWM dimming signal PWM is at a low level, the gate driving module 17 receives a low level signal. The gate drive module 17 is connected to the output end of the AND logic module 16, and generates the drive signal Drv based on the output signal of the AND logic module 16. When the PWM dimming signal is at a high level, the power switch tube in the switching power supply is periodically controlled to be turned on or off based on the control signal. In the steady-state working state, Vcs=VREF2, then the average value of the inductor current IL_AVG=Vcs / Rcs=VREF2 / Rcs (where Rcs is the inductor current sampling resistor). Any circuit structure that can achieve average current control is applicable to the present invention, not limited to this embodiment.

[0125] As the frequency of the oscillation signal OSC increases, the proportion of ΔD (the time when the inductor current last drops) decreases during the period when the PWM dimming signal is at a high level, thereby improving the accuracy of high-depth PWM dimming to avoid the defect of light source jitter.

[0126] like Figure 8 to Figure 10 As shown, the present invention further provides an LED driving system, which includes: the average current controller 1, a switching power supply module 2, and an LED load and sampling module 3.

[0127] like Figure 8 to Figure 10 As shown, as an example, the switching power supply module 2 adopts a BUCK topology structure, including an input capacitor Cin, a freewheeling diode D, an inductor L, an output capacitor Cout and a power switch tube M2, and the specific connection relationships are not described here one by one.

[0128] like Figure 8 to Figure 10 As shown, the sampling module 3 detects the current of the inductor L to obtain an inductor current detection signal Vcs.

[0129] Specifically, in this embodiment, the sampling module 3 is implemented by a sampling resistor Rcs, and the sampling resistor Rcs is connected in series with the inductor L in the switching power supply module 2. Figure 8 As shown, as an example, the sampling resistor Rcs is connected in series between the cathode of the freewheeling diode D and the upper plate of the output capacitor Cout; Fig. 9 As shown, as another example, the sampling resistor Rcs is connected in series between the inductor L and the anode of the freewheeling diode D; Fig.10 As shown, as another example, the sampling resistor Rcs is connected in series between the connection node between the freewheeling diode D and the inductor L and the drain of the power switch tube M2; in actual use, the sampling module 3 can be set at any position that can directly or indirectly detect the current on the inductor L, and any method that can detect the current on the inductor L is applicable to the present invention, not limited to this embodiment.

[0130] like Figure 8 to Figure 10 As shown, the LED load is connected to the switching power module 2 and operates based on the output current of the switching power module 2. Specifically, the positive electrode of the LED load is connected to the upper plate of the output capacitor Cout, and the negative electrode is connected to the lower plate of the output capacitor Cout.

[0131] like Figure 8 to Figure 10 As shown, the output end of the average current controller 1 is connected to the gate of the power switch tube M2 in the switching power supply module 2 to provide a driving signal Drv. The specific structure and principle are as mentioned above and will not be described here one by one.

[0132] like Fig.11 and Fig.12 As shown, the present invention further provides an average current control method. In this embodiment, the average current control method is implemented by using the average current controller 1 of the present invention. In actual use, any method that can implement the method is applicable. The average current control method includes:

[0133] When the PWM dimming signal PWM is at a high level, an oscillation signal OCS is generated based on the PWM dimming signal PWM, and the difference between the inductor current detection signal Vcs and the reference signal VREF2 is modulated based on the oscillation signal OCS to achieve average current control; wherein, when the duty cycle of the PWM dimming signal is less than a threshold value, the frequency of the oscillation signal decreases linearly with the increase of the duty cycle of the PWM dimming signal, and when the duty cycle of the PWM dimming signal is greater than or equal to the threshold value, the frequency of the oscillation signal remains unchanged;

[0134] When the PWM dimming signal PWM is at a low level, the power switch tube in the switching power supply is turned off.

[0135] The specific steps are as follows:

[0136] 11) When the rising edge of the PWM dimming signal PWM arrives, the frequency of the PWM dimming signal PWM is measured to generate a first clock signal Clock1 proportional to the frequency of the PWM dimming signal PWM. The first clock signal Clock1 is a high-frequency clock whose frequency is greater than the frequency of the PWM dimming signal.

[0137] 12) Then, based on the first clock signal Clock1, the duty cycle of the PWM dimming signal PWM is detected. When the duty cycle D of the PWM dimming signal is less than the threshold value D1, a detection signal proportional to the duty cycle D of the PWM dimming signal is obtained. When the duty cycle D of the PWM dimming signal is greater than or equal to the threshold value D1, a detection signal corresponding to the threshold value D1 is obtained. As an example, the detection signal is a duty cycle count value, and the duty cycle of the PWM dimming signal PWM is counted up based on the first clock signal Clock1 (the initial value is 0); in actual use, any signal method that can reflect the duty cycle of the PWM dimming signal PWM is applicable to the detection signal of the present invention, and will not be described one by one here.

[0138] 13) generating the oscillation signal OSC based on the detection signal, wherein the frequency of the oscillation signal OSC decreases as the detection signal increases.

[0139] 14) Determine whether the duty cycle count value reaches a pre-designed value (in this example, the corresponding counter is full), that is, whether the duty cycle D of the PWM dimming signal is greater than or equal to the threshold D1; if not, continue to execute steps 12) and 13) to linearly reduce the frequency of the oscillation signal; if yes, keep the frequency of the oscillation signal at the minimum value.

[0140] 15) At the same time, during the process in which the PWM dimming signal PWM is at a high level, the switching power supply module implements average current control based on the adjusted oscillation signal OSC.

[0141] 16) When the falling edge of the PWM dimming signal PWM arrives, the duty cycle count value is reset to 0, the switching power supply module turns off the output current, and the dimming ends.

[0142] Specifically, the method for realizing average current control includes: performing compensation according to the difference between the inductor current detection signal Vcs and the reference signal to obtain a compensation signal EA. Performing pulse width modulation on the compensation signal EA based on the oscillation signal OSC to obtain a control signal. When the PWM dimming signal PWM is at a high level, generating a drive signal Drv of the power switch tube in the switching power supply module based on the control signal to periodically control the power switch tube in the switching power supply to turn on or off, and the frequency of the drive signal Drv is determined by the frequency of the oscillation signal OSC. When the PWM dimming signal PWM is at a low level, turning off the power switch tube based on the drive signal Drv.

[0143] It should be noted that any method that can adjust the oscillation signal based on the duty cycle of the PWM dimming signal so that the frequency of the oscillation signal decreases linearly with the increase of the duty cycle within the range where the duty cycle of the PWM dimming signal is less than the threshold D1, and the frequency is maintained at the minimum value when the duty cycle of the PWM dimming signal is greater than or equal to the threshold D1; and any method that can achieve average current control based on the oscillation signal is applicable to the present method, and is not limited to the present embodiment.

[0144] In summary, the present invention provides an oscillation signal generating circuit, an average current controller, a method and an LED driving system, comprising: a PWM dimming signal frequency detection unit, a PWM dimming signal duty cycle detection unit and an oscillation unit; the PWM dimming signal frequency detection unit receives a PWM dimming signal and is used to generate a first clock signal, the frequency of the first clock signal is proportional to the frequency of the PWM dimming signal; the PWM dimming signal duty cycle detection unit is connected to the output end of the PWM dimming signal frequency detection unit, and detects the duty cycle of the PWM dimming signal; when the duty cycle of the PWM dimming signal is less than a threshold, a detection signal proportional to the duty cycle of the PWM dimming signal is output, and when the duty cycle of the PWM dimming signal is greater than or equal to the threshold, a detection signal corresponding to the threshold is output; the oscillation unit is connected to the output end of the PWM dimming signal duty cycle detection unit, and is used to generate an oscillation signal, the frequency of the oscillation signal decreases as the detection signal increases. The oscillating signal generating circuit, average current controller, method and LED driving system of the present invention obtain higher system efficiency when the PWM dimming depth is shallow, obtain linear and stable dimming effect when the PWM dimming depth is deep, eliminate the defect of light source jitter during high-depth PWM dimming, and improve customer experience. Therefore, the present invention effectively overcomes various shortcomings in the prior art and has high industrial utilization value.

[0145] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed by the present invention shall still be covered by the claims of the present invention.

Claims

1. An oscillation signal generating circuit, applied to an average current controller, characterized in that: The oscillation signal generating circuit at least comprises: a PWM dimming signal frequency detection unit, a PWM dimming signal duty cycle detection unit and an oscillation unit; The PWM dimming signal frequency detection unit receives the PWM dimming signal and is used to generate a first clock signal, wherein the frequency of the first clock signal is proportional to the frequency of the PWM dimming signal; The PWM dimming signal duty cycle detection unit is connected to the output end of the PWM dimming signal frequency detection unit, and detects the duty cycle of the PWM dimming signal; when the duty cycle of the PWM dimming signal is less than a threshold, a detection signal proportional to the duty cycle of the PWM dimming signal is output; when the duty cycle of the PWM dimming signal is greater than or equal to the threshold, a detection signal corresponding to the threshold is output; The oscillation unit is connected to the output end of the PWM dimming signal duty cycle detection unit and is used to generate an oscillation signal, wherein the frequency of the oscillation signal decreases as the detection signal increases.

2. The oscillation signal generating circuit according to claim 1, characterized in that: The PWM dimming signal frequency detection unit includes: a PWM dimming signal frequency measurement module and a clock signal generation module; The PWM dimming signal frequency measurement module counts the time when the PWM dimming signal is at a high level based on the second clock signal, and outputs a frequency count value after completing the counting, wherein the frequency count value is proportional to the frequency of the PWM dimming signal; The clock signal generating module is connected to the output end of the PWM dimming signal frequency measuring module, and generates the first clock signal based on the frequency count value.

3. The oscillation signal generating circuit according to claim 2, characterized in that: The PWM dimming signal frequency measurement module includes: a first delay unit, a first counter, a first register and a first subtractor; The first delay unit receives the PWM dimming signal, delays the PWM dimming signal and outputs a first delayed signal, wherein the delay time is no more than two cycles of the second clock signal; The first counter is connected to the output end of the first delay unit and receives the second clock signal, and is reset and starts counting up at the rising edge of the first delay signal; The first register is connected to the output end of the first counter, stores the value output by the first counter, and reads out the latched value at the rising edge of the PWM dimming signal; The first subtractor is connected to the output end of the first register, and subtracts the value output by the first register from the preset value to obtain the frequency count value.

4. The oscillation signal generating circuit according to claim 2 or 3, characterized in that: The clock signal generating module comprises: a digital-to-analog converter and an oscillator; The digital-to-analog converter is connected to the output end of the PWM dimming signal frequency measurement module to convert the frequency count value into an analog signal; The oscillator is connected to the output terminal of the digital-to-analog converter, and generates the first clock signal based on the output signal of the digital-to-analog converter.

5. The oscillation signal generating circuit according to claim 1, characterized in that: The PWM dimming signal duty cycle detection unit includes: a second delay unit, a second counter and a second register; The second delay unit receives the PWM dimming signal, delays the PWM dimming signal and outputs a second delayed signal, wherein the delay time is no more than two cycles of the first clock signal; The second counter is connected to the output end of the second delay unit and receives the first clock signal, is reset at the falling edge of the second delay signal, counts up at the rising edge of the second delay signal, and latches the counting result when counting to a pre-designed value; The second register is connected to the output end of the second counter, registers the value output by the second counter, and latches the output signal of the second counter at the falling edge of the PWM dimming signal.

6. The oscillation signal generating circuit according to claim 1, characterized in that: The oscillation unit comprises: a first current source, a second current source, a capacitor, a switch and a comparator; One end of the first current source is connected to the power supply voltage, and the other end is grounded via the capacitor; One end of the second current source is connected to the upper electrode of the capacitor, and the other end is grounded; the second current source is controlled by the detection signal, and the larger the detection signal is, the larger the current flowing through the second current source is; The input end of the comparator is respectively connected to a reference voltage and an upper plate of the capacitor, and an oscillation signal is generated based on a comparison result; The switch is connected in parallel to both ends of the capacitor and is controlled by the oscillation signal; when the voltage on the capacitor is less than the reference voltage, the switch is turned off, and when the voltage on the capacitor is greater than the reference voltage, the switch is turned on.

7. An average current controller, characterized in that: The average current controller at least comprises: A driving signal generating circuit and an oscillation signal generating circuit as claimed in any one of claims 1 to 6; The oscillation signal generating circuit is used to provide an oscillation signal; The drive signal generating circuit is connected to the output end of the oscillation signal generating circuit, and receives the inductor current detection signal and the PWM dimming signal; when the PWM dimming signal is at a high level, the drive signal is generated based on the difference between the inductor current detection signal and the reference signal and the oscillation signal, and when the PWM dimming signal is at a low level, the drive signal remains at a low level.

8. The average current controller according to claim 7, characterized in that: The average current controller includes: a compensation module, a pulse width modulation module, an AND logic module and a gate drive module; The compensation module performs compensation based on the difference between the inductor current detection signal and the reference signal to obtain a compensation signal; The pulse width modulation module is connected to the compensation module and the output end of the oscillation signal generating circuit, and performs pulse width modulation on the compensation signal based on the oscillation signal; The logic module is connected to the output end of the pulse width modulation module, receives the PWM dimming signal, and outputs a control signal; The gate driving module is connected to the output end of the AND logic module, and generates the driving signal based on the output signal of the AND logic module.

9. An LED driving system, characterized in that: The LED driving system at least comprises: A switching power supply module, an LED load, a sampling module and an average current controller as described in any one of claims 7-8; The sampling module detects the current of the inductor; The LED load is connected to the switching power module and operates based on the output current of the switching power module; The output end of the average current controller is connected to the gate of the power switch tube in the switching power supply module to provide a driving signal.

10. The LED driving system according to claim 9, characterized in that: The switching power supply module has a BUCK topology.

11. An average current control method, characterized in that: The average current control method at least comprises: When the PWM dimming signal is at a high level, an oscillation signal is generated based on the PWM dimming signal, and the difference between the inductor current detection signal and the reference signal is modulated based on the oscillation signal to achieve average current control; wherein, when the duty cycle of the PWM dimming signal is less than a threshold value, the frequency of the oscillation signal decreases linearly with the increase of the duty cycle of the PWM dimming signal, and when the duty cycle of the PWM dimming signal is greater than or equal to the threshold value, the frequency of the oscillation signal remains unchanged; When the PWM dimming signal is at a low level, the power switch tube in the switching power supply module is turned off.

12. The average current control method according to claim 11, characterized in that: The method of generating the oscillation signal comprises: Measuring the frequency of the PWM dimming signal and generating a first clock signal, wherein the frequency of the first clock signal is proportional to the frequency of the PWM dimming signal; The duty cycle of the PWM dimming signal is detected based on the first clock signal, and a detection signal proportional to the duty cycle of the PWM dimming signal is obtained when the duty cycle of the PWM dimming signal is less than a threshold value, and a detection signal corresponding to the threshold value is obtained when the duty cycle of the PWM dimming signal is greater than or equal to the threshold value; The oscillation signal is generated based on the detection signal, and the frequency of the oscillation signal decreases as the detection signal increases.

13. The average current control method according to claim 11 or 12, characterized in that: Methods to achieve average current control include: Performing compensation according to the difference between the inductor current detection signal and the reference signal to obtain a compensation signal; Performing pulse width modulation on the compensation signal based on the oscillation signal to obtain a control signal; When the PWM dimming signal is at a high level, a driving signal for the power switch tube in the switching power supply module is generated based on the control signal; when the PWM dimming signal is at a low level, the power switch tube is turned off based on the driving signal.

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