Super junction type display device with acousto-optic sensing function and manufacturing method thereof

Abstract

The invention relates to the technical field of display manufacturing, in particular to a super-junction type display device with an acousto-optic sensing function and a manufacturing method of the super-junction type display device. The super junction type display device with the acousto-optic sensing function comprises a plurality of pixels, wherein each pixel comprises a light-emitting sub-pixel OLED, an image sensing sub-pixel CIS and an acousto-optic sub-pixel AS; and the driving backboard is provided with a plurality of via holes which are regularly arranged, and the driving backboard carries a plurality of pixels and respectively drives the light-emitting sub-pixels OLED to emit light, the image sensing sub-pixels CIS to receive external image information and the acoustoelectronic pixels AS to receive sound information. The super-junction display module with a sound sensing function is prepared by using a semiconductor process, so that not only can the display functions of high resolution, high brightness, high contrast and low response time be realized, but also external sound and images can be received in real time, and a feasible scheme is provided for single-chip integration of interactive display.

Description

Technical Field

[0001] The present invention relates to the technical field of display manufacturing, and in particular to a super junction display device equipped with an acoustic-optical sensing function and a manufacturing method thereof. Background Art

[0002] As consumers pursue a better visual experience, high-definition display products are becoming more and more popular, which has driven display technology to develop in the direction of higher resolution, higher brightness, higher contrast and lower response time. However, if the display device of the prior art needs to receive external sound and image signals, it needs to install additional chips, and the pixel arrangement of the existing display device needs to be optimized.

[0003] If superjunction technology is introduced into the manufacture of display devices, it can provide a practical solution for single-chip integration of interactive displays. Summary of the invention

[0004] The technical problem to be solved by the present invention is: in order to solve the problems existing in the prior art in the above-mentioned background technology, a super junction display device equipped with an acousto-optic sensing function and a manufacturing method thereof are provided.

[0005] The technical solution adopted by the present invention to solve the technical problem is: a super junction display device equipped with an acoustic-optical sensing function, comprising: A plurality of pixels, each of which comprises a light-emitting sub-pixel OLED, an image sensing sub-pixel CIS and an acoustic electronic pixel AS; A driving backplane, wherein a plurality of regularly arranged vias are provided on the driving backplane, wherein the light-emitting sub-pixel OLED, the image sensing sub-pixel CIS and the acoustic electronic pixel AS cover at least one of the vias, and the driving backplane carries a plurality of pixels and drives the light-emitting sub-pixel OLED to emit light, the image sensing sub-pixel CIS to receive external image information and the acoustic electronic pixel AS to receive sound information respectively; The light-emitting sub-pixel OLED, the image sensing sub-pixel CIS and the acoustic electronic pixel AS all include an anode, a semiconductor device and an ITO thin film layer, wherein the anode is arranged on the driving backplane and covers at least one via hole, the semiconductor device is located on the side of the anode away from the driving backplane, and the ITO thin film layer is located on the side of the semiconductor device away from the driving backplane; The semiconductor device comprises an N-type high-doping region and an N-type epitaxial layer. The N-type high-doping region is located at a side of the anode away from the driving back plate, and an N-type epitaxial layer is formed on the N-type high-doping region.

[0006] Further, a P column is provided in the N-type epitaxial layer, an n-region layer is provided on the N-type epitaxial layer, a p+ region is formed at a position corresponding to the p column in the n-region layer, a p-region layer is grown on the n-region layer, an n+ region layer is provided above the p-region layer, and a p+ region is also formed at a position corresponding to the p+ region in the n+ region layer, so as to form a super junction structure; A gate is provided between the upper surface of the middle section of the n+ region layer and the upper surface of the p+ region in the middle section of the n region layer. The gate is covered with an oxide film. A metal layer is provided above the n+ region layer. An ITO thin film layer is provided on the metal layer.

[0007] Further, a P region and an N region are formed in the N-type epitaxial layer, an N buffer layer is provided above the N-type epitaxial layer, and a P-well region layer and an N+ region layer are sequentially provided on the N buffer layer to form a super junction structure; A gate is provided between the upper surface of the N+ region layer and the upper surface of the N-type epitaxial layer, an oxide layer is provided outside the gate and on the N+ region layer, a metal layer is provided above the oxide layer, and an ITO film layer is provided on the metal layer.

[0008] Furthermore, a Si layer is deposited on the ITO thin film layer in the acoustic electronic pixel AS, and a sacrificial layer is made in the Si layer after release. The first MO layer, the AlN layer and the second MO layer are sequentially deposited on the side of the Si layer away from the driving backplane. The Si layer is provided with a through hole, and tungsten connecting the first MO layer and the ITO thin film layer is provided in the through hole.

[0009] Furthermore, an OLED light-emitting material layer is organically printed or evaporated on the ITO thin film layer in the light-emitting sub-pixel OLED, and an Al layer is arranged above the LED light-emitting material layer.

[0010] Furthermore, it also includes an interlayer dielectric layer and a common cathode, the interlayer dielectric layer grows and fills between the light-emitting sub-pixel OLED, the image sensing sub-pixel CIS and the acoustic electronic pixel AS, the interlayer dielectric layers corresponding to the light-emitting sub-pixel OLED, the image sensing sub-pixel CIS and the acoustic electronic pixel AS are all provided with electrode grooves, the common cathode is arranged on the side of the interlayer dielectric layer away from the driving backplane and covers the electrode grooves, in the light-emitting sub-pixel OLED, the common cathode is connected to the Al layer through the electrode groove; in the image sensing sub-pixel CIS, the common cathode is in contact with the ITO thin film layer through the electrode groove, and in the acoustic electronic pixel AS, the common cathode is in contact with the second MO layer through the electrode groove.

[0011] Furthermore, it also includes a thin film encapsulation layer and a glass encapsulation layer, the thin film encapsulation layer is arranged on the side of the common cathode away from the driving backplane and covers the common cathode, and the glass encapsulation layer is bonded to the side of the thin film encapsulation layer away from the driving backplane by UV glue.

[0012] Furthermore, a microlens is provided on the thin film encapsulation layer corresponding to the image sensing sub-pixel CIS, and the microlens overlaps with the projection of the semiconductor device in the image sensing sub-pixel CIS on the driving backplane.

[0013] A method for manufacturing a super junction display device equipped with an acoustic-optical sensing function is also mentioned, comprising the following steps: S1. Forming a number of regularly arranged vias on the driving backplane, and filling the vias with conductive materials, then forming a number of anodes on the upper surface of the driving backplane, and each anode covers at least one via, and then sequentially growing an N-type highly doped region and an N-type epitaxial layer on the anode to form a semiconductor layer, and then patterning the semiconductor layer; S2, forming a P column in the N-type epitaxial layer by an ion implantation process, then growing an n-region layer on the N-type epitaxial layer, then implanting ions in the n-region layer to obtain a p+ region, then growing a p-region layer on the n-region layer, then implanting ions in the p-region layer to obtain an n+ region layer with an internal p+ region, thereby forming a super junction structure; S3, etching from the upper surface of the n+ region layer to the upper surface of the p+ region in the middle of the n region layer to form a groove, and growing and patterning an oxide layer; S4, depositing a polysilicon gate in the trench with an oxide layer, and growing and patterning an oxide film outside the gate to seal the gate; S5, plating a metal layer on the surface of the n+ region layer so that the metal layer fills the source electrode notch; plating an ITO thin film layer on the surface of the metal layer, growing and filling an interlayer dielectric layer, and smoothing the interlayer dielectric layer using a chemical mechanical polishing process so that the upper surface of the interlayer dielectric layer is flush with the upper surface of the ITO thin film layer; S6, depositing a Si layer on the ITO thin film layer of the acoustic electronic pixel AS and patterning it, then completing the deposition and patterning of a sacrificial layer on the Si layer, and then performing deep silicon etching and drilling, and then depositing tungsten in the hole using a CVD process; depositing a first MO layer, an AlN layer, and a second MO layer on the surface of the Si layer of the acoustic electronic pixel AS in sequence, and patterning them, and then releasing the sacrificial layer; S7, organically printing or evaporating an OLED light-emitting material layer on the ITO thin film layer of the light-emitting sub-pixel OLED, growing a 100 nm Al layer on the OLED light-emitting material layer, then continuing to grow an interlayer dielectric layer, and sequentially manufacturing a common cathode and a thin film encapsulation layer on the grown interlayer dielectric layer; S8. A microlens is made on the upper surface of the thin film packaging layer corresponding to the image sensing sub-pixel CIS, and finally the glass packaging layer is bonded to the top of the thin film packaging layer using UV glue.

[0014] Another method for manufacturing a super junction display device with an acoustic-optical sensing function is also mentioned, comprising the following steps: Sa. Forming a number of regularly arranged vias on the driving backplane, and filling the vias with a conductive material, then forming a number of anodes on the upper surface of the driving backplane, and each anode covers at least one via, and then sequentially growing an N-type highly doped region and an N-type epitaxial layer on the anode to form a semiconductor layer, and then patterning the semiconductor layer; Sb, forming a P region and an N region in the N-type epitaxial layer, then growing silicon on the N-type epitaxial layer, forming an N buffer layer by an ion implantation process, and forming a P-well region layer and an N+ region layer by ion implantation on the N buffer layer, thereby forming a super junction structure; Sc, etching begins on the upper surface of the N+ region layer to the N buffer layer to form a groove, and an oxide layer is grown, and a polysilicon gate is deposited in the groove with the oxide layer; Sd, deposit and pattern an oxide layer, then etch a through hole, implant ions to form a P+ region, and deposit metal on the oxide layer to form a metal layer, so that the metal layer fills the source electrode notch; Se, plating an ITO thin film layer on the surface of the metal layer, growing and filling an interlayer dielectric layer, and smoothing the interlayer dielectric layer using a chemical mechanical polishing process so that the upper surface of the interlayer dielectric layer is flush with the upper surface of the ITO thin film layer; Sf, depositing a Si layer on the ITO thin film layer of the acoustic electronic pixel AS and patterning it, then completing the deposition and patterning of a sacrificial layer on the Si layer, and then performing deep silicon etching and drilling, and then depositing tungsten in the hole using a CVD process; depositing a first MO layer, an AlN layer, and a second MO layer on the surface of the Si layer of the acoustic electronic pixel AS in sequence, and patterning them, and then releasing the sacrificial layer; Sg, organically printing or evaporating an OLED light-emitting material layer on the ITO thin film layer of the light-emitting sub-pixel OLED, growing a 100nm Al layer on the OLED light-emitting material layer, then continuing to grow an interlayer dielectric layer, and sequentially manufacturing a common cathode and a thin film encapsulation layer on the grown interlayer dielectric layer; Sh, a microlens is made on the upper surface of the thin film packaging layer corresponding to the image sensing sub-pixel CIS, and finally the glass packaging layer is bonded to the top of the thin film packaging layer using UV glue.

[0015] Beneficial effects of the present invention: The present invention uses semiconductor technology to prepare a super junction display module equipped with a sound sensing function, which can not only achieve display functions of high resolution, high brightness, high contrast and low response time, but also can receive external sounds and images in real time, providing a practical solution for single-chip integration of interactive display. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The present invention is further described below in conjunction with the accompanying drawings and embodiments.

[0017] Figure 1 It is a structural diagram of embodiment 1 of the present invention.

[0018] Figure 2 It is a schematic diagram of step 1 of embodiment 1 of the present invention.

[0019] Figure 3 It is a schematic diagram of step 2 of embodiment 1 of the present invention.

[0020] Figure 4 It is a schematic diagram of step 3 of embodiment 1 of the present invention.

[0021] Figure 5 It is a schematic diagram of step 4 of embodiment 1 of the present invention.

[0022] Figure 6 It is a schematic diagram of step 5 of embodiment 1 of the present invention.

[0023] Figure 7 It is a schematic diagram of step 6 of embodiment 1 of the present invention.

[0024] Figure 8 It is a schematic diagram of step 7 of embodiment 1 of the present invention.

[0025] Fig. 9 It is a schematic diagram of step 8 of embodiment 1 of the present invention.

[0026] Fig.10 It is a structural diagram of embodiment 2 of the present invention.

[0027] Fig.11 It is a schematic diagram of step a of embodiment 2 of the present invention.

[0028] Fig.12 It is a schematic diagram of step b of embodiment 2 of the present invention.

[0029] Fig.13 It is a schematic diagram of step c of embodiment 2 of the present invention.

[0030] Fig.14 It is a schematic diagram of step d of embodiment 2 of the present invention.

[0031] Fig.15 It is a schematic diagram of step e of embodiment 2 of the present invention.

[0032] Fig.16 It is a schematic diagram of step f of embodiment 2 of the present invention.

[0033] Fig.17 It is a schematic diagram of step g of embodiment 2 of the present invention.

[0034] Fig.18 It is a schematic diagram of step h of embodiment 2 of the present invention.

[0035] Fig.19 It is a diagram of the optimized pixel arrangement scheme of Embodiment 1 and Embodiment 2 of the present invention.

[0036] Fig. 20 1 is a driving circuit diagram of Embodiment 1 and Embodiment 2 of the present invention.

[0037] In the figure: 1. driving backplane; 2. via; 3. anode; 4. semiconductor device; 41. N-type highly doped region; 42. N-type epitaxial layer; 43. P column; 44. n region layer; 45. p+ region; 46. p region layer; 47. n+ region layer; 48. gate; 49. oxide layer; 410. metal layer; 411. P region; 412. N region; 413. N buffer layer; 414. P-well region layer; 415. N+ region layer; 5. ITO thin film layer; 6. Si layer; 7. sacrificial layer; 8. first MO layer; 9. AlN layer; 10. second MO layer; 11. tungsten; 12. OLED light-emitting material layer; 13. Al layer; 14. interlayer dielectric layer; 15. common cathode; 16. thin film encapsulation layer; 17. glass encapsulation layer; 18. microlens. DETAILED DESCRIPTION

[0038] The present invention will now be described in further detail with reference to the accompanying drawings. These drawings are simplified schematic diagrams, which only illustrate the basic structure of the present invention in a schematic manner, and therefore only show the components related to the present invention.

[0039] Embodiment 1 like Figure 1 As shown, a super junction display device equipped with an acoustic-optical sensing function comprises: A plurality of pixels, each pixel includes a light-emitting sub-pixel OLED, an image sensing sub-pixel CIS and an acoustic electronic pixel AS; a driving backplane 1, on which a plurality of regularly arranged vias 2 are provided, the light-emitting sub-pixel OLED, the image sensing sub-pixel CIS and the acoustic electronic pixel AS cover at least one via 2, the driving backplane 1 carries a plurality of pixels, and respectively drives the light-emitting sub-pixel OLED to emit light, the image sensing sub-pixel CIS to receive external image information and the acoustic electronic pixel AS to receive sound information; the light-emitting sub-pixel OLED, the image sensing sub-pixel CIS and the acoustic electronic pixel AS all include an anode 3, a semiconductor device 4 and an ITO thin film layer 5, the anode 3 is arranged on the driving backplane 1 and covers at least one via 2, the semiconductor device 4 is located on a side of the anode 3 away from the driving backplane 1, and the ITO thin film layer 5 is located on a side of the semiconductor device 4 away from the driving backplane 1.

[0040] It also includes: an interlayer dielectric layer 14, a common cathode 15, a thin film encapsulation layer 16 and a glass encapsulation layer 17. The interlayer dielectric layer 14 is grown and filled between the light-emitting sub-pixel OLED, the image sensing sub-pixel CIS and the acoustic electronic pixel AS. The interlayer dielectric layer 14 corresponding to the light-emitting sub-pixel OLED, the image sensing sub-pixel CIS and the acoustic electronic pixel AS is provided with an electrode groove. The common cathode 15 is arranged on the side of the interlayer dielectric layer 14 away from the driving backplane 1 and covers the electrode groove. The thin film encapsulation layer 16 is arranged on the side of the common cathode 15 away from the driving backplane 1 and covers the common cathode. The glass encapsulation layer 17 is bonded to the side of the thin film encapsulation layer 16 away from the driving backplane 1 by UV glue. A microlens 18 is arranged on the thin film encapsulation layer 16 corresponding to the image sensing sub-pixel CIS, and the microlens 18 overlaps with the projection of the semiconductor device in the image sensing sub-pixel CIS on the driving backplane 1.

[0041] The semiconductor device 4 includes an N-type high-doping region 41, which is located on the side of the anode 3 away from the driving backplane 1. An N-type epitaxial layer 42 is formed on the N-type high-doping region 41, a P column 43 is arranged in the N-type epitaxial layer 42, an n-region layer 44 is arranged on the N-type epitaxial layer 42, a p+ region 45 is formed in the n-region layer 44 at a position corresponding to the p column 43, a p-region layer 46 is grown on the n-region layer 44, an n+ region layer 47 is arranged above the p-region layer 46, and a p+ region 45 is also formed in the n+ region layer 47 at a position corresponding to the p+ region 45, so as to form a super junction structure. A gate 48 is arranged between the upper surface of the middle section of the n+ region layer 47 and the upper surface of the p+ region 45 in the middle section of the n-region layer 44, and the gate 48 is coated with an oxide film 49, a metal layer 410 is arranged above the n+ region layer 47, and an ITO thin film layer 5 is arranged on the metal layer 410.

[0042] A Si layer 6 is deposited on the ITO film layer 5 in the acoustic electronic pixel AS, and a PSG (phosphoric acid silicon glass) sacrificial layer 7 is made in the Si layer 6 after being released. The first MO layer 8, the AlN layer 9 and the second MO layer 10 are deposited in sequence on the side of the Si layer 6 away from the driving backplane 1. The Si layer 6 is provided with a through hole, and a tungsten 11 connecting the first MO layer 8 and the ITO film layer 5 is provided in the through hole. An OLED light-emitting material layer 12 is organically printed or evaporated on the ITO film layer 5 in the light-emitting sub-pixel OLED, and an Al layer 13 is provided above the LED light-emitting material layer 12. In the light-emitting sub-pixel OLED, the common cathode 15 is connected to the Al layer 13 through the electrode groove; in the image sensing sub-pixel CIS, the common cathode 15 contacts the ITO film layer 5 through the electrode groove, and in the acoustic electronic pixel AS, the common cathode 15 contacts the second MO layer 10 through the electrode groove.

[0043] The method for preparing the super junction display device with an acoustic-optical sensing function of the first embodiment is specifically as follows: Step 1: Figure 2As shown, a number of regularly arranged vias 2 are formed on the driving backplane 1, and conductive materials (Via-vertical conductive channels) are filled in the vias 2, and then a number of anodes 3 are formed on the upper surface of the driving backplane 1, and each anode 3 covers at least one via 2, and then an N-type highly doped region 41 and an N-type epitaxial layer 42 are sequentially grown on the anodes 3 to form a semiconductor layer, and then the semiconductor layer is patterned; S2, such as Figure 3 As shown, an ion implantation process is used to form a P column 43 in an N-type epitaxial layer 42, and then an n-region layer 44 is grown on the N-type epitaxial layer 42, and then ions are implanted in the n-region layer 44 to obtain a p+ region 45, and then a p-region layer 46 is grown on the n-region layer 44, and then ions are implanted in the p-region layer 46 to obtain an n+ region layer 47 with a p+ region 45 inside, thereby forming a super junction structure; S3, such as Figure 4 As shown, a trench is formed by etching from the upper surface of the n+ region layer 47 to the upper surface of the p+ region 45 in the middle of the n region layer 44, and an oxide layer 49 is grown and patterned; S4, such as Figure 5 As shown, a polysilicon gate 48 is deposited in a trench with an oxide layer, and an oxide film 49 is grown and patterned outside the gate 48 to seal the gate; S5, such as Figure 6 As shown, a metal layer 410 is plated on the surface of the n+ region layer 47 so that the metal layer 410 fills the source electrode notch; an ITO thin film layer 5 is plated on the surface of the metal layer 410, and an interlayer dielectric layer is grown to fill the interlayer dielectric layer, and a chemical mechanical polishing process is used to polish the interlayer dielectric layer 14 so that the upper surface of the interlayer dielectric layer 14 is flush with the upper surface of the ITO thin film layer 5; S7, such as Figure 7 As shown, a Si layer 6 is deposited on the ITO thin film layer 5 of the acoustic electronic pixel AS and patterned, and then a PSG sacrificial layer 7 is deposited and patterned on the Si layer 6, and then deep silicon etching is performed to drill holes and tungsten 11 is deposited in the holes using a CVD process; a first MO layer 8, an AlN layer 9, and a second MO layer 10 are sequentially deposited on the surface of the Si layer 6 of the acoustic electronic pixel AS and patterned, and then the sacrificial layer 7 is released; S8, such as Figure 8 As shown, an OLED light-emitting material layer 12 is organically printed or evaporated on the ITO thin film layer 5 of the light-emitting sub-pixel OLED, a 100nm Al layer 13 is grown on the OLED light-emitting material layer 12, and then an interlayer dielectric layer 14 is grown, and a common cathode 15 and a thin film encapsulation layer 16 are sequentially made on the grown interlayer dielectric layer 14; S9, such as Fig. 9 As shown, a microlens 18 is made on the upper surface of the thin film encapsulation layer 16 corresponding to the image sensing sub-pixel CIS, and finally the glass encapsulation layer 17 is bonded to the top of the thin film encapsulation layer 16 using UV glue, and the current flow is shown by the red arrow.

[0044] Embodiment 2 like Figures 10 to 18 As shown, the difference from the first embodiment is that: a P region 411 and an N region 412 are formed in the N-type epitaxial layer 42 of the semiconductor device 4, an N buffer layer 413 is provided above the N-type epitaxial layer 42, and a P-well region layer 414 and an N+ region layer 415 are provided in sequence on the N buffer layer 413 to form a super junction structure; a P+ region 45 is formed in the upper middle portion of the P-well region layer 414, a gate 48 is provided between the upper surface of the N+ region layer 415 and the upper surface of the N-type epitaxial layer 42, an oxide layer 49 is provided outside the gate 48 and on the N+ region layer 415, a metal layer 410 is provided above the oxide layer 49, and an ITO thin film layer 5 is provided on the metal layer 410.

[0045] The method for preparing a super junction display device with an acoustic-optical sensing function according to the second embodiment is as follows: Step a: Fig.11 As shown, a number of regularly arranged via holes 2 are formed on the driving backplane 1, and a conductive material is filled in the via holes 2. Subsequently, a number of anodes 3 are formed on the upper surface of the driving backplane 1, and each anode 3 covers at least one via hole 2. Then, an N-type highly doped region 41 and an N-type epitaxial layer 42 are sequentially grown on the anodes 3 to form a semiconductor layer, and then the semiconductor layer is patterned; Step Sb: Fig.12 As shown, a P region 411 and an N region 412 are formed in an N-type epitaxial layer 42, silicon is grown on the N-type epitaxial layer 42, an N buffer layer 413 is formed by an ion implantation process, and a P-well region layer 414 and an N+ region layer 415 are formed by ion implantation on the N buffer layer 413, thereby forming a super junction structure; Step c: Fig.13 As shown, etching is started from the upper surface of the N+ region layer 415 to the N-type buffer layer 413 to form a groove, and an oxide layer 49 is grown, and a polysilicon gate 48 is deposited in the groove with the oxide layer; Step d: Fig.14 As shown, after depositing and patterning the oxide layer 49, a through hole is etched, ions are implanted to form a P+ region 45, and metal is deposited on the oxide layer 49 to form a metal layer 410, so that the metal layer 410 fills the source electrode notch; Step e: Fig.15 As shown, an ITO thin film layer 5 is plated on the surface of the metal layer 410, and an interlayer dielectric layer 14 is grown and filled, and the interlayer dielectric layer 14 is smoothed by a chemical mechanical polishing process, so that the upper surface of the interlayer dielectric layer 14 is flush with the upper surface of the ITO thin film layer 5; Step f: Fig.16As shown, a Si layer 6 is deposited on the ITO thin film layer 5 of the acoustic electronic pixel AS and patterned, and then a sacrificial layer is deposited and patterned on the Si layer 6, and then deep silicon etching is performed to drill holes and tungsten 11 is deposited in the holes using a CVD process; a first MO layer 8, an AlN layer 9, and a second MO layer 10 are sequentially deposited on the surface of the Si layer 6 of the acoustic electronic pixel AS, and patterned, and then the sacrificial layer 7 is released; Step g: Fig.17 As shown, an OLED light-emitting material layer 12 is organically printed or evaporated on the ITO thin film layer 5 of the light-emitting sub-pixel OLED, a 100nm Al layer 13 is grown on the OLED light-emitting material layer 12, and then an interlayer dielectric layer 14 is grown, and a common cathode 15 and a thin film encapsulation layer 16 are sequentially made on the grown interlayer dielectric layer 14; Step h: Fig.18 As shown, a microlens 18 is made on the upper surface of the thin film encapsulation layer 16 corresponding to the image sensing sub-pixel CIS, and finally the glass encapsulation layer 17 is bonded to the top of the thin film encapsulation layer 16 using UV glue, and the current flow is shown by the red arrow.

[0046] The optimized pixel arrangement schemes of the first and second embodiments are as follows: Fig.19 As shown, a pixel includes two square light-emitting sub-pixels OLED, a square image sensing sub-pixel CIS and a square acoustic electronic pixel AS. In terms of spatial distribution, the four vertices of a square include a long strip of OLED pixel groups and CIS and AS pixel groups located at the other two vertices, and the side length of the square is equal to the pixel width. Four concentrated image sensing sub-pixels CIS or acoustic electronic pixels AS form a group, and two concentrated light-emitting sub-pixels OLED form a group.

[0047] Embodiment 1 and embodiment 2 adopt Fig.19 The pixel optimization arrangement scheme shown in combination with the high-resolution driving backplane 1 can break through the physical limit of the existing high-resolution metal mask FMM, achieving high-resolution, high-brightness, high-contrast display with low response time.

[0048] Embodiment 1 and embodiment 2 are matched as follows Fig. 20 The driving circuit shown can improve the performance and reliability of the display, and has the beneficial effects of high integration, low power consumption, high speed and good stability, so that it has a wide range of applications.

[0049] Based on the above ideal embodiments of the present invention, the relevant staff can make various changes and modifications without departing from the technical concept of the present invention through the above description. The technical scope of the present invention is not limited to the contents of the specification, and its technical scope must be determined according to the scope of the claims.

Claims

1. A super junction display device equipped with an acoustic-optical sensing function, characterized in that: include: A plurality of pixels, each of which comprises a light-emitting sub-pixel OLED, an image sensing sub-pixel CIS and an acoustic electronic pixel AS; A driving backplane, wherein a plurality of regularly arranged vias are provided on the driving backplane, wherein the light-emitting sub-pixel OLED, the image sensing sub-pixel CIS and the acoustic electronic pixel AS cover at least one of the vias, and the driving backplane carries a plurality of pixels and drives the light-emitting sub-pixel OLED to emit light, the image sensing sub-pixel CIS to receive external image information and the acoustic electronic pixel AS to receive sound information respectively; The light-emitting sub-pixel OLED, the image sensing sub-pixel CIS and the acoustic electronic pixel AS all include an anode, a semiconductor device and an ITO thin film layer, wherein the anode is arranged on the driving backplane and covers at least one via hole, the semiconductor device is located on the side of the anode away from the driving backplane, and the ITO thin film layer is located on the side of the semiconductor device away from the driving backplane; The semiconductor device comprises an N-type high-doping region and an N-type epitaxial layer. The N-type high-doping region is located at a side of the anode away from the driving back plate, and an N-type epitaxial layer is formed on the N-type high-doping region.

2. The super junction display device with an acousto-optic sensing function according to claim 1, characterized in that: A P column is arranged in the N-type epitaxial layer, an n-region layer is arranged on the N-type epitaxial layer, a p+ region is formed in the n-region layer at a position corresponding to the p column, a p-region layer is grown on the n-region layer, an n+ region layer is arranged above the p-region layer, and a p+ region is also formed in the n+ region layer at a position corresponding to the p+ region, so as to form a super junction structure; A gate is provided between the upper surface of the middle section of the n+ region layer and the upper surface of the p+ region in the middle section of the n region layer. The gate is covered with an oxide film. A metal layer is provided above the n+ region layer. An ITO thin film layer is provided on the metal layer.

3. The super junction display device with an acousto-optic sensing function according to claim 1, characterized in that: A P region and an N region are formed in the N-type epitaxial layer, an N buffer layer is provided above the N-type epitaxial layer, and a P-well region layer and an N+ region layer are sequentially provided on the N buffer layer to form a super junction structure; A gate is provided between the upper surface of the N+ region layer and the upper surface of the N-type epitaxial layer, an oxide layer is provided outside the gate and on the N+ region layer, a metal layer is provided above the oxide layer, and an ITO film layer is provided on the metal layer.

4. The super junction display device with an acousto-optic sensing function according to claim 2 or 3, characterized in that: A Si layer is deposited on the ITO thin film layer in the acoustic electronic pixel AS, and a sacrificial layer is made in the Si layer after release. The first MO layer, the AlN layer and the second MO layer are sequentially deposited on the side of the Si layer away from the driving backplane. The Si layer is provided with a through hole, and tungsten connecting the first MO layer and the ITO thin film layer is provided in the through hole.

5. The super junction display device with an acousto-optic sensing function according to claim 4, characterized in that: An OLED light-emitting material layer is organically printed or evaporated on the ITO thin film layer in the light-emitting sub-pixel OLED, and an Al layer is arranged above the LED light-emitting material layer.

6. The super junction display device with an acousto-optic sensing function according to claim 5, characterized in that: It also includes an interlayer dielectric layer and a common cathode, wherein the interlayer dielectric layer is grown and filled between the light-emitting sub-pixel OLED, the image sensing sub-pixel CIS and the acoustic electronic pixel AS, and the interlayer dielectric layers corresponding to the light-emitting sub-pixel OLED, the image sensing sub-pixel CIS and the acoustic electronic pixel AS are all provided with electrode grooves, and the common cathode is arranged on a side of the interlayer dielectric layer away from the driving backplane and covers the electrode grooves, and in the light-emitting sub-pixel OLED, the common cathode is connected to the Al layer through the electrode grooves; in the image sensing sub-pixel CIS, the common cathode is in contact with the ITO thin film layer through the electrode grooves, and in the acoustic electronic pixel AS, the common cathode is in contact with the second MO layer through the electrode grooves.

7. The super junction display device with an acousto-optic sensing function according to claim 1, characterized in that: It also includes a thin film encapsulation layer and a glass encapsulation layer. The thin film encapsulation layer is arranged on the side of the common cathode away from the driving backplane and covers the common cathode. The glass encapsulation layer is bonded to the side of the thin film encapsulation layer away from the driving backplane by UV glue.

8. The super junction display device with acousto-optic sensing function according to claim 7, characterized in that: A microlens is arranged on the thin film encapsulation layer corresponding to the image sensing sub-pixel CIS, and the microlens overlaps with the projection of the semiconductor device in the image sensing sub-pixel CIS on the driving backplane.

9. A method for manufacturing a super junction display device with an acoustic-optical sensing function as claimed in claim 2, characterized in that: The steps include: S1. Forming a number of regularly arranged vias on the driving backplane, and filling the vias with conductive materials, then forming a number of anodes on the upper surface of the driving backplane, and each anode covers at least one via, and then sequentially growing an N-type highly doped region and an N-type epitaxial layer on the anode to form a semiconductor layer, and then patterning the semiconductor layer; S2, forming a P column in the N-type epitaxial layer by an ion implantation process, then growing an n-region layer on the N-type epitaxial layer, then implanting ions in the n-region layer to obtain a p+ region, then growing a p-region layer on the n-region layer, then implanting ions in the p-region layer to obtain an n+ region layer with an internal p+ region, thereby forming a super junction structure; S3, etching from the upper surface of the n+ region layer to the upper surface of the p+ region in the middle of the n region layer to form a groove, and growing and patterning an oxide layer; S4, depositing a polysilicon gate in the trench with an oxide layer, and growing and patterning an oxide film outside the gate to seal the gate; S5, plating a metal layer on the surface of the n+ region layer so that the metal layer fills the source electrode notch; plating an ITO thin film layer on the surface of the metal layer, growing and filling an interlayer dielectric layer, and smoothing the interlayer dielectric layer using a chemical mechanical polishing process so that the upper surface of the interlayer dielectric layer is flush with the upper surface of the ITO thin film layer; S6, depositing a Si layer on the ITO thin film layer of the acoustic electronic pixel AS and patterning it, then completing the deposition and patterning of a sacrificial layer on the Si layer, and then performing deep silicon etching and drilling, and then depositing tungsten in the hole using a CVD process; depositing a first MO layer, an AlN layer, and a second MO layer on the surface of the Si layer of the acoustic electronic pixel AS in sequence, and patterning them, and then releasing the sacrificial layer; S7, organically printing or evaporating an OLED light-emitting material layer on the ITO thin film layer of the light-emitting sub-pixel OLED, growing a 100 nm Al layer on the OLED light-emitting material layer, then continuing to grow an interlayer dielectric layer, and sequentially manufacturing a common cathode and a thin film encapsulation layer on the grown interlayer dielectric layer; S8. A microlens is made on the upper surface of the thin film packaging layer corresponding to the image sensing sub-pixel CIS, and finally the glass packaging layer is bonded to the top of the thin film packaging layer using UV glue.

10. A method for manufacturing a super junction display device with an acousto-optic sensing function as claimed in claim 3, characterized in that: The steps include: Sa. Forming a number of regularly arranged vias on the driving backplane, and filling the vias with a conductive material, then forming a number of anodes on the upper surface of the driving backplane, and each anode covers at least one via, and then sequentially growing an N-type highly doped region and an N-type epitaxial layer on the anode to form a semiconductor layer, and then patterning the semiconductor layer; Sb, forming a P region and an N region in the N-type epitaxial layer, then growing silicon on the N-type epitaxial layer, forming an N buffer layer by an ion implantation process, and forming a P-well region layer and an N+ region layer by ion implantation on the N buffer layer, thereby forming a super junction structure; Sc, etching begins on the upper surface of the N+ region layer to the N buffer layer to form a groove, and an oxide layer is grown, and a polysilicon gate is deposited in the groove with the oxide layer; Sd, deposit and pattern an oxide layer, then etch a through hole, implant ions to form a P+ region, and deposit metal on the oxide layer to form a metal layer, so that the metal layer fills the source electrode notch; Se, plating an ITO thin film layer on the surface of the metal layer, growing and filling an interlayer dielectric layer, and smoothing the interlayer dielectric layer using a chemical mechanical polishing process so that the upper surface of the interlayer dielectric layer is flush with the upper surface of the ITO thin film layer; Sf, depositing a Si layer on the ITO thin film layer of the acoustic electronic pixel AS and patterning it, then completing the deposition and patterning of a sacrificial layer on the Si layer, and then performing deep silicon etching and drilling, and then depositing tungsten in the hole using a CVD process; depositing a first MO layer, an AlN layer, and a second MO layer on the surface of the Si layer of the acoustic electronic pixel AS in sequence, and patterning them, and then releasing the sacrificial layer; Sg, organically printing or evaporating an OLED light-emitting material layer on the ITO thin film layer of the light-emitting sub-pixel OLED, growing a 100nm Al layer on the OLED light-emitting material layer, then continuing to grow an interlayer dielectric layer, and sequentially manufacturing a common cathode and a thin film encapsulation layer on the grown interlayer dielectric layer; Sh, a microlens is made on the upper surface of the thin film packaging layer corresponding to the image sensing sub-pixel CIS, and finally the glass packaging layer is bonded to the top of the thin film packaging layer using UV glue.

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