Semiconductor device

Abstract

[Problem] To provide a semiconductor device that can protect a glass substrate and is highly reliable even when using a laminated glass substrate. [Solution] A semiconductor device according to an embodiment of the present invention comprises: a glass substrate having a first surface, a second surface on the opposite side from the first surface, and a first side surface between the first surface and the second surface; a first frame-like material having a third surface on the first surface side, a fourth surface on the second surface side, and a first inner surface facing the first side surface, the first frame-like material being disposed around the glass substrate; a first insulating film disposed between the first side surface and the first inner surface and disposed on the first surface and the third surface; a first wiring layer disposed on the first insulating film disposed on the first surface and the third surface; and a second insulating film disposed on the first wiring layer.

Description

Technical Field

[0001] The present disclosure relates to a semiconductor device. Background Art

[0002] The glass substrate is applicable to semiconductor processing technology, has a low coefficient of thermal expansion (CTE), and is excellent in flatness, and thus is promising as a substrate for semiconductor devices such as optical components or high-frequency components.

[0003] Reference List

[0004] Patent Literature

[0005] Patent Document 1: Japanese Patent Application Publication No. 2021-108317

[0006] Patent Document 2: Japanese Patent Application Publication No. 2015-135940

[0007] Patent Document 3: Japanese Patent Application Publication No. 2015-118954 Summary of the invention

[0008] Problems to be solved by the present invention

[0009] Due to damage generated when the glass substrate is divided by dicing, the mechanical strength of the glass substrate may be reduced. Therefore, in order to improve the mechanical strength of the glass substrate, it is considered to provide a frame member around the glass substrate.

[0010] However, due to the difference between the thickness of the glass substrate and the thickness of the frame member, disconnection or deformation may occur. In addition, there are cases where the difference in thermal expansion coefficient between the glass substrate and the mounting substrate may damage the connection between the glass substrate and the mounting substrate.

[0011] In addition, when a glass stack substrate obtained by stacking a plurality of glass thin plates is used as a glass substrate, it is difficult to control the thickness with high precision. The thickness of wiring in the glass stack substrate becomes thinner, and impedance matching with respect to high frequencies may become difficult.

[0012] Therefore, the present disclosure provides a semiconductor device that can protect a glass substrate even when a glass stack substrate is used and has high reliability.

[0013] Solution to the problem

[0014] A semiconductor device according to one aspect of the present disclosure includes: a glass substrate including a first surface, a second surface opposite to the first surface, and a first side surface between the first surface and the second surface; a first frame-shaped material having a third surface located on the first surface side, a fourth surface located on the second surface side, and a first inner surface facing the first side surface, the first frame-shaped material being arranged around the glass substrate; a first insulating film arranged between the first side surface and the first inner surface and arranged on the first surface and the third surface; a first wiring layer arranged on the first insulating film on the first surface and the third surface; and a second insulating film arranged on the first wiring layer.

[0015] The first insulating film is also provided on the second surface and the fourth surface, and the semiconductor device further includes a second wiring layer provided on the first insulating film on the second and fourth surfaces, and a third insulating film provided on the second wiring layer.

[0016] The semiconductor device further includes a first pad provided on the third surface and electrically connected to the first wiring layer exposed from the second insulating film.

[0017] The semiconductor device further includes a second pad provided on the fourth surface and electrically connected to the second wiring layer exposed from the third insulating film.

[0018] The glass substrate further includes a plurality of stacked glass sheets, a third wiring layer disposed between the glass sheets, and a fourth insulating film disposed between the glass sheets.

[0019] The first surface of the glass substrate and the third surface of the first frame-shaped material are offset in the thickness direction of the glass substrate, and the surface of the first insulating film is substantially flush over the first surface and the third surface.

[0020] The second surface of the glass substrate and the fourth surface of the first frame-shaped material are offset in the thickness direction of the glass substrate, and the surface of the first insulating film is substantially flush over the second surface and the fourth surface.

[0021] The Young's modulus of the first insulating film on the second and fourth surfaces is lower than that of the first insulating film on the first and third surfaces.

[0022] The semiconductor device further includes an electronic component that is provided on the third surface or the fourth surface of the first frame-shaped material and is electrically connected to the first wiring or the second wiring.

[0023] The semiconductor device further includes a first capacitance element which is provided between the third surface of the first frame-shaped material and the first insulating film and is configured by stacking the first conductive film, the fifth insulating film, and the second conductive film.

[0024] The semiconductor device further includes a second capacitance element which is provided between the fourth surface of the first frame-shaped material and the first insulating film and is configured by stacking the first conductive film, the fifth insulating film, and the second conductive film.

[0025] The semiconductor device further includes a first through electrode provided between the third surface and the fourth surface of the first frame-shaped material and electrically connected between the first wiring and the second wiring.

[0026] The semiconductor device further includes: a semiconductor chip disposed on the glass substrate; a frame disposed on the third surface of the first frame-shaped material; a lens disposed on the frame and disposed above the semiconductor chip; and a fastening member assembled into a fastening hole disposed in the first frame-shaped material and a fastening hole disposed in the frame to fix the frame to the first frame-shaped material.

[0027] The semiconductor device further includes a semiconductor chip provided on the glass substrate, a frame provided on the third surface of the first frame-shaped material, and a protection member provided on the frame and above the semiconductor chip.

[0028] The semiconductor device further includes: a semiconductor chip disposed on the glass substrate; a second frame-shaped material including a second through-electrode electrically connected to the first wiring, the second frame-shaped material being disposed on the first frame-shaped material; and a metal wire connecting the semiconductor chip and the second through-electrode.

[0029] The semiconductor device further includes: a semiconductor chip provided on the glass substrate; and a frame provided on the third surface of the first frame-shaped material and having a third conductive film electrically connecting the semiconductor chip and the first wiring.

[0030] A semiconductor device includes: a glass substrate including a first surface, a second surface opposite to the first surface, and a first side surface between the first surface and the second surface; a first frame-shaped material having a third surface on the first surface side, a fourth surface on the second surface side, and a first inner surface facing the first side surface, the first frame-shaped material being arranged around the glass substrate and having a higher heat dissipation than the glass substrate; and a first insulating film being arranged between the first side surface and the first inner surface and on the first surface and the third surface.

[0031] According to one aspect of the present disclosure, a method for manufacturing a semiconductor device includes: arranging a glass substrate, the glass substrate including a first surface and a second surface opposite to the first surface; and a first frame-shaped material including a third surface on the first surface side, a fourth surface on the second surface side, and a first inner surface, in which the first inner surface and the first side surface are faced to each other in the first frame-shaped material, a first insulating film is formed between the first side surface and the first inner surface and on the first surface and the third surface, a first wiring layer is formed on the first insulating film on the first surface and the third surface, and a second insulating film is formed on the first wiring layer.

[0032] A method for manufacturing a semiconductor device according to one aspect of the present disclosure includes: arranging a glass substrate, the glass substrate including a first surface and a second surface opposite to the first surface; and a first frame-shaped material including a third surface on the first surface side, a fourth surface on the second surface side, and a first inner surface, and having a higher heat dissipation than the glass substrate in the first frame-shaped material, so that the first inner surface and the first side surface face each other, and forming a first insulating film between the first side surface and the first inner surface and on the first surface and the third surface. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 is a plan view showing a configuration example of the semiconductor device according to the first embodiment.

[0034] Figure 2 is a cross-sectional view showing a configuration example of the semiconductor device according to the first embodiment.

[0035] Figure 3 1 is a cross-sectional view showing the structure of the periphery of the end portion of the glass substrate 10 .

[0036] Figure 4 is a cross-sectional view showing a configuration example of a semiconductor device according to a second embodiment.

[0037] Figure 5 is a cross-sectional view showing a configuration example of a semiconductor device according to a third embodiment.

[0038] Figure 6 is a cross-sectional view showing a configuration example of a semiconductor device according to a fourth embodiment.

[0039] Figure 7 is a cross-sectional view showing a configuration example of a semiconductor device according to a fifth embodiment.

[0040] Figure 8 It is a cross-sectional view showing a modification of the fourth or fifth embodiment.

[0041] Fig. 9 is a cross-sectional view showing a configuration example of a semiconductor device according to a sixth embodiment.

[0042] Fig.10 is a cross-sectional view showing a configuration example of a semiconductor device according to a sixth embodiment.

[0043] Fig.11 Cross-sectional views illustrating examples of a staggered structure, a stacked via structure, and a via structure.

[0044] Fig.12 is a schematic plan view showing a configuration example of a semiconductor device according to a seventh embodiment.

[0045] Fig.13 is a cross-sectional view showing a configuration example of a semiconductor device according to a seventh embodiment.

[0046] Fig.14 is a cross-sectional view showing a configuration example of a semiconductor device according to an eighth embodiment.

[0047] Fig.15 is a cross-sectional view showing a configuration example of a semiconductor device according to a ninth embodiment.

[0048] Fig.16 is a cross-sectional view showing a configuration example of a semiconductor device according to a tenth embodiment.

[0049] Fig.17 is a cross-sectional view showing a configuration example of a semiconductor device according to an eleventh embodiment.

[0050] Fig.18 is a cross-sectional view showing an example of a glass substrate.

[0051] Fig.19 is a cross-sectional view showing an example of a glass substrate.

[0052] Fig. 20 is a cross-sectional view showing an example of a frame-shaped material.

[0053] Fig.21 is a cross-sectional view showing an example of a frame-shaped material.

[0054] Fig. 22 is a cross-sectional view showing an example of a frame-shaped material.

[0055] Fig.23 It is a plan view showing the structure of the frame-shaped material 20 before cutting.

[0056] Fig.24A is a cross-sectional view showing an example of a method for manufacturing the semiconductor device according to the first embodiment.

[0057] Fig. 24B is a cross-sectional view showing an example of a method for manufacturing the semiconductor device according to the first embodiment.

[0058] Fig.24C is a cross-sectional view showing an example of a method for manufacturing the semiconductor device according to the first embodiment.

[0059] Fig.24D is a cross-sectional view showing an example of a method for manufacturing the semiconductor device according to the first embodiment.

[0060] Fig.24E is a cross-sectional view showing an example of a method for manufacturing the semiconductor device according to the first embodiment.

[0061] Fig.24F is a cross-sectional view showing an example of a method for manufacturing the semiconductor device according to the first embodiment.

[0062] Figure 24G is a cross-sectional view showing an example of a method for manufacturing the semiconductor device according to the first embodiment.

[0063] Fig.25 is a plan view illustrating an example of a method for manufacturing a semiconductor device.

[0064] Fig.26 is a plan view showing an example of a method for manufacturing a semiconductor device according to a seventh embodiment.

[0065] Fig. 27 is a cross-sectional view showing an example of a method for manufacturing a semiconductor device according to an eighth embodiment.

[0066] Fig.28 is a cross-sectional view showing an example of a method for manufacturing a semiconductor device according to an eighth embodiment.

[0067] Fig.29A is a cross-sectional view showing an example of a method for manufacturing a semiconductor device according to a ninth embodiment.

[0068] Fig.29B is a cross-sectional view showing an example of a method for manufacturing a semiconductor device according to a ninth embodiment.

[0069] Fig.29C It is a cross-sectional view showing an example of a method for manufacturing a semiconductor device according to the ninth embodiment.

[0070] Fig.29D is a cross-sectional view showing an example of a method for manufacturing a semiconductor device according to a ninth embodiment.

[0071] Fig. 30A is a cross-sectional view showing an example of a method for manufacturing a semiconductor device according to an eleventh embodiment.

[0072] Fig. 30B is a cross-sectional view showing an example of a method for manufacturing a semiconductor device according to an eleventh embodiment.

[0073] Fig. 30C is a cross-sectional view showing an example of a method for manufacturing a semiconductor device according to an eleventh embodiment.

[0074] Fig.31A is a plan view showing an example of a method for manufacturing a semiconductor device according to an eleventh embodiment.

[0075] Fig.31B is a plan view showing an example of a method for manufacturing a semiconductor device according to an eleventh embodiment.

[0076] Fig.31C is a plan view showing an example of a method for manufacturing a semiconductor device according to an eleventh embodiment.

[0077] Fig.31D is a plan view showing an example of a method for manufacturing a semiconductor device according to an eleventh embodiment.

[0078] Fig.32 : is a diagram showing an example in which an embodiment according to the present technology is used as a CMOS image sensor. DETAILED DESCRIPTION

[0079] Hereinafter, specific embodiments of the present technology will be described in detail with reference to the accompanying drawings. The accompanying drawings are schematic or conceptual, and the ratios of the various parts, etc. are not necessarily the same as the actual ones. In the description and drawings, elements similar to the above-mentioned elements with respect to the previously described drawings are represented by the same reference numerals, and their detailed descriptions are appropriately omitted.

[0080] (First Embodiment)

[0081] Figure 1 is a plan view showing a configuration example of the semiconductor device according to the first embodiment. Figure 2 is a cross-sectional view showing a configuration example of a semiconductor device according to the first embodiment. Note that Figure 1 The positional relationship among the glass substrate 10, the frame-shaped material 20, the semiconductor chip 30, and the insulating film 40 is shown, and illustration of other detailed configurations is omitted. The position of the semiconductor chip 30 is indicated by a dotted line.

[0082] like Figure 1As shown, the semiconductor chip 30 is mounted on the central portion of the glass substrate 10. A frame-shaped material 20 is provided around the glass substrate 10 so as to continuously cover the entire side surface of the glass substrate 10. The semiconductor chip 30 is not particularly limited, but may be, for example, a complementary metal oxide semiconductor (CMOS) image sensor chip (CMOS image sensor (CIS)). An insulating film 40 as a first insulating film is provided between the side surface of the glass substrate 10 and the inner side surface of the frame-shaped material 20. In addition, on the surface of the glass substrate 10, a plurality of pads 50 are arranged in a manner surrounding the periphery of the semiconductor chip 30.

[0083] like Figure 2 As shown, the glass substrate 10 includes a first surface F1, a second surface F2 opposite to the first surface F1, and a side surface (first side surface) Fs1 located between the first surface F1 and the second surface F2. The glass substrate 10 includes a plurality of glass sheets 11, a wiring layer 12, an insulating film 13, and a through electrode 14.

[0084] A plurality of glass sheets 11 are stacked in the thickness direction (Z direction). A wiring layer 12 is disposed between the plurality of glass sheets 11 adjacent to each other in the Z direction. An insulating film 13 as a fourth insulating film is also disposed between the plurality of glass sheets 11 adjacent to each other in the Z direction. The wiring layer 12 is formed on the surface of each glass sheet 11 by electroplating, sputtering, etc., and is processed into an arbitrary layout pattern. For the wiring layer 12, for example, a conductive metal material such as copper is used. The insulating film 13 is disposed in a manner that covers the wiring layer 12 on the surface of each glass sheet 11. The through electrode 14 penetrates each thin glass sheet 11 and electrically connects the wiring layer on the front surface of the thin glass sheet 11 and the wiring layer on the rear surface thereof. Similar to the wiring layer 12, for example, a conductive metal material such as copper is used for the through electrode 14.

[0085] The glass substrate 10 is configured by stacking a plurality of glass thin plates 11 having a wiring layer 12 and an insulating film 13. Note that the glass substrate 10 may be a glass stack substrate obtained by stacking a plurality of glass thin plates 11, or may be a single-layer glass substrate.

[0086] The frame-shaped material 20 as a first frame-shaped material is arranged to surround the periphery of the glass substrate 10. The frame-shaped material 20 has a third surface F3 on the first surface F1 side, a fourth surface F4 on the second surface F2 side, and a first inner surface Fs2 facing the first side surface Fs1. As the frame-shaped material 20, for example, an insulating material such as glass epoxy is used. The frame-shaped material 20 may be a copper clad laminate (CCL) having a copper film provided on the surface. The frame-shaped material 20 covers and protects the first side surface Fs1 of the glass substrate 10. Therefore, the mechanical strength of the glass substrate 10 can be improved, and the cracking of the glass substrate 10 can be suppressed.

[0087] The insulating film 40 is provided between the first side surface Fs1 of the glass substrate 10 and the first inner side surface Fs2 of the frame-shaped material 20. In addition, the insulating film 40 is also provided on the first surface F1 of the glass substrate 10 and the third surface F3 of the frame-shaped material 20. In addition, the insulating film 40 is also provided on the second surface F2 of the glass substrate 10 and the fourth surface F4 of the frame-shaped material 20. For the insulating film 40, for example, an insulating material such as an epoxy-based resin or a polyimide-based resin is used.

[0088] The insulating film 40 fills the gap between the glass substrate 10 and the frame-shaped material 20, and covers the front and rear surfaces (F1 to F4) of the glass substrate 10 and the frame-shaped material 20. Therefore, the glass substrate 10 is fixed to the frame-shaped material 20. In addition, the first surface F1 of the glass substrate 10 and the third surface F3 of the frame-shaped material 20 may be substantially flush, and the second surface F2 of the glass substrate 10 and the fourth surface F4 of the frame-shaped material 20 may be substantially flush.

[0089] The wiring layer 42 is disposed on the insulating film 40. The wiring layer 42 is disposed on the insulating film 40 on the first surface F1 and the second surface F2, and is processed into a desired layout pattern. In addition, a through hole 41 penetrating the insulating film 40 is provided. The through hole 41 electrically connects the wiring layer 42 on the insulating film 40 and the wiring layer 12 on the first surface F1 of the glass substrate 10. For the wiring layer 42 and the through hole 41, for example, a conductive metal material such as copper is used. In this way, the insulating film 40 and the wiring layer 42 constitute a redistribution layer. Hereinafter, the insulating film 40, the through hole 41 and the wiring layer 42 are also referred to as redistribution layers 40 to 42. The redistribution layers 40 to 42 are not limited to single-layer wiring, and can be multi-layer wiring layers.

[0090] The redistribution layers 40 to 42 are also provided on the third surface F3 and the fourth surface F4 of the frame-shaped material 20. That is, the wiring layer 42 is provided on the insulating film 40 on the third surface F3 and the fourth surface F4, and is processed into a desired layout pattern. In addition, the through hole 41 penetrating the insulating film 40 may be provided on the third surface F3 and the fourth surface F4 of the frame-shaped material 20.

[0091] As described above, according to the present embodiment, the redistribution layers 40 to 42 are provided on the third surface F3 and the fourth surface F4 of the frame-shaped material 20 .

[0092] An insulating film 70 as a second insulating film is provided on the redistribution layers 40 to 42 on the first surface F1 and the third surface F3. The insulating film 70 is also provided on the redistribution layers 40 to 42 on the second surface F2 and the fourth surface F4. The insulating film 70 covers and protects the redistribution layers 40 to 42. For the insulating film 70, for example, an insulating material such as an epoxy-based resin, a polyimide-based resin, or a solder resist is used.

[0093] The pad 50 as the first pad is exposed from the insulating film 70 provided on the first surface F1 and the second surface F2 of the glass substrate 10, and is electrically connected to each wiring layer 42. The pad 50 on the first surface F1 side is used as a pad connected to the metal line 60. The pad 50 on the second surface F2 side is exposed from the insulating film 70 provided on the second surface F2 of the glass substrate 10, and is used as a land grid array (LGA). Note that a metal bump (not shown) can be formed on the pad 50 on the second surface F2 side to form a ball grid array (BGA). In addition, the pad 50 can be an electrode for connecting a connector. For the pad 50, for example, a conductive metal material such as copper is used.

[0094] The pads 50 on the first surface F1 side are electrically connected to the redistribution layers 40 to 42, and are electrically connected to the pads 50 on the second surface F2 side via the wiring layer 12 and the through-electrode 14 in the glass substrate 10. Therefore, the semiconductor chip 30 can receive power supply from a mounting substrate (not shown) on the second surface F2 side via the wiring of the glass substrate 10 or transmit signals to the mounting substrate.

[0095] The glass substrate 10 , the frame-shaped material 20 , the redistribution layers 40 to 42 , the spacer 50 , and the insulating film 70 may be configured as a glass interposer of the semiconductor chip 30 .

[0096] The semiconductor chip 30 is provided on the insulating film 70 on the first surface F1 of the glass substrate 10. The semiconductor chip 30 is bonded to the insulating film 70 using an adhesive layer (e.g., a chip attach film (DAF)) not shown. The metal wire 60 electrically connects the pad of the semiconductor chip 30 and the pad 50. The semiconductor chip 30 is, for example, an imaging element such as a CIS, and is formed using a silicon substrate.

[0097] Figure 34 is a cross-sectional view showing the structure of the periphery of the end of the glass substrate 10. Even if the first surface F1 of the glass substrate 10 and the third surface F3 of the frame-shaped material 20 are offset in the thickness direction (Z direction), the insulating film 40 fills the step G and can provide a substantially flat and flush surface. Therefore, the wiring layer 42 can be formed on the flat insulating film 40. In addition, even when the second surface F2 of the glass substrate 10 and the fourth surface F4 of the frame-shaped material 20 are offset in the thickness direction (Z direction), the insulating film 40 fills the step to provide a substantially flat and flush surface. Therefore, the wiring layer 42 can be formed on the flat insulating film 40. As a result, the disconnection of the wiring layer 42 can be suppressed.

[0098] In addition, the insulating film 40 on the first surface F1 and the second surface F2 may have a stacked structure in which a glass cloth material 40b is laminated in an insulating material 40a using an epoxy-based resin or a polyimide-based resin. Therefore, while keeping the Young's modulus of the insulating film 40 between the glass substrate 10 and the frame-shaped material 20 relatively low to maintain a buffer function, the Young's modulus of the insulating film 40 on the first and second surfaces F1 and F2 can be increased to enhance strength and flatness.

[0099] As described above, according to the present embodiment, due to the thickness difference between the glass substrate 10 and the frame-shaped material 20, the insulating film 40 can fill the step G to provide a substantially flush surface on the first surface F1 and the third surface F3. Similarly, the insulating film 40 can provide a substantially flush surface on the second surface F2 and the fourth surface F4. Therefore, the wiring layer 42 can be formed on the glass substrate 10 and the frame-shaped material 20. In addition, the disconnection of the wiring layer 42 can be suppressed, resulting in an improvement in reliability.

[0100] (Second Embodiment)

[0101] Figure 4 2 is a cross-sectional view showing a configuration example of a semiconductor device according to a second embodiment. In the second embodiment, the Young's modulus of the insulating film 40 on the second surface F2 and the fourth surface F4 side is smaller than the Young's modulus of the insulating film 40 on the first surface F1 and the third surface F3 side. For example, the amount of glass filler contained in the insulating film 40 on the second surface F2 and the fourth surface F4 side is made smaller than the amount of glass filler contained in the insulating film 40 on the first surface F1 and the third surface F3 side. Therefore, the Young's modulus of the insulating film 40 on the second surface F2 and the fourth surface F4 side can be reduced.

[0102] Mounting substrate (not shown) is arranged on the second surface F2 and the fourth surface F4 side, and the pad 50 on the second surface F2 and the fourth surface F4 side is connected to the mounting substrate. Mounting substrate is usually a printed substrate using organic material. In this case, the glass as the main component of the glass substrate 10 and the thermal expansion coefficient (CTE) of the silicon as the main component of the semiconductor chip 30 are similar, but the CTE of the organic material of the mounting substrate is very different. Therefore, relatively large stress can be applied to the connecting portion, such as the pad 50 on the second surface F2 and the fourth surface F4 side. It should be noted that the CTE of organic material is greater than glass or silicon, that is, Young's modulus is smaller.

[0103] Therefore, in the second embodiment, the Young's modulus of the insulating film 40 on the second surface F2 and the fourth surface F4 side is reduced to a value close to that of the organic material. Therefore, the stress applied to the joint between the pad 50 and the mounting substrate can be relaxed, and the reliability of the semiconductor device can be improved.

[0104] The other configurations of the second embodiment may be similar to those of the first embodiment. Therefore, the second embodiment can obtain similar effects to those of the first embodiment.

[0105] (Third Embodiment)

[0106] Figure 5 is a cross-sectional view showing a configuration example of a semiconductor device according to a third embodiment. In the third embodiment, not only the redistribution layers 40 to 42 but also the pads 50 are provided on the third surface F3 and / or the fourth surface F4 of the frame-shaped material 20. The pads (first pads) 50 on the third surface F3 side are exposed from the insulating film 70 and are electrically connected to the redistribution layers 40 to 42 on the third surface F3 side. The pads (second pads) 50 on the fourth surface F4 side are exposed from the insulating film 70 and are electrically connected to the redistribution layers 40 to 42 on the fourth surface F4 side.

[0107] The pads 50 on the third surface F3 side are electrically connected to the pads 50 on the fourth surface F4 side via the wiring layer 12 and the through-electrode 14 in the glass substrate 10. Therefore, the semiconductor chip 30 can receive power supply from the mounting substrate (not shown) on the fourth surface F4 side via the wiring of the glass substrate 10 or transmit signals to the mounting substrate.

[0108] According to the present embodiment, even if the first surface F1 of the glass substrate 10 and the third surface F3 of the frame-shaped material 20 are offset in the thickness direction (Z direction), the insulating film 40 fills the step G and can provide a substantially flat and flush surface. In addition, even when the second surface F2 of the glass substrate 10 and the fourth surface F4 of the frame-shaped material 20 are offset in the thickness direction (Z direction), the insulating film 40 fills the step to provide a substantially flat and flush surface. In particular, it is difficult to control the thickness of the glass substrate 10 laminated with the glass thin plate 11. However, the insulating film 40 can fill the step between the first surface F1 of the glass substrate 10 and the third surface F3 of the frame-shaped material 20 to provide a substantially flat and flush surface. In addition, the insulating film 40 can fill the step between the second surface F2 of the glass substrate 10 and the fourth surface F4 of the frame-shaped material 20 to provide a substantially flat and flush surface. Therefore, while maintaining high reliability, the redistribution layers 40 to 42 can be easily disposed not only on the first surface F1 and the second surface F2 of the glass substrate 10, but also on the third surface F3 and the fourth surface F4 of the frame-shaped material 20. In addition, the pad 50 can also be easily disposed on the third surface F3 and the fourth surface F4 of the frame-shaped material 20 while maintaining high reliability.

[0109] The glass substrate 10 is more expensive than the frame-shaped material 20. In particular, the cost of the glass substrate 10 laminated with the glass thin plate 11 is high. On the other hand, although the glass substrate 10 is preferable for mounting the semiconductor chip 30 from the viewpoint of CTE and flatness, other wirings and pads are not necessarily mounted on the glass substrate 10.

[0110] Therefore, in the third embodiment, the semiconductor chip 30 is disposed on the glass substrate 10, and the redistribution layers 40 to 42 and the pads 50 are disposed on the glass substrate 10 and the frame-shaped material 20. Therefore, the redistribution layers 40 to 42 and the pads 50 may be disposed on the first surface F1 to the fourth surface F4 including the glass substrate 10 and the frame-shaped material 20. Therefore, the degree of freedom of arrangement of the redistribution layers 40 to 42 and the pads 50 may be improved. In addition, the size of the glass substrate 10 may be reduced according to the size of the semiconductor chip 30, and the manufacturing cost may be reduced.

[0111] By increasing the degree of freedom of arranging the pad 50 on the first surface F1 and the third surface F3, the degree of freedom of routing the metal wire 60 is increased. By increasing the degree of freedom of arranging the pad 50 on the second surface F2 and the fourth surface F4, the degree of freedom of arranging (layout design) of the LGA or BGA is increased, and various mounting substrates can be handled. This is effective in the case where the number of pins increases as the number of functions of the semiconductor chip 30 increases.

[0112] The other configurations of the third embodiment may be similar to those of the first embodiment or the second embodiment. Therefore, in the third embodiment, the same effects as those of the first or second embodiment can be obtained.

[0113] As described above, the insulating film 40 provides substantially flush surfaces on the first surface F1 and the third surface F3, and provides substantially flush surfaces on the second surface F2 and the fourth surface F4. Therefore, it is possible to shorten the length of the metal wire 60. As a result, the impedance between the semiconductor chip 30 and the pad 50 on the second surface F2 side can be reduced, resulting in an improvement in the reliability of the semiconductor device.

[0114] (Fourth Embodiment)

[0115] Figure 6 1 is a cross-sectional view showing a configuration example of a semiconductor device according to a fourth embodiment. In the fourth embodiment, an electronic component 80 is provided on the third surface F3 of the frame-shaped material 20. The electronic component 80 may be, for example, an electronic component such as a capacitor, an inductor, or a resistor. The electronic component 80 is electrically connected to the redistribution layers 40 to 42 via the pad 50.

[0116] As described above, the electronic components 80 other than the semiconductor chip 30 can be arranged on the third surface F3 of the frame-shaped material 20 which is cheaper than the glass substrate 10. Therefore, the degree of freedom of arrangement (layout design) of the electronic components 80 is improved. In addition, by reducing the size of the glass substrate 10, the manufacturing cost can be reduced. In addition, in the case where the electronic components cannot be mounted on the second surface F2 and the fourth surface F4, the electronic components can be arranged on the third surface F3 side.

[0117] like Figure 8 As shown, in the case where the electronic components can be mounted on the fourth surface F4 of the frame-shaped material 20, the electronic components 80 can be disposed on the fourth surface F4 of the frame-shaped material 20. In this case, the electronic components 80 are electrically connected to the redistribution layers 40 to 42 via the pads 50 on the fourth surface F4 side.

[0118] The other configurations of the fourth embodiment may be similar to those of any of the first to third embodiments. Therefore, the fourth embodiment can obtain effects similar to those of the first to third embodiments.

[0119] (Fifth Embodiment)

[0120] Figure 7is a cross-sectional view showing an example of a configuration of a semiconductor device according to a fifth embodiment. The fifth embodiment is similar to the fourth embodiment in that an electronic component 80 is disposed on the third surface F3 of the frame-shaped material 20. The fifth embodiment is different from the fourth embodiment in that a capacitor 90 is further disposed on the third surface F3 of the frame-shaped material 20. The capacitor 90 as a first capacitive element may be a thin film capacitor (e.g., a metal-insulator-metal (MIM) capacitor) in which a conductive film 91, an insulating film 92, and a conductive film 93 are stacked on the third surface F3. The capacitor 90 is disposed between the third surface F3 of the frame-shaped material 20 and the electronic component 80 or between the third surface F3 of the frame-shaped material 20 and the insulating film 40.

[0121] The two electrodes (91, 93) of the capacitor 90 are electrically connected to the pad 50 or the electronic component 80 via the redistribution layers 40 to 42, and are electrically connected to the semiconductor chip 30 and / or the mounting substrate (not shown). The through hole 100 is provided to penetrate the insulating film 40, the conductive film 91 and the insulating film 92 so as to connect the lower electrode (93) of the capacitor 90 and the redistribution layers 40 to 42. The through hole 101 is provided to penetrate the insulating film 40 so as to connect the upper electrode (91) of the capacitor 90 and the redistribution layers 40 to 42. For the conductive films 91 and 93 and the through holes 100 and 101, for example, a conductive metal material such as copper or tungsten is used. The insulating film 92 uses, for example, the same material as the insulating film 40.

[0122] In this way, the capacitor 90 and the electronic element 80 can be provided in the frame-shaped material 20. Before the glass substrate 10 is assembled into the frame-shaped material 20, the capacitor 90 may be previously formed in the frame-shaped material 20. In addition, the capacitor 90 may be provided in the redistribution layers 40 to 42 on the insulating film 40.

[0123] When the capacitor 90 is used for power storage, stable power can be supplied to the electronic element 80 or the semiconductor chip 30. In addition, when the capacitor 90 is used as a filter for signal transmission, noise can be removed from the signal. Therefore, the capacitor 90 can improve power integrity (PI) or signal integrity (SI).

[0124] (Variation Example)

[0125] Figure 8 1 is a cross-sectional view showing a modification of the fourth or fifth embodiment. In this modification, the electronic component 80 is not only arranged on the third surface F3 side, but also on the fourth surface F4 side. In this case, the electronic component 80 is electrically connected to the redistribution layers 40 to 42 on the fourth surface F4 side via the pad 50 on the fourth surface F4 side.

[0126] In addition, the capacitor 90 is provided not only on the third surface F3 side of the frame-shaped material 20, but also on the fourth surface F4 side. A plurality of capacitors 90 can be applied to corresponding applications of power supply and signal transmission. In this case, power integrity and signal integrity can be improved.

[0127] Furthermore, electronic components other than the capacitor may be provided on third surface ( F3 ) and / or fourth surface ( F4 ) of frame-shaped material 20 . Therefore, more functions may be implemented in frame-shaped material 20 .

[0128] (Sixth Embodiment)

[0129] Fig. 9 and Fig.10 is a cross-sectional view showing a configuration example of a semiconductor device according to a sixth embodiment. In the sixth embodiment, a through electrode 110 is provided to penetrate between the third surface F3 and the fourth surface F4 of the frame-shaped material 20. One end of the through electrode 110 is electrically connected to the redistribution layer 40 to 42 on the third surface F3 side, and the other end is electrically connected to the redistribution layer 40 to 42 on the fourth surface F4 side. The through electrode 110 can have a low impedance electrical connection to the redistribution layer 40 to 42 on the first surface F1 and the third surface F3 side and the redistribution layer 40 to 42 on the second surface F2 and the fourth surface F4 side without inserting a wiring layer in the glass substrate 10.

[0130] exist Fig. 9 In FIG. 1 , one through electrode 110 is provided on each side of the frame-shaped material 20. Fig.10 In the embodiment of the present invention, two through electrodes 110 are provided on each side of the frame-shaped material 20. The number of through electrodes 110 provided in the frame-shaped material 20 is not particularly limited and may be arbitrary.

[0131] The through electrode 110 may be formed by embedding a conductive metal material (eg, copper, tungsten, etc.) in a through hole provided between the third surface F3 and the fourth surface F4 of the frame-shaped material 20. The through electrode 110 may have such a through hole structure, a staggered structure, a stacked through hole structure, etc. Fig.11 Cross-sectional views for explaining examples of staggered structures, stacked via structures, and via structures. The staggered structure is a structure in which multiple vias offset in a direction intersecting the Z direction are connected by wiring. The stacked via structure is a structure in which multiple vias stacked in the Z direction are directly connected. The via structure is a structure in which conductive materials are concentratedly embedded in vias formed in multiple insulating films. Alternatively, the via structure may be a structure in which the inner side surface is covered with a conductive material and an insulating material is embedded inside the conductive material.

[0132] The through-electrode 110 connects the redistribution layers 40 to 42 on the first surface F1 and the third surface F3 side and the redistribution layers 40 to 42 on the second surface F2 and the fourth surface F4 side with low resistance. Therefore, in the case where the through-electrode 110 is used for power supply, the through-electrode 110 can supply power to the semiconductor chip 30 with less waste while suppressing voltage reduction. In the case where the through-electrode 110 is used for signal transmission, since the through-electrode 110 has a small impedance loss, the signal can be transmitted at high speed and with low noise.

[0133] Furthermore, in the case where the layout of the pads 50 and the redistribution layers 40 to 42 is not complicated, a single-layer glass substrate may be used for the glass substrate 10, and the redistribution layers 40 to 42 on the first surface F1 side and the redistribution layers 40 to 42 on the second surface F2 side may all be connected via the through-electrodes 110 of the frame-shaped material 20. It should be noted that the arrangement of the pads 50 may be handled by forming the redistribution layers 40 to 42 into a multi-layer wiring structure.

[0134] The other configurations of the sixth embodiment may be similar to those of any of the first to fifth embodiments. Therefore, according to the sixth embodiment, the same effects as those of the first to fifth embodiments can be obtained.

[0135] (Seventh Embodiment)

[0136] Fig.12 is a schematic plan view showing a configuration example of a semiconductor device according to a seventh embodiment. Fig.13 is a cross-sectional view showing a configuration example of a semiconductor device according to a seventh embodiment. Fig.13 Corresponding to the Fig.12 A cross section taken along line 13-13.

[0137] like Fig.12 As shown, the semiconductor chip 30 is arranged to overlap on the glass substrate 10. The fastening hole TH is provided in a portion of the frame-shaped material 20. The frame 120 is provided to overlap with the fastening hole TH of the frame-shaped material 20. The fastening hole TH can be formed in the frame-shaped material 20 using a drill or a laser. In addition, the shape of the frame-shaped material 20 can be freely designed by processing with a router or the like.

[0138] like Fig.13As shown, in the seventh embodiment, the frame 120 and the lens 130 are fixed to the frame-shaped material 20 by fitting the fastening member 140 into the fastening hole TH and the frame 120. The frame 120 is a frame-shaped member arranged on the third surface F3 of the frame-shaped material 20 in a manner surrounding the glass substrate 10 and the semiconductor chip 30, similarly to the frame-shaped material 20. For the frame 120, for example, an insulating material such as resin is used. In the seventh embodiment, the lens 130 is fixed to the frame 120, but the frame 120 may be a mounting substrate (printed substrate), a lens module or a housing (not shown) of the device.

[0139] The fastening member 140 is fitted into the fastening hole TH and the fastening hole provided in the frame 120 to fix the frame 120 to the frame-shaped material 20. For example, the fastening member 140 may be a screw, etc. If necessary, a sleeping portion, an insert, and a screw seat 141 may be provided between the fastening member 140 and the inner wall of the fastening hole of the frame-shaped material 20 and the frame 120.

[0140] The lens 130 is provided on the frame 120 and is arranged to cover the upper portion of the semiconductor chip 30. The lens 130 only needs to be bonded to the frame 120 using an adhesive or the like. Therefore, the lens 130 is fixed to the light receiving surface of the semiconductor chip 30 and is modularized as an integrated semiconductor device. The lens 130 can collect light on the light receiving surface of the semiconductor chip 30.

[0141] The other configurations of the seventh embodiment may be the same as those of any of the first to sixth embodiments. Therefore, according to the seventh embodiment, the same effects as those of the first to sixth embodiments can be obtained.

[0142] (Eighth Embodiment)

[0143] Fig.14 1 is a cross-sectional view showing an example of a configuration of a semiconductor device according to an eighth embodiment. In the eighth embodiment, a frame 120 is bonded to an insulating film 70 on the third surface F3 side of a frame-shaped material 20. The frame 120 is arranged around the periphery of a semiconductor chip 30 arranged on a glass substrate 10. A sealing glass 150 is bonded to the frame 120 as a protective member. The sealing glass 150 is arranged above the semiconductor chip 30. The frame 120 and the sealing glass 150 are fixed to the frame-shaped material 20 and the glass substrate 10. Therefore, the frame 120 and the sealing glass 150 can protect the semiconductor chip 30. Electronic components other than the semiconductor chip 30 can be arranged inside the frame 120.

[0144] The other configurations of the eighth embodiment may be similar to those of any of the first to sixth embodiments. Therefore, according to the eighth embodiment, the same effects as those of the first to sixth embodiments can be obtained.

[0145] (Ninth Embodiment)

[0146] Fig.15 is a cross-sectional view showing a configuration example of a semiconductor device according to a ninth embodiment In the ninth embodiment, a frame-shaped material 160 as a second frame-shaped material is provided on the frame-shaped material 20 , and a frame 120 is provided on the frame-shaped material 160 .

[0147] Frame-shaped material 160 has fifth surface F5 and sixth surface F6 opposite to fifth surface F5. Fifth surface F5 is on frame 120 side and joined to frame 120. Sixth surface F6 is opposite to third surface F3 of frame-shaped material 20 and is bonded to insulating film 70.

[0148] Frame-shaped material 160 includes through-electrode 161 penetrating between fifth surface F5 and sixth surface F6, and pad 162 provided on fifth surface F5 and connected to through-electrode 161. Through-electrode 161 electrically connects pad 50 and pad 162.

[0149] The metal wire 60 connects between the pad 162 and a pad on the semiconductor chip 30 , and electrically connects between the semiconductor chip 30 and the through-electrode 161 .

[0150] (Tenth Embodiment)

[0151] Fig.16 1 is a cross-sectional view showing a configuration example of a semiconductor device according to a tenth embodiment. In the tenth embodiment, the frame 120 includes a seventh surface F7 and an eighth surface F8 opposite to the seventh surface F7. A conductive film 121 is provided on the eighth surface F8. The eighth surface F8 is formed into a curved shape so as to connect the pad 31 on the surface of the semiconductor chip 30 and the pad 50 on the third surface F3 of the frame-shaped material 20. The conductive film 121 as the third conductive film is provided on the eighth surface F8, and the pad 31 and the pad 50 are electrically connected along the eighth surface F8. For the conductive film 121, for example, a conductive metal material such as copper or gold is used.

[0152] The conductive film 121 is formed on the eighth surface ( F8 ) by electroplating, sputtering, etc., and is processed using a photolithography technique and an etching technique. Therefore, the conductive film 121 may be formed in advance on the eighth surface ( F8 ) of the frame 120 .

[0153] Since the conductive film 121 is pre-set on the eighth surface F8 of the frame 120 and patterned, the conductive film 121 can electrically connect the pad 31 and the pad 50 only by mounting the frame 120 on the semiconductor chip 30 and the frame-shaped material 20. Since the metal wire 60 is not used, the wire bonding process is omitted. As a result, the manufacturing process of the semiconductor device is shortened and the reliability is improved. In addition, it is not necessary to elongate the metal wire 60, and the conductive film 121 can connect the pad 31 and the pad 50 over a short distance. Therefore, this makes it easy to suppress the impedance of the wiring to be lower in the transmission of high-frequency signals and make the impedance matching suitable for, for example, 50 ohms.

[0154] In addition, since the conductive film 121 is provided on the curved surface of the frame 120, disconnection is unlikely to occur. Unlike a gold wire, the conductive film 121 is not exposed to the space between the frame 120 and the sealing glass 150. Therefore, incident light is hardly diffusely reflected by the conductive film 121, and it is possible to suppress diffusely reflected light from entering the semiconductor chip 30.

[0155] The other configurations of the tenth embodiment may be similar to those of any of the first to ninth embodiments. Therefore, according to the present embodiment 10, the effects of any of the first to ninth embodiments can be obtained.

[0156] (Eleventh Embodiment)

[0157] Fig.17 1 is a cross-sectional view showing a configuration example of a semiconductor device according to an eleventh embodiment. In the eleventh embodiment, the frame-shaped material 20 includes a material having a higher heat dissipation than the glass substrate 10. As the frame-shaped material 20, for example, a metal material such as copper or tungsten, carbon graphite, ceramics, silicon, etc. are used. The frame-shaped material 20 has a third surface F3 on the first surface F1 side, a fourth surface F4 on the second surface F2 side, and a first inner surface Fs2 facing the first side surface Fs1. The frame-shaped material 20 is provided to surround the periphery of the glass substrate 10, and has a higher heat dissipation than the glass substrate 10. The frame-shaped material 20 can effectively diffuse the heat radiated from all sides of the glass substrate 10, and improve the cooling efficiency of the glass substrate 10.

[0158] The other configurations of the eleventh embodiment may be similar to the configurations of any one of the first to tenth embodiments. Therefore, according to the eleventh embodiment, the effects of any one of the first to tenth embodiments can be obtained.

[0159] (Glass Substrate 10)

[0160] Fig.18 and Fig.19 is a cross-sectional view showing an example of the glass substrate 10 . Fig.18A single-layer glass substrate 10 is shown. A through hole TGV (through glass via) is formed in a glass thin plate 11 using a drill or the like. Next, a material for a wiring layer 12 is formed on a front surface F101 and a rear surface F102 of the glass thin plate 11 using plating, sputtering, or the like. At this time, the material for the wiring layer 12 is also formed on the inner wall of the through hole TGV of the glass thin plate 11. The material for the wiring layer 12 can fill the entire through hole TGV. Thus, a through electrode 14 is formed. Next, the material for the wiring layer 12 on the glass thin plate 11 is processed using a photolithography technique and an etching technique to form the wiring layer 12. Thus, a single-layer glass substrate 10 is formed.

[0161] Fig.19 1 shows a glass substrate 10 in which a plurality of thin glass sheets 11 are stacked. Through electrodes 14 and wiring layers 12 are pre-formed on the glass sheets 11. When the thin glass sheets 11 and the insulating films 13 are alternately stacked, the wiring layers 12 of the thin glass sheets 11 are connected to the through electrodes 14 of the wiring layers 12 or another thin glass sheet 11. Thus, Fig.19 A glass substrate 10 is shown.

[0162] (Frame-like material 20)

[0163] Figure 20 to Figure 22 is a cross-sectional view showing an example of the frame-shaped material 20 . Fig. 20 The frame-shaped material 20 used in the first embodiment and the like is shown. For example, the frame-shaped material 20 is obtained by hollowing out the center portion of a substantially rectangular glass epoxy substrate using a CO2 laser, a UV laser, a router, etc. A copper-clad laminate (CCL) substrate may be used in which a metal film of copper or the like is provided on the third surface F3 and the fourth surface F4 of the frame-shaped material 20. In this case, when the glass substrate 10 is arranged inside the frame-shaped material 20, an alignment mark is preferably formed.

[0164] Fig.21 The frame-shaped material 20 used in the fifth embodiment is shown. In the frame-shaped material 20 , the capacitor 90 is formed in advance. The capacitor 90 is formed by sequentially stacking a conductive film 93 , an insulating film 92 , and a conductive film 91 on the third surface F3 and the fourth surface F4 of the frame-shaped material 20 .

[0165] Fig. 22The frame-shaped material 20 used in the sixth embodiment is shown. The through electrode 110 is pre-formed in the frame-shaped material 20. The through electrode 110 penetrates between the third surface F3 and the fourth surface F4 of the frame-shaped material 20 to form a path for electrical wiring. As described above, the through electrode 110 may have any one of a staggered structure, a stacked through-hole structure, and a through-hole structure. In addition, the through electrode 110 may be formed by a filling method in which the entire through-hole is filled with a conductive material, or may be formed by a conformal method in which a film of a conductive material is formed only on the inner wall of the through-hole.

[0166] Fig.23 2 is a plan view showing the structure of the frame-shaped material 20 before cutting. The frame-shaped material 20 is constructed of a grid-shaped frame. The frame-shaped material 20 has a plurality of substantially rectangular space portions 25, which are hollowed out to a size slightly larger than the glass substrate 10. When manufacturing a semiconductor device, the glass substrate 10 is arranged in the space portion 25.

[0167] (Manufacturing method)

[0168] FIG. 24A to FIG. 24G , Fig. 27 and Fig.28 is a cross-sectional view showing an example of a method for manufacturing the semiconductor device according to the first embodiment. Fig.25 Frame-shaped material 20 has space portion 25 surrounded by first inner side surface Fs2.

[0169] like Fig.24A As shown, Fig.23 The frame-shaped material 20 is bonded to the belt 200, and the glass substrate 10 is arranged in the space portion 25 of the frame-shaped material 20. The glass substrate 10 is arranged in the spacer 25 of the frame-shaped material 20 so that the first side surface Fs1 and the first inner side surface Fs2 of the frame-shaped material 20 face each other. Next, as the material of the insulating film 40, for example, a thermosetting resin sheet is pasted on the first surface F1 and the third surface F3 to soften it. Therefore, the thermosetting resin enters the gap between the frame-shaped material 20 and the glass substrate 10, and fills the step between the first surface F1 of the glass substrate 10 and the third surface F3 of the frame-shaped material 20 to flatten the first surface F1 and the third surface F3. Then, the insulating film 40 is cured by heat treatment. The viscosity, thickness and lamination conditions of the insulating film 40 are selected as needed.

[0170] Next, if Fig. 24BAs shown, the insulating film 40 is also formed on the second surface F2 and the fourth surface F4 side and is flattened. Therefore, the glass substrate 10 is fixed to the frame-shaped material 20 and is integrated with the frame-shaped material 20. In addition, the first surface F1 of the glass substrate 10 and the third surface F3 of the frame-shaped material 20 are substantially flattened, and the second surface F2 of the glass substrate 10 and the fourth surface F4 of the frame-shaped material 20 are substantially flattened. Note that after the insulating film 40 is attached to both surfaces of the first to fourth surfaces F1 to F4, the insulating films 40 on both surfaces can be cured together by heat treatment.

[0171] Next, if Fig.24C As shown, a portion of the insulating film 40 is removed using a UV laser, a CO 2 laser, or the like to form a contact hole CH.

[0172] Next, if Fig.24D As shown, wiring layer 42 is formed on insulating film 40 on first to fourth surfaces F1 to F4 by using chemical plating, electrolytic plating, sputtering, or a combination thereof. The material of wiring layer 42 is connected to wiring layer 12 exposed through contact hole CH to form via 41.

[0173] Next, if Fig.24E As shown, the wiring layer 42 is processed using photolithography and etching techniques. Since the wiring layer 42 is patterned on the flattened insulating film 40, it can be processed into an arbitrary layout. In addition, the wiring layer 42 can be formed not only on the first surface F1 and the second surface F2 of the glass substrate 10, but also on the third surface F3 and the fourth surface F4 of the frame-shaped material 20.

[0174] Then, if Fig.24F As shown, an insulating film 40 is further deposited on the wiring layer 42, and a via 41 and a wiring layer 42 are further formed on the insulating film 40. In this way, the redistribution layers 40 to 42 are formed.

[0175] Then, if Figure 24G As shown, an insulating film 70 is formed on the redistribution layers 40 to 42. Next, the insulating film 70 is processed using a photolithography technique and an etching technique. For example, a solder resist is used for the insulating film 70. The insulating film 70 may be a defined solder mask (SMD) or a non-defined solder mask (NSMD).

[0176] Next, the spacer 50 is formed at a portion where the insulating film 70 is removed and the wiring layer 42 is exposed. For the spacer 50, for example, a stacked film of Ni, Pd, and Au is used.

[0177] Next, if Fig.25As shown, the frame-shaped material 20 is cut along the cutting line DL using blade cutting, router processing, laser processing, etc. to separate the glass substrate 10 and the frame-shaped material 20. Thus, a glass interposer is formed.

[0178] Fig.26 1 is a plan view showing an example of a method for manufacturing a semiconductor device according to the seventh embodiment. The frame-shaped material 20 according to the seventh embodiment protrudes in the lateral direction at the portion of the fastening hole TH. Fig.26 As shown, the protrusions of a plurality of adjacent frame-shaped materials 20 are alternately arranged so as not to overlap with each other.

[0179] In this case, FIG. 24A to FIG. 24G After the manufacturing step, the fastening hole TH is opened in the frame-shaped material 20 by a drill. Thereafter, the frame-shaped material 20 is cut along the curved cutting line CL using a router, a wire saw, a laser processing machine, or the like. Fig.12 The frame-like material 20 is shown singulated.

[0180] After the glass substrate 10 and the frame-shaped material 20 are singulated, as shown in FIG. Fig. 27 As shown in FIG. 1 , the semiconductor chip 30 is bonded to the glass substrate 10, and the semiconductor chip 30 and the pad 50 are bonded by the metal wire 60. Next, as shown in FIG. Fig.28 As shown, the frame 120 is bonded to the third surface F3 of the frame-shaped material 20, and the sealing glass 150 is bonded to the frame 120. Thus, the semiconductor device according to the eighth embodiment is completed. According to the above-mentioned manufacturing method, the semiconductor devices involved in the first to seventh embodiments can be easily inferred, so their detailed description is omitted.

[0181] FIG. 29A to FIG. 29D 1 is a cross-sectional view showing an example of a method for manufacturing a semiconductor device according to a ninth embodiment. Fig.29A . The frame-shaped material 160 shown in FIG. The frame-shaped material 160 has a fifth surface F5 and a sixth surface F6 opposite to the fifth surface F5. A through electrode 161 penetrating the frame-shaped material 160 is provided between the fifth surface F5 and the sixth surface F6. A pad 162 is connected to the through electrode 161 on the fifth surface F5 side. A connecting portion 163 is connected to the through electrode 161 on the sixth surface F6 side. For the through electrode 161, the pad 162, and the connecting portion 163, for example, a conductive material such as copper or gold is used.

[0182] exist FIG. 24A to FIG. 24G After the steps shown, Fig.29BAs shown, the semiconductor chip 30 is bonded to the insulating film 70 on the first surface F1 of the glass substrate 10. In addition, a stud bump SB protruding in the Z direction is formed at a position corresponding to the connection portion 163 of the frame-shaped material 160. For the stud bump SB, a conductive material such as copper or gold is used. It is only necessary to form the stud bump SB using a wire bonding device or the like.

[0183] Next, if Fig.29C As shown, the frame-shaped material 160 is mounted on the third surface F3 of the frame-shaped material 20. At this time, the connection portion 163 is mounted to conform to the stud bump SB, and the connection portion 163 and the stud bump SB are pressure-bonded by a heating ultrasonic bonding technique. If necessary, reinforcement can be performed using an adhesive or the like. Therefore, the pad 162 is electrically connected to the wiring layer of the glass substrate 10 or the like via the through electrode 161.

[0184] After the glass substrate 10 and the frame-shaped materials 20 and 160 are singulated, as shown in FIG. Fig.29D As shown, the pad of the semiconductor chip 30 and the pad 162 of the frame-shaped material 160 are bonded by the metal wire 60. At this time, the pad 162 of the frame-shaped material 160 is closer to the height (position in the Z direction) of the pad of the semiconductor chip 30 than the third surface F3 of the frame-shaped material 20. Therefore, the length of the metal wire 60 is shortened by providing the frame-shaped material 160. Therefore, the impedance of the wiring is suppressed to be low, and impedance matching can be easily adapted in the transmission of high-frequency signals.

[0185] Next, the frame 120 is bonded onto the third surface ( F3 ) of the frame-shaped material 160, and the sealing glass 150 is bonded onto the frame 120. Thus, the semiconductor device according to the ninth embodiment is completed.

[0186] Fig. 30A , Fig. 30B and Fig. 30C is a cross-sectional view showing an example of a method for manufacturing a semiconductor device according to an eleventh embodiment. Fig.31A , Fig.31B , Fig.31C and Fig.31D is a plan view showing an example of a method for manufacturing a semiconductor device according to an eleventh embodiment.

[0187] like Fig. 30A and Fig.31A As shown, the support member 26 is hollow in a lattice shape, and the frame-shaped material 20 is press-fitted and assembled into the inner wall surface of each space portion 25. As the frame-shaped material 20, for example, a material having higher heat dissipation than glass of the material of the glass substrate 10 is used. For example, glass epoxy or CCL material is used for the support member 26.

[0188] Next, the support member 26 having the frame-shaped material 20 is used to perform FIG. 24A to FIG. 24G Therefore, if Fig. 30B and Fig.31B As shown in FIG. 4 , the glass substrate 10 is disposed inside the frame-shaped material 20 such that a first side surface Fs1 of the glass substrate 10 and a first inner side surface Fs2 of the frame-shaped material 20 face each other. The glass substrate 10 is fixed to the frame-shaped material 20 through an insulating film 40 .

[0189] Next, a cutting line DL at the boundary between the frame-shaped material 20 and the support member 26 is cut using a laser, a router, a blade cut, or the like. Thus, this makes it possible to singulate the semiconductor devices while exposing the frame-shaped material 20. Thus, the semiconductor devices are formed. Fig. 30C and 31C A glass substrate 10 and a frame-like material 20 are shown.

[0190] It should be noted that Fig.31C As shown, the pad 50 may be disposed above the glass substrate 10 within the frame-shaped material 20, but in the case where the frame-shaped material 20 includes an insulating material, the pad 50 may be disposed above the frame-shaped material 20, such as Fig.31D shown.

[0191] (Application of imaging device to which the present technology is applied)

[0192] Fig.32 : is a diagram showing an example in which an embodiment according to the present technology is used as a CMOS image sensor.

[0193] For example, the imaging device of the above-described embodiment can be used in various situations where light (such as visible light, infrared light, ultraviolet light, and X-rays) is sensed, for example, as described below. Fig.32 As shown in, for example, the above-mentioned embodiments can also be used in devices used in capturing fields of view of images for viewing, transportation fields, home appliance fields, medical care and wellness fields, security fields, beauty care fields, sports fields, agricultural fields, etc.

[0194] In particular, in the field of vision, the above-described embodiments may be used, for example, in devices for capturing images to be viewed, such as digital cameras, smart phones, and mobile phones with camera functions.

[0195] In the field of transportation, for example, for safe driving such as automatic stopping, driver status recognition, etc., the above-mentioned embodiments can be applied to devices used in transportation, such as, on-board sensors that capture images of the front, rear, surroundings, interior, etc. of the car, monitoring cameras that monitor moving vehicles and roads, and distance measurement sensors that measure the distance between vehicles.

[0196] In the field of home appliances, for example, the above-described embodiments may be applied to devices used in home appliances such as a TV receiver, a refrigerator, and an air conditioner in order to capture an image of a user's gesture and operate the device according to the gesture.

[0197] In the field of medical care and health care, for example, the above-described embodiments can be applied to equipment used in medical care and health care, such as an endoscope and an equipment that performs angiography by receiving infrared light.

[0198] In the security field, the above-mentioned embodiments can be used in security equipment such as security surveillance cameras and personal authentication cameras.

[0199] For example, in the field of beauty care, the above-described embodiments may be used in a device for beauty care, such as a skin measurement instrument for skin image capture or a microscope for scalp image capture.

[0200] In the field of sports, the above-mentioned embodiments can be used in sports devices, such as action cameras and wearable cameras for sports.

[0201] For example, in the agricultural field, the above-described embodiments may be used in agricultural devices, such as cameras for monitoring the status of land and crops.

[0202] This technology can be applied to various other products.

[0203] It should be noted that the embodiments of the present technology are not limited to the above-described embodiments, and various modifications are possible without departing from the gist of the present technology.

[0204] Furthermore, the effects described in this specification are merely examples and are not limited to any specific effects, and there may be some other effects.

[0205] It should be noted that the present technology can also adopt the following configurations. (1)

[0207] A semiconductor device comprising:

[0208] A glass substrate comprising a first surface, a second surface opposite to the first surface, and a first side surface between the first surface and the second surface;

[0209] a first frame-shaped material having a third surface on the first surface side, a fourth surface on the second surface side, and a first inner side surface facing the first side surface, the first frame-shaped material being disposed around the glass substrate;

[0210] a first insulating film disposed between the first side surface and the first inner side surface and disposed on the first surface and the third surface;

[0211] a first wiring layer provided on the first insulating film on the first surface and the third surface; and

[0212] The second insulating film is provided on the first wiring layer. (2)

[0214] The semiconductor device according to (1), wherein

[0215] The first insulating film is also provided on the second surface and the fourth surface, and

[0216] The semiconductor device further comprises:

[0217] a second wiring layer provided on the first insulating film on the second and fourth surfaces; and

[0218] A third insulating film is provided on the second wiring layer. (3)

[0220] The semiconductor device according to (1) or (2), further comprising:

[0221] A first pad is provided on the third surface and is electrically connected to the first wiring layer exposed from the second insulating film. (4)

[0223] The semiconductor device according to (2) or (3), further comprising:

[0224] A second pad is provided on the fourth surface and is electrically connected to the second wiring layer exposed from the third insulating film. (5)

[0226] The semiconductor device according to any one of (1) to (4), wherein

[0227] The glass substrate further comprises:

[0228] a plurality of stacked glass sheets;

[0229] A third wiring layer disposed between the glass sheets; and

[0230] The fourth insulating film is provided between the glass sheets. (6)

[0232] The semiconductor device according to any one of (1) to (5), wherein

[0233] The first surface of the glass substrate and the third surface of the first frame-shaped material are offset in the thickness direction of the glass substrate, and

[0234] A surface of the first insulating film is substantially flush above the first surface and the third surface. (7)

[0236] The semiconductor device according to any one of (1) to (6), wherein

[0237] The second surface of the glass substrate and the fourth surface of the first frame-shaped material are offset in the thickness direction of the glass substrate, and

[0238] A surface of the first insulating film is substantially flush above the second surface and the fourth surface. (8)

[0240] The semiconductor device according to any one of (1) to (7), wherein

[0241] The Young's modulus of the first insulating film on the second surface and the fourth surface is lower than the Young's modulus of the first insulating film on the first surface and the third surface. (9)

[0243] The semiconductor device according to any one of (1) to (8), further comprising:

[0244] An electronic component is provided on the third surface or the fourth surface of the first frame-shaped material and is electrically connected to the first wiring or the second wiring. (10)

[0246] The semiconductor device according to any one of (1) to (9), further comprising:

[0247] A first capacitive element is provided between the third surface of the first frame-shaped material and the first insulating film and is configured by stacking a first conductive film, a fifth insulating film, and a second conductive film. (11)

[0249] The semiconductor device according to (10), further comprising:

[0250] A second capacitive element is provided between the fourth surface of the first frame-shaped material and the first insulating film and is configured by stacking the first conductive film, the fifth insulating film, and the second conductive film. (12)

[0252] The semiconductor device according to any one of (1) to (11), further comprising:

[0253] The first through electrode is provided between the third surface and the fourth surface of the first frame-shaped material and electrically connects between the first wiring and the second wiring. (13)

[0255] The semiconductor device according to any one of (1) to (12), further comprising:

[0256] A semiconductor chip is disposed on a glass substrate;

[0257] A frame disposed on a third surface of the first frame-shaped material;

[0258] a lens disposed on the frame and arranged above the semiconductor chip; and

[0259] A fastening member is fitted into a fastening hole provided in the first frame-shaped material and a fastening hole provided in the frame to fix the frame to the first frame-shaped material. (14)

[0261] The semiconductor device according to any one of (1) to (12), further comprising:

[0262] A semiconductor chip is disposed on a glass substrate;

[0263] a frame disposed on a third surface of the first frame-shaped material; and

[0264] The protection member is provided on the frame and is arranged above the semiconductor chip. (15)

[0266] The semiconductor device according to any one of (1) to (14), further comprising:

[0267] A semiconductor chip is disposed on a glass substrate;

[0268] a second frame-shaped material including a second through-electrode electrically connected to the first wiring, the second frame-shaped material being provided on the first frame-shaped material; and

[0269] A metal wire connecting the semiconductor chip and the second through-electrode. (16)

[0271] The semiconductor device according to any one of (1) to (14), further comprising:

[0272] A semiconductor chip is disposed on a glass substrate; and

[0273] The frame is provided on the third surface of the first frame-shaped material and has a third conductive film that electrically connects the semiconductor chip and the first wiring. (17)

[0275] A semiconductor device comprising:

[0276] A glass substrate comprising a first surface, a second surface opposite to the first surface, and a first side surface between the first surface and the second surface;

[0277] a first frame-shaped material having a third surface on the first surface side, a fourth surface on the second surface side, and a first inner side surface facing the first side surface, the first frame-shaped material being disposed around the glass substrate and having higher heat dissipation than the glass substrate; and

[0278] A first insulating film is provided between the first side surface and the first inner side surface and on the first surface and the third surface. (18)

[0280] A method for manufacturing a semiconductor device, comprising:

[0281] arranging a glass substrate including a first surface, a second surface opposite to the first surface, and a first side surface between the first surface and the second surface, and a first frame-shaped material including a third surface on the first surface side, a fourth surface on the second surface side, and a first inner side surface in the first frame-shaped material so that the first inner side surface and the first side surface face each other;

[0282] forming a first insulating film between the first side surface and the first inner side surface and on the first surface and the third surface;

[0283] forming a first wiring layer on the first insulating film of the first surface and the third surface; and

[0284] A second insulating film is formed on the first wiring layer. (19)

[0286] A method for manufacturing a semiconductor device, comprising:

[0287] providing a glass substrate including a first surface, a second surface opposite to the first surface, and a first side surface between the first surface and the second surface, and a first frame-shaped material including a third surface on the first surface side, a fourth surface on the second surface side, and a first inner side surface, and the first frame-shaped material having a higher heat dissipation than the glass substrate in the first frame-shaped material so that the first inner side surface and the first side surface face each other; and

[0288] A first insulating film is formed between the first side surface and the first inner side surface and on the first surface and the third surface.

[0289] It should be noted that the present disclosure is not limited to the above-described embodiments, and various modifications may be made without departing from the gist of the present disclosure. In addition, the effects described in this specification are merely examples and are not limiting, and other effects may be provided.

[0290] Reference Symbols List

[0291] 10 Glass substrate

[0292] 11 Glass sheet

[0293] 12 Wiring Layer

[0294] 13 Insulation film

[0295] 14 Through electrode

[0296] 20 Frame-like material

[0297] 40 Insulation film

[0298] 40 to 42 redistribution layers

[0299] 30 Semiconductor Chip

[0300] 50 Pads

[0301] 60 Metal Wire

[0302] 70 Insulating film.

Claims

1. A semiconductor device comprising: A glass substrate comprising a first surface, a second surface opposite to the first surface, and a first side surface between the first surface and the second surface; a first frame-shaped material having a third surface located on the first surface side, a fourth surface located on the second surface side, and a first inner side surface facing the first side surface, the first frame-shaped material being disposed around the glass substrate; a first insulating film disposed between the first side surface and the first inner side surface and disposed on the first surface and the third surface; a first wiring layer provided on the first insulating film on the first surface and the third surface; as well as A second insulating film is provided on the first wiring layer.

2. The semiconductor device according to claim 1, wherein The first insulating film is also provided on the second surface and the fourth surface, and The semiconductor device further comprises: a second wiring layer provided on the first insulating film on the second surface and the fourth surface; and A third insulating film is provided on the second wiring layer.

3. The semiconductor device according to claim 1, further comprising: A first pad is provided on the third surface and is electrically connected to the first wiring layer exposed from the second insulating film.

4. The semiconductor device according to claim 2, further comprising: A second pad is provided on the fourth surface and is electrically connected to the second wiring layer exposed from the third insulating film.

5. The semiconductor device according to claim 1, wherein The glass substrate further comprises: a plurality of stacked glass sheets; A third wiring layer disposed between the glass sheets; and A fourth insulating film is provided between the glass sheets.

6. The semiconductor device according to claim 1, wherein The first surface of the glass substrate and the third surface of the first frame-shaped material are offset in a thickness direction of the glass substrate, and A surface of the first insulating film is substantially flush over the first surface and the third surface.

7. The semiconductor device according to claim 1, wherein The second surface of the glass substrate and the fourth surface of the first frame-shaped material are offset in a thickness direction of the glass substrate, and A surface of the first insulating film is substantially flush over the second surface and the fourth surface.

8. The semiconductor device according to claim 1, wherein The Young's modulus of the first insulating film on the second surface and the fourth surface is lower than the Young's modulus of the first insulating film on the first surface and the third surface.

9. The semiconductor device according to claim 1, further comprising: An electronic component is provided on the third surface or the fourth surface of the first frame-shaped material and is electrically connected to the first wiring layer or the second wiring layer.

10. The semiconductor device according to claim 1, further comprising: A first capacitive element is provided between the third surface of the first frame-shaped material and the first insulating film and is configured by stacking a first conductive film, a fifth insulating film, and a second conductive film.

11. The semiconductor device according to claim 10, further comprising: A second capacitive element is provided between the fourth surface of the first frame-shaped material and the first insulating film and is configured by stacking the first conductive film, the fifth insulating film, and the second conductive film.

12. The semiconductor device according to claim 1, further comprising: A first through electrode is provided between the third surface and the fourth surface of the first frame-shaped material and electrically connects the first wiring layer and the second wiring layer.

13. The semiconductor device according to claim 1, further comprising: A semiconductor chip is disposed on the glass substrate; a frame disposed on the third surface of the first frame-shaped material; A lens is disposed on the frame and above the semiconductor chip; as well as A fastening member is fitted into a fastening hole provided in the first frame-shaped material and a fastening hole provided in the frame to fix the frame to the first frame-shaped material.

14. The semiconductor device according to claim 1, further comprising: A semiconductor chip is disposed on the glass substrate; a frame disposed on the third surface of the first frame-shaped material; as well as A protection member is disposed on the frame and above the semiconductor chip.

15. The semiconductor device according to claim 1, further comprising: A semiconductor chip is disposed on the glass substrate; a second frame-shaped material including a second through-electrode electrically connected to the first wiring layer, the second frame-shaped material being disposed on the first frame-shaped material; and A metal wire connects the semiconductor chip and the second through-electrode.

16. The semiconductor device according to claim 1, further comprising: A semiconductor chip is disposed on the glass substrate; as well as A frame is provided on the third surface of the first frame-shaped material and has a third conductive film that electrically connects the semiconductor chip and the first wiring layer.

17. A semiconductor device comprising: A glass substrate comprising a first surface, a second surface opposite to the first surface, and a first side surface between the first surface and the second surface; a first frame-shaped material having a third surface on the first surface side, a fourth surface on the second surface side, and a first inner side surface facing the first side surface, the first frame-shaped material being disposed around the glass substrate and having a higher heat dissipation property than the glass substrate; as well as A first insulating film is provided between the first side surface and the first inner side surface and on the first surface and the third surface.

18. A method for manufacturing a semiconductor device, comprising: Arranging a glass substrate including a first surface, a second surface opposite to the first surface, and a first side surface between the first surface and the second surface, and a first frame-shaped material including a third surface on the first surface side, a fourth surface on the second surface side, and a first inner side surface in the first frame-shaped material so that the first inner side surface and the first side surface face each other; forming a first insulating film between the first side surface and the first inner side surface and on the first surface and the third surface; forming a first wiring layer on the first insulating film on the first surface and the third surface; as well as A second insulating film is formed on the first wiring layer.

19. A method for manufacturing a semiconductor device, comprising: providing a glass substrate and a first frame-shaped material, the glass substrate including a first surface, a second surface opposite to the first surface, and a first side surface between the first surface and the second surface, the first frame-shaped material including a third surface on the first surface side, a fourth surface on the second surface side, and a first inner side surface, and the first frame-shaped material having a higher heat dissipation than the glass substrate in the first frame-shaped material, so that the first inner side surface and the first side surface face each other; as well as A first insulating film is formed between the first side surface and the first inner side surface and on the first surface and the third surface.

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