Hard disk soft destruction method

Abstract

The invention discloses a hard disk soft destruction method, which relates to the related field of data storage management, and comprises the following steps: monitoring equipment to obtain an equipment state attribute, the device comprises a large battery, a hard disk, a destruction key, an MCU, an EC, a first voltage power supply circuit, a second voltage power supply circuit, a third voltage power supply circuit, a first current control element, a second current control element, a third current control element, a first switch element and a second switch element. When the state is the shutdown state and the destruction key is triggered, generating a shutdown state soft destruction scheme; when the state is the normal state and the destruction key is triggered, generating a normal state soft destruction scheme; and performing soft destruction on the hard disk. The technical problem that power consumption of a hard disk destroying function is too large when equipment is in a shutdown state in existing hard disk soft destroying is solved, and the technical effects that power consumption of hard disk destroying is remarkably reduced when the equipment is in the shutdown state, and battery life is prolonged are achieved.

Description

Technical Field

[0001] The present application relates to data storage management-related fields, and in particular to a hard disk soft destruction method. Background Art

[0002] As the main medium for data storage, hard disks carry a large amount of personal data and corporate secrets. Once a hard disk is illegally obtained, the private and sensitive information in it will face a serious risk of leakage. In order to meet this challenge, hard disk destruction has become a key means to protect data privacy. There are two main hard disk destruction technologies on the market. One is that the device can achieve the hard disk destruction function through normal operation when it is in normal operation. However, this method requires the device to be powered and running all the time, which continuously consumes power and has a serious impact on battery life. In the case of long-term non-use or power saving, this solution is obviously not efficient enough. The other is that the device supports the hard disk destruction function by keeping some key components working when it is turned off. When there is a destruction request, the EC chip turns on the power supply system and starts the destruction operation. Although this method can still provide the hard disk destruction function when it is turned off, the continuous operation of some circuits leads to high power consumption, which also consumes power and has a great impact on battery life.

[0003] In the current related technologies, there is a technical problem in the software destruction of hard disks that the power consumption of the hard disk destruction function is too high when the device is turned off. Summary of the invention

[0004] The present application provides a hard disk soft destruction method. When the device is powered off, through power management and logic control mechanisms, necessary circuits and components are activated only when a hard disk destruction request is received. A low-power EC chip or similar device is used as the control core to provide necessary power and control signals only during the destruction operation. After the destruction operation is completed, all non-essential circuits and components are immediately turned off, etc., thereby achieving the technical effect of significantly reducing the power consumption of the device when destroying the hard disk in the powered-off state and extending the battery life.

[0005] The present application provides a hard disk soft destruction method, comprising:

[0006] Monitor the device to obtain device status attributes, wherein the device includes a large battery, a hard disk, a destroy button, an MCU, an EC, a first voltage power supply line, a second voltage power supply line, a third voltage power supply line, a first current control element, a second current control element, a third current control element, a first switch element, and a second switch element; when the device status attribute is a shutdown state and the destroy button is triggered, generate a shutdown state soft destruction plan; when the device status attribute is a normal state and the destroy button is triggered, generate a normal state soft destruction plan; based on the shutdown state soft destruction plan or the normal state soft destruction plan, soft-destroy the hard disk.

[0007] In a possible implementation, when the device status attribute is the shutdown state, the first switch element and the second switch element are both disconnected, the large battery stops supplying power to the first voltage power supply line, the second voltage power supply line and the third voltage power supply line, and the EC and the MCU do not work.

[0008] In a possible implementation, the shutdown state soft destruction solution includes:

[0009] The second switch element is turned on, and the MCU is powered according to the large battery and the third voltage power supply line. The MCU starts working and outputs a PEN signal. Based on the PEN signal, the first switch element is turned on, and the hard disk is powered according to the large battery and the second voltage power supply line. The MCU outputs a high-level signal to the hard disk to start the destruction function of the hard disk.

[0010] In a possible implementation, the shutdown state soft destruction solution further includes:

[0011] When the hard disk is destroyed, a destruction status signal is generated; the MCU receives the destruction status signal and generates a PEN reverse signal and a NEN signal; the first switch element receives the PEN reverse signal, the first switch element is disconnected, and the large battery turns off the power supply of the second voltage power supply line to the hard disk; the second switch element receives the NEN signal, the second switch element is disconnected, and the large battery turns off the power supply of the third voltage power supply line to the MCU.

[0012] In a possible implementation, when the device status attribute is in a normal state, the large battery supplies power to the hard disk through the first voltage power supply circuit and the first current control element; the first switch element and the second switch element are both disconnected, the second voltage power supply circuit and the third voltage power supply circuit do not supply power, and the MCU is in a non-working state; the large battery supplies power to the EC, and the EC is in a working state.

[0013] In a possible implementation, the normal state soft destruction solution includes:

[0014] When the destroy button is triggered, a destroy button trigger signal is generated; the EC detects the destroy button trigger signal and generates a high level signal to the hard disk, and the hard disk starts the destroy function.

[0015] In a possible implementation, when the second current control element and the third current control element are in an OR gate relationship, the destruction signal of the hard disk is valid at a high level, and the output signals of the MCU and the EC when they are not working are designed to be low level signals.

[0016] In a possible implementation, when the second current control element and the third current control element are in an AND gate relationship, the hard disk destruction signal is valid at a low level, and the output signals of the MCU and the EC when they are not working are designed to be high level signals.

[0017] A hard disk soft destruction method proposed in this application first monitors the device to obtain the device status attributes, wherein the device includes a large battery, a hard disk, a destruction button, an MCU, an EC, a first voltage power supply circuit, a second voltage power supply circuit, a third voltage power supply circuit, a first current control element, a second current control element, a third current control element, a first switch element, and a second switch element. When the device status attribute is a shutdown state and the destruction button is triggered, a shutdown state soft destruction plan is generated; when the device status attribute is a normal state and the destruction button is triggered, a normal state soft destruction plan is generated. Finally, based on the shutdown state soft destruction plan or the normal state soft destruction plan, the hard disk is soft destroyed, thereby achieving the technical effect of significantly reducing the power consumption of the device when destroying the hard disk in the shutdown state and extending the battery life. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the technical solution of the embodiment of the present invention, the accompanying drawings of the embodiment of the present invention will be briefly introduced below. A flow chart is used in the present application to illustrate the operations performed by the system according to the embodiment of the present application. It should be understood that the preceding or following operations are not necessarily performed accurately in order. On the contrary, various steps can be processed in reverse order or simultaneously as needed. At the same time, other operations can also be added to these processes, or one or more operations can be removed from these processes.

[0019] Figure 1 A flowchart of a hard disk soft destruction method provided in an embodiment of the present application.

[0020] Figure 2 A structural schematic diagram of a hard disk destruction triggered by a high-level signal in a hard disk soft destruction method provided in an embodiment of the present application.

[0021] Figure 3 A structural schematic diagram of a hard disk destruction triggered by a low-level signal in a hard disk soft destruction method provided in an embodiment of the present application. DETAILED DESCRIPTION

[0022] The above description is only an overview of the technical solution of the present application. In order to more clearly understand the technical means of the present application, it can be implemented in accordance with the contents of the specification. In order to make the above and other purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are listed below.

[0023] In order to make the purpose, technical solutions and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings. The described embodiments should not be regarded as limiting the present application. All other embodiments obtained by ordinary technicians in the field without making creative work are within the scope of protection of this application.

[0024] In the following description, reference is made to "some embodiments", which describe a subset of all possible embodiments, but it is understood that "some embodiments" may be the same subset or different subsets of all possible embodiments, and may be combined with each other without conflict, and the terms "first\second" involved are merely to distinguish similar objects and do not represent a specific ordering of objects. The terms "including" and "having" and any variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product, or server that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or modules that are not clearly listed or inherent to these processes, methods, products, or devices. Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those generally understood by technicians in the technical field of this application. The terms used herein are for the purpose of describing the embodiments of the present application only.

[0025] The present application embodiment provides a hard disk soft destruction method, such as Figure 1 As shown, the method includes:

[0026] Step S100, monitor the device and obtain the device status attributes, wherein the device includes a large battery, a hard disk, a destroy button, an MCU, an EC, a first voltage power supply line, a second voltage power supply line, a third voltage power supply line, a first current control element, a second current control element, a third current control element, a first switch element and a second switch element. Specifically, after the system is started, all monitoring components are initialized first, including the MCU (microcontrol unit, which is a small computer in the device, responsible for processing and controlling various functions of the device), the EC (embedded controller, used to manage key parameters such as power supply and temperature of the device) and related voltage and current sensors. Through the coordination of the MCU and the EC, the status of each key component of the device is monitored in real time, including but not limited to the power status of the large battery (the battery that provides the main power supply for the device), the working status of the hard disk, and whether the destroy button (the physical or virtual button used by the user to trigger the hard disk soft destruction function) is triggered. According to the collected data, it is determined whether the device is currently in the shutdown state or the normal state. The shutdown state means that the power supply of the device has been completely cut off, and the normal state means that the device is running or in standby. Among them, the voltage supply line refers to the circuit path that provides the required voltage to each component of the equipment; the current control element is an element used to realize the unidirectional flow of current, including diodes, triodes, MOS tubes and other devices and combination circuits; the switching element is an element used to control the on and off of the circuit or switch different circuit states, including electronic switches, triodes, MOS tubes, relays and other devices and combination circuits.

[0027] Step S200, when the device state attribute is the shutdown state and the destroy button is triggered, a shutdown state soft destruction plan is generated. Specifically, when the device is in the shutdown state and the destroy button is triggered, the MCU confirms the validity of the destroy instruction. According to the preset strategy, the relevant voltage supply circuit, current control element and switch element are configured to prepare for the execution of the soft destruction plan.

[0028] Step S300, when the device state attribute is normal state and the destroy button is triggered, a normal state soft destruction plan is generated. Specifically, if the device is in normal state and the destroy button is triggered, the system first prompts the user to save important data (if not saved yet), and on the premise of ensuring data security, the device is smoothly transitioned from the normal state to the state ready for destruction, similar to the shutdown state, and the relevant components are configured to execute the plan.

[0029] Step S400, based on the shutdown state soft destruction scheme or the normal state soft destruction scheme, the hard disk is soft destroyed. Specifically, according to the selected soft destruction scheme, through the coordination of the MCU and the EC, the relevant voltage power supply circuit, current control element and switch element are controlled to perform data destruction operation on the hard disk. The progress of the destruction operation is monitored in real time to ensure that the data is completely and irreversibly destroyed. After the destruction operation is completed, feedback is provided to the user, indicating that the hard disk has been successfully soft destroyed.

[0030] In a possible implementation, when the device status attribute is the shutdown state, the first switch element and the second switch element are both disconnected, the large battery stops supplying power to the first voltage power supply line, the second voltage power supply line, and the third voltage power supply line, and the EC and the MCU do not work.

[0031] like Figure 2 As shown, when the device status attribute is the shutdown state, the first switch element (N1) is in the disconnected state, that is, the current is not allowed to pass through the second voltage power supply line (VCC2) connected to it, and VCC2 no longer receives power supply from the large battery. The second switch element (N2) is also in the disconnected state, and also blocks the current on the third voltage power supply line (VCC3) controlled by it, and VCC3 no longer receives power supply from the large battery. In addition, the large battery does not supply power to the first voltage power supply line (VCC1), VCC1 does not supply power to the hard disk, and the large battery does not supply power to the EC, and the EC stops working. Similarly, due to the interruption of VCC3 power supply, the MCU also stops working, and the power consumption of the device is almost zero at this time.

[0032] The shutdown state soft destruction scheme includes: turning on the second switch element, supplying power to the MCU according to the large battery and the third voltage power supply line, and the MCU starts working and outputs a PEN signal; based on the PEN signal, turning on the first switch element, supplying power to the hard disk according to the large battery and the second voltage power supply line, and the MCU outputs a high-level signal to the hard disk to start the destruction function of the hard disk.

[0033] like Figure 2As shown in the figure, when the device is in the off state, when the destroy button is triggered, N2 is turned on, allowing the large battery to provide power to the MCU through VCC3. Once the MCU obtains power supply, it will output a PEN signal, and based on the PEN signal, N1 is turned on, allowing the large battery to provide power to the hard disk through VCC2. After the hard disk obtains power supply, the MCU outputs a MCU_O high-level signal to the hard disk. After the hard disk receives the instruction, it starts to execute its internal destruction logic and start the destruction function, including erasing data, writing garbage data or other forms of irreversible data destruction operations. Through this circuit logic, the function of soft destruction of the hard disk is realized when the device is turned off.

[0034] The shutdown state soft destruction scheme also includes: when the hard disk destruction is completed, a destruction state signal is generated; the MCU receives the destruction state signal and generates a PEN reverse signal and a NEN signal; the first switch element receives the PEN reverse signal, the first switch element is disconnected, and the large battery turns off the power supply of the second voltage power supply line to the hard disk; the second switch element receives the NEN signal, the second switch element is disconnected, and the large battery turns off the power supply of the third voltage power supply line to the MCU.

[0035] like Figure 2 As shown, when the hard disk completes the destruction operation, a destruction status signal is generated. The MCU continuously monitors the destruction status signal from the hard disk. Once the signal is received, the MCU knows that the hard disk destruction operation has been completed. After confirming that the hard disk destruction is complete, the MCU generates a PEN reverse signal (i.e., a level signal opposite to the original PEN signal). The PEN reverse signal is used to disconnect N1 and cut off the power supply of the large battery to the hard disk through VCC2, ensuring that the hard disk will not be powered again after the destruction operation is completed. At the same time, after confirming that the hard disk destruction is complete, the MCU also generates a NEN signal to disconnect N2 and cut off the power supply of the large battery to the MCU through VCC3, ensuring that the MCU will not continue to consume power after the destruction operation is completed. At this time, the power consumption of the device is restored to almost zero. In the embodiment of the present application, when the device is in the off state, through the power management and logic control mechanism, the necessary circuits and components are activated only when a hard disk destruction request is received, and a low-power EC chip or similar device is used as the control core to provide necessary power and control signals only during the destruction operation. After the destruction operation is completed, all non-essential circuits and components are immediately shut down, etc., which achieves the technical effect of significantly reducing the power consumption of the device when destroying the hard disk in the off state and extending the battery life.

[0036] In a possible implementation, when the device status attribute is in a normal state, the large battery supplies power to the hard disk through the first voltage power supply circuit and the first current control element; the first switch element and the second switch element are both disconnected, the second voltage power supply circuit and the third voltage power supply circuit do not supply power, and the MCU is in a non-working state; the large battery supplies power to the EC, and the EC is in a working state.

[0037] like Figure 2 As shown in the figure, when the device is in a normal state, the large battery provides power to the hard disk through VCC1 and the first current control element (D1). In a normal state, both N1 and N2 are disconnected, that is, VCC2 does not power the hard disk, and VCC3 does not power the MCU. Since VCC3 does not power, the MCU is not working, which helps to reduce unnecessary power consumption and extend the battery life of the device. At this time, the large battery provides power to the EC, which is in a working state and is responsible for monitoring the overall status of the device, handling power management tasks, and interacting with the user (such as through buttons or indicator lights).

[0038] The normal state soft destruction scheme includes: when the destruction button is triggered, a destruction button trigger signal is generated; the EC detects the destruction button trigger signal and generates a high level signal to the hard disk, and the hard disk starts the destruction function.

[0039] like Figure 2 As shown in the figure, when the user presses or triggers the destroy button, a destroy button trigger signal is generated. EC continuously monitors the input signal from the destroy button. Once the destroy button trigger signal is detected, EC will generate an EC_O high-level signal, which is sent to the hard disk as a trigger signal to start the destroy function. After the hard disk receives the high-level signal from EC, it starts to execute its internal destruction logic. Through this circuit logic, the function of soft destruction of the hard disk is realized when the device is in normal working state.

[0040] In a possible implementation, when the second current control element and the third current control element are in an OR gate relationship, the hard disk destruction signal is valid at a high level, and the output signals of the MCU and the EC when they are not working are designed to be low level signals.

[0041] like Figure 2As shown, the second current control element (D2) and the third current control element (D3) are logically connected to form an OR gate, that is, as long as one of the current control elements receives a high-level signal (i.e., a signal that satisfies the destruction condition), the output of the OR gate will be high. The destruction function of the hard disk is designed to be triggered only under a high-level signal. Only when the output of the OR gate is high will the hard disk start to perform the destruction operation. When the MCU and EC are not working, their output signals are designed to be low, ensuring that when these components are inactive, they will not interfere with the generation of the hard disk destruction signal and will not affect the destruction logic of the hard disk.

[0042] In a possible implementation, when the second current control element and the third current control element are in an AND gate relationship, the hard disk destruction signal is valid at a low level, and the output signals of the MCU and the EC when they are not working are designed to be high level signals.

[0043] like Figure 3 As shown, D2 and D3 are logically connected to form an AND gate, that is, the output of the AND gate will be high only when the two current control elements receive a high-level signal at the same time, and the output is low in other cases. The destruction function of the hard disk is designed to be triggered under a low-level signal, that is, the hard disk will start to execute the destruction operation only when the output of the AND gate is low. At this time, when the MCU and EC are not working, their output signals are designed to be high to avoid accidentally triggering the low-level destruction signal of the hard disk when the MCU or EC is not working.

[0044] The above specific implementation manner does not constitute a limitation to the protection scope of the present application. It should be understood by those skilled in the art that various modifications, combinations and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present application should be included in the protection scope of the present application. In some cases, the actions or steps recorded in the present application can be performed in an order different from that in the embodiment and can still achieve the desired results. In addition, the process depicted in the accompanying drawings does not necessarily require the specific order or continuous order shown to achieve the desired results. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

Claims

1. A hard disk soft destruction method, characterized in that: The method comprises: Monitor the device to obtain device status attributes, wherein the device includes a large battery, a hard disk, a destroy button, an MCU, an EC, a first voltage power supply line, a second voltage power supply line, a third voltage power supply line, a first current control element, a second current control element, a third current control element, a first switch element, and a second switch element; When the device state attribute is the shutdown state and the destroy button is triggered, a shutdown state soft destruction solution is generated; When the device state attribute is a normal state and the destroy button is triggered, a normal state soft destroy solution is generated; Based on the shutdown state soft destruction scheme or the normal state soft destruction scheme, the hard disk is soft destroyed.

2. A hard disk soft destruction method as claimed in claim 1, characterized in that: When the device status attribute is the shutdown state, the first switch element and the second switch element are both disconnected, the large battery stops supplying power to the first voltage power supply line, the second voltage power supply line and the third voltage power supply line, and the EC and the MCU do not work.

3. A hard disk soft destruction method as claimed in claim 1, characterized in that: The shutdown state soft destruction solution includes: Turning on the second switch element, supplying power to the MCU according to the large battery and the third voltage power supply line, and the MCU starts to work and outputs a PEN signal; Based on the PEN signal, the first switch element is turned on, the hard disk is powered according to the large battery and the second voltage power supply line, and the MCU outputs a high-level signal to the hard disk to start the destruction function of the hard disk.

4. A hard disk soft destruction method as claimed in claim 1, characterized in that: The shutdown state soft destruction solution also includes: When the hard disk is destroyed, a destruction status signal is generated; The MCU receives the destruction status signal and generates a PEN reverse signal and a NEN signal; The first switch element receives the PEN reverse signal, the first switch element is disconnected, and the large battery turns off the power supply of the second voltage power supply line to the hard disk; The second switch element receives the NEN signal, the second switch element is turned off, and the large battery turns off the power supply of the third voltage power supply line to the MCU.

5. A hard disk soft destruction method as claimed in claim 1, characterized in that: When the device status attribute is a normal state, the large battery supplies power to the hard disk through the first voltage power supply circuit and the first current control element; The first switch element and the second switch element are both disconnected, the second voltage power supply circuit and the third voltage power supply circuit do not supply power, and the MCU is in a non-working state; The large battery supplies power to the EC, and the EC is in working state.

6. A hard disk soft destruction method as claimed in claim 1, characterized in that: The normal state soft destruction scheme includes: When the destroy button is triggered, a destroy button trigger signal is generated; The EC detects the destroy button trigger signal and generates a high level signal to the hard disk, and the hard disk starts the destroy function.

7. A hard disk soft destruction method as claimed in claim 1, characterized in that: When the second current control element and the third current control element are in an OR gate relationship, the destruction signal of the hard disk is effective at a high level, and the output signals of the MCU and the EC when they are not working are both designed to be low level signals.

8. A hard disk soft destruction method as claimed in claim 1, characterized in that: When the second current control element and the third current control element are in an AND gate relationship, the hard disk destruction signal is low level valid, and the output signals of the MCU and the EC when they are not working are both designed to be high level signals.

Images