Silicon-based semiconductor composite substrate and preparation method and application thereof

Abstract

The invention provides a silicon-based semiconductor composite substrate as well as a preparation method and application thereof. The preparation method of the silicon-based semiconductor composite substrate comprises the following steps: putting an SOI sheet or a SiOG sheet into a cavity of a glass panel and then carrying out vacuum lamination; wherein the bottom of the cavity is coated with a glass sealing slurry layer; and then annealing at the temperature of between 600 and 700 DEG C for 10 to 35 minutes to obtain the silicon-based semiconductor composite substrate. According to the method, the SOI sheet or the SiOG sheet and the glass panel with the cavity are laminated by using the glass sealing slurry under a certain pressure, and are annealed in the rapid thermal annealing equipment, so that the SOI sheet or the SiOG sheet and the glass panel are bonded together, the technical problem of large size of SOI and SiOG is solved, and the application range of SOI and SiOG is expanded.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a silicon-based semiconductor composite substrate and a preparation method and application thereof. Background Art

[0002] Commonly used semiconductor materials and devices for glass-based semiconductor display products include amorphous silicon semiconductors, metal oxide semiconductors and low-temperature polycrystalline silicon semiconductors. Among them, amorphous silicon semiconductors have the advantage of low cost, but the mobility is less than 1cm 2 / V·S, it is difficult to apply to high-end products such as high resolution and high refresh rate; metal oxide semiconductors are suitable for large-scale production, and their mobility is increasing year by year, but it is still less than 50cm 2 / V·S, and the threshold voltage is not stable enough, so it is difficult to drive Micro LED (micro light-emitting diode display); low-temperature polysilicon devices have 50cm 2 / V·S-100cm 2 The high mobility of / V·S can drive high-end LCD (liquid crystal display), OLED (organic light-emitting diode) and Micro LED products, but the LTPS driving capability cannot further reduce the power consumption in view of the low power consumption requirements of mobile products.

[0003] Silicon-based semiconductors have a thermal conductivity of approximately 1000 cm 2 / V·S has a high mobility, but the manufacturing process requires the use of a high temperature of thousands of degrees Celsius, which is far beyond the strain point of the glass substrate, and it cannot be scaled up, so it has not been applied to glass-based displays. In order to manufacture glass-based high-mobility devices, the technology of preparing SOI (silicon on insulator) by intelligent cutting can be referred to, and the single-crystal silicon film is transferred to the glass substrate. However, the transfer method often uses anodic bonding or SiOX-SiOX bonding. The chambers for these two bonding methods cannot be too large, resulting in only wafer-level bonding and silicon film transfer. Therefore, the large-scale SOI and SiOG still have problems. Therefore, it is also necessary to develop a new silicon-based semiconductor composite substrate preparation process. Summary of the invention

[0004] The purpose of this application is to provide a silicon-based semiconductor composite substrate and its preparation method and application, which can solve the large-size problem of SOI and SiOG, thereby expanding the application range of SOI and SiOG. The specific technical solution is as follows:

[0005] The first aspect of the present application provides a method for preparing a silicon-based semiconductor composite substrate, comprising the steps of: placing an SOI sheet or a SiOG sheet into a cavity of a glass panel and vacuum pressing the sheet; wherein a glass sealing slurry layer is coated on the bottom of the cavity; and then annealing at 600°C-700°C for 10min-35min to obtain the silicon-based semiconductor composite substrate.

[0006] In some embodiments of the present application, the pressure of the vacuum pressing is 5MPa-3500MPa, and the time of the vacuum pressing is 1min-10min.

[0007] In some embodiments of the present application, the distance between the edge of the SOI sheet or SiOG sheet and the inner edge of the cavity is 1 mm-2 mm.

[0008] In some embodiments of the present application, the thickness of the glass sealing slurry layer is 0.05 mm-5 mm.

[0009] In some embodiments of the present application, a method for preparing a glass panel with a cavity comprises the steps of: coating a glass sealing slurry layer on the surface of a glass panel carrier, and then bonding it to a glass panel mold with a through hole to obtain the glass panel with a cavity; or, laser processing or etching a cavity on a glass panel carrier, and then coating a glass sealing slurry layer on the bottom of the cavity to obtain the glass panel with a cavity; wherein the height of the cavity is less than the original thickness of the glass panel carrier.

[0010] In some embodiments of the present application, the method for preparing the SiOG sheet includes the steps of: growing a silicon oxide layer on a silicon wafer; injecting hydrogen ions into the silicon wafer; bonding the silicon oxide layer to a glass wafer; annealing to cause hydrogen explosion peeling; thinning by a chemical mechanical polishing process to remove the hydrogen explosion defect layer to obtain the SiOG sheet.

[0011] In some embodiments of the present application, in the method for preparing a SiOG sheet, the hydrogen ion implantation depth is 60nm-2000nm; the thickness of the silicon oxide layer is 10nm-300nm; and the thickness thinned by the chemical mechanical polishing process is 50nm-2250nm.

[0012] The second aspect of the present application provides a silicon-based semiconductor composite substrate prepared according to the method of the first aspect of the present application.

[0013] The third aspect of the present application provides an application of the silicon-based semiconductor composite substrate provided in the second aspect of the present application in the preparation of a semiconductor display device.

[0014] A fourth aspect of the present application provides a method for preparing a semiconductor display device, comprising the steps of:

[0015] Patterning the silicon wafer on the silicon-based semiconductor composite substrate prepared by the method according to the first aspect of the present application, and then sequentially forming a gate insulating layer, a gate metal layer, an interlayer insulating layer, a source-drain electrode layer and a planarization layer on the surface of the silicon wafer;

[0016] An electrode layer is formed on the flat layer, and then bonded to the Micro LED to obtain a glass-based semiconductor display device; the glass is peeled off to obtain a flexible semiconductor display device; or an organic light-emitting device is evaporated on the flat layer and packaged to obtain an organic semiconductor display device; or a common electrode and a pixel electrode layer are formed on the flat layer to obtain a liquid crystal display driving backplane, and the liquid crystal display device is obtained by box assembly.

[0017] Beneficial effects of the present application: The present application uses glass sealing slurry to press a SOI sheet or SiOG sheet with a glass panel with a cavity under a certain pressure, and anneals the SOI sheet or SiOG sheet with a glass panel at 600°C-700°C for 10min-35min in a rapid thermal annealing device, so that the SOI sheet or SiOG sheet and the glass panel are bonded together, thereby solving the technical problem of large-size SOI and SiOG, thereby expanding the application range of SOI and SiOG. The silicon-based semiconductor composite substrate provided by the present application has high mobility.

[0018] Of course, implementing any product or method of the present application does not necessarily require achieving all of the advantages described above at the same time. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application, and for ordinary technicians in this field, other embodiments can also be obtained based on these drawings.

[0020] Figure 1 This is a top view of a SiOG sheet placed into a cavity of a glass panel in one embodiment of the present application;

[0021] Figure 2a This is a cross-sectional view of a SiOG sheet placed into a cavity of a glass panel in one embodiment of the present application;

[0022] Figure 2b This is a cross-sectional view of another embodiment of the present application after the SiOG sheet is placed into the cavity of the glass panel;

[0023] Figure 3a A cross-sectional view of a glass panel with a cavity in one embodiment of the present application;

[0024] Figure 3b A cross-sectional view of a glass panel with a cavity in another embodiment of the present application;

[0025] Figure 4 A top view of a glass panel with a cavity in one embodiment of the present application;

[0026] Figure 5A schematic diagram of the preparation process of a SiOG sheet in one embodiment of the present application;

[0027] Figure 6 A schematic diagram of a process for patterning and sequentially forming a gate insulating layer, a gate metal layer, an interlayer insulating layer, a source-drain electrode layer and a planar layer on a silicon-based semiconductor composite substrate in one embodiment of the present application;

[0028] Figure 7 A schematic diagram of a structure in which an electrode layer is formed on a flat layer in one embodiment of the present application;

[0029] Figure 8 This is a schematic structural diagram of a glass-based semiconductor display device in another embodiment of the present application;

[0030] Fig. 9 is a schematic structural diagram of an organic semiconductor display device in another embodiment of the present application;

[0031] Fig.10 This is a schematic structural diagram of a liquid crystal display driving backplane in another embodiment of the present application;

[0032] In the figure, 11. SiOG sheet, 110. SiO layer (silicon oxide layer), 120. Si layer (silicon wafer), 130. glass panel and slurry layer, 131. glass panel carrier, 132. slurry layer, 150. glass layer (glass sheet), 101. through hole, 100. glass panel mold, 102. cavity, 160. hydrogen ion layer, 251. gate insulation layer, 252. gate metal layer, 253. interlayer insulation layer, 254. source and drain layer, 256. flat layer, 257. electrode layer, 258. Micro LED, 259. common electrode and pixel electrode layer, 2421. first electrode layer, 2422. light-emitting layer, 2423. pixel defining layer, 2424. second electrode layer, 2425. packaging layer. DETAILED DESCRIPTION

[0033] The following will be combined with the embodiments of the present application and the accompanying drawings to clearly and completely describe the technical solutions in the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. All other embodiments obtained by those skilled in the art based on the present application belong to the scope of protection of the present application.

[0034] The first aspect of the present application provides a method for preparing a silicon-based semiconductor composite substrate, comprising the steps of: placing an SOI (silicon on insulator) wafer or a SiOG (silicon on glass) wafer into a cavity of a glass panel and vacuum pressing the wafer; wherein a glass sealing slurry layer is coated on the bottom of the cavity; and then annealing at 600°C-700°C for 10min-35min to obtain a silicon-based semiconductor composite substrate.

[0035] Figure 1 This is a top view of a SiOG sheet placed into a cavity of a glass panel in one embodiment of the present application; Figure 2a This is a cross-sectional view of a SiOG sheet placed into the cavity of a glass panel in one embodiment of the present application (along the Figure 1 AA line section); Figure 2b This is a cross-sectional view of another embodiment of the present application after the SiOG sheet is placed into the cavity of the glass panel. Figure 2a and Figure 2b As can be seen in the figure, the SiOG sheet 11 includes a glass layer 150 , a SiO layer 110 and a Si layer 120 stacked in sequence; wherein the glass layer (glass sheet) 150 and the glass panel carrier 131 are connected by a glass sealing slurry layer 132 .

[0036] In the present application, the annealing temperature may be 600°C, 610°C, 620°C, 630°C, 640°C, 650°C, 660°C, 670°C, 680°C, 690°C, 700°C or a range consisting of any two values ​​therebetween. When the annealing temperature is lower than 600°C, the glass panel carrier and the SOI sheet or SiOG sheet cannot be completely bonded or the bonding strength is insufficient; when the annealing temperature is higher than 700°C, it exceeds the softening point of the glass, and the glass on both sides of the bond may soften. The present application controls the annealing temperature within the above range, which can avoid exceeding the softening point of the glass and ensure complete bonding between the glass panel carrier and the SOI sheet or SiOG sheet to achieve the required bonding strength.

[0037] In the present application, the annealing time can be 10min, 15min, 20min, 25min, 30min, 35min or a range consisting of any two values ​​therebetween. When the annealing time is less than 10min, the glass panel carrier and the SOI sheet or SiOG sheet cannot be completely bonded or the bonding strength is insufficient; when the annealing time is more than 35min, it is not conducive to improving production efficiency, and the glass tends to soften. The present application controls the annealing time within the above range, which can not only avoid a decrease in production efficiency, but also ensure that the glass panel carrier and the SOI sheet or SiOG sheet are completely bonded to achieve the required bonding strength.

[0038] The present application has no particular restrictions on the equipment used in the preparation process, as long as the purpose of the present application can be achieved. For example, vacuum pressing can be performed using vacuum pressing equipment, and annealing can be performed using rapid annealing equipment.

[0039] In the present application, the number of cavities of the glass panel can be one or more; the present application has no particular limitation on the shape of the cavity of the glass panel, as long as the purpose of the invention of the present application can be achieved, such as a circular or square shape. In the present application, the thickness of the SOI sheet or SiOG sheet is substantially the same as the height of the cavity.

[0040] The SOI wafer used in the present application can be prepared by any method in the prior art or obtained through commercial purchase.

[0041] The glass sealing slurry layer described in the present application is formed by coating the glass sealing slurry on the bottom of the cavity. The present application has no particular restriction on the type of glass sealing slurry, as long as the purpose of the present application can be achieved. For example, the glass sealing slurry SD-407 or SD915 of Beijing Tianlichuang Glass Technology Development Co., Ltd. is used.

[0042] The present application uses glass sealing slurry to press a SOI sheet or SiOG sheet with a glass panel with a cavity under a certain pressure, and anneals the sheet at 600°C-700°C for 10min-35min in a rapid thermal annealing device, so that the SOI sheet or SiOG sheet and the glass panel are bonded together, thereby solving the technical problem of large-size SOI and SiOG, thereby expanding the application range of SOI and SiOG.

[0043] In some embodiments of the present application, the pressure of the vacuum pressing is 5MPa-3500MPa, and the time of the vacuum pressing is 1min-10min. In the present application, the pressure of the vacuum pressing can be 5MPa, 10MPa, 15MPa, 25MPa, 50MPa, 100MPa, 500MPa, 1000MPa, 1500MPa, 2000MPa, 2500MPa, 3000MPa, 3500MPa or a range consisting of any two values ​​therebetween. The time of vacuum pressing can be 1min, 2min, 3min, 4min, 5min, 6min, 7min, 8min, 9min, 10min or a range consisting of any two values ​​therebetween. The present application controls the pressure and time of vacuum pressing within the above range, which is conducive to improving the bonding effect between the glass panel carrier and the SOI sheet or SiOG sheet, while making the silicon-based semiconductor composite substrate have better subsequent semiconductor process productivity, preparing better TFT (thin film transistor) devices, and having higher mobility.

[0044] In some embodiments of the present application, the distance between the edge of the SOI sheet or SiOG sheet and the inner edge of the cavity is 1mm-2mm. In the present application, the distance between the edge of the SOI sheet or SiOG sheet and the inner edge of the cavity can be 1mm, 1.1mm, 1.2mm, 1.3mm, 1.4mm, 1.5mm, 1.6mm, 1.7mm, 1.8mm, 1.9mm, 2.0mm or a range consisting of any two values ​​therebetween. The present application controls the size of the cavity to be slightly larger than the size of the SOI sheet or SiOG sheet, which is beneficial to improving the bonding effect between the glass panel carrier and the SOI sheet or SiOG sheet, while enabling the silicon-based semiconductor composite substrate to have better subsequent semiconductor process productivity and prepare better TFT devices.

[0045] In some embodiments of the present application, the thickness of the glass sealing slurry layer is 0.05mm-5mm. In the present application, the thickness of the glass sealing slurry layer can be 0.05mm, 0.1mm, 0.15mm, 0.2mm, 0.25mm, 0.3mm, 0.35mm, 0.4mm, 0.45mm, 0.5mm, 1mm, 2mm, 3mm, 4mm, 5mm or a range consisting of any two values ​​therebetween. The present application controls the thickness of the glass sealing slurry layer within the above range, which is beneficial to improving the bonding effect between the glass panel carrier and the SOI sheet or SiOG sheet, while making the silicon-based semiconductor composite substrate have better subsequent semiconductor process productivity and preparing better TFT devices.

[0046] In some embodiments of the present application, a method for preparing a glass panel with a cavity comprises the steps of:

[0047] Option 1: If Figure 3a As shown, a glass sealing slurry layer 132 is coated on the surface of a glass panel carrier 131, and then bonded to a glass panel mold 100 with a through hole 101 to obtain the glass panel with a cavity; or,

[0048] Option 2: If Figure 3b As shown, a cavity 102 is laser processed or etched on a glass panel carrier 131, and then a glass sealing slurry layer 132 is coated on the bottom of the cavity 102 to obtain the glass panel with a cavity; wherein the height of the cavity 102 is less than the original thickness of the glass panel carrier 131. In the first scheme of the present application, before coating the glass sealing slurry layer on the surface of the glass panel carrier, a step of cleaning the glass panel carrier may also be included. The method for preparing a glass panel mold with through holes may include the steps of: forming through holes on the glass panel mold by laser processing or HF etching process, and the number of through holes may be one or more. The bonding in the present application refers to the bonding of the glass panel mold with through holes and the glass panel carrier through a glass sealing slurry layer. Figure 4 It is a top view of a glass panel with a cavity in one embodiment of the present application (prepared according to Scheme 1).

[0049] In the second solution of the present application, the number of cavities laser processed or etched on the glass panel carrier can be one or more; the height of the cavity is less than the original thickness of the glass panel carrier, that is, it is not cut through.

[0050] In some embodiments of the present application, Figure 5 As shown, the method for preparing the SiOG sheet includes the steps of:

[0051] (1)Reference Figure 5 As shown in b, Figure 5 A silicon oxide layer 110 is grown on the silicon wafer 120 shown in a;

[0052] (2)Reference Figure 5 As shown in c, hydrogen ions are injected into the silicon wafer 120 to form a hydrogen ion layer 160;

[0053] (3)Reference Figure 5 As shown in d, the silicon oxide layer 110 is bonded to a glass wafer 150;

[0054] (4)Reference Figure 5 As shown in middle e, hydrogen explosion peeling occurs during annealing;

[0055] (5)Reference Figure 5 As shown in f, the hydrogen explosion defect layer is removed by a chemical mechanical polishing process (CMP) to obtain a SiOG wafer, which includes a glass wafer 150, a silicon oxide layer 110 and a silicon wafer 120 stacked in sequence.

[0056] The present application does not specifically limit the method of growing the silicon oxide layer on the silicon wafer, as long as the invention purpose of the present application can be achieved, such as growth by thermal oxidation or PECVD (plasma enhanced chemical vapor deposition). The present application does not specifically limit the thickness of the silicon wafer, which can be the thickness of silicon wafers commonly used in the art.

[0057] In some embodiments of the present application, in step (2), the hydrogen ion implantation depth is 60nm-2000nm. In the present application, the hydrogen ion implantation depth can be 60nm, 70nm, 80nm, 90nm, 100nm, 150nm, 200nm, 300nm, 500nm, 1000nm, 1500nm, 2000nm or a range consisting of any two values ​​therebetween. The hydrogen ion implantation depth described in the present application refers to the depth of the silicon wafer close to the silicon oxide layer. The present application controls the hydrogen ion implantation depth within the above range, which is conducive to the moderate thickness of the silicon wafer layer retained in the subsequent hydrogen explosion stripping process.

[0058] In some embodiments of the present application, in step (1), the thickness of the silicon oxide layer is 10nm-300nm. In the present application, the thickness of the silicon oxide layer can be 10nm, 20nm, 30nm, 50nm, 100nm, 150nm, 200nm, 250nm, 300nm or a range consisting of any two values ​​therebetween. The present application controls the thickness of the silicon oxide layer within the above range, which is conducive to anodic bonding; when the thickness of the silicon oxide layer is too thick, due to the non-conductivity of silicon oxide, it will cause the anodic bonding (power-on) to fail; when the thickness of the silicon oxide layer is too thin, the buffer (silicon oxide) between the silicon film and the glass after the hydrogen injection Smart cut transfer is successful is too thin, making it easy for impurities in the glass to enter the silicon film (semiconductor layer).

[0059] In some embodiments of the present application, in step (5), the thickness of the thinning by the chemical mechanical polishing process is 50nm-2250nm. In the present application, the thickness of the thinning by the chemical mechanical polishing process is 50nm, 75nm, 100nm, 150nm, 200nm, 300nm, 500nm, 1000nm, 1500nm, 2000nm, 2250nm or a range consisting of any two values ​​therebetween. The present application controls the thickness of the thinning by the chemical mechanical polishing process to be within the above range, which is conducive to reducing the roughness of the silicon film (semiconductor layer).

[0060] The second aspect of the present application provides a silicon-based semiconductor composite substrate prepared according to the method described in the first aspect of the present application.

[0061] The third aspect of the present application provides the use of the silicon-based semiconductor composite substrate described in the second aspect of the present application in the preparation of a semiconductor display device.

[0062] A fourth aspect of the present application provides a method for preparing a semiconductor display device, comprising the steps of:

[0063] S1: Reference Figure 6 As shown, the silicon wafer 120 on the silicon-based semiconductor composite substrate prepared by the method according to the first aspect of the present application is patterned, and then a gate insulating layer 251, a gate metal layer 252, an interlayer insulating layer 253, a source and drain electrode layer 254 and a planar layer 256 are sequentially formed on the surface of the silicon wafer 120;

[0064] S2: Scheme 1): Reference Figure 7 As shown, an electrode layer 257 is formed on the flat layer 256; then, referring to Figure 8 As shown, bonding with Micro LED 258 to obtain a glass-based semiconductor display device; peeling off the glass to obtain a flexible semiconductor display device; or,

[0065] Solution 2): Reference Fig. 9 As shown, an organic light-emitting device is evaporated on the flat layer 256 and packaged to obtain an organic semiconductor display device; or,

[0066] Solution 3): Reference Fig.10 As shown, a common electrode and a pixel electrode layer 259 are formed on the flat layer 256 to obtain a liquid crystal display driving backplane, and a liquid crystal display device is obtained by assembling the cells.

[0067] In solution 2) of the present application, reference Fig. 9 As shown, the organic light-emitting device may include a first electrode layer 2421, a light-emitting layer 2422, a pixel defining layer 2423, a second electrode layer 2424 and an encapsulation layer 2425 and other film layers; wherein the first electrode layer 2421 can be used as an anode, the pixel definition layer 2423 is divided into a plurality of openings, and the light-emitting layer 2422 is arranged in the opening of the pixel definition layer 2423 and connected to the first electrode layer 2421, the second electrode layer 2424 can be used as a cathode, covering the pixel definition layer 2423 and connected to the light-emitting layer 2422, so as to drive the light-emitting layer 2422 to light up through the first electrode layer 2421 and the second electrode layer 2424, and the encapsulation layer 2425 covers the surface of the second electrode layer 2424 to cover and protect the entire organic light-emitting device.

[0068] Example

[0069] Hereinafter, embodiments and comparative examples are given to more specifically illustrate the implementation methods of the present application. Various tests and evaluations are carried out according to the following methods. In addition, unless otherwise specified, "parts" and "%" are based on mass. The glass sealing paste used in the glass sealing paste layer in the following embodiments and comparative examples is glass sealing paste SD-407 purchased from Beijing Tianlichuang Glass Technology Development Co., Ltd.

[0070] Example 1

[0071] A 100nm thick silicon oxide layer is grown on a silicon wafer by thermal oxidation; hydrogen ions are implanted on the silicon wafer to a depth of 200nm; the silicon wafer is bonded to a glass sheet with its front side facing downward; annealing is performed to cause hydrogen explosion peeling; the silicon wafer is thinned by 200nm by CMP process to remove the hydrogen explosion defect layer, thereby obtaining a SiOG wafer (with a diameter of 200mm).

[0072] The glass panel carrier is cleaned, and then a glass sealing slurry layer with a thickness of 0.1 mm is coated on the surface of the glass panel carrier; a through hole (with a through hole diameter of 203 mm) is HF-etched on the glass panel mold, and then bonded to the glass panel carrier through the glass sealing slurry layer to obtain a glass panel with a cavity.

[0073] After the SiOG sheet is placed into the cavity of the glass panel, it is vacuum pressed for 5 minutes at 200 MPa using a vacuum pressing device; then it is annealed at 650° C. for 20 minutes in a rapid thermal annealing device to obtain a silicon-based semiconductor composite substrate.

[0074] The silicon wafer on the silicon-based semiconductor composite substrate is patterned, and then a gate insulating layer, a gate metal layer, an interlayer insulating layer, a source and drain layer, a planarizing layer and an electrode layer are sequentially formed on the surface of the silicon wafer, and then bonded to the Micro LED to obtain a glass-based semiconductor display device.

[0075] Example 2-11

[0076] Except for adjusting the corresponding parameters shown in Table 1, the rest is the same as Example 1.

[0077] Comparative Examples 1-4

[0078] Except for adjusting the corresponding parameters shown in Table 1, the rest is the same as Example 1.

[0079] Table 1 Parameters related to each embodiment and comparative example

[0080]

[0081]

[0082] Note: “ / ” indicates not measured

[0083] The mobility and bonding effect of the silicon-based semiconductor composite substrates prepared in different embodiments and comparative examples are shown in Table 1 above, wherein the mobility of the silicon-based semiconductor composite substrates in the embodiments and comparative examples is obtained by testing the Hall system of the LakeShore Cryotronics 8425 probe station in the United States according to its instructions. It can be seen from Examples 1-11 that the annealing temperature and time, vacuum pressing pressure and time, and the thickness of the glass sealing slurry layer are controlled within the scope of the present application, the glass panel carrier and the SiOG sheet have a good bonding effect, and the silicon-based semiconductor composite substrate has a high mobility.

[0084] It can be seen from Comparative Examples 1 and 2 that the annealing temperature is not within the scope of the present application, the glass panel carrier and the SiOG sheet cannot be bonded or the glass softening point is exceeded. It can be seen from Comparative Examples 3 and 4 that the annealing time is not within the scope of the present application, the glass panel carrier and the SiOG sheet cannot be bonded or the glass has a tendency to soften.

[0085] The above description is only a preferred embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application shall be included in the scope of protection of the present application.

Claims

1. A method for preparing a silicon-based semiconductor composite substrate, comprising the steps of: Put the SOI sheet or SiOG sheet into the cavity of the glass panel and then vacuum press it; The bottom of the cavity is coated with a glass sealing slurry layer; Then, annealing is performed at 600° C.-700° C. for 10 min-35 min to obtain the silicon-based semiconductor composite substrate.

2. The preparation method according to claim 1, wherein The pressure of the vacuum pressing is 5MPa-3500MPa, and the time of the vacuum pressing is 1min-10min.

3. The preparation method according to claim 1, wherein The distance between the edge of the SOI sheet or SiOG sheet and the inner edge of the cavity is 1 mm-2 mm.

4. The preparation method according to claim 1, wherein The thickness of the glass sealing slurry layer is 0.05 mm-5 mm.

5. The preparation method according to claim 1, wherein The method for preparing a glass panel with a cavity comprises the following steps: A glass sealing slurry layer is coated on the surface of the glass panel carrier, and then bonded to a glass panel mold with a through hole to obtain the glass panel with a cavity; or, A cavity is formed on a glass panel carrier by laser processing or etching, and then a glass sealing slurry layer is coated on the bottom of the cavity to obtain the glass panel with a cavity; wherein the height of the cavity is less than the original thickness of the glass panel carrier.

6. The preparation method according to any one of claims 1 to 5, wherein The preparation method of the SiOG sheet comprises the steps of: Growing a silicon oxide layer on a silicon wafer; injecting hydrogen ions into the silicon wafer; bonding the silicon oxide layer to a glass wafer; Hydrogen explosion peeling occurs during annealing; The SiOG sheet is obtained by thinning the sheet through a chemical mechanical polishing process and removing the hydrogen explosion defect layer.

7. The preparation method according to claim 6, wherein: The hydrogen ion implantation depth is 60nm-2000nm; The thickness of the silicon oxide layer is 10nm-300nm; The thickness thinned by the chemical mechanical polishing process is 50nm-2250nm.

8. A silicon-based semiconductor composite substrate prepared by the method according to any one of claims 1 to 7.

9. Use of the silicon-based semiconductor composite substrate according to claim 8 in the preparation of semiconductor display devices.

10. A method for preparing a semiconductor display device, comprising the steps of: Patterning the silicon wafer on the silicon-based semiconductor composite substrate prepared by the method of any one of claims 1 to 7, and then sequentially forming a gate insulating layer, a gate metal layer, an interlayer insulating layer, a source-drain electrode layer and a planarization layer on the surface of the silicon wafer; An electrode layer is formed on the flat layer, and then bonded to the Micro LED to obtain a glass-based semiconductor display device; the glass is peeled off to obtain a flexible semiconductor display device; or an organic light-emitting device is evaporated on the flat layer and packaged to obtain an organic semiconductor display device; or a common electrode and a pixel electrode layer are formed on the flat layer to obtain a liquid crystal display driving backplane, and the liquid crystal display device is obtained by assembling the boxes.

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