Schottky diode and manufacturing method thereof

Abstract

The invention provides a Schottky diode and a manufacturing method thereof. The method comprises the following steps: providing a substrate; forming an epitaxial layer on the surface of the substrate; forming an oxide layer on the surface, away from the substrate, of the epitaxial layer; etching the oxide layer to form a first window; injecting boron ions through the first window to form a first type protection ring located at one side, far away from the substrate, of the epitaxial layer; etching the oxide layer to form a second window, and performing barrier metal sputtering through the second window to form a barrier layer; forming a third window on one side, far away from the substrate, of the epitaxial layer; injecting boron ions through the third window to form a second type protection ring which at least partially coincides with the first type protection ring and is tangent to the barrier layer; and manufacturing a first metal layer on the barrier layer and the oxide layer close to the barrier layer, and manufacturing a second metal layer on one side, far away from the epitaxial layer, of the substrate. The second type protection ring is added after the barrier layer is formed, so that the fringe electric field can be improved, the static voltage resistance is improved, and the forward voltage drop is not increased.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a Schottky diode and a method for manufacturing the same. Background Art

[0002] Throughout the life cycle of Schottky diodes, from manufacturing and transportation to actual application, electrostatic damage is one of the most frequent causes of failure. In view of this, it is particularly important to improve the anti-static ability of Schottky diodes. At present, this type of diode mainly relies on P-type guard rings to enhance its ability to withstand electrostatic voltage. However, in the existing Schottky diode designs on the market, a single P-type guard ring has obvious deficiencies in resisting static electricity.

[0003] In order to make up for this defect, a plan has been proposed to increase the number of P-type guard rings to enhance the anti-static performance. Although this move can significantly improve the electrostatic protection capability of Schottky diodes in theory, it also comes with significant disadvantages: the layout of multiple P-type guard rings inevitably occupies the Schottky source area, resulting in a reduction in the effective contact area between the barrier layer and the N-drift layer, which in turn causes an increase in the forward voltage drop of the Schottky diode, affecting its performance and work efficiency. Summary of the invention

[0004] In order to at least overcome the above-mentioned deficiencies in the prior art, the object of the present application is to provide a method for manufacturing a Schottky diode, the method comprising:

[0005] providing a substrate;

[0006] forming an epitaxial layer on a surface of the substrate;

[0007] forming an oxide layer on a surface of the epitaxial layer away from the substrate;

[0008] Etching the oxide layer to form a first annular window; implanting boron ions through the first window to form a first type of guard ring located on a side of the epitaxial layer away from the substrate;

[0009] Etching the oxide layer to form a second window, wherein the second window exposes a central area of ​​the first type guard ring; performing barrier metal sputtering through the second window to form a barrier layer;

[0010] forming a third window on a side of the epitaxial layer away from the substrate; performing boron ion implantation through the third window to form a second type of guard ring that at least partially overlaps with the first type of guard ring and is tangent to the barrier layer;

[0011] A first metal layer is formed on the barrier layer and the oxide layer close to the barrier layer, and a second metal layer is formed on a side of the substrate away from the epitaxial layer; wherein the first metal layer covers the barrier layer and partially extends onto the oxide layer.

[0012] In a possible implementation, the step of forming an oxide layer on the surface of the epitaxial layer away from the substrate comprises: depositing an oxide layer on the substrate using atmospheric pressure chemical vapor deposition. Silicon dioxide.

[0013] In a possible implementation, the step of etching the oxide layer to form a first annular window; and implanting boron ions through the first window to form a first type of guard ring located on a side of the epitaxial layer away from the substrate includes:

[0014] Uniformly coating a photoresist layer on a side of the epitaxial layer away from the substrate;

[0015] Performing photolithography on the photoresist layer through a mask having a first window pattern, and engraving a first window pattern on the photoresist layer;

[0016] Using a corrosive solvent to corrode the oxide layer, and transferring the first window pattern to the oxide layer;

[0017] Using a photoresist solvent to remove the photoresist remaining in the oxide layer;

[0018] In the first window, 1.0E10cm was injected with 60keV energy. -2 To 5.0E15cm -2 Boron ions are subjected to high temperature annealing and low temperature oxidation treatment in a diffusion furnace to form the first type of protection ring at the first window.

[0019] In a possible implementation, the step of etching the oxide layer to form a second window, wherein the second window exposes a central area of ​​the first type guard ring; and performing barrier metal sputtering through the second window to form a barrier layer includes:

[0020] Uniformly coating a photoresist layer on a side of the oxide layer away from the epitaxial layer;

[0021] Performing photolithography on the photoresist layer through a mask with the barrier layer window to carve out the second window pattern on the photoresist layer;

[0022] Using a corrosive solvent to corrode the oxide layer, and transferring the second window pattern to the oxide layer;

[0023] Depositing metal into the second window using a sputtering process to form the barrier layer;

[0024] Such metals include titanium, platinum, nickel platinum and chromium.

[0025] In a possible implementation, the step of forming a third window on a side of the epitaxial layer away from the substrate; and implanting boron ions through the third window to form a second type of guard ring that at least partially overlaps with the first type of guard ring and is tangent to the barrier layer includes:

[0026] Uniformly coating a photoresist layer on a side of the epitaxial layer away from the substrate;

[0027] Performing photolithography on the photoresist layer through a mask having a third window pattern, and engraving a third window pattern on the photoresist layer;

[0028] transferring the third window pattern onto the epitaxial layer;

[0029] Using a photoresist solvent to remove the remaining photoresist;

[0030] Inject 1.0E10cm at the third window with 90kev-200kev energy -2 To 5.0E15cm -2 The boron ions are rapidly annealed at 400° C. to 700° C. using a rapid thermal annealing device to form the second type guard ring.

[0031] The present application also provides a Schottky diode, including:

[0032] substrate;

[0033] an epitaxial layer located on one side of the substrate;

[0034] A barrier layer located on a side of the epitaxial layer away from the substrate and a first type guard ring and a second type guard ring surrounding the barrier layer; the second type guard ring at least partially overlaps with the first type guard ring; at least a portion of the first type guard ring is located on a side of the second type guard ring away from the barrier layer;

[0035] an oxide layer located on a side of the epitaxial layer away from the substrate, wherein an orthographic projection of the oxide layer on the substrate surrounds an orthographic projection of the barrier layer on the substrate and does not overlap with an orthographic projection of the barrier layer on the substrate;

[0036] A first metal layer located on a side of the barrier layer and the oxide layer away from the substrate;

[0037] A second metal layer is located on a side of the substrate away from the epitaxial layer.

[0038] In a possible implementation manner, the substrate and the epitaxial layer are N-type semiconductor layers, and the first type guard ring and the second type guard ring are P-type guard rings.

[0039] In a possible implementation manner, the second type guard ring is tangent to an edge of the barrier layer.

[0040] In a possible implementation manner, the oxide layer material includes silicon dioxide.

[0041] In a possible implementation, the metal in the Schottky barrier layer includes titanium, platinum, nickel platinum and chromium.

[0042] Based on any of the above aspects, the Schottky diode and its manufacturing method provided in the embodiments of the present application, by adding a second type of guard ring after forming the potential barrier layer, can enhance the voltage resistance of the diode and optimize the edge electric field distribution at the interface between the first type of guard ring and the potential barrier, thereby improving the anti-static voltage tolerance of the device; at the same time, it does not increase the forward voltage drop. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without creative work.

[0044] Figure 1 A schematic flow chart of a method for manufacturing a Schottky diode provided in this embodiment;

[0045] Figure 2 One of the structural schematic diagrams of the Schottky diode provided in this embodiment;

[0046] Figure 3 The second structural diagram of the Schottky diode provided in this embodiment;

[0047] Figure 4 The third structural diagram of the Schottky diode provided in this embodiment;

[0048] Figure 5 The fourth structural diagram of the Schottky diode provided in this embodiment;

[0049] Figure 6 The fifth structural diagram of the Schottky diode provided in this embodiment;

[0050] Figure 7 The sixth structural diagram of the Schottky diode provided in this embodiment;

[0051] Figure 8 The seventh structural diagram of the Schottky diode provided in this embodiment;

[0052] Fig. 9 The eighth structural diagram of the Schottky diode provided in this embodiment;

[0053] Fig.10 One of the sub-step schematic diagrams of step S300 provided in this embodiment;

[0054] Fig.11 One of the sub-step schematic diagrams of step S400 provided in this embodiment;

[0055] Fig.12 One of the sub-step schematic diagrams of step S500 provided in this embodiment;

[0056] Fig.13 This is one of the sub-step schematic diagrams of step S600 provided in this embodiment.

[0057] Icons: substrate-100; epitaxial layer-200; oxide layer-300; first type guard ring-400; barrier layer-500; second type guard ring-600; first window-410; second window-510; third window-610; first metal layer-710; second metal layer-720. DETAILED DESCRIPTION

[0058] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. The components of the embodiments of the present application described and shown in the drawings here can be arranged and designed in various different configurations.

[0059] Therefore, the following detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the present application for which protection is sought, but merely represents selected embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present application.

[0060] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, further definition and explanation thereof is not required in subsequent drawings.

[0061] In the description of this application, it should be noted that the terms "upper", "lower", etc. indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship in which the product of the application is usually placed when in use, which is only for the convenience of describing this application and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on this application. In addition, the terms "first", "second", etc. are only used to distinguish the description, and cannot be understood as indicating or implying relative importance.

[0062] In addition, the terms "horizontal", "vertical", "overhanging" and the like do not mean that the components are required to be absolutely horizontal or overhanging, but can be slightly tilted. For example, "horizontal" only means that its direction is more horizontal than "vertical", and does not mean that the structure must be completely horizontal, but can be slightly tilted.

[0063] In the description of this application, it should also be noted that, unless otherwise clearly specified and limited, the terms "set", "install", "connect", and "connect" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two elements. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0064] It should be noted that, in the absence of conflict, different features in the embodiments of the present application may be combined with each other.

[0065] The inventors have found that the existing Schottky diodes mainly resist electrostatic voltage through the P-type guard ring. Currently on the market, designing a P-type guard ring in a Schottky diode will result in poor electrostatic resistance. Although designing multiple P-type guard rings has strong anti-static ability, it will occupy the Schottky source area and increase the forward voltage drop of the Schottky diode.

[0066] In view of this, this embodiment provides a solution that can reduce the risk of the above-mentioned problem. The solution provided by this embodiment is described in detail below.

[0067] This application provides a method for manufacturing a Schottky diode. Please refer to Figure 1 , the method comprising:

[0068] In step S100 , a substrate 100 is provided.

[0069] For example, N-type silicon with high resistivity is used as the substrate 100 to ensure good electrical performance and isolation effect.

[0070] Step S200 , forming an epitaxial layer 200 on the surface of the substrate 100 .

[0071] Specifically, a high-quality epitaxial layer 200 may be formed on the surface of the substrate 100 by using epitaxial growth techniques, such as chemical vapor deposition, molecular beam epitaxy, and the like.

[0072] For example, an N-type silicon epitaxial layer 200 is grown on an N-type silicon substrate 100 , and the doping concentration is slightly higher than that of the substrate 100 , so as to improve the conductivity of the device.

[0073] Step S300, please refer to Figure 2 An oxide layer 300 is formed on a surface of the epitaxial layer 200 away from the substrate 100 .

[0074] Specifically, an oxide layer 300 may be formed on the surface of the epitaxial layer 200 by thermal oxidation, chemical oxidation, physical vapor deposition, etc. The oxide layer 300 may be used as a masking layer and a protective layer for subsequent processes.

[0075] Step S400, please refer to Figure 3 , etching the oxide layer 300 to form a first annular window 410; please refer to Figure 4 , boron ions are implanted through the first window 410 to form a first type guard ring 400 located on a side of the epitaxial layer 200 away from the substrate 100 .

[0076] Specifically, a photoresist may be used as a mask to form a first annular window 410 on the oxide layer 300 by reactive ion etching. Subsequently, boron ion implantation is performed, and the implantation energy and dose are adjusted according to the required depth and concentration of the guard ring.

[0077] In this embodiment, the first type of guard ring 400 is provided to improve the withstand voltage and antistatic performance of the Schottky diode. By optimizing the electric field distribution, the P-type first type of guard ring 400 effectively reduces the electric field concentration at the edge of the Schottky junction, reducing the risk of leakage current and breakdown. At the same time, it can also enhance the self-protection ability of the device in electrostatic discharge events and extend its service life. In addition, the design of the P-type first type of guard ring 400 in this embodiment does not affect the forward conduction characteristics of the Schottky diode, ensuring low forward voltage drop and high efficiency conversion.

[0078] Step S500, please refer to Figure 5 , etching the oxide layer 300 to form a second window 510, wherein the second window 510 exposes the central area of ​​the first type guard ring 400; please refer to Figure 6 , barrier metal sputtering is performed through the second window 510 to form a barrier layer 500 .

[0079] Specifically, the second window 510 is formed on the oxide layer 300 by using photolithography and etching technology, and then the barrier metal is deposited in the second window 510 by a sputtering process to form the barrier layer 500 of the Schottky diode.

[0080] For example, platinum is used as the barrier metal, and a platinum thin film is deposited in the second window 510 as the barrier layer 500 by electron beam evaporation or magnetron sputtering process.

[0081] Step S600, please refer to Figure 7 , a third window 610 is formed on a side of the epitaxial layer 200 away from the substrate 100; please refer to Figure 8 , boron ions are implanted through the third window 610 to form a second type guard ring 600 that at least partially overlaps with the first type guard ring 400 and is tangent to the barrier layer 500 .

[0082] Specifically, a photoresist may be used as a mask to form a ring-shaped third window 610 on the epitaxial layer 200 by reactive ion etching. Subsequently, boron ion implantation is performed, and the implantation energy and dose are adjusted according to the required depth and concentration of the second type guard ring 600.

[0083] In this embodiment, in order to enhance the electrostatic protection performance of the Schottky diode and ensure that the forward voltage drop does not increase, a first type of guard ring 400 is first introduced in step S400; then, on the basis of the first type of guard ring 400, and after the barrier layer 500 has been sputtered, an elliptical second type of guard ring 600 is added. The second type of guard ring 600 is located at the edge of the first type of guard ring 400, and the orthographic projections of the two guard rings on the substrate 100 overlap; the second type of guard ring 600 is also tangent to the barrier layer 500. This design significantly improves the withstand voltage performance of the device and optimizes the electric field distribution at the edge of the junction between the single P-type guard ring and the barrier layer 500, thereby further enhancing the ability to resist electrostatic voltage.

[0084] Step S700, please refer to Fig. 9 , a first metal layer 710 is formed on the barrier layer 500 and the oxide layer 300 close to the barrier layer 500 , and a second metal layer 720 is formed on the side of the substrate 100 away from the epitaxial layer 200 ; wherein the first metal layer 710 covers the barrier layer 500 and partially extends to the oxide layer 300 .

[0085] For example, aluminum or aluminum alloy is used as the metallization material, and an aluminum film is deposited on the barrier layer 500 by evaporation or sputtering process as the anode first metal layer 710. At the same time, the cathode second metal layer 720 is made by a similar process on the back of the substrate 100. Then, annealing treatment is performed to improve the contact characteristics between the metal and the semiconductor. Finally, the Schottky diode in this embodiment is manufactured through process steps such as scribing and testing.

[0086] For some possible implementations, please refer to Fig.10 , the step S300 comprises:

[0087] Step 310, depositing on the substrate 100 using atmospheric pressure chemical vapor deposition Silicon dioxide.

[0088] For example, when using step S310 to implement step S300, first, place the substrate 100 in the deposition chamber and ensure that the required cleanliness and vacuum are achieved in the deposition chamber. At the same time, prepare the precursor gas and carrier gas of silicon dioxide. Under normal pressure or near normal pressure, the precursor gas and carrier gas are introduced into the deposition chamber at a certain flow ratio. The precursor gas reacts chemically at high temperature to generate silicon dioxide and deposit it on the surface of the substrate 100. By precisely controlling parameters such as reaction temperature, gas flow rate, deposition time, etc., deposition on the substrate 100 can be achieved. Thickness of silicon dioxide film.

[0089] In this embodiment, the atmospheric pressure chemical vapor deposition technology is used to accurately control the thickness, uniformity and composition of the silicon dioxide film; and the silicon dioxide film obtained by chemical vapor deposition has good adhesion to the substrate 100; in addition, the silicon dioxide film has excellent insulation, thermal stability and chemical stability, which can protect the substrate 100 from the influence of the external environment and improve the overall performance of the device.

[0090] For some possible implementations, please refer to Fig.11 , the step S400 includes:

[0091] In step 410 , a photoresist layer is uniformly coated on a side of the epitaxial layer 200 away from the substrate 100 .

[0092] Specifically, first ensure that the surface of the epitaxial layer 200 is clean and free of impurities, and then use a spin coater to evenly coat the photoresist on the surface of the epitaxial layer 200. The thickness of the photoresist will be adjusted according to the required pattern accuracy and subsequent process requirements.

[0093] Step 420 , photolithography is performed on the photoresist layer through a mask with the first window 410 pattern, and the first window 410 pattern is engraved on the photoresist layer.

[0094] Specifically, a mask with a predetermined first window 410 pattern is placed above the photoresist layer, and then the photoresist is exposed using ultraviolet light or light of a specific wavelength. During the exposure process, the transparent area on the mask allows light to penetrate and irradiate the photoresist, while the opaque area on the mask blocks the light. After exposure, the portion of the photoresist irradiated by the light undergoes chemical changes and becomes soluble in a specific developer. For example, since the first type guard ring 400 pattern is an annular structure, the annular area on the mask is transparent, and the rest is opaque. After exposure, the photoresist in the annular area becomes soluble.

[0095] Step 430, please refer to Figure 3 , the oxide layer 300 is corroded by using an etching solvent, and the pattern of the first window 410 is transferred to the oxide layer 300 .

[0096] Specifically, the first window 410 pattern formed on the photoresist layer is used as a mask layer, and a specific etching solvent is used to selectively etch the underlying oxide layer 300. The portion of the oxide layer 300 not covered by the photoresist will be etched away, while the portion covered by the photoresist will be retained, thereby forming a pattern on the oxide layer 300 corresponding to the first window 410 pattern on the photoresist layer.

[0097] Step 440: Use a photoresist solvent to remove the residual photoresist on the oxide layer 300.

[0098] For example, residual photoresist can be removed by agitation and ultrasonic cleaning.

[0099] Step 450, please refer to Figure 4 , 1.0E10cm is injected into the first window 410 at 60kev energy -2 To 5.0E15cm -2 Boron ions are subjected to high temperature annealing and low temperature oxidation treatment in a diffusion furnace to form the first type guard ring 400 at the first window 410 .

[0100] Specifically, an ion implanter is used to implant boron ions at the first window 410, with an implantation energy of 60 keV and a dose range of 1.0E10 cm -2 To 5.0E15cm -2 The implanted boron ions form a doped region in the oxide layer 300. Subsequently, the wafer is placed in a diffusion furnace for high-temperature annealing to promote the diffusion and activation of the boron ions, and an oxidation treatment is performed at a low temperature to repair the surface of the oxide layer 300 that may be damaged by the ion implantation. Finally, a first type guard ring 400 with specific electrical properties is formed at the first window 410.

[0101] For some possible implementations, please refer to Fig.12 , the step S500 comprises:

[0102] Step 510 : uniformly coating a photoresist layer on a side of the oxide layer 300 away from the epitaxial layer 200 .

[0103] Step 520 , photolithography is performed on the photoresist layer through a mask with the barrier layer 500 window, and a pattern of the second window 510 is engraved on the photoresist layer.

[0104] Step 530, please refer to Figure 5 , the oxide layer 300 is corroded by using an etching solvent, and the pattern of the second window 510 is transferred to the oxide layer 300 .

[0105] Step 540, please refer to Figure 6 , a sputtering process is used to deposit metal into the second window 510 to form the barrier layer 500 .

[0106] Specifically, the wafer is placed in a sputtering device, and a sputtering process is used to bombard metal atoms or molecules on the metal target and deposit them in the second window 510 on the surface of the wafer. During the sputtering process, metal atoms or molecules are accelerated and collide with the surface of the wafer under the action of an electric field or a magnetic field, forming a uniform metal film, i.e., a barrier layer 500.

[0107] Such metals include titanium, platinum, nickel platinum and chromium.

[0108] For example, a metal target material titanium is used as the material of the barrier layer 500, and the sputtering process is performed in an inert gas atmosphere to ensure that the metal atoms or molecules will not be oxidized or contaminated during the transmission process. After deposition, a uniform and dense titanium barrier layer 500 is formed.

[0109] For some possible implementations, please refer to Fig.13 , the step S600 comprises:

[0110] Step 610 : uniformly coating a photoresist layer on a side of the epitaxial layer 200 away from the substrate 100 .

[0111] Step 620 , photolithography is performed on the photoresist layer through a mask with a third window 610 pattern, and the third window 610 pattern is engraved on the photoresist layer.

[0112] Specifically, a mask with a predetermined third window 610 pattern is placed above the photoresist layer, and then ultraviolet light or light of a specific wavelength is used to expose the photoresist.

[0113] Step 630, please refer to Figure 7 , transferring the pattern of the third window 610 to the epitaxial layer 200 .

[0114] Step 640: Use a photoresist solvent to remove the remaining photoresist.

[0115] Step 650, please refer to Figure 8 , 1.0E10cm is injected at the third window 610 with an energy of 90kev-200kev -2 To 5.0E15cm -2 Boron ions are rapidly annealed at 400° C. to 700° C. using a rapid thermal annealing device to form the second type guard ring 600 .

[0116] Specifically, an ion implanter is used with an acceleration energy of 90kev-200kev to impact and implant boron ions at a very high speed into the target depth of the wafer. The implantation dose of boron ions is 1.0E10cm -2 To 5.0E15cm -2 can be selected from a wide range. After ion implantation, in order to activate these boron ions, make them effective dopants, and improve their distribution uniformity in the wafer, a rapid thermal annealing device is used for annealing. The rapid thermal annealing device can heat the wafer to 400°C to 700°C in a very short time, and then cool it down quickly. Through the above-mentioned ion implantation and rapid annealing process, a second type of guard ring 600 with specific electrical properties and structural characteristics is formed in the third window 610 area. This guard ring can not only provide electrical isolation, but also optimize the overall performance.

[0117] The present application also provides a Schottky diode, which is made using any of the above-mentioned Schottky diode manufacturing methods. Fig. 9 , the Schottky diode comprises:

[0118] A substrate 100; an epitaxial layer 200 located on one side of the substrate 100; a barrier layer 500 located on a side of the epitaxial layer 200 away from the substrate 100 and a first type guard ring 400 and a second type guard ring 600 surrounding the barrier layer 500; the second type guard ring 600 at least partially overlaps with the first type guard ring 400; at least a portion of the first type guard ring 400 is located on a side of the second type guard ring 600 away from the barrier layer 500; an oxide layer 300 located on a side of the epitaxial layer 200 away from the substrate 100, the orthographic projection of the oxide layer 300 on the substrate 100 surrounding the orthographic projection of the barrier layer 500 on the substrate 100 and not overlapping with the orthographic projection of the barrier layer 500 on the substrate 100; a first metal layer 710 located on a side of the barrier layer 500 and the oxide layer 300 away from the substrate 100; a second metal layer 720 located on a side of the substrate 100 away from the epitaxial layer 200.

[0119] In this embodiment, in order to improve the antistatic capability of the Schottky diode while maintaining its advantage of low forward voltage drop, an elliptical P-type second-type guard ring 600 is added to the edge of the existing P-type first-type guard ring 400 located on the substrate 100. It is intended to enhance the voltage resistance of the diode, optimize the edge electric field distribution at the interface between the first-type guard ring 400 and the barrier, and thus improve the antistatic voltage bearing capacity of the device. The second-type guard ring 600 in this embodiment does not reduce the effective contact area between the barrier layer 500 and the epitaxial layer 200, so it does not increase the forward voltage drop of the Schottky diode, ensuring that the device maintains its original high-efficiency characteristics while improving its antistatic capability.

[0120] In some possible implementations, the substrate 100 and the epitaxial layer 200 are N-type semiconductor layers, and the first-type guard ring 400 and the second-type guard ring 600 are P-type guard rings.

[0121] In this embodiment, the substrate 100 and the epitaxial layer 200 are both set as N-type semiconductor layers, and the first type guard ring 400 and the second type guard ring 600 introduced to improve the voltage resistance and antistatic performance of the device are both P-type guard rings.

[0122] In some possible implementations, the second type guard ring 600 is tangent to the edge of the barrier layer 500 .

[0123] In this embodiment, since the second type guard ring 600 is tangent to the edge of the barrier layer 500 and partially overlaps with the orthographic projection of the first type guard ring 400 on the substrate 100, it neither reduces the contact area between the barrier layer 500 and the epitaxial layer 200 nor adversely affects the forward voltage drop of the Schottky diode. Through the above design, the withstand voltage capability can be enhanced, and the edge electric field distribution at the junction of the single P-type guard ring and the barrier layer 500 can be effectively optimized, thereby improving the anti-static voltage withstand capability of the device.

[0124] In some possible implementations, the material of the oxide layer 300 includes silicon dioxide.

[0125] In this embodiment, silicon dioxide is used as the oxide layer 300 of the Schottky diode, mainly based on its unique physical and chemical properties. Silicon dioxide has excellent insulation properties and can effectively isolate the electrical contact between metal and semiconductor at room temperature, making it an ideal insulating layer material. At the same time, it has strong chemical stability and can effectively protect the metal and semiconductor materials in the Schottky diode from external environmental erosion. In addition, silicon dioxide also has a passivation effect, which can reduce the impact of the ambient atmosphere on the surface of the silicon wafer and improve the stability and reliability of the device.

[0126] In some possible implementations, the metal in the Schottky barrier layer 500 includes titanium, platinum, nickel platinum, and chromium.

[0127] Since the working principle of the Schottky diode is based on the potential barrier formed by the contact between metal and semiconductor, by selecting a suitable metal as the material of the barrier layer 500, the height and shape of the barrier can be optimized, thereby improving the performance of the device.

[0128] In this embodiment, the barrier layer 500 uses titanium, platinum, nickel platinum and chromium, which can meet the performance requirements and durability requirements of Schottky diodes. For example, platinum has extremely high chemical stability and high work function, which helps to increase the barrier height, thereby improving the rectification characteristics and voltage resistance of the device; its corrosion resistance also enables it to maintain stable operation under high temperature and harsh environment. In addition, in addition to the metal provided in this embodiment, other metals or alloys that meet the requirements can also be used as the barrier layer 500 material, which will not be repeated here.

[0129] In summary, the present application provides a Schottky diode and a method for manufacturing the same, the method comprising: providing a substrate 100; forming an epitaxial layer 200 on a surface of the substrate 100; forming an oxide layer 300 on a surface of the epitaxial layer 200 away from the substrate 100; etching the oxide layer 300 to form a first window 410; implanting boron ions through the first window 410 to form a first type guard ring 400 located on a side of the epitaxial layer 200 away from the substrate 100; etching the oxide layer 300 to form a second window 510; and implanting boron ions through the first window 410 to form a first type guard ring 400 located on a side of the epitaxial layer 200 away from the substrate 100. The second window 510 is subjected to barrier metal sputtering to form a barrier layer 500; a third window 610 is formed on the side of the epitaxial layer 200 away from the substrate 100; boron ions are injected through the third window 610 to form a second type of guard ring 600 that at least partially overlaps with the first type of guard ring 400 and is tangent to the barrier layer 500; a first metal layer 710 is formed on the barrier layer 500 and the oxide layer 300 close to the barrier layer 500, and a second metal layer 720 is formed on the side of the substrate 100 away from the epitaxial layer 200. By adding the second type of guard ring 600 after forming the barrier layer 500, compared with the prior art, the voltage withstand capability of the diode can be enhanced, the edge electric field distribution at the interface between the first type of guard ring 400 and the barrier can be optimized, and the anti-static voltage withstand capability of the device can be improved; at the same time, the forward voltage drop is not increased.

[0130] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.

[0131] The above description is only the preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A method for manufacturing a Schottky diode, characterized in that: The method comprises: providing a substrate; forming an epitaxial layer on a surface of the substrate; forming an oxide layer on a surface of the epitaxial layer away from the substrate; Etching the oxide layer to form a first annular window; implanting boron ions through the first window to form a first type of guard ring located on a side of the epitaxial layer away from the substrate; Etching the oxide layer to form a second window, wherein the second window exposes a central area of ​​the first type guard ring; performing barrier metal sputtering through the second window to form a barrier layer; forming a third window on a side of the epitaxial layer away from the substrate; performing boron ion implantation through the third window to form a second type of guard ring that at least partially overlaps with the first type of guard ring and is tangent to the barrier layer; A first metal layer is formed on the barrier layer and the oxide layer close to the barrier layer, and a second metal layer is formed on a side of the substrate away from the epitaxial layer; wherein the first metal layer covers the barrier layer and partially extends onto the oxide layer.

2. The method for manufacturing a Schottky diode according to claim 1, characterized in that: The step of forming an oxide layer on a surface of the epitaxial layer away from the substrate comprises: Using atmospheric pressure chemical vapor deposition to deposit Silicon dioxide.

3. The method for manufacturing a Schottky diode according to claim 1, characterized in that: The steps of etching the oxide layer to form a first annular window; and implanting boron ions through the first window to form a first type of guard ring located on a side of the epitaxial layer away from the substrate include: Uniformly coating a photoresist layer on a side of the epitaxial layer away from the substrate; Performing photolithography on the photoresist layer through a mask having a first window pattern, and engraving a first window pattern on the photoresist layer; Using a corrosive solvent to corrode the oxide layer, and transferring the first window pattern to the oxide layer; Using a photoresist solvent to remove the photoresist remaining in the oxide layer; In the first window, 1.0E10cm was injected with 60keV energy. -2 To 5.0E15cm -2 Boron ions are subjected to high temperature annealing and low temperature oxidation treatment in a diffusion furnace to form the first type of protection ring at the first window.

4. The method for manufacturing a Schottky diode according to claim 1, characterized in that: The etching of the oxide layer forms a second window, wherein the second window exposes a central area of ​​the first type guard ring; The step of performing barrier metal sputtering through the second window to form a barrier layer comprises: Uniformly coating a photoresist layer on a side of the oxide layer away from the epitaxial layer; Performing photolithography on the photoresist layer through a mask with the barrier layer window to carve out the second window pattern on the photoresist layer; Using a corrosive solvent to corrode the oxide layer, and transferring the second window pattern to the oxide layer; Depositing metal into the second window using a sputtering process to form the barrier layer; Such metals include titanium, platinum, nickel platinum and chromium.

5. The method for manufacturing a Schottky diode according to claim 1, characterized in that: The steps of forming a third window on a side of the epitaxial layer away from the substrate; and implanting boron ions through the third window to form a second type of guard ring at least partially overlapping with the first type of guard ring and tangent to the barrier layer include: Uniformly coating a photoresist layer on a side of the epitaxial layer away from the substrate; Performing photolithography on the photoresist layer through a mask having a third window pattern, and engraving a third window pattern on the photoresist layer; transferring the third window pattern onto the epitaxial layer; Using a photoresist solvent to remove the remaining photoresist; 1.0E10 cm was injected at the third window with an energy of 90kev-200kev. -2 To 5.0E15cm -2 The boron ions are rapidly annealed at 400° C. to 700° C. using a rapid thermal annealing device to form the second type guard ring.

6. A Schottky diode, manufactured using the method for manufacturing a Schottky diode according to claims 1-5, characterized in that: The Schottky diode comprises: substrate; an epitaxial layer located on one side of the substrate; A barrier layer located on a side of the epitaxial layer away from the substrate and a first type guard ring and a second type guard ring surrounding the barrier layer; the second type guard ring at least partially overlaps with the first type guard ring; at least a portion of the first type guard ring is located on a side of the second type guard ring away from the barrier layer; an oxide layer located on a side of the epitaxial layer away from the substrate, wherein an orthographic projection of the oxide layer on the substrate surrounds an orthographic projection of the barrier layer on the substrate and does not overlap with an orthographic projection of the barrier layer on the substrate; A first metal layer located on a side of the barrier layer and the oxide layer away from the substrate; A second metal layer is located on a side of the substrate away from the epitaxial layer.

7. The Schottky diode according to claim 6, characterized in that: The substrate and the epitaxial layer are N-type semiconductor layers, and the first-type guard ring and the second-type guard ring are P-type guard rings.

8. The Schottky diode according to claim 6, characterized in that: The second type guard ring is tangent to the edge of the barrier layer.

9. The Schottky diode according to claim 6, characterized in that: The oxide layer material includes silicon dioxide.

10. The Schottky diode according to claim 6, characterized in that: The metal in the Schottky barrier layer includes titanium, platinum, nickel platinum and chromium.

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