Rapid preparation method and application of passivation contact structure

Abstract

The invention discloses a rapid preparation method and application of a passivation contact structure, and the method combines a plate-type loading and conveying mode of a loading plate with an oxidation process of an oxidation reaction chamber and a deposition process of a deposition reaction chamber, and combines a plate-type loading and conveying mode of a quartz support plate with an RTA process of an RTA processing chamber. The online continuous production of the whole passivation contact structure can be completely realized, the working procedures and time of feeding and discharging are reduced, the annealing duration is shortened, and the productivity is greatly improved; the production yield can also be improved; meanwhile, the retention time and pollution in the production process, especially before and after annealing can be reduced; the quantity of the quartz support plates can be greatly reduced, and the production cost is reduced; the method can be well integrated with other related preparation processes of the TOPCon battery structure; and the plate type deposition mode in the deposition reaction cavity can efficiently and quickly realize amorphous silicon thin film deposition on the single surface of the silicon wafer, namely, non-winding-plating deposition is realized, so that the EL defect and the appearance defect are improved, and the photoelectric conversion efficiency of the battery is improved.

Description

Technical Field

[0001] The invention relates to the technical field of solar cells, and in particular to a rapid preparation method and application of a passivation contact structure. Background Art

[0002] Compared with PERC (Passivated Emitter and Rear Cell), passivated contact cells, such as tunneling oxide passivated contact cells (TOPCon) and heterojunction cells (HJT), have the advantages of high conversion efficiency and low photo-induced degradation. In particular, TOPCon cells have high development potential and broad market prospects due to their high photoelectric conversion efficiency, low technology upgrade cost, and compatibility with most processes of PERC cells. Among them, the characteristics of TOPCon cells are the passivation contact structure of an ultra-thin tunneling oxide layer superimposed on a heavily doped polysilicon layer on the surface of the silicon wafer; the heavily doped polysilicon layer can induce interface bending, promote the transport of majority carriers at the interface, and block minority carriers from reaching the interface, while the interface high and low junctions also play an excellent field passivation role; and the interface tunneling oxide layer is thin enough to meet the requirements of electron tunneling, and can also play a role in chemical passivation and blocking the diffusion of doped atoms in polysilicon to the silicon wafer to reduce Auger recombination. That is, the passivation contact structure of the tunneling oxide layer and the heavily doped polysilicon layer can simultaneously realize the two major functions of interface contact and interface passivation. The preparation of this passivation contact structure is the core and key to the preparation of TOPCon batteries.

[0003] The current methods for preparing tunneling oxide layers are divided into two categories: dry method and wet method. Dry oxidation includes thermal oxidation, UV light oxidation, plasma enhanced N2O oxidation, etc. The tunneling oxide layer prepared by this method has good quality and dense structure. Wet oxidation includes nitric acid oxidation, ozone water oxidation, etc. The tunneling oxide layer prepared by this method has loose structure and poor chemical passivation effect.

[0004] The process of preparing the heavily doped polysilicon layer includes depositing an amorphous silicon film and an annealing process. Among them, the methods for depositing amorphous silicon films mainly include low-pressure chemical vapor deposition (LPCVD), plasma-enhanced chemical vapor deposition (PECVD) and sputtering. The TOPCon cells currently in mass production mainly use the LPCVD method to deposit amorphous silicon films. LPCVD uses a tubular loading and deposition method, with a large single-tube production capacity, and can integrate the preparation of a tunneling oxide layer using a thermal oxidation method. However, this method has a low rate of depositing amorphous silicon films and a long process time; and there is a serious problem of winding plating, which will lead to reduced battery efficiency and require an additional de-winding plating process, while affecting the front appearance and yield of the battery.

[0005] Compared with the LPCVD method, the PECVD method has a lower deposition temperature and a higher growth rate. At the same time, the problem of wrapping is not as serious as the latter and is easier to remove. Even plate-type PECVD can achieve no wrapping. The sputtering method belongs to the physical vapor deposition method, and its deposition temperature is lower than that of the CVD method, generally below 350°C. At the same time, the sputtering method can control the movement direction of the atoms of the sputtering target by adjusting the sputtering parameters, thereby achieving no wrapping. Among the above methods, PECVD and Sputter methods can adopt plate loading, deposition, and transmission methods; for example, application number CN201911066621.9 discloses a method for preparing a SiO2 and doped polycrystalline silicon stacked passivation film, which adopts a loading plate for transportation, combined with PECVD growth of SiO2 and PVD growth of doped amorphous silicon film, to reduce production processes and increase production capacity. However, this method only involves the deposition process of SiO2 and doped amorphous silicon film, and annealing treatment is required to prepare the passivation contact structure. Annealing is a process to introduce or activate doping atoms in the polysilicon layer to make it electrically active, and also to convert amorphous silicon thin film into polysilicon. The current annealing process mainly adopts tubular annealing. After the amorphous silicon thin film is deposited by the LPCVD method, the silicon wafers loaded on the LPCVD boat need to be unloaded into the basket, and then the silicon wafers in the basket are loaded into the quartz boat through the loading mechanism for tubular annealing. After the annealing is completed, the silicon wafers are unloaded using the unloading mechanism. The loading and unloading process of tubular annealing is cumbersome and time-consuming. At the same time, the tubular annealing time is relatively long, generally 60-120 minutes, resulting in a longer annealing process time. At the same time, due to the high-temperature deposition of thin films or high-temperature annealing, the silicon wafers will bend, which makes it easy to collide with the wafers during the loading and unloading process of the robotic arm, and the fragmentation rate is high.

[0006] Rapid thermal annealing (RTA) uses a high-power infrared light source to irradiate silicon wafers to increase the temperature of the silicon wafers and maintain it below 1000°C within tens of seconds. The heating temperature difference can be controlled within ±5°C. During cooling, inert gas is introduced to achieve rapid cooling. Therefore, RTA can achieve rapid heating and cooling, and accurately control the temperature. Moreover, since light source irradiation promotes the activation and diffusion of doped atoms, RTA can significantly reduce the annealing time. Based on this, the applicant believes that RTA is expected to replace tubular annealing through plate loading, deposition, and transmission to become an annealing method for passivation contact structure annealing and significantly increase production. Summary of the invention

[0007] One of the purposes of the present invention is to provide a rapid preparation method for a passivation contact structure in view of the shortcomings of the existing preparation methods for passivation contact structures, such as low deposition rate of amorphous silicon thin film, serious winding plating problems, complicated loading and unloading processes for tubular annealing, long annealing process time, easy bending of silicon wafers, high fragmentation rate, and low production capacity of the entire passivation contact structure due to intermittent production.

[0008] A second object of the present invention is to provide an application of a passivation contact structure, wherein the passivation contact structure prepared by the rapid preparation method of the passivation contact structure is applied to a crystalline silicon solar cell having the passivation contact structure.

[0009] Based on this, the present invention discloses a method for rapidly preparing a passivation contact structure, comprising the following steps:

[0010] Step 1, setting a production line which includes a loading area, an oxidation reaction chamber, a deposition reaction chamber, a transfer area, an RTA treatment chamber and a unloading area in sequence, wherein the production line includes a first transmission mechanism which linearly connects the loading area, the oxidation reaction chamber and the deposition reaction chamber, and a second transmission mechanism which linearly connects the transfer area, the RTA treatment chamber and the unloading area;

[0011] Step 2, then, loading the pre-treated silicon wafers onto a loading plate in the loading area, and then transferring the loading plate loaded with the silicon wafers to the oxidation reaction chamber through a first transmission mechanism;

[0012] Step 3, preparing a tunneling oxide layer on the surface of the silicon wafer by oxidation treatment in an oxidation reaction chamber;

[0013] Step 4, transferring the silicon wafer prepared with the tunnel oxide layer to a deposition reaction chamber via a first transmission mechanism, so as to deposit a doped amorphous silicon film on the surface of the tunnel oxide layer;

[0014] Step 5, after the silicon wafer with the doped amorphous silicon film deposited thereon is transferred to the transfer area by the first transmission mechanism, the silicon wafer is transferred from the loading plate to the quartz carrier;

[0015] Step 6, the quartz carrier loaded with the silicon wafer enters the RTA processing chamber from the transfer area through the second transmission mechanism, so that the doped amorphous silicon film on the silicon wafer is transformed into a doped polycrystalline silicon layer through RTA treatment;

[0016] Step 7: After the RTA treatment, the silicon wafer enters the unloading area through the second transmission mechanism to unload the silicon wafer from the quartz carrier to obtain a passivated contact structure.

[0017] Preferably, in step 3, the tunneling oxide layer is prepared by a plasma-enhanced N2O oxidation method or a UV light ozone oxidation method.

[0018] Further preferably, the UV light ozone oxidation method is: in an oxygen atmosphere, a UV light source with a wavelength of 172nm is used to expose the surface of the silicon wafer for 0.5-5min at a distance of 0.3-2cm from the silicon wafer to generate ozone and then oxidize the surface of the silicon wafer to obtain the tunneling oxide layer; or, the plasma enhanced N2O oxidation method is: at 150-400°C, N2O gas is introduced between two horizontal electrodes in an oxidation reaction chamber to form plasma, and the pressure is maintained at 50-200pa and the time is 60-600s to oxidize to obtain the tunneling oxide layer.

[0019] Preferably, the deposition reaction chamber comprises a transition chamber and a deposition chamber in sequence.

[0020] Step 4 is specifically as follows: first, the silicon wafer prepared with the tunneling oxide layer is transferred to the transition chamber via the first transmission mechanism to pre-vacuum the silicon wafer, and then the silicon wafer is transferred to the deposition chamber via the first transmission mechanism to deposit the doped amorphous silicon film on the surface of the tunneling oxide layer.

[0021] Preferably, in step 4, the method for depositing the doped amorphous silicon film is a plate-type PECVD method and a plate-type magnetron sputtering method.

[0022] Further preferably, the plate PECVD method is: maintaining the temperature at 250-400°C, introducing a mixed gas of silane, hydrogen, and phosphine or borane, and performing a deposition reaction at 50-200 Pa for 5-20 minutes to obtain the doped amorphous silicon film; or, the plate magnetron sputtering method is: first fixing the intrinsic polycrystalline silicon target to maintain a distance of 5-20 cm between the silicon wafer and the target, and then evacuating the gas pressure to 0.05-0.5 Pa under an argon atmosphere, and introducing phosphine or borane to perform a sputtering deposition reaction at 150-350°C for 3-30 minutes. After the reaction, removing the residual phosphine or borane and cooling to obtain the doped amorphous silicon film.

[0023] Preferably, the production line further comprises a first conveying mechanism located at the front end of the loading area, a second conveying mechanism located between the first transmission mechanism and the second transmission mechanism, and a third transmission mechanism linearly connecting the first conveying mechanism and the second conveying mechanism;

[0024] After step 5, the method also includes the step of conveying the empty loading plate to the third transmission mechanism via the second conveying mechanism, then conveying it to the first conveying mechanism via the third transmission mechanism, and then conveying it back to the loading area via the first conveying mechanism.

[0025] Preferably, the production line further comprises a third conveying mechanism located at the rear end of the unloading area, and a fourth transmission mechanism linearly connecting the third conveying mechanism and the second conveying mechanism;

[0026] After step 7, the method also includes the step of conveying the empty quartz carrier to the fourth transmission mechanism via the third conveying mechanism, then conveying it to the second conveying mechanism via the fourth transmission mechanism, and then conveying it back to the transfer area via the second conveying mechanism.

[0027] Preferably, the material of the loading plate is carbon fiber or graphite; the loading plate and the quartz loading plate are both horizontal loading plates, and are both provided with a plurality of loading cavities arranged in an array to load multiple silicon wafers at the same time.

[0028] Preferably, in step 6, after the quartz carrier enters the RTA processing chamber, it is first purged with nitrogen to remove residual air, and then annealed at 800-1000°C for 3-10 minutes in a nitrogen atmosphere by heating with an irradiation lamp source. The annealed silicon wafer is then purged with nitrogen to accelerate cooling; the irradiation light source is one or more of a halogen lamp, a xenon lamp, an LED lamp and a laser lamp.

[0029] Preferably, in step 2, the pretreatment steps of the silicon wafer are as follows:

[0030] Step 21, performing texturing treatment on the surface of the silicon wafer to remove the damaged layer on the surface of the silicon wafer and form a pyramid structure on the surface of the silicon wafer;

[0031] Step 22, preparing a double-sided p+ doped layer or a double-sided n+ doped layer on the surface of the silicon wafer processed in step 21;

[0032] Step 23, wet polishing the back side of the silicon wafer processed in step 22 to remove the p+ doped layer or n+ doped layer on the back side and edge of the silicon wafer to obtain a flat pyramid base structure on the back side of the silicon wafer.

[0033] The present invention also discloses an application of a passivation contact structure. The passivation contact structure prepared by the rapid preparation method of the passivation contact structure is applied to a crystalline silicon solar cell having the passivation contact structure.

[0034] Compared with the prior art, the present invention has at least the following beneficial effects:

[0035] (1) The plate-type loading and conveying method of the loading plate is combined with the oxidation process of the oxidation reaction chamber and the deposition process of the deposition reaction chamber, and the plate-type loading and conveying method of the quartz carrier is combined with the RTA process of the RTA treatment chamber, which can fully realize the online continuous production of the entire passivation contact structure, reduce the loading and unloading process and time, and greatly improve the production capacity; at the same time, it can reduce the residence time and pollution in the production process, especially before and after annealing; it can also greatly reduce the number of quartz carriers and reduce production costs; and it can also be well integrated with other related preparation processes of the TOPCon battery structure.

[0036] (2) The plate-type deposition method in the deposition reaction chamber can efficiently and quickly realize the deposition of amorphous silicon thin films on a single side of the silicon wafer, that is, deposition without wrap-around plating, reducing the parasitic absorption and leakage loss caused by wrap-around plating on the front side of the silicon wafer, improving poor EL and poor appearance, and improving the photoelectric conversion efficiency of the battery.

[0037] (3) Compared with conventional tubular annealing treatment, the process time required for RTA treatment is greatly reduced; combining RTA treatment with the plate-type loading and transmission method of the quartz carrier can further reduce the annealing process time, thereby greatly improving production capacity; moreover, combining RTA treatment with the flat-plate loading and transmission method can also avoid the problem of wafer collision and fragmentation caused by the bending of the silicon wafer, thereby improving production yield. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] Figure 1 Schematic diagram of the structure of a rapid preparation method for a passivation contact structure after step S2 of this embodiment.

[0039] Figure 2 Schematic diagram of the structure of a rapid preparation method for a passivation contact structure after step S3 of this embodiment.

[0040] Figure 3 It is a structural schematic diagram of a rapid preparation method of a passivation contact structure of this embodiment after step S4.

[0041] Figure 4 It is a structural schematic diagram of a rapid preparation method of a passivation contact structure of this embodiment after step S5.

[0042] Figure 5 FIG. 1 is a schematic structural diagram of a method for preparing an N-type passivation contact structure based on LPCVD method after step S7 ′ of a comparative example.

[0043] Figure 6 FIG. 1 is a schematic structural diagram of a method for rapidly preparing a passivation contact structure according to the present embodiment after step S7 .

[0044] Figure 7 FIG. 4 is a schematic diagram of a structure after step S9 in a method for applying a passivation contact structure of the present embodiment.

[0045] Figure 8 FIG. 1 is a schematic diagram of a structure after step S10 in a method for applying a passivation contact structure of the present embodiment.

[0046] Fig. 9 It is a structural schematic diagram of a production line of a method for rapidly preparing a passivation contact structure according to this embodiment.

[0047] Fig.10It is a front view of a horizontal carrier board in a production line of a method for rapidly preparing a passivation contact structure according to the present embodiment.

[0048] Fig.11 It is a schematic diagram of the structure of an RTA processing chamber in a production line of a method for rapidly preparing a passivation contact structure according to the present embodiment.

[0049] Description of the accompanying drawings: silicon wafer 1; p+ doped layer 2; tunneling oxide layer 3; n+ doped polysilicon layer 4; plated polysilicon layer 5; Al2O3 passivation film 6; SiNx anti-reflection film 7; SiNx passivation film 8; front metal electrode 9; back metal electrode 10;

[0050] The material loading area 11; the oxidation reaction chamber 12; the deposition reaction chamber 13; the transition chamber 131; the deposition chamber 132; the transfer area 14; the RTA treatment chamber 15; the irradiation lamp source 151; the temperature measuring device 152; the reflective plate 153; the material unloading area 16; the loading plate 21; the quartz carrier plate 22; the loading chamber 23; the first transmission mechanism 31; the second transmission mechanism 32; the third transmission mechanism 33; the fourth transmission mechanism 34; the first conveying mechanism 35; the second conveying mechanism 36; the third conveying mechanism 37. DETAILED DESCRIPTION

[0051] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the present invention is further described in detail below with reference to the accompanying drawings and specific embodiments.

[0052] Comparative Example

[0053] This comparative example provides a method for preparing an N-type passivation contact structure based on the LPCVD method, comprising the following steps:

[0054] Step S1', performing a texturing process on the surface of the N-type crystalline silicon wafer 1 to remove the damaged layer on the surface of the N-type crystalline silicon wafer 1 and to form a pyramid structure on the surface of the N-type crystalline silicon wafer 1, the structure of which is referred to as Figure 1 ; Among them, the thickness of the N-type crystalline silicon wafer 1 is 150-200μm, the resistivity is 0.5-3Ω.cm, and the size is 158.75mm×158.75mm.

[0055] Step S2', using boron tribromide as a doping source to diffuse boron on the surface of the N-type crystalline silicon wafer 1 after the texturing treatment, thereby preparing a p+ doped layer 2, the structure of which is referred to as Figure 2 ; Among them, the diffusion temperature is 850-1050℃, the time is 120-200min, and the square resistance is 60-180Ω / sq.

[0056] Step S3', the back side of the N-type crystalline silicon wafer 1 after the boron diffusion treatment is treated with HF solution to remove the BSG on the surface, and then the p+ doped layer 2 on the back side of the N-type crystalline silicon wafer 1 is removed with a heated NaOH solution and polished to obtain a flat pyramid base structure, the structure of which is referred to as Figure 3 The polishing weight loss of the obtained N-type crystalline silicon wafer 1 is 0.2-0.6g.

[0057] Step S4', placing the N-type crystalline silicon wafer 1 processed in step S3' on a quartz boat, placing two N-type crystalline silicon wafers 1 in a slot by a robot, with the polished surface facing outward and the textured surface facing inward, placing the quartz boat in the LPCVD tube, and then using thermal oxidation to prepare a tunneling oxide layer 3 on the back of the N-type crystalline silicon wafer 1. The structure is as shown in FIG. Figure 4 Specifically, the LPCVD tube is evacuated to a pressure of 10-20 Pa, the temperature is raised to 500-700° C., oxygen is introduced for 10-30 minutes, and a tunneling silicon oxide layer with a thickness of 1-2 nm is deposited.

[0058] Step S5', then continue to introduce nitrogen into the LPCVD tube and evacuate again to remove residual oxygen in the LPCVD tube, stabilize the vacuum pressure in the tube at 0.01-0.02 Pa, the temperature at 550-700 ° C, introduce silane gas, and the deposition time is 15-60 min. After the deposition is completed, the silane gas is removed and nitrogen is introduced. After cooling, an amorphous silicon film is deposited on the surface of the tunneling silicon oxide layer, and the N-type crystalline silicon wafer 1 is taken out.

[0059] Step S6', using ion implantation equipment to implant phosphorus ions into the amorphous silicon film, wherein PH3 is the doping source, and the ion implantation dose is set to 5-10E+15cm -2 , thus obtaining a phosphorus-doped amorphous silicon film.

[0060] Step S7', placing the N-type crystalline silicon wafer 1 processed in step S6' in a quartz boat again, sending the quartz boat into an annealing furnace through a manipulator and a transmission mechanism, introducing nitrogen gas at a flow rate of 4000-6000 sccm, then increasing the temperature to 800-900°C, keeping the temperature for 15-30 minutes, cooling the temperature for 20-30 minutes to 750-700°C, taking it out of the annealing furnace and cooling it down, so as to complete the preparation of the phosphorus-doped n+ doped polysilicon layer 4 on the back of the N-type crystalline silicon wafer 1 and the phosphorus-doped wrap-around polysilicon layer 5 on the front of the N-type crystalline silicon wafer 1, the structure of which is as follows Figure 5 shown.

[0061] At this point, the process steps for preparing the passivation contact structure using the LPCVD method have been completed.

[0062] Example

[0063] A rapid preparation method of a passivation contact structure of this embodiment includes the following steps:

[0064] Step S1, such as Fig. 9 As shown, a production line is provided which sequentially includes a loading area 11, an oxidation reaction chamber 12, a deposition reaction chamber 13, a transfer area 14, an RTA treatment chamber 15 and a unloading area 16 for use in a subsequent rapid preparation method of a passivation contact structure.

[0065] The deposition reaction chamber 13 includes a transition chamber 131 and a deposition chamber 132 in sequence, so that the oxidation reaction chamber 12 is separated from the deposition chamber 132 by the transition chamber 131, and vacuum is pre-evacuated before deposition, thereby improving the quality of deposition. In order to realize plate-type loading and transmission, a loading plate 21 made of carbon fiber or graphite and a quartz carrier plate 22 are also provided for the production line; specifically, Fig.10 As shown, the loading plate 21 is preferably a carbon fiber loading plate 21. Both the loading plate 21 and the quartz loading plate 22 are horizontal loading plates, and are provided with a plurality of loading cavities 23 arranged in an array to load multiple silicon wafers 1 at the same time to improve the production capacity of the passivation contact structure.

[0066] Furthermore, in order to promote the automatic circulation of the loading plate 21 and the quartz carrier plate 22 and ensure the online continuous production of the entire passivation contact structure, the production line also includes a first transmission mechanism 31 linearly connecting the loading area 11, the oxidation reaction chamber 12 and the deposition reaction chamber 13, a second transmission mechanism 32 linearly connecting the transfer area 14, the RTA treatment chamber 15 and the unloading area 16, a first conveying mechanism 35 located at the front end of the loading area 11, a second conveying mechanism 36 located between the first transmission mechanism 31 and the second transmission mechanism 32, a third conveying mechanism 37 located at the rear end of the unloading area 16, a third transmission mechanism 33 linearly connecting the first conveying mechanism 35 and the second conveying mechanism 36, and a fourth transmission mechanism 34 linearly connecting the third conveying mechanism 37 and the second conveying mechanism 36. Specifically, the first transmission mechanism 31, the second transmission mechanism 32, the third transmission mechanism 33 and the fourth transmission mechanism 34 are preferably rollers, and belt transmission is used to drive the rollers to roll, so that the loading plate 21 or the quartz carrier plate 22 located on the rollers can move horizontally with the rollers. Among them, Fig. 9 The arrow direction is the horizontal movement direction of the loading plate 21 or the quartz carrier 22. The first conveying mechanism 35, the second conveying mechanism 36 and the third conveying mechanism 37 are horizontal conveying mechanisms or lifting mechanisms, preferably lifting mechanisms, to reduce the floor space and plant investment costs.

[0067] Step S2, texturing the surface of the silicon wafer 1 to remove the damaged layer on the surface of the silicon wafer 1 and form a pyramid structure on the surface of the silicon wafer 1. Specifically, the silicon wafer 1 is a phosphorus-doped N-type crystalline silicon wafer 1 or a boron-doped P-type crystalline silicon wafer 1, wherein the resistivity of the N-type crystalline silicon wafer 1 or the P-type crystalline silicon wafer 1 is 0.5-10Ω.cm; the N-type crystalline silicon wafer 1 or the P-type crystalline silicon wafer 1 is texturing treated with a NaOH solution.

[0068] An example of step S2 in this embodiment is as follows: Figure 1 As shown, the silicon wafer 1 is preferably an N-type crystalline silicon wafer 1, and the N-type crystalline silicon wafer 1 has a thickness of 150-200 μm, a resistivity of 0.5-3 Ω.cm, and a size of 158.75 mm×158.75 mm.

[0069] Step S3, preparing a double-sided p+ doped layer 2 or a double-sided n+ doped layer on the surface of the silicon wafer 1 after the processing in step S2. Specifically, the double-sided p+ doped layer 2 is prepared on the N-type crystalline silicon wafer 1 after the texturing processing, or the double-sided n+ doped layer is prepared on the P-type crystalline silicon wafer 1 after the texturing processing; wherein the preparation methods of the p+ doped layer 2 and the n+ doped layer include diffusion method, inkjet method and spin coating method.

[0070] An example of step S3 in this embodiment is to use boron tribromide as a doping source to diffuse boron on the surface of the N-type crystalline silicon wafer 1 after the texturing treatment, thereby preparing a p+ doped layer 2, the structure of which is as follows: Figure 2 As shown; wherein, the diffusion temperature is 850-1050°C, the time is 120-200min, and the square resistance is 60-180Ω / sq.

[0071] Step S4, wet polishing the back side of the silicon wafer 1 after the processing in step S3 to remove the p+ doped layer 2 or the n+ doped layer on the back side and the edge of the silicon wafer 1, so as to obtain a flat pyramid base structure on the back side of the silicon wafer 1. Specifically, the back side of the silicon wafer 1 containing the double-sided p+ doped layer 2 or the double-sided n+ doped layer is placed in a tetramethylammonium hydroxide (TMAH) or sodium hydroxide (NaOH) solution for wet polishing to remove the p+ doped layer 2 or the n+ doped layer on the back side and the edge of the silicon wafer 1, so as to obtain a flat pyramid base structure on the back side of the silicon wafer 1.

[0072] An example of step S4 in this embodiment is that one side of the N-type crystalline silicon wafer 1 after the boron diffusion treatment is first treated with HF solution to remove BSG on the side, and then the p+ doped layer 2 on the back side of the N-type crystalline silicon wafer 1 is removed with a heated NaOH solution and polished to obtain a flat pyramid base structure, the structure of which is as follows: Figure 3 As shown; the polishing weight loss of the obtained N-type crystalline silicon wafer 1 is 0.2-0.6g.

[0073] Step S5, the silicon wafers 1 processed in step S4 are arranged in a regular manner to the loading area 11 through an automated loading mechanism, and then a suction cup manipulator is used to simultaneously suck multiple silicon wafers 1, and each silicon wafer 1 is loaded into each loading cavity 23 of the loading plate 21 located on the first transmission mechanism 31, and each loading cavity 23 of the loading plate 21 is filled with silicon wafers 1, that is, the loading process is completed, and then the first transmission mechanism 31 is driven by a belt drive to rotate, so that the first transmission mechanism 31 carries the loading plate 21 to move horizontally to the front of the oxidation reaction chamber 12, and the front door of the oxidation reaction chamber 12 is opened at this time, so that the loading plate 21 enters the oxidation reaction chamber 12 with the rotation of the first transmission mechanism 31, and after the loading plate 21 completely enters the oxidation reaction chamber 12, the front door of the oxidation reaction chamber 12 is closed; then, an oxidation treatment is performed in the oxidation reaction chamber 12 to prepare a tunneling oxide layer 3 on the surface of the silicon wafer 1. Specifically, the preparation method of the tunneling oxide layer 3 is a plasma enhanced N2O oxidation method or a UV light ozone oxidation method.

[0074] An example of step S5 in this embodiment is to prepare the tunneling oxide layer 3 by UV light ozone oxidation method: a UV light source with a wavelength of 172nm is loaded above the oxidation reaction chamber 12 to vertically irradiate the polished surface of the silicon wafer 1, the distance between the UV light source and the silicon wafer 1 is 0.3-2cm, the UV light source exposes the silicon wafer 1 for 0.5-5min, the exposure time is regulated by changing the speed of the horizontal movement of the loading plate 21, and the loading plate 21 moves at a uniform speed, and excessive high-purity oxygen is introduced from the surrounding pipes of the oxidation reaction chamber 12 to generate ozone and oxidize the surface of the silicon wafer 1 to obtain a tunneling oxide layer 3 with a thickness of 1-2nm, and its structure is as follows: Figure 4 shown.

[0075] Another example of step S5 in this embodiment is to prepare the tunneling oxide layer 3 by plasma enhanced N2O oxidation method: multiple horizontal electrodes are installed in the oxidation reaction chamber 12 to form a discharge circuit with the silicon wafer 1, and N2O gas is introduced between two horizontal electrodes of the oxidation reaction chamber 12 to ionize and form plasma, and the temperature of the oxidation reaction chamber 12 is maintained at 150-400°C, the pressure is 50-200 Pa, and the time is 60-600s, and the loading plate 21 moves at a constant speed to oxidize to obtain a tunneling oxide layer 3 with a thickness of 1-4nm.

[0076] Step S6, after preparing the tunnel oxide layer 3, the loading plate 21 leaves the rear door of the oxidation reaction chamber 12, and then enters the transition chamber 131 of the deposition reaction chamber 13, and then closes the rear door of the oxidation reaction chamber 12, and at the same time, the subsequent loading plate 21 then enters the oxidation reaction chamber 12, and the transition chamber 131 performs pre-vacuum treatment on the silicon wafer 1 of the current loading plate 21, and after the vacuum state in the transition chamber 131 tends to be stable, the rear door of the transition chamber 131 is opened to allow the loading plate 21 to enter the deposition chamber 132, and then close the rear door of the transition chamber 131; then, in the deposition chamber 132, the surface of the tunnel oxide layer 3 is deposited with a doped amorphous silicon film. Specifically, the method for depositing the doped amorphous silicon film is a plate-type PECVD method and a plate-type magnetron sputtering method.

[0077] An example of step S6 in the present embodiment is to deposit a doped amorphous silicon film by a plate-type magnetron sputtering method: an intrinsic polycrystalline silicon target is fixed above the deposition chamber 132, and the distance between the N-type crystalline silicon wafer 1 and the intrinsic polycrystalline silicon target is maintained at 5-20 cm, and the loading plate 21 moves at a uniform speed, then, argon gas is introduced and the gas is evacuated to a pressure of 0.05-0.5 Pa under the argon atmosphere, and phosphine is introduced (when the silicon wafer 1 is a P-type crystalline silicon wafer 1, borane is introduced here) and a sputtering deposition reaction is started, and the reaction temperature is controlled to be 150-350°C and the time is 3-30 min. After the reaction, the residual phosphine gas is removed and cooled to obtain a doped amorphous silicon film, and the thickness difference between the middle and the edge of the doped amorphous silicon film is not greater than 10 nm; after this step is completed, no wrap-around plating is produced on the front side of the N-type crystalline silicon wafer 1.

[0078] Another example of step S6 in this embodiment is to deposit a doped amorphous silicon film by plate-type PECVD method: a plurality of horizontal electrodes are installed in the deposition chamber 132 to form a discharge loop with the N-type crystalline silicon wafer 1, and the process gas in the deposition chamber 132 is ionized by high-energy excitation between the two horizontal electrodes to form a plasma; at the same time, the deposition chamber 132 is also connected to a mechanical pump and a molecular pump to evacuate the vacuum until the pressure is below 1E-4 Pa, and the deposition chamber 132 is preheated to maintain the temperature at 250-400 ℃ range, a mixed gas of silane, hydrogen and phosphine is introduced as a process gas in a ratio of 2.5:5:1.2 (when the silicon wafer 1 is a P-type crystalline silicon wafer 1, the process gas here is a mixed gas of silane, hydrogen and borane), and the pressure is adjusted to 50-200pa, and the deposition reaction is carried out for 5-10min to obtain a doped amorphous silicon film with a thickness of 50-200nm. After the reaction is completed, it is cooled out of the deposition chamber 132; after this step is completed, no wrap-around plating is produced on the front side of the N-type crystalline silicon wafer 1.

[0079] In step S7, the loading plate 21 arrives at the rear door of the deposition chamber 132, the rear door opens, the loading plate 21 leaves the deposition chamber 132, and stays in the transfer area 14 to cool for 1-2 minutes. At this time, the subsequent loading plate 21 enters the deposition reaction chamber 13 and starts the deposition reaction; after cooling, the silicon wafer 1 is transferred from the loading plate 21 to the quartz carrier 22 located on the second transmission mechanism 32 by the suction cup manipulator, and then the belt drive is used to drive the second transmission mechanism to rotate, so that the second transmission mechanism 32 carries the quartz carrier 22 with the silicon wafer 1 to move horizontally into the RTA processing chamber 15, and then the front door of the RTA processing chamber 15 is closed, so that the doped amorphous silicon film on the silicon wafer 1 is converted into a doped polycrystalline silicon layer through RTA treatment; and the unloaded loading plate 21 is descended by the second conveying mechanism 36 and conveyed to the third transmission mechanism 33, and then transmitted to the bottom end of the first conveying mechanism 35 by the third transmission mechanism 33, and then ascended by the first conveying mechanism 35 and sent back to the loading area 11.

[0080] Specifically, Fig.11 As shown, an irradiation lamp source 151 is installed above the RTA processing chamber 15 to irradiate and heat the silicon wafer 1. The irradiation light source is one or more of a halogen lamp, a xenon lamp, an LED lamp and a laser lamp, preferably a halogen tungsten lamp; a reflector 153 and a temperature meter 152 are installed below the RTA processing chamber 15, and nitrogen inlet pipes and exhaust pipes are installed on the surrounding walls of the RTA processing chamber 15; Fig.11 The arrow direction in the figure is the horizontal movement direction of the quartz carrier 22. Before the RTA treatment (i.e., rapid annealing treatment), nitrogen is introduced for purging and exhaust to remove residual air, and the purging time is 1-5 minutes. Then, during the RTA treatment, nitrogen is introduced as a protective gas, and a halogen tungsten lamp is used for irradiation heating. The heating rate is controlled within the range of 5-40°C / s by adjusting the power of the halogen lamp. The annealing treatment is performed at 800-1000°C for 3-10 minutes, preferably at 850°C for 5 minutes, and the quartz carrier 22 moves at a uniform speed. After annealing, nitrogen is introduced and exhausted to accelerate cooling, and the cooling time is 2-10 minutes, so as to obtain a doped polysilicon layer.

[0081] An example of step S7 in this embodiment is that the amorphous silicon film on the surface of the N-type crystalline silicon wafer 1 after RTA treatment undergoes a solid phase transition to a polysilicon layer, and the doped phosphorus atoms are activated to form a phosphorus-doped n+ doped polysilicon layer 4, whose structure is as follows: Figure 6 shown.

[0082] Step S8, after RTA treatment, the silicon wafer 1 enters the unloading area 16 through the second transmission mechanism 32 to unload the silicon wafer 1 from the quartz carrier 22, thus obtaining a passivated contact structure.

[0083] The quartz carrier 22 uses the second transmission mechanism 32 to leave the back door of the RTA processing chamber 15 and enter the unloading area 16, and then the suction cup robot is used to unload the silicon wafer 1 from the quartz carrier 22 to the automatic unloading mechanism, and the empty quartz carrier 22 is lowered by the third conveying mechanism 37 and conveyed to the fourth transmission mechanism 34, and then transmitted to the bottom end of the second conveying mechanism 36 by the fourth transmission mechanism 34, and then raised by the second conveying mechanism 36 and sent back to the transfer area 14, and thus a production process of the passivation contact structure is completed.

[0084] This embodiment also discloses an application of a passivation contact structure. The passivation contact structure prepared by the rapid preparation method of a passivation contact structure in steps S1-S8 is applied to a crystalline silicon solar cell having a passivation contact structure. The specific steps of the application method are as follows:

[0085] Step S9, passivation treatment is performed on the front and back sides of the silicon wafer 1 after the RTA treatment.

[0086] An example of step S8 in this embodiment is to sequentially deposit an Al2O3 passivation film 6 and a SiNx anti-reflection film 7 on the surface of the p+ doped layer 2 on the front side of the N-type crystalline silicon wafer 1, and deposit a SiNx passivation film 8 on the surface of the n+ doped polysilicon layer 4 on the back side of the N-type crystalline silicon wafer 1. The electrical structure is as follows: Figure 7 shown.

[0087] Step S10, preparing a front metal electrode 9 and a back metal electrode 10 on the front and back of the silicon wafer 1 processed in step S9, respectively, to obtain a crystalline silicon solar cell with a passivated contact structure.

[0088] An example of step S10 in this embodiment is to print silver-aluminum paste on the front side of the N-type crystalline silicon wafer 1, and print silver paste on the back side of the N-type crystalline silicon wafer 1, and then sinter at high temperature to obtain the front metal electrode 9 and the back metal electrode 10 located on the front and back sides of the N-type crystalline silicon wafer 1 respectively; wherein the sintering temperature is 750-900° C., the number of main grids on the front and back sides is set to 9-12, and the number of fine grids on the front and back sides is set to 106-150, and the structure of the obtained crystalline silicon solar cell with a passivated contact structure is as follows: Figure 8 shown.

[0089] In summary, compared with the comparative example, the rapid preparation method of a passivation contact structure of this embodiment has the following advantages:

[0090] (1) The plate-type loading and conveying method of the loading plate 21 is combined with the oxidation process of the oxidation reaction chamber 12 and the deposition process of the deposition reaction chamber 13, and the plate-type loading and conveying method of the quartz carrier plate 22 is combined with the RTA process of the RTA treatment chamber 15, which can fully realize the online continuous production of the entire passivation contact structure, reduce the loading and unloading procedures and time, and greatly improve the production capacity; at the same time, it can reduce the residence time and pollution in the production process, especially before and after annealing; before annealing, the carbon fiber loading plate 21 is preferably used, and during annealing, the quartz carrier plate 22 is used, so that the number of quartz carrier plates 22 can be greatly reduced, reducing the production cost; and it can also be well integrated with other related preparation processes of the TOPCon battery structure.

[0091] (2) The plate-type deposition method in the deposition reaction chamber 13 can efficiently and quickly realize the deposition of amorphous silicon thin film on a single side of the silicon wafer 1, that is, deposition without wrap-around plating, thereby reducing the parasitic absorption and leakage loss of the silicon wafer 1 caused by wrap-around plating on the front side, improving poor EL and poor appearance, and improving the photoelectric conversion efficiency of the battery.

[0092] (3) Compared with conventional tubular annealing treatment, the process time required for RTA treatment is greatly reduced; combining RTA treatment with the plate-type loading and conveying method of the quartz carrier 22 can further reduce the annealing process time, thereby greatly improving production capacity; and combining RTA treatment with the flat-plate loading and conveying method can also avoid the problem of loading and unloading collision and fragmentation caused by the bending of the silicon wafer 1, thereby improving production yield.

[0093] Although the preferred embodiments of the present invention have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the embodiments of the present invention.

[0094] The technical solution provided by the present invention is introduced in detail above. Specific examples are used in this article to illustrate the principle and implementation mode of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea. At the same time, for those skilled in the art, according to the idea of ​​the present invention, there will be changes in the specific implementation mode and application scope. In summary, the content of this specification should not be understood as limiting the present invention.

Claims

1. A rapid preparation method for a passivation contact structure, characterized in that: The steps include: Step 1, setting a production line which includes a loading area, an oxidation reaction chamber, a deposition reaction chamber, a transfer area, an RTA treatment chamber and a unloading area in sequence, wherein the production line includes a first transmission mechanism which linearly connects the loading area, the oxidation reaction chamber and the deposition reaction chamber, and a second transmission mechanism which linearly connects the transfer area, the RTA treatment chamber and the unloading area; Step 2, then, the pre-treated silicon wafers are loaded onto a loading plate in the loading area, and then the loading plate loaded with the silicon wafers is transferred to the oxidation reaction chamber by a first transmission mechanism; Step 3, preparing a tunneling oxide layer on the surface of the silicon wafer by oxidation treatment in an oxidation reaction chamber; Step 4, transferring the silicon wafer prepared with the tunnel oxide layer to a deposition reaction chamber via a first transmission mechanism, so as to deposit a doped amorphous silicon film on the surface of the tunnel oxide layer; Step 5, after the silicon wafer with the doped amorphous silicon film deposited thereon is transferred to the transfer area by the first transmission mechanism, the silicon wafer is transferred from the loading plate to the quartz carrier; Step 6, the quartz carrier loaded with the silicon wafer enters the RTA processing chamber from the transfer area through the second transmission mechanism, so that the doped amorphous silicon film on the silicon wafer is transformed into a doped polycrystalline silicon layer through RTA treatment; Step 7: After the RTA treatment, the silicon wafer enters the unloading area through the second transmission mechanism to unload the silicon wafer from the quartz carrier to obtain a passivated contact structure.

2. A rapid preparation method for a passivation contact structure according to claim 1, characterized in that: In step 3, the tunneling oxide layer is prepared by plasma-enhanced N2O oxidation or UV-irradiated ozone oxidation.

3. The rapid preparation method of a passivation contact structure according to claim 1, characterized in that: The deposition reaction chamber comprises a transition chamber and a deposition chamber in sequence.

4. A rapid preparation method for a passivation contact structure according to claim 1 or 3, characterized in that: In step 4, the method for depositing the doped amorphous silicon film is a plate-type PECVD method and a plate-type magnetron sputtering method.

5. The rapid preparation method of a passivation contact structure according to claim 1, characterized in that: The production line also includes a first conveying mechanism located at the front end of the loading area, a second conveying mechanism located between the first transmission mechanism and the second transmission mechanism, and a third transmission mechanism linearly connecting the first conveying mechanism and the second conveying mechanism; After step 5, the method also includes the step of conveying the empty loading plate to the third transmission mechanism via the second conveying mechanism, then conveying it to the first conveying mechanism via the third transmission mechanism, and then conveying it back to the loading area via the first conveying mechanism.

6. The rapid preparation method of a passivation contact structure according to claim 1, characterized in that: The production line further includes a third conveying mechanism located at the rear end of the unloading area, and a fourth transmission mechanism linearly connecting the third conveying mechanism and the second conveying mechanism; After step 7, the method also includes the step of conveying the empty quartz carrier to the fourth transmission mechanism via the third conveying mechanism, then conveying it to the second conveying mechanism via the fourth transmission mechanism, and then conveying it back to the transfer area via the second conveying mechanism.

7. The rapid preparation method of a passivation contact structure according to claim 1, characterized in that: The material of the loading plate is carbon fiber or graphite; the loading plate and the quartz loading plate are both horizontal loading plates, and are both provided with a plurality of loading cavities arranged in an array so as to load a plurality of silicon wafers at the same time.

8. The rapid preparation method of a passivation contact structure according to claim 1, characterized in that: In step 6, after the quartz carrier enters the RTA processing chamber, it is first purged with nitrogen to remove residual air, and then annealed at 800-1000°C for 3-10 minutes in a nitrogen atmosphere by heating with an irradiation lamp source. The annealed silicon wafer is then purged with nitrogen to accelerate cooling; the irradiation light source is one or more of a halogen lamp, a xenon lamp, an LED lamp and a laser lamp.

9. The rapid preparation method of a passivation contact structure according to claim 1, characterized in that: In step 2, the pretreatment steps of the silicon wafer are as follows: Step 21, performing texturing treatment on the surface of the silicon wafer to remove the damaged layer on the surface of the silicon wafer and form a pyramid structure on the surface of the silicon wafer; Step 22, preparing a double-sided p+ doped layer or a double-sided n+ doped layer on the surface of the silicon wafer processed in step 21; Step 23, wet polishing the back side of the silicon wafer processed in step 22 to remove the p+ doped layer or n+ doped layer on the back side and edge of the silicon wafer to obtain a flat pyramid base structure on the back side of the silicon wafer.

10. An application of a passivation contact structure, characterized in that: The passivation contact structure prepared by the rapid preparation method of a passivation contact structure according to any one of claims 1 to 9 is applied to a crystalline silicon solar cell having a passivation contact structure.

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