On-chip network construction method, device, equipment and storage medium

Abstract

The present application provides a method, device, electronic device and computer-readable storage medium for constructing a network on chip, which relates to the field of computer technology, including: determining each routing module used to constitute the network on chip, and determining the access device connected to the routing module; determining the port information of the routing module according to the internal logic information of the routing module and the access device corresponding to each routing module; constructing a module design file corresponding to the routing module according to the internal logic information and port information of each routing module; and aggregating the module design files of all routing modules to obtain a network on chip design file. The present application can generate module design files developed for the functions and characteristics of the routing module without being restricted by fixed formats and rules, which can greatly reduce the complexity and redundancy of the design files, making the development efficiency and development flexibility higher.

Description

Technical Field

[0001] The present application relates to the field of computer technology, and in particular to a method, device, electronic device and computer-readable storage medium for constructing an on-chip network. Background Art

[0002] Circuit design files are files written in high-level languages ​​that describe the internal structure and characteristics of a circuit.

[0003] Currently, in the field of on-chip networks, a set of design files can be generated for the entire on-chip network, and each component in the on-chip network is described through the design file.

[0004] However, describing the entire on-chip network through a set of design files combined with a large number of definitions will result in very complex design files and poor flexibility. Summary of the invention

[0005] The embodiments of the present application provide a method, device, electronic device and computer-readable storage medium for constructing a network on a chip to solve the problems in the related art.

[0006] In a first aspect, an embodiment of the present application provides a method for constructing an on-chip network, the method comprising:

[0007] Determine each routing module used to constitute the on-chip network, and determine an access device used to connect to each of the routing modules;

[0008] Determine the port information of the routing module according to the internal logic information of the routing module and the access device corresponding to each routing module;

[0009] Constructing a module design file corresponding to the routing module according to the internal logic information and port information of each routing module;

[0010] The module design files of all the routing modules are aggregated to obtain an on-chip network design file.

[0011] In a second aspect, an embodiment of the present application provides a device for constructing a network on chip, the device comprising:

[0012] A determination module, used to determine each routing module used to constitute the on-chip network, and to determine an access device used to connect to each of the routing modules;

[0013] A port module, used to determine the port information of the routing module according to the internal logic information of the routing module and the access device corresponding to each routing module;

[0014] A construction module, used to construct a module design file corresponding to the routing module according to the internal logic information and port information of each routing module;

[0015] The aggregation module is used to aggregate the module design files of all the routing modules to obtain an on-chip network design file.

[0016] In a third aspect, an embodiment of the present application further provides an electronic device, including a processor;

[0017] a memory for storing instructions executable by the processor;

[0018] The processor is configured to execute the instructions to implement the method of the first aspect.

[0019] In a fourth aspect, an embodiment of the present application further provides a computer-readable storage medium, which, when instructions in the computer-readable storage medium are executed by a processor of an electronic device, enables the electronic device to execute the method of the first aspect.

[0020] In the embodiment of the present application, each routing module in the on-chip network can be taken as an object, and a set of module design files corresponding to each routing module can be generated separately according to the internal logic information and port information of each routing module, and finally the module design files of all routing modules are aggregated to obtain the on-chip network design file. In the process of implementing this solution, the corresponding module design files are developed for the functions and characteristics of the routing module, so that the module design files developed for the functions and characteristics of the routing module can be generated without being restricted by fixed formats and rules, which can greatly reduce the complexity and redundancy of the design files, and facilitate different functions and configurations for different routing modules, so that the development efficiency and development flexibility are higher.

[0021] The above description is only an overview of the technical solution of the present application. In order to more clearly understand the technical means of the present application, it can be implemented in accordance with the contents of the specification. In order to make the above and other purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are listed below. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0023] Figure 1is a flowchart of a method for constructing a network on chip provided by an embodiment of the present application;

[0024] Figure 2 It is a flowchart of the specific steps of a method for constructing an on-chip network provided in an embodiment of the present application;

[0025] Figure 3 It is a partial structural diagram of an on-chip network provided in an embodiment of the present application;

[0026] Figure 4 It is a block diagram of a network-on-chip construction device provided in an embodiment of the present application;

[0027] Figure 5 is a block diagram of an electronic device provided by an embodiment of the present invention;

[0028] Figure 6 is a block diagram of another electronic device according to another embodiment of the present invention. DETAILED DESCRIPTION

[0029] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0030] The terms "first", "second", etc. in the specification and claims of the present application are used to distinguish similar objects, and are not used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable under appropriate circumstances, so that the embodiments of the present application can be implemented in an order other than those illustrated or described here, and the objects distinguished by "first", "second", etc. are generally a class, and the number of objects is not limited. For example, the first object can be one or more. In addition, the term "and / or" in the specification and claims is used to describe the association relationship of associated objects, indicating that three kinds of relationships can exist, for example, A and / or B can be represented: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the front and back associated objects are a kind of "or" relationship. In the embodiment of the present application, the term "multiple" refers to two or more, and other quantifiers are similar.

[0031] Figure 1 , is a flowchart of a method for constructing a network on chip provided by an embodiment of the present application, such as Figure 1 As shown, the method may include:

[0032] Step 101: Determine each routing module used to form an on-chip network, and determine an access device used to connect to each routing module.

[0033] In practical applications, although the multiple processor cores in a multi-core processor chip each execute their own code, data needs to be shared and synchronized between the processor cores. Therefore, the hardware structure of the multi-core processor must support efficient inter-core communication, and the performance of the on-chip communication structure will directly affect the performance of the processor.

[0034] Therefore, the network-on-chip (NOC) is a key technology of the multi-processor architecture. It is the interconnection path and communication network inside the processor, responsible for message transmission, and is the basis for the collaborative work of processors. The network-on-chip aims to solve the communication problem within the multi-core processor. The network-on-chip is an integrated circuit on a network-based communication subsystem. The network-on-chip is a packet switching network based on routers between systems-on-chip. The network-on-chip technology draws on the interconnection network structure of parallel computers, integrating a large number of computing resources and an on-chip communication network connecting these resources on a single chip. Each processor core has an independent router and its private cache, and is connected together through an on-chip communication network. The message communication mechanism is used between the processor cores, and the on-chip bus of the related technology is replaced by routers and packet switching technology to complete the communication task, thereby solving the various bottleneck problems caused by bus interconnection in the related technology.

[0035] Specifically, in the process of developing and designing on-chip networks, high-level languages ​​(such as Python) can be used to write on-chip network design files. In one implementation method, the on-chip network design files can be in the form of register transfer level (RTL). In digital circuit design, RTL is an abstract model of synchronous digital circuits. This model can describe the circuit structure based on the flow of digital signals between logic units such as hardware registers, memories, combinational logic devices and buses, as well as their logic algebraic operation.

[0036] The on-chip network may include multiple components, which may include: routing modules, access devices, consistency modules, processor cores, etc. Among them, the routing module is an important component of the on-chip network, and the routing module is used to implement important functions in the on-chip network such as routing calculation and data arbitration. The on-chip network may include multiple routing modules, and multiple routing modules may be interconnected. The routing module may also be connected to other access devices. For example, the access devices connected to the injection port of the routing module may include external devices such as memory, graphics cards, and network cards. That is, through a rich selection of additional access devices, the functional realization of the multi-core processor architecture is improved.

[0037] In a related technology, a set of RTL files can be generated for the entire on-chip network as the design file of the on-chip network, and a large number of definitions (defines) can be added to the set of RTL files to improve the description of the on-chip network. In addition, the RTL in the related technology uses a fixed format and rules to describe each node and access device. However, due to the large scale of the on-chip network, there are different functional and performance requirements when connecting to each node and access device therein. Therefore, the related technology generates a set of RTL files and definitions for the entire on-chip network, which will cause the design file of the on-chip network to be very complicated, and the fixed description format of RTL makes it difficult to perform different functions and configurations on different routing modules in the on-chip network, and the flexibility is poor.

[0038] In order to solve the above problems, the embodiment of the present application can take each routing module in the on-chip network as the object, and generate a set of RTL files corresponding to each routing module as the module design file of the routing module, and finally summarize the module design files of all routing modules to obtain the on-chip network design file. In the process of implementing this solution, developing corresponding RTL files for individual routing modules can facilitate corresponding configuration and streamlining (such as deleting unnecessary ports and channels) for the functions and characteristics of the routing module, so that RTL files developed for the functions and characteristics of the routing module can be generated without being restricted by fixed formats and rules. This can greatly reduce the complexity and redundancy of the RTL files, and facilitate different functions and configurations for different routing modules, so that development efficiency and development flexibility are higher.

[0039] In this step, we first determine the various routing modules used to constitute the on-chip network, as well as the access devices used to connect to each routing module, so as to facilitate the subsequent determination of the port information of the routing module through the internal logic information of the routing module and the access device. The port information is an important content in the RTL file.

[0040] Step 102: Determine the port information of the routing module according to the internal logic information of the routing module and the access device corresponding to each routing module.

[0041] In an embodiment of the present application, the internal logic information of the routing module records the internal execution logic of the routing module and the connection port information between the routing module and other routing modules, wherein the internal execution logic includes internal sequential logic and combinational logic, the sequential logic is an execution logic with time correlation, and the combinational logic is an execution logic without time correlation.

[0042] Specifically, after obtaining the connection port information between the routing module and other routing modules in the internal logical information of the routing module, and determining the access device corresponding to the routing module, the connection port in the routing module used to connect with other routing modules can be used as the internal port, and the connection port in the routing module used to connect with the access device can be used as the external port, thereby determining the port information including the internal port and the external port.

[0043] Step 103: construct a module design file corresponding to the routing module according to the internal logic information and port information of each routing module.

[0044] In an embodiment of the present application, after the port information of the routing module is determined, the internal execution logic in the internal logic information of the routing module can be combined with the port information and added to the module design file corresponding to the routing module to form a set of RTL files corresponding to the routing module. At this time, since the RTL file is independently generated for the routing module, it can be configured and streamlined accordingly for the functions and characteristics of the routing module, so that the RTL file of the routing module can be free from the restrictions of fixed formats and rules, which can greatly reduce the complexity and redundancy of the RTL file, and facilitate different functions and configurations for different routing modules, so that the development efficiency and development flexibility are higher.

[0045] Step 104: Aggregate the module design files of all the routing modules to obtain an on-chip network design file.

[0046] In the embodiment of the present application, after independently constructing the module design files of each routing module, the module design files of all routing modules can be aggregated into a set of RTL files, and the top layer (network layer) of the aggregated set of RTL files provides a channel for managing the operating status of each routing module and a connection port for all access devices, so that the aggregated set of RTL files is used as an on-chip network design file. Subsequently, the on-chip network design file can be imported into a simulated operating environment for simulation and verification, or the verified on-chip network design file can be written into the board for operation.

[0047] In summary, in the embodiment of the present application, each routing module in the on-chip network can be taken as an object, and a set of module design files corresponding to each routing module can be generated separately according to the internal logic information and port information of each routing module, and finally the module design files of all routing modules are summarized to obtain the on-chip network design file. In the process of implementing this solution, the corresponding module design files are developed for the functions and characteristics of the routing module, so that the module design files developed for the functions and characteristics of the routing module can be generated without being restricted by fixed formats and rules, which can greatly reduce the complexity and redundancy of the design files, and facilitate different functions and configurations for different routing modules, so that the development efficiency and development flexibility are higher.

[0048] Figure 2 , is a flowchart of the specific steps of a method for constructing an on-chip network provided in an embodiment of the present application, such as Figure 2 As shown, the method may include:

[0049] Step 201: Determine each routing module used to form an on-chip network, and determine an access device used to connect to each routing module.

[0050] This step may specifically refer to the above step 101, which will not be described in detail here.

[0051] Step 202: Determine an external port for connecting to the access device according to the access device corresponding to each of the routing modules; the external port corresponds to the access device one by one.

[0052] In an embodiment of the present application, the routing module can be connected to an access device, and the access device can be a processing element (PE). PE defines the behavior of an abstract machine. PE is also called a processing element. PE can abstract the process of a processor processing transactions as a processor.

[0053] In order to achieve the connection between the routing module and the access device, an external port corresponding to the access device can be deployed in the routing module, so that the routing module can connect with the access device through the external port, and the external port corresponds to the access device one by one. In the embodiment of the present application, it is specifically possible to determine which access devices the routing module needs to connect with from the development documents when designing the on-chip network.

[0054] Specifically, after determining the access device to be connected, the external port corresponding to the access device can be deployed in the routing module. For example, assuming that a routing module needs to be connected to the access device sbsx, the external port for connecting to the access device sbsx can be deployed in the routing module.

[0055] Optionally, step 202 may specifically include:

[0056] Sub-step 2021: When the access device is in a preset device list, determine an external port for connecting the access device; the device list records information of devices that are allowed to access the on-chip network.

[0057] Sub-step 2022: When the access device is not in the preset device list, stop determining the corresponding external port for the access device.

[0058] In an embodiment of the present application, for sub-steps 2021-2022, when developing and designing the on-chip network, a device list can be preset, and the device list can record information of devices allowed to access the on-chip network.

[0059] In the process of constructing the module design file corresponding to each routing module, the access device can be verified based on the device list, that is, when the access device is in the device list, it is determined that the access device is a device allowed to access the on-chip network, so that an external port for connecting the access device can be deployed in the routing module; when the access device is not in the device list, it is determined that the access device is a device not allowed to access the on-chip network, so that the corresponding external port for the access device is stopped.

[0060] For example, in one implementation, the device list may record:

[0061] HND (Home Node DVM);

[0062] HNF (Home Node Full);

[0063] RNI (Request Node Interface, runtime node request);

[0064] SBSX (Slave component for docking Axi bus protocol);

[0065] RNFB (Request Node Full uses version B of the bus consistency protocol);

[0066] RNFA (Request Node Full uses version A of the bus consistency protocol);

[0067] RNFBESAM (the Request Node Full uses version B of the bus consistency protocol, and the system address map (sam) is outside the Request node);

[0068] PUBMI (refers to the master control component of the Public channel).

[0069] When the name of the access device is in the device list, it can be determined that the access device is a device that is allowed to access the on-chip network, so that an external port for connecting the access device can be deployed in the routing module.

[0070] Step 203: Determine an internal port for connecting to the other routing modules according to the connection port information between the routing module and other routing modules; the internal port corresponds to the other routing modules one by one.

[0071] The internal logic information includes: connection port information between the routing module and other routing modules.

[0072] In an embodiment of the present application, in the design of the on-chip network, the topological structure of the on-chip network is specifically formed by the interconnection between routing modules. The internal logic information of each routing module may also include the connection topology information of the routing module, that is, the connection port information in the routing module used to connect with other routing modules, so as to determine the internal port of the routing module used to connect with other routing modules based on the connection port information between the routing module and other routing modules.

[0073] For example, assuming that the routing module MXP Router (0,0) needs to be connected to the routing module MXP Router (1,0) and the routing module MXP Router (0,1), the internal logic information of the routing module MXP Router (0,0) may record the information of the port used to connect to the routing module MXP Router (1,0) and the information of the port used to connect to the routing module MXP Router (0,1).

[0074] Step 204: Determine the port information of the routing module according to the external port and the internal port.

[0075] In the embodiment of the present application, all external ports and internal ports of the routing module can be summarized to construct the port information of the routing module.

[0076] For example, refer to Figure 3 , which shows part of the structure in the on-chip network, including: routing module MXP Router (0,0), routing module MXP Router (1,0), routing module MXP Router (0,1), routing module MXP Router (1,1).

[0077] Among them, the routing module MXP Router (0,0) is connected to the routing module MXP Router (1,0), the routing module MXP Router (0,0) is also connected to the routing module MXP Router (0,1), the routing module MXP Router (1,0) is also connected to the routing module MXP Router (1,1), and the routing module MXP Router (1,1) is also connected to the routing module MXPRouter (0,1). Each routing module can be deployed with internal ports for connecting to other routing modules. For example, the internal ports of the routing module MXP Router (0,0) include: internal port (0,1) for connecting to the routing module MXP Router (0,1), and internal port (1,0) for connecting to the routing module MXP Router (1,0).

[0078] In addition, each routing module is deployed with four external ports: P0, P1, P2, and P3, and the external ports are used to connect to external access devices. The module design file of each routing module may include the internal ports and external ports of the routing module.

[0079] Step 205: construct the module design file according to a preset design file template, the internal logic information and the port information.

[0080] In an embodiment of the present application, when constructing a module design file of a routing module, a design file template in RTL format may be obtained first, and then the internal logic information of the routing module and the port information may be passed as parameters and filled into the design file template, thereby forming a module design file of the routing module. Template technology may be used to solidify a large amount of common file content in the form of a template, and then the internal information of each routing module may be passed and filled into the design file template, so that the module design file of the routing module may be quickly constructed, thereby improving development efficiency.

[0081] Step 206: Determine the target port and the target input / output queue in the design file template; the target port and the target input / output queue are information not used by the routing module.

[0082] Step 207: Delete the target port and target input and output queue in the module design file.

[0083] In the process of generating module design files by using template technology, since the module design files are constructed in a fixed format, and the routing module may not use the inherent content in the module design files, when constructing the module design files of each routing module, the unused target ports and target input and output queues of the routing module in the module design file can be determined according to the characteristics of the routing module. Therefore, when constructing the module design files of the routing module, these unused target ports and target input and output queues are eliminated in the module design files, so as to achieve the effect of streamlining the module design files corresponding to the routing module, so that the RTL files developed for the functions and characteristics of the routing module can be generated without being restricted by fixed formats and rules.

[0084] Step 208: Aggregate the module design files of all the routing modules to obtain an on-chip network design file.

[0085] This step may be specifically referred to as the above step 104, which will not be described in detail here.

[0086] Optionally, the top level of the on-chip network design file provides: a first management channel for managing the operating status of each routing module of the on-chip network, and an external port connected to each routing module in the on-chip network; the top level of the module design file of each routing module provides: a second management channel for managing the operating status of each component of the routing module.

[0087] In an embodiment of the present application, the module design files of all routing modules can be summarized into a set of RTL files as the on-chip network design files, and the top layer (network layer) of the summarized set of RTL files provides a first management channel for managing the operating status of each routing module of the on-chip network, as well as the external ports connected to each routing module in the on-chip network. In addition, the top layer of the module design file of each routing module provides: a second management channel for managing the operating status of each component of the routing module. When the on-chip network is running, the management of each routing module can be achieved through the first management channel, and each routing module can achieve its own internal management through its own second management channel.

[0088] Optionally, the internal logic information includes: the internal logic of the routing module added to the module design file, the internal logic of the routing module including: timing logic and combinational logic; the port information recorded in the module design file includes: one or more of: port name, port width, port type, and port description.

[0089] In the embodiments of the present application, Figure 3In the example shown, the module design file of the routing module can record the information in Table 1 below, including the external ports and internal ports of the routing module, as well as the bit width, type, description, and other information of each port:

[0090]

[0091] Table 1

[0092] In addition, the internal interconnection of the on-chip network generally adopts the link connection of the consistent bus interface (CHI, Coherent Hub Interface) protocol, but the flitpend signal can be optimized into a one-dimensional array rinfo, that is, the RTL file of the routing module contains a one-dimensional array, which records the routing information of the routing module. This can reduce one-beat transmission and improve the time efficiency of transmission.

[0093] Optionally, the method may further include:

[0094] Step 209: verify the on-chip network design file to obtain a verification result.

[0095] Step 210: If the verification result is passed, write the on-chip network design file into the board for execution.

[0096] In the embodiment of the present application, during the verification of the on-chip network design file, the on-chip network design file can be imported into the constructed verification platform for compilation and operation to obtain the measured operation result, and then the measured operation result can be compared with the preset reference operation result. If the two are consistent, the verification result can be output as passed. If the two are inconsistent, the verification result can be output as failed.

[0097] In addition, if the verification is passed, the on-chip network design file can be burned to the board for operation, thereby completing the implementation of the on-chip network design.

[0098] In summary, in the embodiment of the present application, each routing module in the on-chip network can be taken as an object, and a set of module design files corresponding to each routing module can be generated separately according to the internal logic information and port information of each routing module, and finally the module design files of all routing modules are summarized to obtain the on-chip network design file. In the process of implementing this solution, the corresponding module design files are developed for the functions and characteristics of the routing module, so that the module design files developed for the functions and characteristics of the routing module can be generated without being restricted by fixed formats and rules, which can greatly reduce the complexity and redundancy of the design files, and facilitate different functions and configurations for different routing modules, so that the development efficiency and development flexibility are higher.

[0099] Figure 4 : is a block diagram of a network-on-chip construction device provided in an embodiment of the present application, the device comprising:

[0100] A determination module 301 is used to determine each routing module used to constitute an on-chip network, and to determine an access device used to connect to each routing module;

[0101] The port module 302 is used to determine the port information of the routing module according to the internal logic information of the routing module and the access device corresponding to each routing module;

[0102] A construction module 303, configured to construct a module design file corresponding to the routing module according to the internal logic information and port information of each routing module;

[0103] The aggregation module 304 is used to aggregate the module design files of all the routing modules to obtain an on-chip network design file.

[0104] Optionally, the internal logic information includes: connection port information between the routing module and other routing modules, and the port module 302 includes:

[0105] A first determination submodule, configured to determine, according to the access device corresponding to each of the routing modules, an external port for connecting to the access device; the external port corresponds to the access device one by one;

[0106] A second determination submodule, configured to determine an internal port for connecting to the other routing modules according to the connection port information of the routing module and other routing modules; the internal port corresponds to the other routing modules one by one;

[0107] The third determining submodule is used to determine the port information of the routing module according to the external port and the internal port.

[0108] Optionally, the first determining submodule includes:

[0109] A first determining unit, configured to determine an external port for connecting the access device when the access device is in a preset device list; the device list records information of devices that are allowed to access the on-chip network;

[0110] The second determining unit is configured to stop determining a corresponding external port for the access device when the access device is not in a preset device list.

[0111] Optionally, the construction module 303 includes:

[0112] A construction submodule, used to construct the module design file according to a preset design file template, the internal logic information and the port information;

[0113] The device also includes:

[0114] A determination module, used to determine a target port and a target input / output queue in the design file template; the target port and the target input / output queue are information not used by the routing module;

[0115] The deletion module is used to delete the target port and target input and output queue in the module design file.

[0116] Optionally, the top level of the network-on-chip design file provides: a first management channel for managing the operating status of each routing module of the network-on-chip, and an external port connected to each routing module in the network-on-chip;

[0117] The top level of the module design file of each routing module provides: a second management channel for managing the operating status of each component of the routing module.

[0118] Optionally, the internal logic information includes: internal logic of a routing module for adding to the module design file, the internal logic of the routing module including: sequential logic and combinational logic;

[0119] The port information recorded in the module design file includes: one or more of: port name, port width, port type, and port description.

[0120] Optionally, the device further comprises:

[0121] A verification module, used to verify the on-chip network design file and obtain a verification result;

[0122] The writing module is used to write the on-chip network design file into the board for operation if the verification result is passed.

[0123] In summary, in the embodiment of the present application, each routing module in the on-chip network can be taken as an object, and a set of module design files corresponding to each routing module can be generated separately according to the internal logic information and port information of each routing module, and finally the module design files of all routing modules are summarized to obtain the on-chip network design file. In the process of implementing this solution, the corresponding module design files are developed for the functions and characteristics of the routing module, so that the module design files developed for the functions and characteristics of the routing module can be generated without being restricted by fixed formats and rules, which can greatly reduce the complexity and redundancy of the design files, and facilitate different functions and configurations for different routing modules, so that the development efficiency and development flexibility are higher.

[0124] As for the device embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment.

[0125] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0126] Regarding the device in the above embodiment, the specific manner in which each module performs operations has been described in detail in the embodiment of the method, and will not be elaborated here.

[0127] An embodiment of the present application provides an on-chip network construction device, including a memory and one or more programs, wherein the one or more programs are stored in the memory and are configured to be executed by one or more processors to include methods for performing one or more of the above embodiments.

[0128] Figure 5 is a block diagram of an electronic device 600 according to an exemplary embodiment. For example, the electronic device 600 may be a mobile phone, a computer, a digital broadcast terminal, a messaging device, a game console, a tablet device, a medical device, a fitness device, a personal digital assistant, etc.

[0129] Reference Figure 5 , the electronic device 600 may include one or more of the following components: a processing component 602 , a memory 604 , a power component 606 , a multimedia component 608 , an audio component 610 , an input / output (I / O) interface 612 , a sensor component 614 , and a communication component 616 .

[0130] The processing component 602 generally controls the overall operation of the electronic device 600, such as operations associated with display, phone calls, data communications, camera operations, and recording operations. The processing component 602 may include one or more processors 620 to execute instructions to complete all or part of the steps of the above-mentioned method. In addition, the processing component 602 may include one or more modules to facilitate the interaction between the processing component 602 and other components. For example, the processing component 602 may include a multimedia module to facilitate the interaction between the multimedia component 608 and the processing component 602.

[0131] The memory 604 is used to store various types of data to support the operation of the electronic device 600. Examples of such data include instructions for any application or method operating on the electronic device 600, contact data, phone book data, messages, pictures, multimedia, etc. The memory 604 can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic disk or optical disk.

[0132] The power supply component 606 provides power to the various components of the electronic device 600. The power supply component 606 may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power to the electronic device 600.

[0133] The multimedia component 608 includes a screen that provides an output interface between the electronic device 600 and the user. In some embodiments, the screen may include a liquid crystal display (LCD) and a touch panel (TP). If the screen includes a touch panel, the screen may be implemented as a touch screen to receive input signals from the user. The touch panel includes one or more touch sensors to sense touch, slide, and gestures on the touch panel. The touch sensor may not only sense the boundaries of the touch or slide action, but also detect the duration and pressure associated with the touch or slide operation. In some embodiments, the multimedia component 608 includes a front camera and / or a rear camera. When the electronic device 600 is in an operating mode, such as a shooting mode or a multimedia mode, the front camera and / or the rear camera may receive external multimedia data. Each front camera and rear camera may be a fixed optical lens system or have a focal length and optical zoom capability.

[0134] The audio component 610 is used to output and / or input audio signals. For example, the audio component 610 includes a microphone (MIC), and when the electronic device 600 is in an operation mode, such as a call mode, a recording mode, and a voice recognition mode, the microphone is used to receive an external audio signal. The received audio signal can be further stored in the memory 604 or sent via the communication component 616. In some embodiments, the audio component 610 also includes a speaker for outputting audio signals.

[0135] I / O interface 612 provides an interface between processing component 602 and peripheral interface modules, such as keyboards, click wheels, buttons, etc. These buttons may include but are not limited to: a home button, a volume button, a start button, and a lock button.

[0136] The sensor assembly 614 includes one or more sensors for providing various aspects of status assessment for the electronic device 600. For example, the sensor assembly 614 can detect the open / closed state of the electronic device 600, the relative positioning of the components, such as the display and keypad of the electronic device 600, and the sensor assembly 614 can also detect the position change of the electronic device 600 or a component of the electronic device 600, the presence or absence of contact between the user and the electronic device 600, the orientation or acceleration / deceleration of the electronic device 600, and the temperature change of the electronic device 600. The sensor assembly 614 may include a proximity sensor configured to detect the presence of a nearby object without any physical contact. The sensor assembly 614 may also include an optical sensor, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, the sensor assembly 614 may also include an acceleration sensor, a gyroscope sensor, a magnetic sensor, a pressure sensor, or a temperature sensor.

[0137] The communication component 616 is used to facilitate wired or wireless communication between the electronic device 600 and other devices. The electronic device 600 can access a wireless network based on a communication standard, such as WiFi, a carrier network (such as 2G, 3G, 4G or 5G), or a combination thereof. In an exemplary embodiment, the communication component 616 receives a broadcast signal or broadcast-related information from an external broadcast management system via a broadcast channel. In an exemplary embodiment, the communication component 616 also includes a near field communication (NFC) module to facilitate short-range communication. For example, the NFC module can be implemented based on radio frequency identification (RFID) technology, infrared data association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth (BT) technology and other technologies.

[0138] In an exemplary embodiment, the electronic device 600 may be implemented by one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic components to implement the methods provided in the embodiments of the present application.

[0139] In an exemplary embodiment, a non-transitory computer-readable storage medium including instructions is also provided, such as a memory 604 including instructions, and the instructions can be executed by a processor 620 of an electronic device 600 to perform the above method. For example, the non-transitory storage medium can be a ROM, a random access memory (RAM), a CD-ROM, a magnetic tape, a floppy disk, an optical data storage device, etc.

[0140] Figure 6 is a block diagram of an electronic device 700 according to an exemplary embodiment. For example, the electronic device 700 may be provided as a server. Figure 6 The electronic device 700 includes a processing component 722, which further includes one or more processors, and a memory resource represented by a memory 732 for storing instructions that can be executed by the processing component 722, such as an application. The application stored in the memory 732 may include one or more modules, each corresponding to a set of instructions. In addition, the processing component 722 is configured to execute instructions to perform the method provided in the embodiment of the present application.

[0141] The electronic device 700 may also include a power supply component 726 configured to perform power management of the electronic device 700, a wired or wireless network interface 750 configured to connect the electronic device 700 to a network, and an input / output (I / O) interface 758. The electronic device 700 may operate based on an operating system stored in the memory 732, such as Windows Server TM, Mac OS X TM, Unix TM, Linux TM, FreeBSD TM or the like.

[0142] An embodiment of the present application further provides a computer program product, including a computer program, which implements the method described in the above embodiment when executed by a processor.

[0143] Those skilled in the art will readily appreciate other embodiments of the present application after considering the specification and practicing the application disclosed herein. The present application is intended to cover any modification, use or adaptation of the present application, which follows the general principles of the present application and includes common knowledge or customary techniques in the art that are not disclosed in the present disclosure. The specification and examples are intended to be exemplary only, and the true scope and spirit of the present application are indicated by the following claims.

[0144] It should be understood that the present application is not limited to the precise structures that have been described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present application is limited only by the appended claims.

Claims

1. A method for constructing a network on chip, characterized in that: The method comprises: Determine each routing module used to constitute the on-chip network, and determine an access device used to connect to each of the routing modules; Determine the port information of the routing module according to the internal logic information of the routing module and the access device corresponding to each routing module; According to the internal logic information and port information of each routing module, a module design file corresponding to the routing module is constructed; according to the internal logic information and port information of each routing module, the module design file corresponding to the routing module is constructed, including: according to a preset design file template, the internal logic information and the port information, the module design file is constructed; Determine the target port and the target input and output queue in the design file template; the target port and the target input and output queue are information not used by the routing module; Deleting the target port and the target input and output queue in the module design file; The module design files of all the routing modules are aggregated to obtain an on-chip network design file.

2. The method for constructing a network on chip according to claim 1, characterized in that: The internal logic information includes: connection port information of the routing module and other routing modules, and the determining the port information of the routing module according to the internal logic information of the routing module and the access device corresponding to each routing module includes: According to the access device corresponding to each of the routing modules, determining an external port for connecting the access device; the external port corresponds to the access device one by one; According to the connection port information of the routing module and other routing modules, determine the internal port used to connect to the other routing modules; the internal port corresponds to the other routing modules one by one; The port information of the routing module is determined according to the external port and the internal port.

3. The method for constructing a network on chip according to claim 2, characterized in that: The step of determining, according to the access device corresponding to each of the routing modules, an external port for connecting to the access device comprises: When the access device is in a preset device list, determining an external port for connecting the access device; the device list records information of devices allowed to access the on-chip network; When the access device is not in the preset device list, stop determining the corresponding external port for the access device.

4. The method for constructing a network on chip according to claim 1, characterized in that: The top level of the network-on-chip design file provides: a first management channel for managing the operating status of each routing module of the network-on-chip, and an external port connected to each routing module in the network-on-chip; The top level of the module design file of each routing module provides: a second management channel for managing the operating status of each component of the routing module.

5. The method for constructing a network on chip according to claim 1, characterized in that: The internal logic information includes: the internal logic of the routing module used to be added into the module design file, and the internal logic of the routing module includes: sequential logic and combinational logic; The port information recorded in the module design file includes: one or more of: port name, port width, port type, and port description.

6. The method for constructing a network on chip according to claim 1, characterized in that: The method further comprises: Verifying the on-chip network design file to obtain a verification result; When the verification result is passed, the on-chip network design file is written into the board for execution.

7. A network-on-chip construction device, characterized in that: The device comprises: A determination module, used to determine each routing module used to constitute the on-chip network, and to determine an access device used to connect to each of the routing modules; A port module, used to determine the port information of the routing module according to the internal logic information of the routing module and the access device corresponding to each routing module; A construction module, used to construct a module design file corresponding to the routing module according to the internal logic information and port information of each routing module; the construction module includes: a construction submodule, used to construct the module design file according to a preset design file template, the internal logic information and the port information; A determination module, used to determine a target port and a target input / output queue in the design file template; the target port and the target input / output queue are information not used by the routing module; A deletion module, used to delete the target port and the target input and output queue in the module design file; The aggregation module is used to aggregate the module design files of all the routing modules to obtain an on-chip network design file.

8. An electronic device, characterized in that: include: processor; a memory for storing instructions executable by the processor; The processor is configured to execute the instructions to implement the method according to any one of claims 1 to 6.

9. A computer-readable storage medium, characterized in that: When the instructions in the computer-readable storage medium are executed by a processor of an electronic device, the electronic device is enabled to perform the method as claimed in any one of claims 1 to 6.

Images