PCB layout wiring design method, electronic equipment and storage medium

Through comprehensive consideration of the importance, layout priority, and packaging parameters, it is divided into several priority classes and uses neural network algorithms for layout wiring, which solves the problem of calculation complexity caused by the large number of components in the existing technology in the existing technology. The more efficient and accurate PCB layout wiring design has been achieved.

CN119378479AInactive Publication Date: 2025-01-28HUIZHOU DAYAWAN NORCO IND CO LTD
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Patent Information

Application Number
CN202411821856.5
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-11
Publication Date
2025-01-28
Estimated Expiration
Not applicable · inactive patent

AI Technical Summary

Technical Problem

When the prior art is performing automatic layout and wiring of PCB components, the calculation complexity increases when the number of components is large or the pins is complex, resulting in a long design time and unsatisfactory results.

Method used

By obtaining the circuit schematic diagram, door -level meter and component packaging parameters, set the layout of the wiring rules, and comprehensively consider the importance of the component, the priority of the layout, and the packaging parameters. The algorithm is layout one by one.

Benefits of technology

Improve the wiring efficiency and accuracy of the PCB board, reduce redundancy in the design, optimize the use of space, avoid unnecessary waste of space, and improve the reliability of the circuit.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention relates to the technical field of PCB design, in particular to a PCB layout and wiring design method, electronic equipment and a storage medium, and the method comprises the steps: obtaining the importance and layout priority of any component for different modules, obtaining the layout region proportion of any module on a PCB, and obtaining the layout priority of any component; obtaining a correlation coefficient between the modules according to a connection relation between the modules in the schematic circuit diagram, obtaining the area size of a layout region, and carrying out PCB layout design by combining the size of the correlation coefficient between the modules and the layout priority of the components; in the layout design process, the components are divided into a plurality of priority classes according to the layout priorities of the components in the module, the layout priorities of the components are corrected by combining the occurrence frequencies of the components, and the components in the priority classes are subjected to layout wiring one by one. According to the invention, the design efficiency, quality, expandability and reliability of PCB layout and wiring can be effectively improved.
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Description

Technical Field

[0001] The present invention relates to the technical field of PCB design, and in particular to a PCB layout and wiring design method, electronic equipment and storage medium. Background Art

[0002] PCB (Printed Circuit Board) is the basic board in electronic products, that is, no components are installed. PCB is mainly used for electrical connection and mechanical support of electronic components, which is realized through pre-designed conductive paths, points and various component connection points. Usually, designers will select suitable components according to expected needs, and plan the layout of conductive paths, points, etc. on the PCB board through simulation software on the computer, and finally output the data of the simulated PCB board and print it.

[0003] Existing algorithms usually use artificial intelligence algorithms to achieve the purpose of automatic layout and routing of PCB components. In this process, the system will automatically layout according to the component positions and connection relationships in the schematic diagram. However, these methods usually only have good effects when there are fewer components or the component pins are relatively simple. When the number of components is large or the component pins are more complex, the number of possible combinations and paths that the system needs to process also increases greatly, resulting in increased calculation complexity. Therefore, it usually takes more time and computing resources to obtain layout and routing results, and the final output results may not meet the requirements. Summary of the invention

[0004] The present invention provides a PCB layout and wiring design method, electronic equipment and storage medium to solve the existing problems.

[0005] A PCB layout and wiring design method, electronic device and storage medium of the present invention adopt the following technical solutions: An embodiment of the present invention provides a PCB layout and wiring design method, the method comprising the following steps: Obtain the circuit schematics containing several modules, the corresponding gate-level netlist, and the packaging parameters of the components in each module, and set the layout and routing rules of the PCB board; Obtain the importance and layout priority of any component for different modules, obtain the layout area ratio of the module on the PCB board according to the number and volume of components in any module, obtain the correlation coefficient between modules according to the connection relationship between modules in the circuit schematic, take each cluster as a layout area, obtain the area size of the layout area according to the size of the PCB board and the layout area ratio of the module, and perform PCB layout design in combination with the size of the correlation coefficient between modules and the layout priority of components; During the layout design process, the components are divided into several priority categories according to their layout priorities in the module, and the layout priorities of the components are corrected based on their occurrence frequencies, and the components in the priority categories are laid out and routed one by one; Use PCB design tools to check the layout and routing rules of the PCB layout and routing results.

[0006] Furthermore, the specific method of obtaining the importance and layout priority of any component to different modules includes: Get all modules in the circuit schematic and the components contained in each module, and calculate the importance of components to any module based on the frequency of components appearing in the module; Obtain the packaging parameters corresponding to the packaging of each component in the circuit schematic, and determine the number of pins and volume of each component according to the packaging parameters; Calculate the layout priority of components based on their importance to the module, number of pins, and size.

[0007] Furthermore, the specific calculation method of the importance of the components to any module is: ,in, Indicates For the following components The importance of modules Indicates The module contains The number of components of the class, Indicates The total number of components of this type in the circuit schematic, Indicates the number of all modules in the circuit schematic. Indicates that the circuit diagram contains The number of modules of the component class, Represents the logarithmic function with the natural constant 10 as the base.

[0008] Furthermore, the specific method for obtaining the layout area ratio of the module on the PCB board is: The number of components contained in any module in the circuit schematic and the proportion of the volume of the components in the entire circuit schematic are used as the layout area proportion of the module on the PCB board.

[0009] Furthermore, the correlation coefficients between the modules are obtained according to the connection relationship between the modules in the circuit schematic diagram, including the specific method of: The ratio of the number of connection lines between any two modules in the same cluster to the total number of connection lines between all modules in the same cluster is obtained as the correlation coefficient between the two modules.

[0010] Furthermore, the components are divided into several priority categories according to the layout priorities of the components in the module, including the specific method of: During the layout design process, the components are divided into several categories recorded as priority categories according to the layout priorities of the components in any module. The layout priorities of all components in each priority category belong to a corresponding minimum integer interval, and the minimum integer interval is a closed interval formed by integers of adjacent sizes.

[0011] Furthermore, the layout priority of components is modified in combination with the occurrence frequency of components, and the components in the priority category are laid out and routed one by one, including the specific method as follows: Get the target priority class, and modify the layout priority of the components according to the frequency of occurrence of each component in the target priority class; according to the modified layout priority of the components in the target priority class, combine the neural network algorithm to perform layout one by one, and connect different components according to the connection relationship between the components in the gate-level netlist to obtain the PCB layout and routing results.

[0012] Furthermore, the specific method for obtaining the target priority class is: Get the average layout priority of all components in each priority class, get the priority class with the highest average layout priority and currently undetermined position, and record it as the target priority class.

[0013] An electronic device comprises a processor and a memory, wherein the processor is used to execute a computer program stored in the memory to implement the steps in the PCB layout and wiring design method.

[0014] A computer-readable storage medium stores a computer program. When the computer program is run on an electronic device, the electronic device executes any one of the steps in the PCB layout and wiring design method.

[0015] The beneficial effect of the technical solution of the present invention is: by comprehensively considering the importance of components, layout priority, packaging parameters and other aspects, components can be reasonably laid out according to their functions, frequencies, volumes and other characteristics during the design process. And by considering the frequency characteristics of components in each type of layout priority to correct the layout priority, it is helpful to improve the wiring efficiency and accuracy of the PCB board, reduce the redundancy in the layout design, optimize the use of space, and avoid unnecessary waste of space. In addition, by dividing the modules in the circuit schematic according to the connection relationship and calculating the correlation coefficient between the modules, the method can effectively organize and optimize the layout of each module. Clustering can help optimize the layout according to the close relationship between different modules, reduce unnecessary cross wiring between modules, reduce the space consumption of the circuit board, and effectively improve the reliability of the circuit. In general, the PCB layout and wiring design method provided by the embodiment of the present invention can improve the design efficiency, quality, scalability and reliability of the PCB layout and wiring, especially in the design of complex systems. It has significant advantages. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0017] Figure 1 A flow chart of the steps of a PCB layout and wiring design method of the present invention; Figure 2 A schematic diagram of the packaging of components provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0018] In order to further explain the technical means and effects adopted by the present invention to achieve the predetermined invention purpose, the following is a detailed description of a PCB layout and wiring design method, electronic device and storage medium proposed according to the present invention, its specific implementation, structure, features and effects, in combination with the accompanying drawings and preferred embodiments. In the following description, different "one embodiment" or "another embodiment" does not necessarily refer to the same embodiment. In addition, specific features, structures or characteristics in one or more embodiments may be combined in any suitable form.

[0019] Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs.

[0020] The following describes in detail a PCB layout and wiring design method, an electronic device, and a specific solution of a storage medium provided by the present invention in conjunction with the accompanying drawings.

[0021] See also Figure 1 , which shows a flow chart of the steps of a PCB layout and wiring design method provided by an embodiment of the present invention, the method comprising the following steps: Step S001: Obtain a circuit schematic diagram containing several modules, a corresponding gate-level netlist, and packaging parameters of components in each module, and set layout and routing rules for a PCB board.

[0022] It should be noted that, usually in circuit design, the circuit will be divided into different modules according to the functions realized by the composition of different components in the circuit. In addition, in order to facilitate PCB design, the circuit schematic will be converted into a corresponding gate-level netlist according to the connection relationship between the components in the circuit schematic. The gate-level netlist contains the component information in the circuit and the connection relationship information between the components.

[0023] Specifically, in order to implement a PCB layout and wiring design method proposed in this embodiment, it is first necessary to obtain a circuit schematic diagram containing several modules, a corresponding gate-level netlist, and packaging parameters of components in each module, and set the layout and wiring of the PCB board. The specific process is as follows: First, obtain a circuit schematic diagram that requires PCB layout and routing. The circuit schematic diagram contains several modules, each module contains several components, and the circuit schematic diagram is converted into a corresponding gate-level netlist according to the connection relationship between the components in the circuit schematic diagram.

[0024] Then, determine the packaging parameters of each component based on the circuit schematic. Figure 2 Shown is a schematic diagram of the packaging of components.

[0025] It should be noted that during the PCB design process, some component packages may not be included because the software's component package library is not comprehensive enough, so the component package needs to be drawn and entered.

[0026] Finally, the layout and wiring rules of the PCB board are set. The layout and wiring rules are divided into layout rules and wiring rules. The local rules include: physical size, thermal management, signal flow, power supply and ground layout; the wiring rules include: line width, line spacing, routing angle, and number of layers.

[0027] At this point, the circuit schematic, the corresponding gate-level netlist, and the packaging of components are obtained through the above method, and the layout and wiring rules of the PCB board are set.

[0028] Step S002: Obtain the importance and layout priority of any component for different modules, obtain the layout area ratio of the module on the PCB board according to the number and volume of components in any module, obtain the correlation coefficient between modules according to the connection relationship between modules in the circuit schematic, take each cluster as a layout area, obtain the area size of the layout area according to the size of the PCB board and the layout area ratio of the module, and perform PCB layout design in combination with the size of the correlation coefficient between modules and the layout priority of components.

[0029] It should be noted that in PCB design, due to the differences in the functions and importance of different components in the circuit, for example, some components (such as clock sources, power supply, signal processing chips) are directly important to the performance of the circuit and need to be placed in the best position to reduce electromagnetic interference, signal crosstalk and delay. In addition, between different modules of the circuit, some key components in the signal transmission process may be affected by the PCB circuit layout, which may cause unstable signal transmission, leading to system failure or performance degradation. Therefore, it is necessary to analyze the importance of components in different functional modules in the circuit, which will help optimize the overall performance of the circuit, reduce noise interference and improve signal integrity, thereby improving the reliability of the circuit.

[0030] Specifically, in step S201, the importance of components to different modules is calculated according to the distribution of components in different modules in the circuit schematic.

[0031] By determining the highest priority components in different modules in the circuit schematic, and using them as the layout core of the module on the PCB board, the layout process is simplified and the overall layout is changed into a local layout. First, it is necessary to analyze and obtain the layout priority of components in different modules. The specific steps are as follows: First, all modules in the circuit schematic and the components contained in each module are obtained, and the importance of the components to any module is calculated according to the frequency of the components appearing in the module.

[0032] As an embodiment, a specific method for calculating the importance of components to a module is as follows: ,in, Indicates For the following components The importance of modules Indicates The module contains The number of components of the class, Indicates The total number of components of this type in the circuit schematic, Indicates the number of all modules in the circuit schematic. Indicates that the circuit diagram contains The number of modules of the component class, Represents the logarithmic function with the natural constant 10 as the base.

[0033] It should be noted that, since a circuit schematic diagram usually contains a large number of different types of components, the fewer the number of a type of component in the overall circuit and the higher the proportion in a certain module, the more important it is to the module. Therefore, in the calculation method of the importance of components to the module in this embodiment, the inverse module frequency is used to calculate the importance of the components to the module. Reflects the circuit diagram contains The frequency of occurrence of component-like modules in the circuit; Reflects the Module The frequency of occurrence of similar components, thus obtaining To indicate the importance of corresponding components to different modules.

[0034] Then, the packaging parameters corresponding to the packaging of each component in the circuit schematic are obtained, and the number of pins and the size of each component are determined according to the packaging parameters.

[0035] It should be noted that, generally speaking, the more pins a component has, the more important its role in the module is, that is, the component may be able to connect other components.

[0036] It should be noted that the larger the component, the greater the impact on other components will be due to the larger area it will occupy on the PCB board during layout.

[0037] Finally, according to the importance of the components to the module, the number of pins and the size, the layout priority of the components is calculated. According to the size of the layout priority of the components, the components with the highest layout priority are screened out and recorded as target components.

[0038] As an embodiment, a specific method for calculating the layout priority of components is as follows: ,in, Indicates The layout priority of each component, Indicates For the following components The importance of modules represents the normalization function, Indicates The number of pins of a component, Indicates The size of a component.

[0039] It should be noted that the layout priority reflects the importance of the corresponding components in the entire circuit during the layout and the degree of influence on the subsequent layout during the PCB layout and routing design process. It reflects the degree of influence of the packaging characteristics of components on other components. The greater the importance and influence of the component, the higher the priority of the component in the PCB layout and routing process.

[0040] Step S202, obtaining the layout area ratio of any module on the PCB board according to the number and volume of components in the module, and obtaining the correlation coefficient between the modules according to the connection relationship between the modules in the circuit schematic.

[0041] It should be noted that after determining the layout core of different modules, it is necessary to determine their positions on the PCB board. At this time, it is necessary to combine the volume of components in different modules and the functional relationship between modules to determine the approximate layout of the modules.

[0042] The specific steps are as follows: First, the number of components contained in any module in the circuit schematic and the proportion of the volume of the components in the entire circuit schematic are used as the layout area proportion of the module on the PCB board.

[0043] As an embodiment, a specific method for calculating the layout area ratio of the module on the PCB board is as follows: ,in, Indicates The layout area of ​​each module on the PCB board accounts for Indicates The number of components contained in each module, Indicates The total volume of all components contained in a module is Indicates the number of all modules in the circuit schematic.

[0044] Then, preset the positions of the core module of the circuit and the power module on the PCB board.

[0045] It should be noted that, in most cases, the core module of the circuit is usually set at the center of the PCB board, and the power module is usually set at the edge of the PCB board, but it can also be set manually by the operator.

[0046] Finally, the ratio of the number of connection lines between any two modules in the same cluster to the total number of connection lines between all modules in the same cluster is obtained as the correlation coefficient between the two modules.

[0047] As an embodiment, the connection relationship of different modules in the circuit schematic is analyzed and the correlation coefficient between the modules is calculated, and the specific steps include: using the DBSCAN clustering algorithm and clustering all modules according to the rated voltage corresponding to each module to obtain a number of clusters, and based on the proportion of the number of connecting lines between any two modules in the cluster to the total number of all connecting lines in the cluster, obtaining the correlation coefficient between the two modules.

[0048] It should be noted that since all modules in the circuit need to be connected to the power supply, but the rated voltages of different modules may be different, it is necessary to ensure that the voltage meets the rated voltage during the layout process. Therefore, when performing layout analysis on all modules, modules with the same or similar rated voltages should be analyzed. Therefore, this embodiment chooses to cluster the modules in the circuit schematic according to the differences in rated voltages between the modules.

[0049] As an embodiment, the specific calculation method of the correlation coefficient between any two modules in the cluster is: ,in, Indicates the first Module No. The correlation coefficient between modules is Represents the total number of connecting lines between all modules in the same cluster; Indicates the first Modules and The number of connecting lines between modules.

[0050] It should be noted that the connection lines include signal connection, control connection, data connection, feedback connection, communication interface, clock and synchronization connection, and ground connection and other connection modes.

[0051] Step S203, taking each cluster as a layout area, obtaining the area size of the layout area through the size of the PCB board and the layout area ratio of the module, and performing PCB layout design in combination with the size of the correlation coefficient between the modules and the layout priority of the components.

[0052] According to the size of the PCB board and the layout area proportion of the modules in each cluster, the area size of the corresponding layout area is calculated, and the average correlation coefficient between any module in the cluster and all other modules in the cluster is obtained. The module with the largest average correlation coefficient is taken as the central module and placed at the center of the corresponding layout area. The layout is performed in descending order of the correlation coefficients between other modules in the cluster and the central module. During the layout process, the components at the center of each module are the components with the highest layout priority in the module.

[0053] As an embodiment, the specific calculation method of the area size of the layout area is: ,in, Indicates The size of the layout area corresponding to each cluster. Indicates The number of modules contained in the clusters, Indicates the size of the PCB board.

[0054] It should be noted that, since different circuits implement different functions, the scales of the corresponding modules are different under the premise of different functions, that is, the number of components included is different. By obtaining the area size of the layout area corresponding to each cluster, the area division effect of the PCB board in the PBC layout process is effectively improved.

[0055] So far, the layout area and the central module in the layout area are obtained through the above method.

[0056] Step S003: During the layout design process, the components in the module are divided into several priority categories according to their layout priorities, the layout priorities of the components are modified in combination with the occurrence frequencies of the components, and the components in the priority categories are laid out and routed one by one.

[0057] It should be noted that the embodiments of the present invention take into account that when laying out the components in the module one by one, the components that appear more frequently are laid out first, which can improve the maintainability and aesthetics of the layout and simplify the difficulty of subsequent wiring.

[0058] Specifically, first, during the layout design process, the components are divided into several categories recorded as priority categories according to the layout priorities of the components in any module. The layout priorities of all components in each priority category belong to a corresponding minimum integer interval, and the minimum integer interval is a closed interval formed by integers of adjacent sizes.

[0059] Then, the average layout priority of all components in each priority class is obtained, and the priority class with the current undetermined position and the highest average layout priority is obtained, which is recorded as the target priority class; according to the frequency of occurrence of each component in the target priority class, the layout priority of the components is corrected; according to the corrected layout priority of the components in the target priority class, the neural network algorithm is combined to perform layout one by one, and different components are connected according to the connection relationship between the components in the gate-level netlist to obtain the PCB layout and routing results.

[0060] As an embodiment, the training process of the neural network includes: obtaining several different types of components and the corrected layout priority and importance of each component, each component and the corresponding corrected layout priority and importance constitute a component data, the layout position of each component is used as a label of the corresponding component by manual annotation, and the component data with labels constitute a sample, and a large number of samples form a data set for training the neural network, and the data set is divided into a training set, a validation set, and a test set in a ratio of 6:3:1. A recurrent neural network (RNN) is trained with the training set, the validation set, and the test set, and a cross entropy loss function is used as the loss function of the recurrent neural network during the training process to obtain a trained recurrent neural network for component layout.

[0061] As an embodiment, a specific method for calculating the modified layout priority of the components is as follows: ,in, Indicates The corrected placement priority of components, Indicates The layout priority of each component, Indicates The frequency of occurrence of components in the target priority class, Represents the normalization function.

[0062] At this point, the PCB layout and routing results are obtained through the above method.

[0063] Step S004: Use a PCB design tool to perform layout and routing rule check on the PCB layout and routing results.

[0064] It should be noted that, through the above steps, the layout and routing on the PCB board is completed, and then the layout and routing results are further checked to ensure that the layout and routing results of the PCB board comply with the rules and can be used normally.

[0065] Specifically, use PCB design tools to check whether the PCB design complies with manufacturing and electrical rules: perform signal integrity and power integrity analysis on the PCB design to ensure that the circuit works normally under high speed or high power conditions; perform electromagnetic compatibility analysis to ensure that the PCB design meets electromagnetic interference and anti-interference requirements; after completing the above inspection steps, readjust unreasonable places according to the inspection results until all problems are solved; finally, send the manufacturing files of the PCB board to the manufacturer for production.

[0066] Through the above steps, the PCB layout and wiring design is completed.

[0067] In one embodiment of the present invention, an electronic device is also provided, the electronic device comprising a processor and a memory, the processor being used to execute a computer program stored in the memory to implement the steps in the PCB layout and wiring design method.

[0068] It should be noted that the processor can also be called a central processing unit (Central Processing Unit). The processor is an integrated circuit chip with signal processing capabilities. It can also be a general-purpose processor, a digital signal processor (Digital Signal Processor, DSP), an application-specific integrated circuit (Application Specific Integrated Circuit, ASIC) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components. The general-purpose processor can be a microprocessor or the processor can also be any conventional processor, etc.

[0069] Based on the same concept, the present application also proposes a computer-readable storage medium, in which a computer program is stored. The computer program is used to implement the steps in the above-mentioned PCB layout and wiring design method.

[0070] It should be noted that computer-readable storage media include: USB flash drives, mobile hard disks, read-only memories (ROM), random access memories (RAM), magnetic disks or optical disks, and other media that can store program codes.

[0071] This embodiment takes into account the importance of components, layout priorities, packaging parameters and other aspects, so that components can be reasonably laid out according to their functions, frequencies, volumes and other characteristics during the design process. And by considering the frequency characteristics of components in each type of layout priority to correct the layout priority, it is helpful to improve the wiring efficiency and accuracy of the PCB board, reduce redundancy in layout design, optimize space use, and avoid unnecessary space waste. In addition, by dividing the modules in the circuit schematic according to the connection relationship and calculating the correlation coefficient between the modules, the method can effectively organize and optimize the layout of each module. The design of clustering helps to optimize the layout according to the close relationship between different modules, reduce unnecessary cross wiring between modules, reduce the space consumption of the circuit board, and effectively improve the reliability of the circuit. In general, the PCB layout and wiring design method provided by the embodiment of the present invention can improve the design efficiency, quality, scalability and reliability of PCB layout and wiring, especially in the design of complex systems.

[0072] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A PCB layout design method, characterized in that: The method comprises the following steps: Obtain the circuit schematics containing several modules, the corresponding gate-level netlist, and the packaging parameters of the components in each module, and set the layout and routing rules of the PCB board; Obtain the importance and layout priority of any component for different modules, obtain the layout area ratio of the module on the PCB board according to the number and volume of components in any module, obtain the correlation coefficient between modules according to the connection relationship between modules in the circuit schematic, take each cluster as a layout area, obtain the area size of the layout area according to the size of the PCB board and the layout area ratio of the module, and perform PCB layout design in combination with the size of the correlation coefficient between modules and the layout priority of components; During the layout design process, the components are divided into several priority categories according to their layout priorities in the module, and the layout priorities of the components are corrected based on their occurrence frequencies, and the components in the priority categories are laid out and routed one by one; Use PCB design tools to check the layout and routing rules of the PCB layout and routing results.

2. A PCB layout design method according to claim 1, characterized in that: The specific method of obtaining the importance and layout priority of any component to different modules includes: Get all modules in the circuit schematic and the components contained in each module, and calculate the importance of components to any module based on the frequency of components appearing in the module; Obtain the packaging parameters corresponding to the packaging of each component in the circuit schematic, and determine the number of pins and volume of each component according to the packaging parameters; Calculate the layout priority of components based on their importance to the module, number of pins, and size.

3. A PCB layout design method according to claim 2, characterized in that: The specific calculation method of the importance of the components to any module is: ,in, Indicates For the following components The importance of modules Indicates The module contains The number of components of the class, Indicates The total number of components of this type in the circuit schematic, Indicates the number of all modules in the circuit schematic. Indicates that the circuit diagram contains The number of modules of the component class, Represents the logarithmic function with the natural constant 10 as the base.

4. A PCB layout design method according to claim 1, characterized in that: The specific method for obtaining the layout area ratio of the module on the PCB board is as follows: The number of components contained in any module in the circuit schematic and the proportion of the volume of the components in the entire circuit schematic are used as the layout area proportion of the module on the PCB board.

5. A PCB layout design method according to claim 1, characterized in that: The method of obtaining the correlation coefficient between the modules according to the connection relationship between the modules in the circuit schematic diagram includes the following specific methods: The ratio of the number of connection lines between any two modules in the same cluster to the total number of connection lines between all modules in the same cluster is obtained as the correlation coefficient between the two modules.

6. A PCB layout design method according to claim 1, characterized in that: The components are divided into several priority categories according to the layout priorities of the components in the module, including the following specific methods: During the layout design process, the components are divided into several categories recorded as priority categories according to the layout priorities of the components in any module. The layout priorities of all components in each priority category belong to a corresponding minimum integer interval, and the minimum integer interval is a closed interval formed by integers of adjacent sizes.

7. A PCB layout design method according to claim 1, characterized in that: The method of modifying the layout priority of components based on the occurrence frequency of components and performing layout and routing on the components in the priority category one by one includes the following specific methods: Get the target priority class, and modify the layout priority of the components according to the frequency of occurrence of each component in the target priority class; according to the modified layout priority of the components in the target priority class, combine the neural network algorithm to perform layout one by one, and connect different components according to the connection relationship between the components in the gate-level netlist to obtain the PCB layout and routing results.

8. A PCB layout design method according to claim 7, characterized in that: The specific method for obtaining the target priority class is: Get the average layout priority of all components in each priority class, get the priority class with the highest average layout priority and currently undetermined position, and record it as the target priority class.

9. An electronic device, comprising a processor and a memory, characterized in that: The processor is used to execute the computer program stored in the memory to implement the steps in the PCB layout and wiring design method as described in any one of claims 1 to 8.

10. A computer-readable storage medium, wherein a computer program is stored in the storage medium, characterized in that: When the computer program runs on an electronic device, the electronic device executes the steps in a PCB layout and wiring design method as described in any one of claims 1 to 8.

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