Wafer slide, wafer slide preparation method and wafer processing method

Abstract

The invention belongs to the technical field of semiconductors, and particularly relates to a wafer slide, a wafer slide preparation method and a wafer processing method, and the wafer slide comprises a slide body which is provided with a first surface and a second surface which are oppositely arranged; the at least one first conductive part is arranged in the slide glass body in a penetrating mode in the opposite direction of the first surface and the second surface, and the position of each first conductive part corresponds to the position of a grounding pin in the electrostatic adsorption disc. When the wafer slide provided by the invention is applied to an electrostatic adsorption process flow of a wafer, the wafer slide comprises at least one first conductive part, so that the charge polarizability of the contact surface of the wafer slide and an electrostatic adsorption disc can be increased, and the attaching force of electrostatic adsorption can be improved; and when a high-voltage power supply acting on the electrostatic adsorption disc is removed, the contact area between the wafer and the conductive material is increased, so that the release efficiency of charges on the surface of the wafer can be improved, and the problem of adhesion is prevented.

Description

Technical Field

[0001] The present disclosure belongs to the field of semiconductor technology, and specifically relates to a wafer carrier, a wafer carrier preparation method and a wafer processing method. Background Art

[0002] In the manufacture of semiconductor devices, the processing of wafers includes processes such as photolithography, etching, ion implantation, metal deposition and packaging. Among these processes, it is usually necessary to fix the wafer on an electrostatic adsorption plate in a reaction chamber for processing.

[0003] Electrostatic Chuck (ESC or E-Chuck) is a chuck structure that uses electrostatic force to fix the wafer. The specific adsorption principle is: when the electrodes of the ESC are connected to a high-voltage power supply, polarized charges will be generated on the surface of the dielectric. The polarized charges distributed on the back of the wafer are opposite in polarity to the polarized charges distributed on the chuck. The wafer is fixed on the ESC by electrostatic adsorption. In addition, the high-voltage power supply acting on the ESC electrodes is turned off to release the wafer fixed on the ESC.

[0004] When the wafer is placed on the ESC for ion implantation, the doped ions are usually positive ions, which make the wafer positively charged. When the high-voltage power supply acting on the ESC electrode is turned off to release the wafer, the grounding pin introduces electrons from the earth to the wafer to neutralize the positive charge on the wafer surface. Since the charge on the wafer surface is released slowly, the charge remaining on the wafer surface will cause a certain electrostatic force between the wafer and the ESC. If the wafer is lifted by the lifting pins on the ESC or taken away by the robotic arm at this time, the residual electrostatic force will cause the wafer to adhere to the ESC, resulting in failure to take the wafer or the problem of slipping.

[0005] It can be seen that how to improve the charge release efficiency on the wafer surface during electrostatic adsorption is a problem that needs to be solved urgently. Summary of the invention

[0006] The present application provides a wafer carrier, a wafer carrier preparation method and a wafer processing method, which solves the problem of low charge release efficiency on the wafer surface during electrostatic adsorption in the prior art. By bonding the wafer and the wafer carrier into a bonding body and then placing it on an electrostatic adsorption plate for subsequent processing, the charge release rate on the wafer surface can be improved, and the adsorption force between the electrostatic adsorption plate and the bonding body can also be enhanced.

[0007] In a first aspect, the present application provides a wafer carrier for electrostatic adsorption of wafers, the carrier comprising: a carrier body, the carrier body having a first surface and a second surface arranged opposite to each other, the first surface being used for bonding with the wafer, and the second surface being used for being adsorbed by an electrostatic adsorption disk; at least one first conductive component being arranged in the carrier body along the relative direction of the first surface and the second surface, and the position of each first conductive component corresponds to the position of a grounding pin in the electrostatic adsorption disk.

[0008] Optionally, the carrier also includes: at least one second conductive component, arranged on the first surface of the carrier body, the second conductive component having a first end and a second end arranged opposite to each other, and the first end of the second conductive component is connected to one end of any one of the first conductive components.

[0009] Optionally, a plurality of the second conductive components are provided, and the second ends of any second conductive components are spaced apart from each other.

[0010] Optionally, the carrier further includes: a third conductive component, which is annularly arranged on the first surface of the carrier body and connected to at least one of the second conductive components.

[0011] Optionally, the third conductive component is annularly arranged at an edge of the first surface and connected to the second end of each of the second conductive components.

[0012] Optionally, a side of the second conductive component away from the second surface is flush with the first surface; or / and a side of the third conductive component away from the second surface is flush with the first surface.

[0013] Optionally, the conductive material of the first conductive component includes: at least one of tungsten carbide and graphite; or / and, the conductive material of the second conductive component includes: at least one of tungsten carbide and graphite; or / and, the conductive material of the third conductive component includes: at least one of tungsten carbide and graphite.

[0014] Optionally, the wafer carrier body is any one of a silicon wafer, a glass wafer, an organic substrate and a ceramic substrate.

[0015] In a second aspect, the present application provides a method for preparing a wafer carrier, the preparation method comprising: providing a carrier body, the carrier body having a first surface and a second surface arranged opposite to each other, the first surface being used for bonding with the wafer, and the second surface being used for being adsorbed by an electrostatic adsorption disk; according to the position of a grounding pin in the electrostatic adsorption disk, making at least one through hole on the carrier body that penetrates the carrier body in the relative direction of the first surface and the second surface; embedding a conductive material in the through hole to obtain a first conductive component; wherein the first conductive component has a first end and a second end arranged opposite to each other, the first end of the first conductive component is flush with the first surface, and the second end of the first conductive component is flush with the second surface.

[0016] Optionally, after making at least one through hole on the carrier body that passes through the carrier body in the relative direction between the first surface and the second surface, the preparation method further includes: making at least one groove on the first surface of the carrier body according to the position of the at least one through hole, so that one end of each groove is connected to the first end of any through hole.

[0017] Optionally, after making at least one groove on the first surface of the carrier body, the preparation method further includes: making an annular opening groove on the first surface of the carrier body according to the position of the at least one groove, so that the annular opening groove is connected to the at least one groove.

[0018] Optionally, after embedding the conductive material in the at least one through hole, the preparation method further comprises: embedding the conductive material in the groove to obtain a second conductive component; or embedding the conductive material in the groove and the annular opening groove to obtain a second conductive component and a third conductive component.

[0019] In a third aspect, the present application provides a wafer processing method, the method comprising: providing a wafer and a wafer carrier, covering the front side of the wafer with a protective film, and coating an adhesive on the first surface of the wafer carrier; wherein the front side of the wafer has a pattern; flipping the wafer, and bonding the front side of the wafer to the first surface of the wafer carrier; placing the second surface of the wafer carrier on an electrostatic adsorption disk, and performing a preset process on the back side of the wafer after electrostatic adsorption; after completing the preset process, debonding the front side of the wafer from the first surface of the wafer carrier.

[0020] In a fourth aspect, the present application provides a wafer processing method, the method comprising: providing a wafer and a wafer carrier; covering the front side of the wafer with a protective film for the first time, and coating an adhesive on the first surface of the wafer carrier; wherein the front side of the wafer has a pattern; bonding the back side of the wafer to the first surface of the wafer carrier; after removing the protective film on the front side of the wafer, performing a preset process on the front side of the wafer; after completing the preset process, covering the front side of the wafer with a protective film for a second time; debonding the back side of the wafer from the first surface of the wafer carrier, and removing the photoresist on the front side of the wafer.

[0021] The technical solution provided by this application has at least the following beneficial effects:

[0022] By applying the wafer carrier of the present application to the electrostatic adsorption process flow of the wafer, one end of at least one first conductive component is in contact with the wafer, which can increase the charge polarization rate of the contact surface between the wafer carrier and the electrostatic adsorption disk, thereby improving the electrostatic adsorption adhesion; and when the high-voltage power supply acting on the electrostatic adsorption disk is removed, one end of at least one first conductive component is in contact with the wafer, and the other end is in contact with the ground pin, which increases the contact area between the conductive material and the wafer, can improve the release efficiency of the charge on the wafer surface, and prevent adhesion problems. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] The accompanying drawings herein are incorporated into the specification and constitute a part of the specification, illustrate embodiments consistent with the present disclosure, and together with the specification are used to explain the principles of the present disclosure. Obviously, the accompanying drawings described below are only some embodiments of the present disclosure, and for ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without creative work.

[0024] Figure 1 Shown is a schematic structural diagram of a wafer carrier provided in an embodiment of the present application.

[0025] Figure 2 It is a schematic diagram showing the bonding of wafers in the prior art.

[0026] Figure 3 Shown is a schematic diagram of the structure of another wafer carrier provided in an embodiment of the present application.

[0027] Figure 4 Shown is a schematic flow chart of a wafer carrier preparation method provided in an embodiment of the present application.

[0028] Figure 5 Shown is a schematic flow chart of a wafer processing method provided in an embodiment of the present application.

[0029] Figure 6Shown is a schematic diagram of a wafer back side ion implantation process provided in an embodiment of the present application.

[0030] Figure 7 Shown is a flow chart of another wafer processing method provided in an embodiment of the present application.

[0031] Figure 8 Shown is a schematic diagram of a wafer front ion implantation process provided in an embodiment of the present application.

[0032] Fig. 9 Shown Figure 8 Schematic diagram of the process of the first photoresist coating and the second photoresist coating steps.

[0033] Fig.10 Shown Fig. 9 Schematic diagram of the process of removing the photoresist protective layer formed in the process.

[0034] Description of reference numerals:

[0035] 100, wafer carrier; 110, carrier body; 120, first conductive component; 130, second conductive component; 140, third conductive component;

[0036] 200, wafer; 300, electrostatic adsorption plate; 310, lifting pin;

[0037] 710, bonding body; 720, HDMS layer; 730, photoresist layer. DETAILED DESCRIPTION

[0038] Example embodiments will now be described more fully with reference to the accompanying drawings. However, example embodiments can be implemented in a variety of forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this application will be more comprehensive and complete and fully convey the concept of the example embodiments to those skilled in the art.

[0039] In addition, described feature, structure or characteristic can be combined in one or more embodiments in any suitable manner. In the following description, many specific details are provided to provide a full understanding of the embodiments of the present application. However, those skilled in the art will appreciate that the technical scheme of the present application can be put into practice without one or more of the specific details, or other methods, components, devices, steps, etc. can be adopted. In other cases, known methods, devices, realizations or operations are not shown or described in detail to avoid blurring the various aspects of the application.

[0040] The present application is further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be noted that the technical features involved in the various embodiments of the present application described below can be combined with each other as long as they do not conflict with each other. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to be used to explain the present application, and should not be understood as limiting the present application.

[0041] In a first aspect, the present application provides a wafer carrier, specifically including the following embodiments:

[0042] Figure 1 FIG. 1 is a schematic diagram of the structure of a wafer carrier provided in an embodiment of the present application; Figure 1 As shown, the wafer carrier 100 specifically includes:

[0043] A wafer carrier body 110, wherein the wafer carrier body 110 has a first surface and a second surface disposed opposite to each other, wherein the first surface is used for bonding with the wafer, and the second surface is used for being adsorbed by the electrostatic adsorption plate;

[0044] At least one first conductive component 120 is disposed in the wafer carrier body 110 along the relative direction between the first surface and the second surface, and the position of each first conductive component 120 corresponds to the position of the grounding pin in the electrostatic adsorption disk.

[0045] The wafer carrier 100 in this embodiment is used for electrostatic adsorption of wafers, and is used to provide support for wafers (especially thin wafers or thinned wafers), so that the overall thickness of the wafer meets the process requirements while preventing the wafer from being deformed during electrostatic adsorption; in the usage scenario of the wafer carrier 100, the first surface of the wafer carrier 100 (i.e., the first surface of the carrier body 110) is attached (or bonded) to the wafer, and the second surface of the wafer carrier 100 (i.e., the second surface of the carrier body 110) is adsorbed by the electrostatic adsorption disk; wherein, the carrier body 110 can be a silicon wafer, a glass carrier, an organic substrate or a ceramic substrate, but is not limited thereto.

[0046] In this embodiment, at least one first conductive component 120 is disposed in the wafer carrier body 110 along the relative direction of the first surface and the second surface, and the location of each first conductive component 120 corresponds to the location of the grounding pin in the electrostatic adsorption disk, so that the grounding pin can contact the corresponding first conductive component 120; the first conductive component 120 can be a solid conductive column or a conductive column with a hollow interior; the cross-sectional shape of the first conductive component 120 can be circular, elliptical, triangular, quadrilateral or any polygon, but not limited thereto; wherein the conductive material of the first conductive component 120 includes: at least one of tungsten carbide and graphite. The first conductive component 120 is disposed in the wafer carrier body 110, which can be understood as the first conductive component 120 being embedded in the wafer carrier body 110, and the two ends of the first conductive component 120 are respectively flush with the two surfaces of the wafer carrier body 110.

[0047] In this embodiment, the number of the first conductive components 120 is not limited, and can match the number of the grounding pins one-to-one (ie, one first conductive component 120 corresponds to one grounding pin), or can be less than or greater than the number of the grounding pins.

[0048] In the prior art, the wafer preparation process involves doping ions, usually positive ions, through ion implantation or diffusion implantation. The wafer is placed on an electrostatic adsorption disk of a semiconductor machine, and the electrostatic adsorption disk includes at least one ground pin, which contacts the wafer on the electrostatic adsorption disk. When the high-voltage power supply acting on the electrostatic adsorption disk is removed, at least one ground pin imports electrons from the earth to neutralize the positive charge in the wafer. However, during the charge release process of the wafer, due to the low charge release efficiency on the surface of the wafer, the residual charge will cause a certain electrostatic force between the wafer and the ESC. If the wafer is lifted by the lifting pins on the ESC or the wafer is taken away by a robotic arm, the residual electrostatic force will cause a certain part of the wafer to adhere to the ESC, resulting in wafer retrieval failure or wafer slippage, which may damage the wafer. Figure 2 As shown, 2a is a schematic diagram of the lifting pins 310 on the electrostatic adsorption plate 300 before lifting the wafer 200, and 2b is a schematic diagram of the residual electrostatic force after the lifting pins 310 on the electrostatic adsorption plate 300 lifts the wafer 200, causing point A of the wafer 200 to stick to the electrostatic adsorption plate 300. This will cause the robot arm to fail to pick up the wafer, or even cause the wafer to slip and damage the wafer, thereby reducing the production yield of the wafer.

[0049] In the application scenario of the present embodiment, the wafer carrier of the present embodiment is bonded to a wafer with a certain conductivity (conductive due to ion doping) and then placed on an electrostatic adsorption disk for electrostatic adsorption. The wafer carrier has at least one first conductive component. The presence of the conductive material can promote charge polarization. Therefore, the charge polarization rate of the contact surface between the wafer carrier and the ESC can be increased, thereby improving the adhesion of the electrostatic adsorption. Furthermore, when the high-voltage power supply acting on the ESC is removed, one end of at least one first conductive component contacts the wafer, and the other end contacts the grounding pin. Compared with the contact area between the grounding pin and the wafer, the contact area between the first conductive component and the wafer is greatly increased, which can improve the release efficiency of the charge on the wafer surface and prevent adhesion problems.

[0050] In another embodiment of the present application, Figure 1 As shown, the wafer carrier 100 further includes:

[0051] At least one second conductive component 130 is disposed on the first surface of the wafer carrier body 110. The second conductive component 130 has a first end and a second end that are oppositely disposed. The first end of the second conductive component is connected to one end of any one of the first conductive components.

[0052] It should be noted that the number of the second conductive components 130 is not limited, and can correspond to the number of the first conductive components 120, or be less than or greater than the number of the first conductive components 120; in addition, the shape of the second conductive components 130 is not limited, and can be any one or a combination of rectangular, square, arc or curved shapes.

[0053] In this embodiment, the first end of each second conductive component 130 is connected to one end of any first conductive component 120 in the following manner: the first end of a second conductive component 130 is connected to one first conductive component 120 (eg, Figure 1 As shown in the figure), the first ends of two or more second conductive components 130 may be connected to one first conductive component 120 (not shown in the figure).

[0054] like Figure 1 As shown, there are multiple second conductive components 130, and the second ends of any second conductive components are spaced apart from each other; that is, the first ends of any two or more second conductive components can be connected to the same first conductive component, but the second ends of any two or more second conductive components are not connected to each other to prevent them from forming a closed loop, in order to distinguish the structure from the subsequent third conductive component 140.

[0055] In this embodiment, the purpose of setting the second conductive component 130 on the first surface of the wafer carrier body 110 is: 1. To increase the content of conductive material in the wafer carrier, thereby increasing the charge polarization rate of the contact surface between the wafer carrier and the ESC, and improving the adhesion of electrostatic adsorption; 2. To increase the contact area between the conductive material and the wafer surface, which can further improve the charge release efficiency of the wafer surface.

[0056] In another embodiment of the present application, Figure 1 As shown, the slide also includes:

[0057] The third conductive component 140 is annularly disposed on the first surface of the wafer carrier body 110 and is connected to at least one second conductive component 130 .

[0058] It should be noted that the third conductive component 140 is in a ring shape and can be disposed at the edge of the first surface (eg Figure 1 ), or may be disposed at any position between the first conductive component 120 and the edge (such as Figure 3 The annular arrangement may be a circle, a square or other irregular closed shapes.

[0059] In one embodiment, the third conductive component 140 disposed on the edge of the first surface can also extend along the side of the carrier body toward the second surface, so that the third conductive component 140 completely wraps the side of the carrier body; therefore, the third conductive component 140 can be a conductive component disposed on the edge of the first surface, or can include a conductive component disposed on the edge of the first surface and a conductive component disposed on the side of the carrier body, or can include a conductive component disposed on the edge of the first surface, a conductive component disposed on the side of the carrier body, and a conductive component disposed on the edge of the second surface.

[0060] In this embodiment, the third conductive component 140 is connected to at least one second conductive component 130 in the following manner: the third conductive component 140 is connected to the second ends of all the second conductive components 130 (eg Figure 1 As shown); the third conductive component 140 may intersect with all the third conductive components 140; or the third conductive component 140 may be connected to the second end of a portion of the second conductive component 130 and intersect with another portion of the second conductive component 130 (as shown Figure 3 as shown), and various combinations of various connection methods.

[0061] In one embodiment of the present application, the second conductive component 130 may protrude from the first surface of the wafer carrier body 110; or the side of the second conductive component 130 away from the second surface may be flush with the first surface, that is, the second conductive component 130 is completely embedded in the first surface and is on the same horizontal line as the first surface.

[0062] In addition, the third conductive component 140 can protrude from the first surface of the carrier body 110; or the side of the third conductive component 140 away from the second surface can be flush with the first surface, that is, the third conductive component 140 is completely embedded in the first surface and is on the same horizontal line as the first surface.

[0063] The purpose of the third conductive component 140 being arranged in an annular shape on the first surface of the wafer carrier body 110 in this embodiment is to further expand the contact area between the conductive component and the wafer. A conductive component is arranged in an annular shape on the first surface of the wafer carrier, and the annular conductive component is connected to at least one first conductive component 120 through at least one second conductive component 130, thereby expanding the charge movement path and improving the charge release rate on the wafer surface. At the same time, the content of the conductive material in the wafer carrier is further increased, thereby increasing the charge polarization rate of the contact surface between the wafer carrier and the ESC, and improving the adhesion of the electrostatic adsorption.

[0064] In the present embodiment, the conductive material of the first conductive component 120, the conductive material of the second conductive component 130 and the conductive material of the third conductive component 140 include but are not limited to tungsten carbide or graphite; tungsten carbide is preferred; and the purpose of preferring tungsten carbide is: to be the same material as the lift pin in the electrostatic adsorption disk to prevent problems such as metal contamination.

[0065] The thickness of the wafer carrier body 110 ranges from 100 μm to 750 μm. The thickness of the wafer carrier body 110 is determined according to the thickness of the wafer bonded thereto and / or the process requirements; for example, if the process requires the overall thickness of the wafer to be 850 μm and the current wafer thickness is 100 μm, then the thickness of the wafer carrier body 110 is 750 μm.

[0066] In a second aspect, the present application provides a method for preparing a wafer carrier, which specifically includes the following embodiments:

[0067] Figure 4 FIG. 1 is a schematic diagram of a process for preparing a wafer carrier provided in an embodiment of the present application. Figure 4 As shown, the preparation method specifically comprises the following steps:

[0068] Step S101, providing a wafer carrier body, wherein the wafer carrier body has a first surface and a second surface that are arranged opposite to each other, wherein the first surface is used for bonding with a wafer, and the second surface is used for being adsorbed by an electrostatic adsorption plate.

[0069] It should be noted that a wafer carrier body of the same size as the wafer is provided. The wafer carrier body may be, but is not limited to, a silicon wafer, a glass wafer, an organic substrate or a ceramic substrate. In this embodiment, quartz glass with a thickness of 670 μm is taken as an example. The glass surface needs to be frosted to increase the adhesion of the wafer.

[0070] Step S102: According to the position of the grounding pin in the electrostatic adsorption disk, at least one through hole is made on the wafer carrier body, which passes through the wafer carrier body along the relative direction between the first surface and the second surface.

[0071] It should be noted that according to the position of the grounding pin in the electrostatic adsorption disk, at least one target position is positioned on the first surface of the carrier body, and a hole is punched from the first surface along the relative direction of the second surface in the at least one target position to obtain at least one through hole, wherein the cross-sectional shape of the through hole can be circular, elliptical, triangular, quadrilateral or any polygon; in this embodiment, taking the circle as an example, the hole diameter includes 1mm to 6mm, optionally 1mm, 2mm, 4mm and 6mm.

[0072] In this embodiment, according to the position of the grounding pins in the electrostatic adsorption disk, the method for locating at least one target position on the first surface of the carrier body can specifically include: obtaining the target center and target radius of the circle formed by all the grounding pins, so that all the grounding pins are on the circle; and taking a point on the circle where one of the grounding pins is located as the target point, and taking the line connecting the center of the circle and the target point as the horizontal line, and obtaining the target angle between the lines connecting other grounding pins to the center of the circle and the horizontal line; coinciding the positioning center of the carrier body with the target center of the circle, drawing a circle in the carrier body with the target radius, and taking the point on the same horizontal line with the positioning center as a target position, and obtaining other target positions according to the target angle.

[0073] Step S103, embedding a conductive material in the through hole to obtain a first conductive component; wherein the first conductive component has a first end and a second end that are oppositely arranged, the first end of the first conductive component is flush with the first surface, and the second end of the first conductive component is flush with the second surface.

[0074] It should be noted that conductive material can be embedded in each through hole by electroplating or deposition, so that the conductive material in the through hole forms a first conductive component, and the first end of the first conductive component is flush with the first surface of the carrier body, and the second end of the first conductive component is flush with the second surface of the carrier body, thereby obtaining a wafer carrier including at least one first conductive component.

[0075] In another embodiment of the present application, after making at least one through hole on the carrier body that passes through the carrier body in the relative directions of the first surface and the second surface, the preparation method further includes: making at least one groove on the first surface of the carrier body according to the position of the at least one through hole, so that one end of each groove is connected to the first end of any through hole.

[0076] It should be noted that the first surface of the carrier body is grooved according to the position of at least one through hole to position one end of at least one groove, so that one end of at least one groove can be connected to at least one through hole. As for the number and shape of the grooves, this embodiment does not make any specific limitation.

[0077] The purpose of making at least one groove on the first surface of the carrier body is to make the second conductive component obtained by plating conductive material in the groove flush with the first surface on the side away from the second surface, that is, the second conductive component and the first surface are on the same horizontal line, thereby not affecting the flatness of the first surface, so that the obtained wafer carrier and wafer can be closely fitted.

[0078] Furthermore, conductive material can be embedded in the at least one through hole and the at least one groove by electroplating or deposition, so that the conductive material in the through hole forms a first conductive component and the conductive material in the groove forms a second conductive component, thereby obtaining a wafer carrier including at least one first conductive component and at least one second conductive component.

[0079] In another embodiment of the present application, after making at least one groove on the first surface of the carrier body, the preparation method further includes: making an annular opening groove on the first surface of the carrier body according to the position of the at least one groove, so that the annular opening groove is connected to the at least one groove.

[0080] It should be noted that, in this embodiment, an annular opening groove is made on the first surface of the carrier body according to the position of at least one groove, so that the annular opening groove is connected to at least one groove; then, conductive material is embedded in the at least one through hole, the at least one groove and the annular opening groove, so that the conductive material in the annular opening groove forms a third conductive component, thereby obtaining a wafer carrier including at least one first conductive component, at least one second conductive component and a third conductive component.

[0081] In this embodiment, the annular opening groove may be arranged at the edge of the first surface, or may be arranged at any position between the through hole and the edge; the annular opening groove may be circular, square or other irregular closed shapes.

[0082] In addition, the positional relationship of the annular opening groove in communication with the groove may be that the annular opening groove is in communication with the second end of the groove, or may be in communication with any position between the first end and the second end of the groove.

[0083] In a third aspect, the present application provides a wafer processing method, which specifically includes the following embodiments:

[0084] Figure 5 FIG. 1 is a flow chart of a wafer processing method provided by an embodiment of the present application, such as Figure 5 As shown, the processing method specifically includes the following steps:

[0085] Step S201: provide a wafer and a wafer carrier.

[0086] The wafer carrier in this embodiment is a product obtained by the wafer carrier preparation method provided in the above embodiment.

[0087] Step S202: Cover the front side of the wafer with a protective film, and apply an adhesive to the first surface of the wafer carrier.

[0088] In this embodiment, the wafer has a front side and a back side that are relatively arranged, wherein the front side of the wafer has a pattern; after the front side patterning process of the wafer is completed, a protective film is covered on the front side of the wafer to prevent particle contamination on the front side of the wafer; wherein, the protective film can be a blue film.

[0089] In this embodiment, the wafer carrier has a first surface and a second surface arranged opposite to each other; if the surface of the wafer carrier does not have a second conductive component, any surface can be used as the first surface of the wafer carrier; if one surface of the wafer carrier has a second conductive component, the surface provided with the second conductive component is used as the first surface of the wafer carrier, and an adhesive is coated on the first surface of the wafer carrier, and the thickness of the adhesive is 20μm to 40μm, optionally 20μm, 30μm and 40μm.

[0090] Step S203 , flipping the wafer, and bonding the front side of the wafer to the first surface of the wafer carrier.

[0091] It should be noted that the wafer contacts the grounding pin through the conductive material on the wafer carrier. The electrons introduced from the earth by the grounding pin are neutralized with the positive charge inside the wafer, thereby achieving the purpose of the grounding pin conducting away the charge inside the wafer. Since the coating thickness of the adhesive is very thin (20μm~40μm), it will not actually affect the charge transfer between the conductive material and the wafer, or the impact is extremely small and can be ignored.

[0092] Step S204: placing the second surface of the wafer carrier on an electrostatic adsorption plate, and performing a preset process on the back side of the wafer after electrostatic adsorption.

[0093] In this embodiment, the preset process is a process that requires the use of an electrostatic adsorption disk for processing, including but not limited to one or any combination of wafer thinning, ion implantation or gold wire bonding.

[0094] In one embodiment, Figure 6 As shown, after the wafer front side patterning process is completed, the wafer front side is coated, the wafer front side is bonded to the wafer carrier, and after the second surface of the wafer carrier is placed on the electrostatic adsorption plate, the back side of the wafer is subjected to wafer thinning, wet cleaning, the first back side ion implantation, laser annealing, the second back side ion implantation, back side gold wire bonding, debonding and removal of the wafer carrier, etc.; wherein, the processing flow after the wafer and the wafer carrier are bonded includes but is not limited to Figure 6 The process shown is only described here as an example.

[0095] It should be noted that since the wafer carrier in this embodiment has a first conductive component, a second conductive component and / or a third conductive component in contact with the wafer, the conductive material of the wafer carrier is more conducive to charge polarization, thereby increasing the charge polarization rate of the contact surface between the wafer carrier and the electrostatic adsorption disk, thereby increasing the electrostatic attraction between the wafer bonding body and the electrostatic adsorption disk.

[0096] Step S205: after completing the preset process, debonding the front side of the wafer and the first surface of the wafer carrier.

[0097] It should be noted that after the preset process is completed on the back of the wafer, the high voltage power supply acting on the electrostatic adsorption disk is removed. At the same time, the charge on the surface of the wafer is accelerated to be released to the ground pin through the conductive material on the wafer carrier, thereby improving the charge release efficiency on the surface of the wafer and preventing bonding problems. In addition, when the bonded body of the wafer and the wafer carrier is removed from the electrostatic adsorption disk, the wafer carrier can be debonded to complete the processing of the wafer.

[0098] Figure 7 FIG. 1 is a flow chart of another wafer processing method provided by an embodiment of the present application. Figure 7As shown, the processing method specifically includes the following steps:

[0099] Step S301: provide a wafer and a wafer carrier.

[0100] The wafer carrier in this embodiment is a product obtained by the wafer carrier preparation method provided in the above embodiment.

[0101] Step S302: Cover the front side of the wafer with a protective film for the first time, and apply an adhesive to the first surface of the wafer carrier.

[0102] In this embodiment, the wafer has a front side and a back side that are relatively arranged, and the front side of the wafer has a pattern; when the graphic design process of the front side of the wafer is completed, a protective film is covered on the front side of the wafer for the first time to prevent particle contamination on the front side of the wafer; wherein the protective film covering the front side of the wafer can be a blue film or a coated photoresist.

[0103] In this embodiment, the wafer carrier has a first surface and a second surface arranged opposite to each other; if the surface of the wafer carrier does not have a second conductive component, any surface can be used as the first surface of the wafer carrier; if one surface of the wafer carrier has a second conductive component, the surface provided with the second conductive component is used as the first surface of the wafer carrier, and an adhesive is coated on the first surface of the wafer carrier, and the thickness of the adhesive is 20μm to 40μm, optionally 20μm, 30μm and 40μm.

[0104] Step S303: bonding the back side of the wafer to the first surface of the wafer carrier.

[0105] This embodiment bonds the back side of the wafer to the first surface of the wafer carrier, so that the wafer and the wafer carrier can be closely attached to each other, so that the cleaning solvent in the subsequent process will not penetrate into the interior of the wafer. It is also unnecessary to remove the wafer carrier after an electrostatic adsorption process is completed, and the wafer carrier can be reused in other processes, thereby improving the efficiency of wafer processing.

[0106] Step S304 , after removing the protective film on the front side of the wafer, the front side of the wafer is processed by a preset process.

[0107] The preset process in this embodiment includes at least one of the semiconductor manufacturing processes, including but not limited to photolithography, etching, ion implantation, thin film deposition and cleaning. Figure 8As shown, after the wafer front side patterning process is completed, the wafer front side is coated with photoresist for the first time, the wafer back side is bonded with the wafer carrier and the photoresist is stripped off, and after the second surface of the wafer carrier is placed on the electrostatic adsorption plate, the front side of the wafer is subjected to photolithography process, front side ion implantation, ion activation, cleaning, the second coating of photoresist on the front side of the wafer, debonding and removal of the wafer carrier, and other processes; wherein, the processing flow after the wafer and the wafer carrier are bonded includes but is not limited to Figure 8 The process shown is only described here as an example.

[0108] It should also be noted that if Figure 8 As shown, when the protective film covering the front side of the wafer for the first time is photoresist. After the wafer is bonded to the wafer carrier and before the front side of the wafer is processed by a preset process, the photoresist with protective function applied in this step can be removed, and then the photoresist formally used in the photolithography process can be applied; it should be noted that the photoresists applied in the two steps may differ in coating thickness and photoresist material, and the specific situation may be determined according to the actual process.

[0109] It should be noted that since the wafer carrier in this embodiment has a first conductive component, a second conductive component and / or a third conductive component in contact with the wafer, the content of conductive material in the wafer carrier is increased, and the charge polarization rate of the contact surface between the wafer carrier and the electrostatic adsorption disk is improved, thereby improving the electrostatic attraction between the bonding body and the electrostatic adsorption disk.

[0110] Step S305: After completing the preset process, the front side of the wafer is covered with a protective film for the second time.

[0111] It should also be noted that if Figure 8 As shown, when the protective film coated on the front side of the wafer for the second time is photoresist, the photoresist coated for the second time and the photoresist coated in the photolithography process may differ in coating thickness and photoresist material, and the specific situation may depend on the actual process.

[0112] Step S306: debonding the back side of the wafer from the first surface of the wafer carrier, and removing the protective film on the front side of the wafer.

[0113] It should be noted that after the preset process is completed on the front side of the wafer, the high voltage power supply acting on the electrostatic adsorption disk is removed. At the same time, the charge on the surface of the wafer is accelerated to be released to the ground pin through the conductive material on the wafer carrier, thereby improving the charge release efficiency on the surface of the wafer and preventing bonding problems. In addition, when the bonded body of the wafer and the wafer carrier is removed from the electrostatic adsorption disk, the wafer carrier can be debonded and removed.

[0114] The technical solution provided in this embodiment has at least the following beneficial effects:

[0115] By bonding a wafer carrier having a first conductive component to a wafer, and including at least one first conductive component in the wafer carrier during the electrostatic adsorption process of the wafer, the charge polarization rate of the contact surface between the wafer carrier and the electrostatic adsorption disk can be increased, thereby improving the electrostatic adsorption adhesion; and when the high-voltage power supply acting on the electrostatic adsorption disk is removed, one end of at least one first conductive component contacts the wafer, and the other end contacts the ground pin on the electrostatic adsorption disk, thereby increasing the contact area between the conductive material and the wafer, which can improve the release efficiency of the charge on the wafer surface and prevent adhesion problems.

[0116] Fig. 9 Shown Figure 8 A schematic diagram of the process of applying the photoresist for the first time and the photoresist for the second time, as shown in FIG. Fig. 9 As shown, a photoresist is coated on the front side of the wafer as a protective layer, which specifically includes the following steps:

[0117] (1) Vapor coating: HDMS (hexamethyldisilazane) vapor coating is applied to the bond 710 formed between the wafer and the wafer carrier, thereby forming a HDMS layer 720 on the bond 710, which is used to change the hydrophobic condition of the wafer surface and improve the adhesion of the photoresist on the wafer surface;

[0118] (2) First cooling;

[0119] (3) Spin coating of photoresist: The photoresist is coated on the surface of the wafer by a dynamic coating method, thereby forming a photoresist layer 730 on the HDMS layer 720; the dynamic coating method specifically includes specific process steps such as low-speed rotation (500 rpm), dripping, accelerated rotation (3000 rpm), spinning, and evaporating solvents; a positive photoresist is used, such as the AZ series.

[0120] (4) First baking: This baking is soft baking, which is carried out using a vacuum hot plate at a baking temperature of 85 to 120° C. and a baking time of 30 to 60 seconds.

[0121] (5) Second cooling;

[0122] (6) Second baking: This baking is post-baking and is performed using a common hot plate at a baking temperature of 110-130° C. for 1 minute.

[0123] (7) cooling for the third time;

[0124] (8) The third baking is hard baking, which is carried out using a common hot plate at a baking temperature of 100 to 1300° C. (slightly higher than the glass transition temperature Tg) for 1 to 2 minutes.

[0125] Fig.10 Shown Fig. 9 Schematic diagram of the process of removing the photoresist protective layer formed in Fig.10 As shown, removing the photoresist protection layer specifically includes the following steps:

[0126] (1) Introduction of oxygen and hydrogen into the reaction chamber: Introduction of oxygen O2 and hydrogen H2 into the reaction chamber where the wafer is located;

[0127] (2) Generate oxygen free radicals: A high voltage alternating electric field is added under vacuum conditions to oscillate oxygen O2 and hydrogen H2 into highly active plasma and oxygen free radicals R;

[0128] (3) Oxygen free radical based on photoresist reaction: oxygen free radical R reacts with organic matter in the photoresist to generate volatile substances such as CO2;

[0129] (4) Chamber vacuuming: Volatile substances such as CO2 generated during the reaction are discharged from the chamber through a vacuum pump.

[0130] It should be noted that when removing the photoresist protective layer on the wafer surface, the substrate temperature of the wafer is around 275° C., which can improve the etching efficiency of the photoresist.

[0131] In addition, the terms "first", "second", "third", etc. are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first", "second", "third" may explicitly or implicitly include one or more of the feature. In the description of this application, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0132] In the description of this specification, the description with reference to the terms "some embodiments", "exemplarily", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples, without contradiction.

[0133] Although the embodiments of the present application have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limitations on the present application. Ordinary technicians in this field can change, modify, replace and modify the above embodiments within the scope of the present application. Therefore, any changes or modifications made in accordance with the claims and description of the present application should fall within the scope of the patent of this application.

Claims

1. A wafer carrier, characterized in that: Applied to electrostatic adsorption of wafers, the carrier comprises: A wafer carrier body, the wafer carrier body having a first surface and a second surface arranged opposite to each other, the first surface being used for bonding with the wafer, and the second surface being used for being adsorbed by the electrostatic adsorption plate; At least one first conductive component is disposed in the wafer carrier body along the relative direction between the first surface and the second surface, and the position of each first conductive component corresponds to the position of the grounding pin in the electrostatic adsorption disk.

2. The wafer carrier according to claim 1, characterized in that: The slide also includes: At least one second conductive component is disposed on the first surface of the carrier body, the second conductive component has a first end and a second end that are oppositely disposed, and the first end of the second conductive component is connected to one end of any one of the first conductive components.

3. The wafer carrier according to claim 2, characterized in that: A plurality of the second conductive components are provided, and the second ends of any of the second conductive components are spaced apart from each other.

4. The wafer carrier according to claim 2, characterized in that: The slide also includes: The third conductive component is annularly arranged on the first surface of the carrier body and is connected to at least one of the second conductive components.

5. The wafer carrier according to claim 4, characterized in that: The third conductive component is annularly disposed at the edge of the first surface and connected to the second end of each of the second conductive components.

6. The wafer carrier according to claim 5, characterized in that: A side of the second conductive component away from the second surface is flush with the first surface; Or / and, a surface of the third conductive component away from the second surface is flush with the first surface.

7. The wafer carrier according to claim 4, characterized in that: The conductive material of the first conductive component includes: at least one of tungsten carbide and graphite; Or / and, the conductive material of the second conductive component includes: at least one of tungsten carbide and graphite; Or / and, the conductive material of the third conductive component includes: at least one of tungsten carbide and graphite.

8. The wafer carrier according to any one of claims 1 to 7, characterized in that: The wafer carrier body is any one of a silicon wafer, a glass wafer, an organic substrate and a ceramic substrate.

9. A method for preparing a wafer carrier, characterized in that: The preparation method comprises: A wafer carrier body is provided, wherein the wafer carrier body has a first surface and a second surface arranged opposite to each other, wherein the first surface is used for bonding with a wafer, and the second surface is used for being adsorbed by an electrostatic adsorption plate; According to the position of the grounding pin in the electrostatic adsorption disk, at least one through hole is made on the wafer carrier body and penetrates the wafer carrier body along the relative direction between the first surface and the second surface; A conductive material is embedded in the through hole to obtain a first conductive component; wherein the first conductive component has a first end and a second end that are oppositely arranged, the first end of the first conductive component is flush with the first surface, and the second end of the first conductive component is flush with the second surface.

10. The method for preparing a wafer carrier according to claim 9, characterized in that: After making at least one through hole on the wafer body and penetrating the wafer body in the relative direction between the first surface and the second surface, the preparation method further comprises: According to the position of the at least one through hole, at least one groove is made on the first surface of the carrier body, so that one end of each groove is connected to the first end of any through hole.

11. The method for preparing a wafer carrier according to claim 10, characterized in that: After at least one groove is formed on the first surface of the slide body, the preparation method further comprises: According to the position of at least one groove, an annular opening groove is made on the first surface of the carrier body so that the annular opening groove is connected with at least one groove.

12. The method for preparing a wafer carrier according to claim 11, characterized in that: After embedding the conductive material in the at least one through hole, the preparation method further comprises: embedding a conductive material in the groove to obtain a second conductive component; Alternatively, conductive material is embedded in the groove and the annular opening groove to obtain the second conductive component and the third conductive component.

13. A wafer processing method, characterized in that: The method comprises: Providing a wafer and a wafer carrier according to any one of claims 1 to 8; A protective film is covered on the front side of the wafer, and an adhesive is coated on the first surface of the wafer carrier; wherein the front side of the wafer has a pattern; Turning over the wafer, and bonding the front side of the wafer to the first surface of the wafer carrier; Placing the second surface of the wafer carrier on an electrostatic adsorption plate, and performing a preset process on the back side of the wafer after electrostatic adsorption; After completing the preset process, the front side of the wafer is debonded from the first surface of the wafer carrier.

14. A wafer processing method, characterized in that: The method comprises: Providing a wafer and a wafer carrier according to any one of claims 1 to 8; Covering the front side of the wafer with a protective film for the first time, and coating the first surface of the wafer carrier with an adhesive; wherein the front side of the wafer has a pattern; bonding the back side of the wafer to the first surface of the wafer carrier; After removing the protective film on the front side of the wafer, the front side of the wafer is processed according to a preset process; After completing the preset process, covering the front side of the wafer with a protective film for a second time; The back side of the wafer is debonded from the first surface of the wafer carrier, and the protective film on the front side of the wafer is removed.

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