A method for manufacturing a PCB board of double-sided buried wiring

Abstract

The present application relates to printed circuit board technology field, specifically a kind of double-sided buried line PCB board manufacturing method, first make circuit on thicker PCB single-sided board, then the circuit is pressed into insulating adhesive film, obtain single-sided buried line board, again two single-sided buried line board is pasted to a high-temperature-resistant adhesive film, obtain double-sided buried line board, and a circle of copper-plated conductive via is made at the edge of each unit of double-sided buried line board, to improve the overall strength of double-sided buried line board, while making copper-plated conductive blind hole, so that the circuit of upper and lower board forms a loop.Single-sided buried line board is thick and has high strength, which can avoid the warping of PCB during single-layer circuit manufacturing.The present application has short pressing time and low pressing temperature, which can avoid the problem of PCB warping due to the asymmetry of the circuit patterns of the two single-sided buried line boards.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of printed circuit board (PCB board), and particularly relates to a PCB board manufacturing method of double-sided buried line. BACKGROUND

[0002] At present, the demand for thinness and high density of devices represented by mobile phones and smart wearable products is increasingly high, and product design often reduces the number of layers of PCB boards and increases the wiring density of PCB boards, so as to realize the thinness and high density of devices.

[0003] The process of buried line does not need to consider the etching compensation of the line, can effectively reduce the manufacturing difficulty of fine line, and improve the wiring density of the PCB. The PCB board adopting the buried line can usually only process a single-sided line board. When a PCB board with double-sided buried lines is manufactured, if the material or line pattern of the upper and lower single-sided line boards is greatly different, the two single-sided line boards are pressed together on a dielectric layer through high-temperature vacuum, and due to the asymmetric structure of the board or stress, the double-sided board often has serious warping, and even curling. SUMMARY

[0004] The application aims to provide a PCB board manufacturing method of double-sided buried line to solve the problems in the background.

[0005] To achieve the above-mentioned purpose, the application provides the following technical scheme.

[0006] A PCB board manufacturing method of double-sided buried line comprises the following steps.

[0007] Step 1: providing a PCB single-sided board, the single-sided board comprising an insulating dielectric layer and a temporary adhesive layer, the temporary adhesive layer comprising two opposite upper and lower surfaces, the lower surface of the temporary adhesive layer being bonded to the upper surface of the insulating dielectric layer, and the upper surface of the temporary adhesive layer being bonded to a copper foil layer.

[0008] Step 2: performing pattern transfer on the surface of the copper foil layer of the PCB to form a dry film pattern layer on the surface of the copper foil layer.

[0009] Step 3: electroplating the part of the copper foil layer not covered by the dry film pattern layer to form a line.

[0010] Step 4: removing the dry film pattern layer by using a chemical solution.

[0011] Step 5: pressing an insulating adhesive film on the surface of the line, and flattening the surface of the insulating adhesive film to obtain a single-sided buried line board.

[0012] Step six: press two said single buried line circuit boards to the upper and lower surfaces of a high-temperature resistant adhesive layer respectively, and the insulating adhesive film layers of the two single buried line circuit boards are bonded to the upper and lower surfaces of the high-temperature resistant adhesive layer.

[0013] Step seven: bake the board, and the temporary adhesive layer loses adhesion and separates from the surface of the copper foil layer, thereby obtaining a double-sided buried line double-sided board.

[0014] Step eight: process a blind hole that does not penetrate the double-sided board on the double-sided buried line double-sided board, and process a through hole that penetrates the double-sided board around the edge of each unit of the double-sided board.

[0015] Step nine: cover the upper and lower surfaces of the double-sided board on which the blind hole and the through hole are processed with dry film, perform pattern transfer, and form a part that is not covered by the dry film at the opening position of the blind hole.

[0016] Step ten: perform electroplating to form a copper-plated conductive hole at the position of the blind hole and a copper-plated conductive through hole at the position of the through hole.

[0017] Step eleven: remove the dry film pattern layer using a chemical solution.

[0018] Step twelve: remove the copper foil layer using an etching solution to expose the circuit.

[0019] Preferably, the width of the circuit is ≥ 7 µm.

[0020] Preferably, the thickness of the insulating medium layer (110) is ≥ 300 µm.

[0021] Preferably, the thickness of the copper foil layer is H1, and 3 µm ≤ H1 ≤ 12 µm.

[0022] Preferably, the thickness of the insulating adhesive film layer and the high-temperature resistant adhesive layer is H2, and 10 µm ≤ H2 ≤ 100 µm.

[0023] Preferably, the thickness of the circuit is H3, and 5 µm ≤ H3 ≤ 30 µm.

[0024] Preferably, the diameter of the blind hole and the through hole is D1, and 50 µm ≤ D1 ≤ 150 µm.

[0025] Preferably, the temporary adhesive layer in step one is a pyrolytic adhesive.

[0026] Preferably, the insulating adhesive film is pre-stuck and leveled using a vacuum film sticking machine in step five, and the pre-sticking and leveling temperature is 70-100°C, and the pre-sticking and leveling time is 30-120 seconds.

[0027] Preferably, in step six, the single-sided buried circuit board is pressed onto the high-temperature-resistant adhesive layer by using a common laminator, and the laminating temperature is 20-100 DEG C, and the laminating time is 30-120 seconds.

[0028] Preferably, in step seven, the temporary adhesive layer is made to lose adhesion by using a baking plate, and the baking temperature is 120-150 DEG C, and the baking time is 30-120 seconds.

[0029] Preferably, in step eight, the blind hole and the through hole are processed by using a laser ablation process.

[0030] Preferably, in step four and step eleven, the dry film pattern layer and the dry film pattern layer are removed by using an alkaline chemical solution.

[0031] Preferably, in step eight and step ten, the through hole made at the edge of the unit forms a rectangle, and the side length L1 and L2 of the rectangle are both ≤15 mm.

[0032] Compared with the prior art, the present application has the following beneficial effects:

[0033] The present application first makes a circuit on a thicker PCB single-sided board, then presses the circuit into an insulating adhesive film to obtain a single-sided buried circuit board, then pastes two single-sided buried circuit boards onto a high-temperature-resistant adhesive film to obtain a double-sided buried circuit board, and makes a circle of plated copper conductive through holes at the edge of each unit of the double-sided buried circuit board, thereby improving the overall strength of the double-sided buried circuit board, and making plated copper conductive blind holes to form a loop for the circuit on the upper and lower boards. The single-sided buried circuit board has large thickness and high strength, and can avoid the PCB warping during single-layer circuit manufacturing. In addition, the two single-sided buried circuit boards are pasted onto the high-temperature-resistant adhesive film by using a normal temperature pressing method, and the pressing time is only a few minutes, while the prior art needs to use high temperature of 150 DEG C or above and hot pressing under vacuum for at least 45 minutes. The present application has short pressing time and low pressing temperature, and can avoid the PCB warping problem caused by the asymmetric circuit patterns of the two single-sided buried circuit boards.

[0034] It should be understood that the foregoing general description and the following detailed description are only exemplary and explanatory, and cannot limit the present application. BRIEF DESCRIPTION OF DRAWINGS

[0035] The drawings incorporated into the specification and forming part of the specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application. Meanwhile, the drawings and the written description are not intended to limit the scope of the inventive concept in any way, but to illustrate the inventive concept to those skilled in the art by referring to specific embodiments.

[0036] Fig. 1 The figure is a schematic diagram of the processing process of the PCB single-sided board of the present application;

[0037] Fig. 2 The processing process schematic diagram of the single-sided buried line PCB of the present application;

[0038] Fig. 3 The processing process schematic diagram of the double-sided buried line PCB of the present application;

[0039] Fig. 4 The processing process schematic diagram of the via hole, blind hole and line of the double-sided buried line PCB of the present application;

[0040] Fig. 5 The top view of the via hole distribution of the double-sided buried line PCB of the present application;

[0041] Fig. 6 The side view of the via hole distribution of the double-sided buried line PCB of the present application along the A-A' longitudinal section.

[0042] In the figure: 1, PCB single-sided board; 2, single-sided buried line PCB; 3, double-sided buried line PCB; 110, insulating medium layer; 111, temporary adhesive layer; 112, copper foil layer; 113, first dry film pattern layer; 114, insulating adhesive film layer; 115, high-temperature resistant adhesive layer; 116, second dry film pattern layer; 1a, the part not covered by the dry film pattern layer; 1b, line; 2a, blind hole not penetrating the double-sided board; 2b, the area of the blind hole aperture not covered by the dry film; 2c, plated copper conductive blind hole; 3a, via hole not penetrating the double-sided board; 3b, the area of the blind hole aperture not covered by the dry film; 3c, plated copper conductive via hole. DETAILED DESCRIPTION

[0043] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. When the following description refers to the drawings, the same numerals in different drawings represent the same or similar elements unless otherwise indicated.

[0044] Obviously, the described embodiments are only a part of the embodiments of the present application, not all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor fall within the protection scope of the present application.

[0045] The specific implementation of the present application will be described in detail below in combination with specific embodiments.

[0046] In one embodiment, referring to Figs. 1-6 A double-sided buried line PCB manufacturing method is provided, which comprises the following steps:

[0047] Step one: provide a single-sided PCB panel 1, which includes an insulating medium layer 110 and a temporary adhesive layer 111, the temporary adhesive layer 111 includes two opposite upper and lower surfaces, the lower surface of the temporary adhesive layer 111 is bonded to the upper surface of the insulating medium layer 110, and the upper surface of the temporary adhesive layer 111 is bonded to a copper foil layer 112.

[0048] Step two: perform pattern transfer on the surface of the copper foil layer 112 of the PCB, so that the surface of the copper foil layer 112 forms a first dry film pattern layer 113.

[0049] Step three: electroplating is performed on the part 1a of the copper foil layer 112 not covered by the first dry film pattern layer 113 to form a circuit 1b.

[0050] Step four: the first dry film pattern layer 113 is removed using a chemical solution.

[0051] Step five: an insulating adhesive film 114 is laminated on the surface of the circuit 1b, and the surface of the insulating adhesive film 114 is flattened to obtain a single-sided buried circuit board 2.

[0052] Step six: two single-sided buried circuit boards 2 are respectively laminated to the upper and lower surfaces of a high-temperature resistant adhesive layer 115, and the insulating adhesive film layers 114 of the two single-sided buried circuit boards 2 are bonded to the upper and lower surfaces of the high-temperature resistant adhesive layer 115.

[0053] Step seven: bake the panel, the temporary adhesive layer 111 loses adhesion and separates from the surface of the copper foil layer 112 to obtain a double-sided buried circuit double-sided panel 3.

[0054] Step eight: a blind hole 2a that does not penetrate the double-sided panel is processed on the double-sided buried circuit double-sided panel 3, and a through hole 3a that penetrates the double-sided panel is processed on the edge of each unit of the double-sided panel.

[0055] Step nine: cover the dry film 116 on the upper and lower surfaces of the double-sided panel 3 on which the blind hole 2a and the through hole 3a are processed, perform pattern transfer, form a part 2b that is not covered by the dry film at the opening position of the blind hole 2a, and form a part 3b that is not covered by the dry film at the opening position of the through hole 3a.

[0056] Step ten: electroplating is performed to form a copper-plated conductive hole 2c at the position of the blind hole 2a and a copper-plated conductive through hole 3c at the position of the through hole 3a.

[0057] Step eleven: the second dry film pattern layer 116 is removed using a chemical solution.

[0058] Step twelve: the copper foil layer 112 is removed using an etching solution to expose the circuit 1b.

[0059] During the operation, a PCB single-sided board 1 is prepared, which is composed of an insulating medium layer 110 and a temporary adhesive layer 111. The temporary adhesive layer 111 is selected from a thermosetting adhesive, which has adhesion at room temperature and can firmly bond the copper foil layer 112 and the insulating medium layer 110, but loses adhesion after high-temperature baking, facilitating subsequent separation. The two opposite surfaces of the temporary adhesive layer 111 are the upper surface and the lower surface, respectively, wherein the lower surface is bonded to the upper surface of the insulating medium layer 110, and the upper surface is bonded to the copper foil layer 112.

[0060] Then, pattern transfer is performed on the surface of the copper foil layer 112. First, a photosensitive dry film (i.e., a first dry film pattern layer 113) is coated on the copper foil layer 112 using photolithography technology, and then the dry film is formed on the copper foil layer 112 in the required circuit pattern through exposure and development steps. In this step, the part covered by the dry film pattern layer 113 is the part of the copper foil that needs to be retained, and the part not covered will be removed in the subsequent steps.

[0061] Then, electroplating is performed on the part 1a of the copper foil layer 112 not covered by the first dry film pattern layer 113. The electroplating solution is usually selected from copper sulfate solution, and a copper plating layer, i.e., a line 1b, is formed on the part of the copper foil not covered by the dry film through electroplating. During the electroplating process, parameters such as the concentration, temperature and current density of the electroplating solution need to be controlled to ensure the thickness and uniformity of the line 1b.

[0062] After electroplating is completed, the first dry film pattern layer 113 is removed using a chemical solution to expose the part of the copper foil layer 112 not electroplated, which will be etched off in the subsequent steps.

[0063] An insulating adhesive film 114 is pressed onto the surface of the line 1b, which is selected from materials such as epoxy cyanic acid resin, modified polyimide (PI) or modified polyethylene terephthalate (PET), and has good insulating and temperature-resistant properties. During the pressing process, the pressure and temperature need to be controlled to make the insulating adhesive film 114 tightly bonded to the line 1b, and at the same time, the surface of the insulating adhesive film 114 is flattened to obtain a single-sided buried line board 2.

[0064] The two single-sided buried line boards 2 are respectively pressed onto the upper and lower surfaces of a high-temperature resistant adhesive layer 115, which is selected from high-temperature resistant materials such as modified polyimide or modified polytetrafluoroethylene, and can maintain adhesion at high temperature to ensure firm bonding of the two single-sided buried line boards 2. During the pressing process, the pressure and temperature need to be controlled to make the insulating adhesive film layers 114 of the two single-sided buried line boards 2 tightly bonded to the upper and lower surfaces of the high-temperature resistant adhesive layer 115.

[0065] The assembled board is baked at a temperature and for a time determined by the properties of the temporary adhesive layer 111. During baking, the temporary adhesive layer 111 loses its adhesion and separates from the surface of the copper foil layer 112, resulting in a double-sided board 3 with double buried wiring.

[0066] Blind holes 2a are drilled in the double-sided board 3 with double buried wiring, the positions and number of the blind holes 2a being determined by the circuit design requirements. At the same time, a ring of through holes 3a is drilled in the edge of each unit of the double-sided board, the through holes 3a being used for subsequent connection of the circuit board to external components. During drilling of the blind holes 2a and the through holes 3a, the diameter, rotation speed and feed speed of the drill bit are controlled to ensure the quality and positional accuracy of the holes.

[0067] The upper and lower surfaces of the double-sided board 3 with drilled blind holes 2a and through holes 3a are covered with a dry film 116, and a pattern transfer is performed. During the pattern transfer, a photoetching technique is used to form the required circuit pattern on the dry film 116, and at the same time, portions 2b and 3b not covered by the dry film are formed at the opening positions of the blind holes 2a and the through holes 3a. These portions not covered by the dry film will form plated copper conductive holes and conductive through holes in the subsequent plating step.

[0068] Plating is performed to form plated copper conductive holes 2c at the positions of the blind holes 2a and plated copper conductive through holes 3c at the positions of the through holes 3a. During plating, the concentration, temperature and current density of the plating solution are controlled to ensure the thickness and uniformity of the plated layers of the conductive holes 2c and the conductive through holes 3c. At the same time, the plating time is controlled to ensure that the depths of the conductive holes 2c and the conductive through holes 3c meet the design requirements.

[0069] After plating is completed, the second dry film pattern layer 116 is removed using a chemical solution, exposing the portions of the copper foil layer 112 that were not plated.

[0070] Finally, the portions of the copper foil layer 112 that were not plated and not covered by the dry film are removed using an etching solution, exposing the wiring 1b and the conductive holes 2c and the conductive through holes 3c. During etching, the concentration, temperature and etching time of the etching solution are controlled to ensure the uniformity and accuracy of the etching. After etching is completed, a PCB board with double buried wiring and conductive holes and conductive through holes is obtained.

[0071] As described above, the present application first makes a single-layer circuit 1b on a thicker PCB single panel 1, then presses the circuit 1b into an insulating adhesive film to obtain a single buried circuit board 2, then pastes two single buried circuit boards 2 on a high-temperature-resistant adhesive film 115 to obtain a double buried circuit board 3, and makes a circle of copper-plated conductive through holes 3c on the edge of each unit of the double buried circuit board 3, thereby improving the overall strength of the double buried circuit board, and making copper-plated conductive blind holes 2c to form a loop between the upper and lower boards. The insulating medium layer 110 of the single buried circuit board 2 has a large thickness and high strength, which can avoid the warping of the board during the production of the single-layer circuit 1b. In addition, the low-temperature pressing method is used to paste two single buried circuit boards 2 on a high-temperature-resistant adhesive film 115, without using the existing technology to hot-press at a high temperature of ≥150 degrees for a long time, which can avoid the problem of board warping after hot-pressing due to the asymmetric pattern of the circuit 1b of the two single buried circuit boards 2.

[0072] In one embodiment, referring to Figs. 1-6 , based on the above-mentioned embodiments, the present embodiment is further designed as follows:

[0073] As Figs. 1-6 indicated, preferably, the width of the circuit 1b is ≥7µm, so that the wiring density on the single panel 1 can be greatly improved by burying the circuit, thereby increasing the space utilization.

[0074] As Figs. 1-6 indicated, preferably, the thickness of the insulating medium layer 110 is ≥300µm, so that the single buried circuit board 2 has good rigidity, avoiding the warping of the board during the production of the single-layer circuit 1b.

[0075] As Figs. 1-6 indicated, preferably, the thickness of the copper foil layer 112 is H1, and 3µm≤H1≤12µm, so that the copper foil layer can be conveniently and flatly bonded to the temporary adhesive layer 111, and then easily removed by etching solution after electroplating.

[0076] As Figs. 1-6 indicated, preferably, the thickness of the insulating adhesive film layer 114 and the high-temperature-resistant adhesive layer 115 is H2, and 10µm≤H2≤100µm, so that the through holes or blind holes can be conveniently processed on the insulating adhesive film layer and the high-temperature-resistant adhesive layer, while ensuring the strength of the insulating layer.

[0077] As Figs. 1-6 indicated, preferably, the thickness of the circuit 1b is H3, and 5µm≤H3≤30µm, and the diameter of the blind hole 2c and the through hole 3c is D1, and 50µm≤D1≤150µm, so that the current-carrying capacity of the circuit can be ensured.

[0078] AsFigs. 1-6 As shown, preferably, the temporary adhesive layer 111 in step one is pyrolytic adhesive, so that the temporary adhesive layer 111 is conveniently peeled off from the surface of the copper foil layer 112 by baking at 120-150 degrees for 30-120 seconds in step six.

[0079] As shown, preferably, the temporary adhesive layer 111 in step one is pyrolytic adhesive, so that the temporary adhesive layer 111 is conveniently peeled off from the surface of the copper foil layer 112 by baking at 120-150 degrees for 30-120 seconds in step six. Figs. 1-6 As shown, preferably, the temporary adhesive layer 111 in step one is pyrolytic adhesive, so that the temporary adhesive layer 111 is conveniently peeled off from the surface of the copper foil layer 112 by baking at 120-150 degrees for 30-120 seconds in step six.

[0080] As shown, preferably, the temporary adhesive layer 111 in step one is pyrolytic adhesive, so that the temporary adhesive layer 111 is conveniently peeled off from the surface of the copper foil layer 112 by baking at 120-150 degrees for 30-120 seconds in step six. Figs. 1-6 As shown, preferably, the temporary adhesive layer 111 in step one is pyrolytic adhesive, so that the temporary adhesive layer 111 is conveniently peeled off from the surface of the copper foil layer 112 by baking at 120-150 degrees for 30-120 seconds in step six.

[0081] As shown, preferably, the temporary adhesive layer 111 in step one is pyrolytic adhesive, so that the temporary adhesive layer 111 is conveniently peeled off from the surface of the copper foil layer 112 by baking at 120-150 degrees for 30-120 seconds in step six. Figs. 1-6 As shown, preferably, the temporary adhesive layer 111 in step one is pyrolytic adhesive, so that the temporary adhesive layer 111 is conveniently peeled off from the surface of the copper foil layer 112 by baking at 120-150 degrees for 30-120 seconds in step six.

[0082] As shown, preferably, the temporary adhesive layer 111 in step one is pyrolytic adhesive, so that the temporary adhesive layer 111 is conveniently peeled off from the surface of the copper foil layer 112 by baking at 120-150 degrees for 30-120 seconds in step six. Figs. 1-6 As shown, preferably, the temporary adhesive layer 111 in step one is pyrolytic adhesive, so that the temporary adhesive layer 111 is conveniently peeled off from the surface of the copper foil layer 112 by baking at 120-150 degrees for 30-120 seconds in step six.

[0083] As shown, preferably, the temporary adhesive layer 111 in step one is pyrolytic adhesive, so that the temporary adhesive layer 111 is conveniently peeled off from the surface of the copper foil layer 112 by baking at 120-150 degrees for 30-120 seconds in step six. Figs. 1-6 As shown, preferably, the temporary adhesive layer 111 in step one is pyrolytic adhesive, so that the temporary adhesive layer 111 is conveniently peeled off from the surface of the copper foil layer 112 by baking at 120-150 degrees for 30-120 seconds in step six.

[0084] As shown, preferably, the temporary adhesive layer 111 in step one is pyrolytic adhesive, so that the temporary adhesive layer 111 is conveniently peeled off from the surface of the copper foil layer 112 by baking at 120-150 degrees for 30-120 seconds in step six. Figs. 1-6 Figs. 1-6 Fig. 5 As shown, preferably, the temporary adhesive layer 111 in step one is pyrolytic adhesive, so that the temporary adhesive layer 111 is conveniently peeled off from the surface of the copper foil layer 112 by baking at 120-150 degrees for 30-120 seconds in step six.

[0085] Compared with the prior art, the embodiment improves production efficiency and reduces cost, adopts laser ablation process to process blind holes and through holes, and removes dry film pattern layer by alkaline chemical solution, which not only improves production efficiency and processing precision, but also reduces material loss and processing cost that may be caused by traditional mechanical drilling. Meanwhile, the temporary adhesive layer 111 is removed by pyrolysis of viscose and baking process, which simplifies the production process and further reduces the production cost.

[0086] The thickness of the insulating medium layer 110 is designed to be ≥300µm, which ensures that the single-sided buried circuit board 2 has good rigidity and effectively avoids the warping problem of the board that may occur during single-layer circuit manufacturing. In addition, the through holes made at the edge of each unit form a rectangle, forming a rivet structure, which further enhances the overall strength and stability of the double-sided buried circuit board 3, improving the reliability and durability of the product.

[0087] The thickness of the copper foil layer 112 and the circuit 1b is precisely controlled to ensure that the circuit 1b has good electrical conductivity and current carrying capacity. At the same time, the diameter of the blind hole and the through hole is also optimized in design, which not only ensures the electrical connectivity of the circuit 1b, but also avoids the adverse effects of excessive hole diameter on the strength of the board and the distribution of current.

[0088] The vacuum laminating machine and the ordinary laminating machine are used to press the insulating adhesive film and the high-temperature resistant adhesive layer 115, ensuring the firmness and flatness of the pressing. The application of laser ablation process avoids the deformation and precision loss of the adhesive layer that may be caused by mechanical drilling, improving the processing precision and product quality.

[0089] It is obvious to those skilled in the art that the present application is not limited to the details of the above exemplary embodiments, and can be implemented in other specific forms without departing from the spirit or essential characteristics of the present application. Therefore, the embodiments should be regarded as exemplary and non-limiting, and the scope of the present application is defined by the appended claims rather than the above description, and all changes falling within the meaning and scope of the equivalent elements of the claims are intended to be included in the present application.

[0090] In addition, it should be understood that although the present specification is described in terms of embodiments, each embodiment does not contain only one independent technical solution, and the description of the specification is only for clarity, and those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can be combined to form other embodiments that can be understood by those skilled in the art.

Claims

1. A method of manufacturing a PCB board with a double-sided buried wiring, characterized by, The method comprises the following steps: Step 1: providing a single-sided PCB panel (1), the single-sided panel (1) comprising an insulating medium layer (110) and a temporary adhesive layer (111), the temporary adhesive layer (111) comprising two opposite upper and lower surfaces, the lower surface of the temporary adhesive layer (111) being bonded to the upper surface of the insulating medium layer (110), and the upper surface of the temporary adhesive layer (111) being bonded to a copper foil layer (112); Step 2: performing pattern transfer on the surface of the copper foil layer (112) of the PCB to form a first dry film pattern layer (113) on the surface of the copper foil layer (112); Step 3: electroplating on the part (1a) of the copper foil layer (112) not covered by the first dry film pattern layer (113) to form a circuit (1b); Step 4: removing the first dry film pattern layer (113) using a chemical solution; Step 5: laminating an insulating adhesive film layer (114) on the surface of the circuit (1b) and flattening the surface of the insulating adhesive film layer (114) to obtain a single-sided buried circuit board (2); Step 6: laminating two single-sided buried circuit boards (2) to the upper and lower surfaces of a high-temperature resistant adhesive layer (115) respectively, and bonding the insulating adhesive film layers (114) of the two single-sided buried circuit boards (2) to the upper and lower surfaces of the high-temperature resistant adhesive layer (115); Step 7: baking the panel, the temporary adhesive layer (111) loses adhesion and separates from the surface of the copper foil layer (112) to obtain a double-sided panel (3) with double-sided buried circuits; Step 8: processing blind holes (2a) that do not penetrate the double-sided panel on the double-sided panel (3) with double-sided buried circuits, and processing a ring of through holes (3a) that penetrate the double-sided panel on the edge of each unit of the double-sided panel; Step 9: covering the upper and lower surfaces of the double-sided panel (3) with blind holes (2a) and through holes (3a) with a second dry film pattern layer (116), performing pattern transfer, and forming a part (2b) not covered by the dry film at the opening position of the blind hole (2a) and a part (3b) not covered by the dry film at the opening position of the through hole (3a); Step 10: electroplating to form a copper-plated conductive hole (2c) at the position of the blind hole (2a) and a copper-plated conductive through hole (3c) at the position of the through hole (3a); Step 11: removing the second dry film pattern layer (116) using a chemical solution; Step 12: removing the copper foil layer (112) using an etching solution to expose the circuit (1b).

2. The method of claim 1, wherein the method further comprises: The width of the circuit (1b) is ≥7µm; The thickness of the insulating medium layer (110) is ≥300µm; The thickness of the copper foil layer (112) is H1, and 3µm≤H1≤12µm.

3. The method of claim 1, wherein the method further comprises: The thickness of the insulating adhesive film layer (114) and the high-temperature resistant adhesive layer (115) is H2, and 10µm≤H2≤100µm.

4. The method of claim 1, wherein the method further comprises: The thickness of the circuit (1b) is H3, and 5µm≤H3≤30µm; The diameter of the blind hole (2a) and the through hole (3a) is D1, and 50µm≤D1≤150µm.

5. The method of claim 1, wherein the method further comprises: The temporary adhesive layer (111) in step one is pyrolytic adhesive.

6. The method of claim 1, wherein In step five, the insulating adhesive film layer (114) is pre-stuck and leveled by a vacuum laminator, and the pre-sticking and leveling temperature is 70-100°C, and the pre-sticking and leveling time is 30-120 seconds; In step six, the single-sided buried wiring board (2) is stuck to the high-temperature resistant adhesive layer (115) by a general laminator, and the laminating temperature is 20-100°C, and the laminating time is 30-120 seconds; In step seven, the temporary adhesive layer (111) loses adhesion by baking the plate part, and the baking temperature is 120-150°C, and the baking time is 30-120 seconds.

7. The method of claim 1, wherein the method further comprises: In step eight, the blind hole (2a) and the through hole (3a) are processed by laser ablation process.

8. The method of claim 1, wherein the method further comprises: In step four and step eleven, the first dry film pattern layer (113) and the second dry film pattern layer (116) are removed by alkaline chemical solution.

9. The method of claim 1, wherein In step eight and step ten, the through holes made at the edge of each unit form a rectangle, and the side length L1 and L2 of the rectangle are both ≤15mm.

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