Display panel and display device

Abstract

The invention discloses a display panel and a display device. The display panel comprises a substrate and at least two signal wiring layers located on one side of the substrate. A first signal wire extending along a first direction and a second signal wire extending along a second direction are arranged in the at least two signal wire layers, and the first signal wire and the second signal wire are located in different signal wire layers; the first signal wire is connected with at least one second signal wire through a via hole; the first signal wire and the second signal wire respectively comprise a connecting part at the via hole position, and respectively comprise an overlapping part at the non-via hole overlapping position; in the first signal line, the size of the overlapping part is smaller than that of the connecting part in the second direction; and / or, in the second signal wire, the size of the overlapping part is smaller than that of the connecting part in the first direction. According to the technical scheme, the coupling capacitance is reduced, and the display mura problem of the display area is improved.

Description

Technical Field

[0001] Embodiments of the present invention relate to the technical field of display panels, and in particular to a display panel and a display device. Background Art

[0002] With the continuous development of display technology, narrow-border displays are becoming more and more popular in flexible active matrix organic light emitting diode (AMOLED) display products.

[0003] Since there are many circuit traces in the display panel, the circuit traces of adjacent trace layers overlap in their orthographic projections on the horizontal plane, resulting in coupling capacitance between the circuit traces of different trace layers, which leads to display mura problems on the display panel. Summary of the invention

[0004] The invention provides a display panel and a display device to reduce coupling capacitance and improve display mura problem.

[0005] According to one aspect of the present invention, there is provided a display panel, comprising: a substrate, and at least two signal routing layers located on one side of the substrate;

[0006] The at least two signal routing layers are provided with a first signal routing and a second signal routing, and the first signal routing and the second signal routing are located in different signal routing layers; the first signal routing extends along a first direction, and the second signal routing extends along a second direction, and the first direction intersects with the second direction;

[0007] The orthographic projection of the first signal line on the substrate overlaps with the orthographic projections of the plurality of second signal lines on the substrate, and the first signal line is connected to at least one of the second signal lines through a via; at the position of the via, the first signal line and the second signal line respectively include a connecting portion;

[0008] At a non-via overlapping position of the first signal route and the second signal route, the first signal route and the second signal route respectively include an overlapping portion, and in the first signal route, along the second direction, the size of the overlapping portion is smaller than the size of the connecting portion; and / or, in the second signal route, along the first direction, the size of the overlapping portion is smaller than the size of the connecting portion.

[0009] Optionally, in the first signal routing line, along the second direction, the size of the overlapping portion is equal to the size of the connecting portion;

[0010] Alternatively, in the second signal routing line, along the first direction, the size of the overlapping portion is equal to the size of the connecting portion;

[0011] Preferably, the signal routing layer where the second signal routing is located is located on a side of the signal routing layer where the first signal routing is located away from the substrate; along the first direction, the size of the overlapping portion in the second signal routing is equal to the size of the connecting portion; along the second direction, the size of the overlapping portion in the first signal routing is smaller than the size of the connecting portion.

[0012] Optionally, in addition to the positions of the via holes and the non-via-overlapping positions of the first signal routing and the second signal routing, they each further include a main body;

[0013] In the first signal routing, along the second direction, the size of the connecting portion is larger than the size of the main portion, and the size of the overlapping portion is larger than or equal to the size of the main portion; in the second signal routing, along the first direction, the size of the connecting portion is larger than the size of the main portion, and the size of the overlapping portion is larger than or equal to the size of the main portion.

[0014] Optionally, the second signal routing includes a first sub-signal routing and a second sub-signal routing, an orthographic projection of the first sub-signal routing on the substrate overlaps with an orthographic projection of the first signal routing on the substrate and transmits different signals, and at the overlapping position, the first signal routing includes a first overlapping portion, and the first sub-signal routing includes a second overlapping portion;

[0015] The second sub-signal routing is electrically connected to the first signal routing through the via hole, and at the position of the via hole, the first signal routing includes a first connecting portion, and the second sub-signal routing includes a second connecting portion;

[0016] Preferably, along the second direction, the size of the first overlapping portion is smaller than the size of the second overlapping portion;

[0017] Preferably, along the second direction, the size of the first connecting portion is equal to the size of the second connecting portion, and the size of the first overlapping portion is smaller than the size of the first connecting portion;

[0018] Preferably, the display panel includes a display area and a non-display area, the display area includes a fan-out connection area and a non-fan-out connection area, the fan-out connection area is located between the non-fan-out connection area and the non-display area, and the first signal routing line and the second sub-signal routing line are at least partially located in the fan-out connection area;

[0019] Preferably, the first sub-signal routing line is located in the fan-out connection area and / or the non-fan-out connection area.

[0020] Optionally, the second signal routing line further includes a third sub-signal routing line; along the second direction, the third sub-signal routing line is arranged at one side of the second sub-signal routing line, and a break is arranged between the second sub-signal routing line and the third sub-signal routing line, and the break is used to disconnect the second sub-signal routing line from the third sub-signal routing line electrically;

[0021] Preferably, the third sub-signal routing line transmits the same signal as the first sub-signal routing line;

[0022] Preferably, the third sub-signal routing line is at least partially located in the non-fan-out connection area.

[0023] Optionally, the at least two signal wiring layers are further provided with data lines extending along the second direction, and the data lines are in different layers from the first signal wiring layers;

[0024] The data line includes a first data line; the orthographic projection of the first signal line on the substrate overlaps with the orthographic projection of the first data line on the substrate, and at the overlapping position, the first signal line includes a third overlapping portion, and the first data line includes a fourth overlapping portion; along the second direction, the size of the third overlapping portion is smaller than the size of the fourth overlapping portion;

[0025] Preferably, the data line and the second signal line are arranged on the same layer;

[0026] Preferably, one data line is respectively arranged on both sides of each of the second signal lines in the first direction.

[0027] Optionally, the data line also includes a second data line, and the second data line is electrically connected to the first signal line through the via. At the position of the via, the first signal line includes a third connection portion, and the second data line includes a fourth connection portion; along the second direction, the size of the third connection portion is equal to the size of the fourth connection portion.

[0028] Optionally, the connecting portion and at least a portion of the overlapping portion are identical in size and shape.

[0029] Optionally, the shapes of the connecting portion and at least part of the overlapping portion include any one of a circle, a quadrilateral and a hexagon;

[0030] Preferably, the connecting portion and at least a portion of the overlapping portion are in the shape of a square with chamfered corners.

[0031] According to another aspect of the present invention, there is provided a display device, comprising the display panel as described in any embodiment of the first aspect.

[0032] The display panel provided by the embodiment of the present invention is provided with a first signal line and a second signal line in at least two signal line layers located on one side of the substrate, and the first signal line and the second signal line are located in different signal line layers. The first signal line and the second signal line extend in different directions in the horizontal plane, and the orthographic projection of the first signal line on the substrate overlaps with the orthographic projection of the second signal line on the substrate. The overlapping position includes a connection position where a via is set and a non-via overlapping position, and at the connection position, the first signal line and the second signal line are provided with a connection portion; at the non-via overlapping position, the first signal line and the second signal line are provided with an overlapping portion. By setting the size of the overlapping portion of the first signal line along the second direction to be smaller than the size of the connecting portion, and / or setting the size of the overlapping portion of the second signal line along the first direction to be smaller than the size of the connecting portion, the overlapping area of ​​the first signal line and the second signal line at the non-via overlapping position is reduced, thereby reducing the interlayer coupling capacitance generated between the two signal line layers, which is conducive to improving the display mura problem in the display area, thereby improving the display effect.

[0033] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present invention, nor are they intended to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0035] Figure 1 is a schematic structural diagram of a display panel provided according to an embodiment of the present invention;

[0036] Figure 2 yes Figure 1 Schematic diagram of the enlarged structure of the red circle part;

[0037] Figure 3 yes Figure 2 A schematic diagram of the cross-sectional structure cut along the A-A' direction;

[0038] Figure 4 is a schematic structural diagram of a first signal routing provided according to an embodiment of the present invention;

[0039] Figure 5 is a schematic structural diagram of a second signal routing provided according to an embodiment of the present invention;

[0040] Figure 6is a schematic diagram of a structure at a non-via-overlapping position provided by an embodiment of the present invention;

[0041] Figure 7 yes Figure 2 A structural schematic diagram of the red rectangular frame part;

[0042] Figure 8 yes Figure 2 Another structural diagram of the red rectangular frame part;

[0043] Fig. 9 yes Figure 2 The schematic diagram of the structure of the black rectangular frame;

[0044] Fig.10 is a schematic structural diagram of a FIAA area in a display panel provided according to an embodiment of the present invention;

[0045] Fig.11 is a schematic diagram of a display device provided according to an embodiment of the present invention. DETAILED DESCRIPTION

[0046] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0047] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0048] An embodiment of the present invention provides a display panel. Figure 1 A schematic diagram of the structure of a display panel provided by an embodiment of the present invention, Figure 2 yes Figure 1 The enlarged structure diagram of the red circle part. Figure 1 and Figure 2The display panel 10 includes: a substrate and at least two signal wiring layers 20 located on one side of the substrate.

[0049] The signal routing layer 20 is provided with a first signal routing 21 and a second signal routing 22, and the first signal routing 21 and the second signal routing 22 are located in different signal routing layers 20; the first signal routing 21 extends along a first direction, and the second signal routing 22 extends along a second direction, and the first direction intersects with the second direction;

[0050] The orthographic projection of the first signal routing 21 on the substrate overlaps with the orthographic projections of the plurality of second signal routings 22 on the substrate, and the first signal routing 21 is connected to at least one second signal routing 22 through a via 30; at the position of the via 30, the first signal routing 21 and the second signal routing 22 respectively include a connecting portion 23.

[0051] At the non-via overlapping position of the first signal routing 21 and the second signal routing 22, the first signal routing 21 and the second signal routing 22 respectively include an overlapping portion 24, and in the first signal routing 21, along the second direction, the size of the overlapping portion 24 is smaller than the size of the connecting portion 23; and / or, in the second signal routing 22, along the first direction, the size of the overlapping portion 24 is smaller than the size of the connecting portion 23.

[0052] For example, the first direction may be the X direction in the horizontal plane, and the second direction may be the Y direction in the horizontal plane; or the first direction may be the Y direction in the horizontal plane, and the second direction may be the X direction in the horizontal plane, which is not limited here. In this way, the first direction and the second direction may intersect each other perpendicularly. Figure 2 In the embodiment of the present invention, the first direction is the X direction in the horizontal plane, and the second direction is the Y direction in the horizontal plane. However, in other feasible embodiments, it is not limited to that the first direction is the X direction and the second direction is the Y direction. The first signal routing 21 and the second signal routing 22 are respectively located in different signal routing layers 20, and the different signal routing layers 20 are insulated by an insulating layer. The first signal routing 21 extends along the first direction X in the signal routing layer 20, and the second signal routing 22 extends along the second direction Y in the signal routing layer 20. Among them, the first direction X and the second direction Y are different directions in the horizontal plane, and the first direction X intersects with the second direction Y, so that the orthographic projection of the first signal routing 21 on the substrate overlaps with the orthographic projection of the second signal routing 22 on the substrate. It should be noted that Figure 1 and Figure 2The substrate structure is not shown. The above-mentioned circuit wiring may exist in different positions of the display area of ​​the display panel 10, and may include, for example, a FIAA (Fanout in AA, fan-out wiring is located in the display area) area. With the development of current display technology, in response to user requirements, display panels need to achieve narrow-frame display. The implementation of narrow-frame display mostly adopts FIAA technology, by setting fan-out wiring in the display area to form a FIAA area, so as to reduce the number of circuit wiring set at the frame position, thereby achieving narrow-frame display. Combined with Figure 1 and Figure 2 , the first signal routing line 21 and the second signal routing line 22 can be used as signal routing lines in the FIAA area. The first endpoints of the first signal routing lines 21 are connected to form a first side, the second endpoints of the first signal routing lines 21 are connected to form a second side, and the first signal routing line 21 with the longest length is used as the third side, thereby forming a triangular routing area in the FIAA area.

[0053] In the display panel 10, a plurality of first signal lines 21 are arranged at intervals along the second direction Y; similarly, a plurality of second signal lines 22 are arranged at intervals along the first direction X. Therefore, the orthographic projection of a first signal line 21 on the substrate will overlap with the orthographic projections of a plurality of second signal lines 22 on the substrate, and the orthographic projection of a second signal line 22 on the substrate will also overlap with the orthographic projections of a plurality of first signal lines 21 on the substrate. Among the overlapping positions of the orthographic projections of the first signal line 21 on the substrate and the orthographic projections of the second signal line 22 on the substrate, there are overlapping positions that need to be connected by vias 30 and non-via overlapping positions. Among them, the non-via overlapping position is an overlapping position where the first signal line 21 and the second signal line 22 are electrically connected without setting a via 30 that penetrates the insulating layer; and the overlapping position that needs to be connected by vias 30 is an overlapping position where the first signal line 21 and the second signal line 22 are electrically connected by setting a via 30 that penetrates the insulating layer.

[0054] At the overlapping position where the via 30 is provided, the first signal line 21 and the second signal line 22 are provided with a connecting portion 23 ; at the non-via overlapping position, the first signal line 21 and the second signal line 22 are provided with an overlapping portion 24 . Figure 3 yes Figure 2 Schematic diagram of the cross-section structure cut along the A-A' direction. Figure 3, the film layer where the first signal line 21 is located is the M4 metal layer, and the film layer where the second signal line 22 is located is the M5 metal layer. For the position where the orthographic projection of the first signal line 21 on the substrate overlaps with the orthographic projection of the second signal line 22 on the substrate, the size of the first signal line 21 and the second signal line 22 is adjusted to facilitate the setting of the connection hole. By setting a via 30 for the second signal line 22, which penetrates the planarization layer 01 between the first signal line 21 and the second signal line 22, the second signal line 22 is electrically connected to the first signal line 21. Figure 3 The M1 metal layer 02 is also shown, and the M2 metal layer and the M3 metal layer are Figure 2 The sectioning position shown is not cut, so the M2 metal layer and the M3 metal layer are not in Figure 3 As shown in . The M1 metal layer 02, the M2 metal layer and the M3 metal layer are all corresponding signal line film layers. Exemplarily, the M1 metal layer 02 and the M2 metal layer are mainly used to form scanning signal lines, and the M3 metal layer is mainly used to form reference signal lines or used as connecting lines between signal lines of different layers, which is not limited here. Regarding the size design of the overlapping portion 24, the relevant technology proposes that along the second direction Y, the size of the overlapping portion 24 of the first signal wiring 21 is set to be equal to the size of the connecting portion 23, and along the first direction X, the size of the overlapping portion 24 of the second signal wiring 22 is set to be equal to the size of the connecting portion 23. In this case, the interlayer coupling capacitance of the display area will be significantly increased, which will lead to the display mura problem. Figure 4 is a schematic diagram of the structure of a first signal routing provided by an embodiment of the present invention, Figure 5 is a schematic diagram of the structure of a second signal routing provided by an embodiment of the present invention, Figure 6 2 is a schematic diagram of a structure at a non-via-overlapping position provided by an embodiment of the present invention. Compared with the related art, in the embodiment of the present invention, by setting the size of the overlapping portion 24 of the first signal line 21 along the second direction Y to be smaller than the size of the connecting portion 23, and / or setting the size of the overlapping portion 24 of the second signal line 22 along the first direction X to be smaller than the size of the connecting portion 23, that is, referring to Figure 4 , by reducing the area of ​​the overlapping portion 24 on the first signal trace 21, or referring to Figure 5 , reduce the area of ​​the overlapping portion 24 on the second signal trace 22, or refer to Figure 6 , and at the same time, the area of ​​the overlapping portion 24 on the first signal wiring 21 and the second signal wiring 22 is reduced, so that the overlapping area generated by the orthographic projection of the first signal wiring 21 on the substrate and the orthographic projection of the second signal wiring 22 on the substrate is reduced, thereby reducing the interlayer coupling capacitance in the display area, effectively improving the display mura problem of the display panel, and further improving the display effect.

[0055] The display panel provided by the embodiment of the present invention is provided with a first signal line and a second signal line in at least two signal line layers located on one side of the substrate, and the first signal line and the second signal line are located in different signal line layers. The first signal line and the second signal line extend in different directions in the horizontal plane, and the orthographic projection of the first signal line on the substrate overlaps with the orthographic projection of the second signal line on the substrate. The overlapping position includes a connection position where a via is set and a non-via overlapping position, and at the connection position, the first signal line and the second signal line are provided with a connection portion; at the non-via overlapping position, the first signal line and the second signal line are provided with an overlapping portion. By setting the size of the overlapping portion of the first signal line along the second direction to be smaller than the size of the connecting portion, and / or setting the size of the overlapping portion of the second signal line along the first direction to be smaller than the size of the connecting portion, the overlapping area of ​​the first signal line and the second signal line at the non-via overlapping position is reduced, thereby reducing the interlayer coupling capacitance generated between the two signal line layers, which is conducive to improving the display mura problem in the display area, thereby improving the display effect.

[0056] Based on the above embodiments, Figure 7 yes Figure 2 A structural diagram of the red rectangular frame. Figure 8 yes Figure 2 Another structural diagram of the red rectangular frame. Figure 7 and Figure 8 Optionally, in the first signal trace 21 , along the second direction Y, the size of the overlapping portion 24 is equal to the size of the connecting portion 23 ; or, in the second signal trace 22 , along the first direction X, the size of the overlapping portion 24 is equal to the size of the connecting portion 23 .

[0057] For example, for the dimensioning of the overlap portion 24, see Figure 7 , the size of the overlapping portion 24 along the second direction Y in the first signal routing 21 can be set equal to the size of the connecting portion 23. That is to say, in the non-via overlapping position in the overlapping position formed by a first signal routing 21 and multiple second signal routings 22, along the second direction Y, the size of the overlapping portion 24 of the first signal routing 21 is set to be larger than the size of the overlapping portion 24 of the second signal routing 22. Since the interlayer coupling capacitance is determined by the overlapping area of ​​the first signal routing 21 and the second signal routing 22 at the overlapping position, setting the size of the overlapping portion 24 of the first signal routing 21 to be different from the size of the overlapping portion 24 of the second signal routing 22 can make the generated coupling capacitance determined by the overlapping portion 24 with a smaller area. Therefore, the coupling capacitance of the display area can be effectively reduced, and the display mura problem can be improved. Similarly, for the non-via overlapping position, refer to Figure 8, the size of the overlapping portion 24 of the second signal wiring 22 can also be set along the first direction X to be equal to the size of the connecting portion 23, that is, the size of the overlapping portion 24 of the first signal wiring 21 is set to be smaller than the size of the overlapping portion 24 of the second signal wiring 22, which can also achieve the effect of reducing the coupling capacitance of the display area and improve the display mura problem.

[0058] Based on the above embodiments, Figure 8 Preferably, the signal routing layer 20 where the second signal routing 22 is located is located on the side of the signal routing layer 20 where the first signal routing 21 is located away from the substrate; along the first direction X, the size of the overlapping portion 24 in the second signal routing 22 is equal to the size of the connecting portion 23; along the second direction Y, the size of the overlapping portion 24 in the first signal routing 21 is smaller than the size of the connecting portion 23.

[0059] Exemplarily, the signal routing layer 20 where the second signal routing 22 is located is farther from the substrate than the signal routing layer 20 where the first signal routing 21 is located, that is, the signal routing layer 20 where the second signal routing 22 is located is above the signal routing layer 20 where the first signal routing 21 is located, and the routing area in the signal routing layer 20 located above will have a certain impact on the display brightness of the display panel. Therefore, along the first direction X, the size of the overlapping portion 24 in the second signal routing 22 can be set to be equal to the size of the connecting portion 23, and along the second direction Y, the size of the overlapping portion 24 in the first signal routing 21 is smaller than the size of the connecting portion 23. Even if the overlapping portion 24 of the second signal routing 22 located above has a larger size and the overlapping portion 24 of the first signal routing 21 located below has a smaller size, it can be achieved to reduce the interlayer coupling capacitance of the display area, improve the display mura problem, and ensure uniform display brightness in the display area, with good display effect.

[0060] Based on the above embodiments, Figure 7 and Figure 8 Optionally, in addition to the positions of the via holes 30 and the non-via-overlapping positions of the first signal wiring 21 and the second signal wiring 22, they also include a main body 25.

[0061] In the first signal routing 21, along the second direction Y, the size of the connecting portion 23 is larger than the size of the main portion 25, and the size of the overlapping portion 24 is larger than or equal to the size of the main portion 25; in the second signal routing 22, along the first direction X, the size of the connecting portion 23 is larger than the size of the main portion 25, and the size of the overlapping portion 24 is larger than or equal to the size of the main portion 25.

[0062] Exemplarily, in the portion other than the overlapped position of the first signal line 21 and the second signal line 22, the first signal line 21 and the second signal line 22 respectively include a main body 25. The main body 25 indicates the line width of the first signal line 21 and the second signal line 22. For the size design of the connection portion 23 at the overlapped position, refer to Figure 7 and Figure 8 , the size of the connection portion 23 along the second direction Y of the first signal line 21 is set to be larger than the size of the main body 25, and the size of the connection portion 23 along the first direction X of the second signal line 22 is set to be larger than the size of the main body 25, so as to facilitate the opening of the via hole 30 at the position of the connection portion 23, so that the first signal line 21 and the second signal line 22 can achieve good electrical connection at the position of the via hole 30. For the size design of the overlapping portion 24 at the overlapping position, refer to Figure 8 , the size of the overlapping portion 24 in the second signal line 22 along the first direction X can be set to be larger than the size of the main body 25, and the size of the overlapping portion 24 in the first signal line 21 along the second direction Y can be equal to the size of the main body 25, that is, at the non-via-overlapping position, the area of ​​the overlapping portion 24 in the second signal line 22 is set to be larger than the area of ​​the overlapping portion 24 in the first signal line 21, which is beneficial to reduce the interlayer coupling capacitance in the display area and ensure uniform display brightness. Alternatively, see Figure 7 It is also possible to set the size of the overlapping portion 24 in the first signal wiring 21 along the second direction Y to be larger than the size of the main body 25, and the size of the overlapping portion 24 in the second signal wiring 22 along the first direction X to be equal to the size of the main body 25, that is, at the non-via overlapping position, the area of ​​the overlapping portion 24 in the first signal wiring 21 is set to be larger than the area of ​​the overlapping portion 24 in the second signal wiring 22, which can also reduce the interlayer coupling capacitance in the display area, but the effect of improving the uniformity of display brightness is poor.

[0063] Based on the above embodiments, Fig. 9 yes Figure 2 The schematic diagram of the structure of the black rectangular frame. Figure 2 , Figure 8 and Fig. 9 Optionally, the second signal routing 22 includes a first sub-signal routing 221 and a second sub-signal routing 222. The orthographic projection of the first sub-signal routing 221 on the substrate overlaps with the orthographic projection of the first signal routing 21 on the substrate and transmits different signals. At the overlapping position, the first signal routing 21 includes a first overlapping portion 241, and the first sub-signal routing 221 includes a second overlapping portion 242. The second sub-signal routing 222 is electrically connected to the first signal routing 21 through a via 30. At the position of the via 30, the first signal routing 21 includes a first connecting portion 231, and the second sub-signal routing 222 includes a second connecting portion 232.

[0064] Exemplarily, a first signal routing line 21 may overlap with multiple second signal routing lines 22, and the multiple second signal routing lines 22 include a first sub-signal routing line 221 and a second sub-signal routing line 222. The first sub-signal routing line 221 and the first signal routing line 21 are located in different signal routing layers 20, transmit different signals, and include a first overlapping portion 241 and a second overlapping portion 242 at the overlapping position, respectively, and there is no electrical connection between the first overlapping portion 241 and the second overlapping portion 242. Exemplarily, the display panel also includes a stacked anode layer, an organic light-emitting layer, and a cathode layer. The signal transmitted by the first signal routing line 21 may be a data signal, and the first sub-signal routing line 221 may be used to transmit a signal to the cathode layer, which is not limited here. The second sub-signal routing line 222 and the first signal routing line 21 are located in different signal routing layers 20, and transmit the same signal, for example, the same data signal. A first connection portion 231 and a second connection portion 232 are respectively disposed at the overlapping position of the second sub-signal wiring 222 and the first signal wiring 21 , and the first connection portion 231 and the second connection portion 232 are electrically connected by a via 30 to transmit data signals.

[0065] Based on the above embodiments, Fig. 9 Preferably, along the second direction Y, the size of the first overlapping portion 241 is smaller than the size of the second overlapping portion 242 .

[0066] Exemplarily, at the non-via-overlapping position, along the second direction Y, the size of the first overlapping portion 241 on the first signal line 21 is set to be smaller than the size of the second overlapping portion 242 on the first sub-signal line 221. That is, at the overlapping position, the area of ​​the coupling capacitance generated by the first signal line 21 and the first sub-signal line 221 is only the area of ​​the first overlapping portion 241 on the first signal line 21, which can effectively reduce the interlayer coupling capacitance and improve the display mura problem.

[0067] Based on the above embodiments, Figure 8 and Fig. 9 Preferably, along the second direction Y, the size of the first connection portion 231 is equal to the size of the second connection portion 232 , and the size of the first overlapping portion 241 is smaller than the size of the first connection portion 231 .

[0068] Exemplarily, for the first signal trace 21, a first connection portion 231 with a larger area is set only at the position of the via 30, and a first overlapping portion 241 with a smaller area is set at the non-via overlapping position, that is, the area of ​​the coupling capacitance generated at the non-via overlapping position is reduced, which is beneficial to reduce the interlayer coupling capacitance and improve the display mura problem.

[0069] Based on the above embodiments, Fig.10FIG. 1 is a schematic diagram of a structure of a FIAA area in a display panel provided by an embodiment of the present invention. Figure 1 and Fig.10 Preferably, the display panel 10 includes a display area AA and a non-display area NA, the display area AA includes a fan-out connection area 01 and a non-fan-out connection area 02, the fan-out connection area 01 is located between the non-fan-out connection area 02 and the non-display area NA, and the first signal routing line 21 and the second sub-signal routing line 222 are at least partially located in the fan-out connection area 01.

[0070] For example, to achieve narrow frame display of the display panel, the display area AA is divided into a fan-out connection area 01 and a non-fan-out connection area 02. Figure 1 The fan-out connection area 01 is set at a position close to the lower frame of the display area AA. Due to the connection path of the first signal routing line 21 and the second signal routing line 22 in the fan-out connection area 01, the fan-out connection area 01 includes a triangular routing area 011. The display area AA outside the fan-out connection area 01 is a non-fan-out connection area 02, that is, a display area AA with normal routing. Fig.10 As shown, the second sub-signal line 222 is electrically connected to the first signal line 21 in the fan-out connection area 01 at the overlapping position on the hypotenuse of the triangular area, so that the second sub-signal line 222 is partially located in the fan-out connection area 01. The first signal line 21 extends along the first direction X and is entirely arranged in the fan-out connection area 01. Setting the fan-out connection area 01 in this way can effectively reduce the number of circuit lines set at the frame position of the display panel, which is conducive to realizing narrow frame display; and by designing the size of the overlapping portion at the overlapping position formed between the first signal line 21 and the second signal line 22, the interlayer coupling capacitance of the fan-out connection area 01, that is, the FIAA area, can be effectively reduced, thereby improving the display mura problem of the triangular line area 011.

[0071] On the basis of the above embodiments, preferably, the first sub-signal wiring 221 is located in the fan-out connection area 01 and / or the non-fan-out connection area 02 .

[0072] Exemplarily, the first sub-signal line 221 extending along the second direction Y extends from the position overlapping with the first signal line 21 and can extend from the fan-out connection area 01 to the non-fan-out connection area 02 to transmit corresponding signals to the pixel units in the entire display area AA.

[0073] Based on the above embodiments, Fig.10Optionally, the second signal routing 22 also includes a third sub-signal routing 223; along the second direction Y, the third sub-signal routing 223 is arranged on one side of the second sub-signal routing 222, and a break 26 is arranged between the second sub-signal routing 222 and the third sub-signal routing 223, and the break 26 is used to disconnect the electrical connection between the second sub-signal routing 222 and the third sub-signal routing 223.

[0074] Exemplarily, a third sub-signal routing 223 is also provided in the extension direction of the second sub-signal routing 222, and the third sub-signal routing 223 and the second sub-signal routing 222 are located on the same signal routing layer 20, but the third sub-signal routing 223 and the second sub-signal routing 222 transmit different signals. In order to ensure that the signals transmitted by the third sub-signal routing 223 and the second sub-signal routing 222 do not interfere with each other, a break 26 is provided at the junction of the second sub-signal routing 222 and the third sub-signal routing 223, and the break 26 can realize the electrical disconnection between the second sub-signal routing 222 and the third sub-signal routing 223 located on the same signal routing layer 20, so that the signal transmission is not interfered.

[0075] On the basis of the above embodiments, preferably, the third sub-signal wiring 223 and the first sub-signal wiring 221 transmit the same signal.

[0076] Exemplarily, the third sub-signal routing line 223 and the first sub-signal routing line 221 can be used as routing lines with the same function, that is, the third sub-signal routing line 223 can also transmit signals to the cathode layer of the display panel, which is not limited here.

[0077] On the basis of the above embodiments, preferably, the third signal sub-line 223 is at least partially located in the non-fan-out connection area 02 .

[0078] Exemplarily, the third sub-signal routing line 223 located in the extension direction of the second sub-signal routing line 222 can be extended from the fan-out connection area 01 to the non-fan-out connection area 02 to transmit signals to the pixel units in the entire display panel. In the case where the second sub-signal routing line 222 extends to the edge of the triangular routing area 011 in the fan-out connection area 01, the third sub-signal routing lines 223 located in the extension direction of the second sub-signal routing line 222 are all located in the non-fan-out connection area 02 to transmit signals to the pixel units in the non-fan-out connection area 02.

[0079] Based on the above embodiments, Figure 2 and Fig. 9 Optionally, at least two signal wiring layers 20 are further provided with data lines 27 extending along the second direction Y, and the data lines 27 and the first signal wiring 21 are in different layers.

[0080] The data line 27 includes a first data line 271; the orthographic projection of the first signal line 21 on the substrate overlaps with the orthographic projection of the first data line 271 on the substrate. At the overlapping position, the first signal line 21 includes a third overlapping portion 243, and the first data line 271 includes a fourth overlapping portion 244; along the second direction Y, the size of the third overlapping portion 243 is smaller than the size of the fourth overlapping portion 244.

[0081] Exemplarily, the data line 27 extending along the second direction Y is used to transmit data signals to adjacent pixel units arranged along the second direction Y to control the corresponding pixel units to emit light or turn off. The data line 27 and the first signal wiring 21 are arranged in different signal wiring layers 20, so the orthographic projection of the data line 27 on the substrate overlaps with the orthographic projection of the first signal wiring 21 on the substrate. The first data line 271 included in the data line 27 is not electrically connected to the first signal wiring 21 at the overlapping position, so along the second direction Y, the size of the third overlapping portion 243 on the first signal wiring 21 is set to be smaller than the size of the fourth overlapping portion 244 on the first data line 271, that is, the overlapping area of ​​the first data line 271 and the first signal wiring 21 at the overlapping position is reduced, which is conducive to reducing the interlayer coupling capacitance and improving the display mura problem.

[0082] Based on the above embodiments, Fig. 9 Preferably, the data line 27 and the second signal line 22 are arranged on the same layer.

[0083] Exemplarily, the data line 27 is disposed in the signal routing layer 20 where the second signal routing line 22 is located, so that the space of the signal routing layer 20 where the second signal routing line 22 is located can be reasonably utilized, which is beneficial to saving wiring space of other signal routing layers 20 .

[0084] On the basis of the above embodiments, preferably, a data line 27 is respectively provided on both sides of each second signal wiring 22 in the first direction X.

[0085] For example, a data line 27 is provided on both sides of the second signal line 22 along the first direction X, and the data line 27 can transmit data signals to the pixel units arranged along the second direction Y and adjacent to the corresponding side of the second signal line 22 to control the corresponding pixel units to emit light or turn off. In this way, the light emission control of each row of pixel units arranged along the second direction Y can be realized.

[0086] On the basis of the above embodiments, optionally, the data line 27 also includes a second data line 272, and the second data line 272 is electrically connected to the first signal line 21 through a via 30. At the position of the via 30, the first signal line 21 includes a third connection portion 233, and the second data line 272 includes a fourth connection portion 234; along the second direction Y, the size of the third connection portion 233 is equal to the size of the fourth connection portion 234.

[0087] Exemplarily, the data line 27 also includes a second data line 272 electrically connected to the first signal line 21 through a via hole 30. At the position where the via hole 30 is provided, along the second direction Y, the size of the third connection portion 233 provided on the first signal line 21 is equal to the size of the fourth connection portion 234 provided on the second data line 272, so as to provide a sufficient area for providing the via hole 30, so that the second data line 272 and the first signal line 21 can be well electrically connected through the via hole 30.

[0088] Based on the above embodiments, optionally, the connecting portion 23 and at least part of the overlapping portion 24 are of the same size and shape.

[0089] For example, the connecting portion 23 and the overlapping portion 24 having the same size as the connecting portion 23 in a certain direction may be designed to have completely the same size and shape, thereby simplifying the difficulty of the preparation process and enabling one-time preparation.

[0090] Based on the above embodiments, optionally, the shapes of the connecting portion 23 and at least part of the overlapping portion 24 include any one of a circle, a quadrilateral and a hexagon.

[0091] Exemplarily, the connecting portion 23 and at least a portion of the overlapping portion 24 can be set to any shape, which is not limited here. To reduce the difficulty of the preparation process, the connecting portion 23 and at least a portion of the overlapping portion 24 can be set to any one of a circle, a quadrilateral and a hexagon, but are not limited to the above shapes.

[0092] Based on the above embodiments, preferably, the connection portion 23 and at least part of the overlapping portion 24 are in the shape of a square with chamfered corners.

[0093] Exemplarily, according to the limitation of etching accuracy, the shape of the connection portion 23 and at least a portion of the overlapping portion 24 may be set to be a square with chamfered corners.

[0094] An embodiment of the present invention further provides a display device. Fig.11 Schematic diagram of a display device provided by an embodiment of the present invention. Fig.11As shown, the display device includes the display panel described in any of the above embodiments, and the display panel can be a mobile phone panel, a tablet panel, etc. Exemplarily, the display panel is an organic light-emitting semiconductor (OLED) display panel. The display device has the same beneficial effects as the display panel described in any of the above embodiments. Specifically, different signal routing layers located on one side of the substrate are respectively provided with a first signal routing extending along a first direction and a second signal routing extending along a second direction, and the orthographic projection of the first signal routing on the substrate and the orthographic projection of multiple second signal routings on the substrate form an overlapping position. At the connection position in the overlapping position, the first signal routing and the second signal routing are both provided with a connecting portion, and are electrically connected through a via; at the non-via overlapping position in the overlapping position, the first signal routing and the second signal routing are both provided with an overlapping portion. By setting the size of the overlapping portion of the first signal routing along the second direction to be smaller than the size of the connecting portion, and / or setting the size of the overlapping portion of the second signal routing along the first direction to be smaller than the size of the connecting portion, the overlapping area of ​​the first signal routing and the second signal routing at the non-via overlapping position can be effectively reduced, thereby reducing the interlayer coupling capacitance, which is beneficial to improving the display mura problem in the display area and further improving the display effect.

[0095] The above specific implementations do not constitute a limitation on the protection scope of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A display panel, characterized in that: include: A substrate, and at least two signal routing layers located on one side of the substrate; The at least two signal routing layers are provided with a first signal routing and a second signal routing, and the first signal routing and the second signal routing are located in different signal routing layers; the first signal routing extends along a first direction, and the second signal routing extends along a second direction, and the first direction intersects with the second direction; The orthographic projection of the first signal line on the substrate overlaps with the orthographic projections of the plurality of second signal lines on the substrate, and the first signal line is connected to at least one of the second signal lines through a via; at the position of the via, the first signal line and the second signal line respectively include a connecting portion; At a non-via overlapping position of the first signal route and the second signal route, the first signal route and the second signal route respectively include an overlapping portion, and in the first signal route, along the second direction, the size of the overlapping portion is smaller than the size of the connecting portion; and / or, in the second signal route, along the first direction, the size of the overlapping portion is smaller than the size of the connecting portion.

2. The display panel according to claim 1, characterized in that: In the first signal routing line, along the second direction, the size of the overlapping portion is equal to the size of the connecting portion; Alternatively, in the second signal routing line, along the first direction, the size of the overlapping portion is equal to the size of the connecting portion; Preferably, the signal routing layer where the second signal routing is located is located on a side of the signal routing layer where the first signal routing is located away from the substrate; along the first direction, the size of the overlapping portion in the second signal routing is equal to the size of the connecting portion; along the second direction, the size of the overlapping portion in the first signal routing is smaller than the size of the connecting portion.

3. The display panel according to claim 1, characterized in that: In addition to the positions of the via holes and the non-via-overlapping positions of the first signal routing and the second signal routing, they also include a main body; In the first signal routing, along the second direction, the size of the connecting portion is larger than the size of the main portion, and the size of the overlapping portion is larger than or equal to the size of the main portion; in the second signal routing, along the first direction, the size of the connecting portion is larger than the size of the main portion, and the size of the overlapping portion is larger than or equal to the size of the main portion.

4. The display panel according to any one of claims 1 to 3, characterized in that: The second signal routing includes a first sub-signal routing and a second sub-signal routing, the orthographic projection of the first sub-signal routing on the substrate overlaps with the orthographic projection of the first signal routing on the substrate and transmits different signals, and at the overlapping position, the first signal routing includes a first overlapping portion, and the first sub-signal routing includes a second overlapping portion; The second sub-signal routing is electrically connected to the first signal routing through the via hole, and at the position of the via hole, the first signal routing includes a first connecting portion, and the second sub-signal routing includes a second connecting portion; Preferably, along the second direction, the size of the first overlapping portion is smaller than the size of the second overlapping portion; Preferably, along the second direction, the size of the first connecting portion is equal to the size of the second connecting portion, and the size of the first overlapping portion is smaller than the size of the first connecting portion; Preferably, the display panel includes a display area and a non-display area, the display area includes a fan-out connection area and a non-fan-out connection area, the fan-out connection area is located between the non-fan-out connection area and the non-display area, and the first signal routing line and the second sub-signal routing line are at least partially located in the fan-out connection area; Preferably, the first sub-signal routing line is located in the fan-out connection area and / or the non-fan-out connection area.

5. The display panel according to claim 4, characterized in that: The second signal routing line further includes a third sub-signal routing line; along the second direction, the third sub-signal routing line is arranged at one side of the second sub-signal routing line, and a break is arranged between the second sub-signal routing line and the third sub-signal routing line, and the break is used to disconnect the second sub-signal routing line from the third sub-signal routing line electrically; Preferably, the third sub-signal routing line transmits the same signal as the first sub-signal routing line; Preferably, the third sub-signal routing line is at least partially located in the non-fan-out connection area.

6. The display panel according to any one of claims 1 to 3, characterized in that: The at least two signal wiring layers are further provided with data lines extending along the second direction, and the data lines are in different layers from the first signal wiring layers; The data line includes a first data line; the orthographic projection of the first signal line on the substrate overlaps with the orthographic projection of the first data line on the substrate, and at the overlapping position, the first signal line includes a third overlapping portion, and the first data line includes a fourth overlapping portion; along the second direction, the size of the third overlapping portion is smaller than the size of the fourth overlapping portion; Preferably, the data line and the second signal line are arranged on the same layer; Preferably, one data line is respectively arranged on both sides of each of the second signal lines in the first direction.

7. The display panel according to claim 6, characterized in that: The data line also includes a second data line, and the second data line is electrically connected to the first signal line through the via. At the position of the via, the first signal line includes a third connection portion, and the second data line includes a fourth connection portion; along the second direction, the size of the third connection portion is equal to the size of the fourth connection portion.

8. The display panel according to claim 7, characterized in that: The connecting portion and at least a portion of the overlapping portion have the same size and shape.

9. The display panel according to claim 8, characterized in that: The shapes of the connecting portion and at least part of the overlapping portion include any one of a circle, a quadrilateral and a hexagon; Preferably, the connecting portion and at least a portion of the overlapping portion are in the shape of a square with chamfered corners.

10. A display device, characterized in that: Comprising a display panel as described in any one of claims 1 to 9.

Images