Method and apparatus for bonding substrates

Abstract

An apparatus for aligning and placing electrical components, comprising: a first platform supporting at least one first electrical component, each first electrical component having a plurality of electrically conductive surfaces on a side opposite the first platform; a second platform supporting at least one second electrical component, each second electrical component having a plurality of conductive surfaces on a side opposite the second platform; a voltage source that generates a voltage between the conductive surface of the first electrical component and the conductive surface of the second electrical component; and a controller that controls relative movement between the first platform and the second platform, and conducting a corresponding one of the plurality of conductive surfaces of the first electrical component to a corresponding one of the plurality of conductive surfaces on the second electrical component based at least in part on an electrostatic force between the corresponding one of the plurality of conductive surfaces of the first electrical component and the corresponding one of the plurality of conductive surfaces on the second electrical component The electrical surfaces are aligned.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to EP application 22196903.3 filed on September 21, 2022, which is incorporated herein by reference in its entirety. Technical Field

[0003] The description herein generally relates to methods and systems for bonding two substrates. More specifically, the description herein relates to using an electric field to determine proper alignment between two substrates to be bonded. Background Art

[0004] Lithographic apparatus may be used, for example, in the manufacture of integrated circuits (ICs). In this case, a patterning device (e.g., a mask) may contain or provide a device pattern (a "design layout") corresponding to a single layer of the IC, and the pattern may be transferred to a target portion (e.g., including one or more dies) on a substrate (e.g., a silicon wafer) by a method such as irradiating the target portion with a pattern of the patterning device, which has been coated with a layer of radiation-sensitive material (a "resist"). In general, a single substrate contains a plurality of adjacent target portions to which the pattern is transferred successively, one at a time, by the lithographic apparatus. In one type of lithographic apparatus, the pattern of the entire patterning device is transferred to one target portion in one operation; such apparatus is often referred to as a stepper. In an alternative apparatus, often referred to as a stepper-scan apparatus, a projection beam is scanned across the patterning device in a given reference direction (the "scanning" direction) while the substrate is synchronously moved parallel or antiparallel to the reference direction. Different portions of the pattern of the patterning device are transferred stepwise to one target portion. In general, since the lithographic apparatus will have a magnification factor M (typically <1), the speed F at which the substrate is moved will be a factor M times the speed at which the projection beam scans the patterning device.

[0005] Before the pattern is transferred from the pattern forming device to the substrate, the substrate can undergo various processes, such as primer coating, resist coating, and soft baking. After exposure, the substrate can undergo other processes, such as post-exposure baking (PEB), development, hard baking, and measurement / inspection of the transferred pattern. This series of processes is used as the basis for manufacturing a single layer of a device (e.g., IC). The substrate can then undergo various processes, such as etching, ion implantation (doping), metallization, oxidation, chemical mechanical polishing, etc., which are intended to refine the single layer of the device. If several layers are required in the device, the entire process or its variation is repeated for each layer. Eventually, there will be a device in each target portion on the substrate. Then, these devices are separated from each other by techniques such as cutting or sawing, whereby independent devices can be mounted on a carrier, connected to pins, etc.

[0006] Therefore, manufacturing devices (such as semiconductor devices) generally involves using several manufacturing processes to process substrates (e.g., semiconductor wafers) to form various features and multiple layers of the device. These layers and features are generally manufactured and processed using, for example, deposition, photolithography, etching, chemical mechanical grinding, and ion implantation. Multiple devices can be made on multiple dies on a substrate, and then these devices are separated into independent devices. The device manufacturing process can be considered as a patterning process. The patterning process involves using a patterning device in a lithography device to perform a patterning step (such as optical and / or nanoimprint lithography) to transfer the pattern on the patterning device to the substrate, and generally but optionally involves one or more related pattern processing steps, such as resist development by a developing device, baking the substrate using a baking tool, using an etching device and etching using a pattern, etc.

[0007] When assembling electronic devices from multiple substrates, a bonding operation is used. For example, a first substrate having a plurality of conductive pads may need to be attached to a second substrate having a corresponding plurality of conductive pads. In order for the assembled device to function properly, corresponding pad pairs should be assembled in register with each other so that electrical contact exists between the desired conductor pairs on the two devices. Summary of the invention

[0008] In an embodiment, a device for aligning and placing electrical components includes: a first platform, which is configured and arranged to support at least one first electrical component in use, each first electrical component having multiple conductive surfaces on a side away from the first platform; a second platform, which is configured and arranged to support at least one second electrical component, each second electrical component having multiple conductive surfaces on a side away from the second platform; a voltage source, which is configured and arranged to generate a voltage between the conductive surface of the first electrical component and the conductive surface of the second electrical component; and a controller, which is configured and arranged to control the relative movement between the first platform and the second platform, and align the corresponding conductive surfaces of the multiple conductive surfaces of the first electrical component with the corresponding conductive surfaces of the multiple conductive surfaces on the second electrical component based at least in part on the electrostatic force between the corresponding conductive surfaces of the multiple conductive surfaces of the first electrical component and the corresponding conductive surfaces of the multiple conductive surfaces on the second electrical component.

[0009] In an embodiment, a method for aligning and placing electrical components using a first platform supporting at least one first electrical component and a second platform supporting at least one second electrical component, each first electrical component having at least one conductive surface on a side away from the first platform, and each second electrical component having at least one conductive surface on a side away from the second platform, the method comprising: applying a voltage between the at least one conductive surface of the at least one first electrical component and the at least one conductive surface of the at least one second electrical component, controlling the relative movement between the first platform and the second platform to perform alignment between corresponding ones of the conductive surfaces based on electrostatic forces between the corresponding ones of the conductive surfaces.

[0010] In an embodiment, a computing system is provided, the computing system including a processor and a memory, and including a non-transitory machine-readable medium including instructions for executing the aforementioned method.

[0011] In an embodiment, a computer program product is provided. The computer program product includes a computer non-transitory readable medium having instructions recorded thereon. The instructions implement the aforementioned method when executed by a computer. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 A schematic diagram of a lithography apparatus is illustrated;

[0013] Figure 2 An embodiment of a lithographic cell or cluster is depicted;

[0014] Figure 3 is a schematic diagram of a die alignment apparatus according to an embodiment;

[0015] Figure 4 is a schematic diagram of an embodiment of a retainer incorporated into a die alignment apparatus according to an embodiment;

[0016] Figure 5 is a schematic diagram of an electrostatic chuck according to an embodiment;

[0017] 6a and 6b schematically illustrate two embodiments of perimeter alignment marks for calibration operations according to an embodiment;

[0018] FIG7a is a flow chart illustrating a process according to an embodiment;

[0019] FIG7b is a flow chart illustrating a process according to an embodiment;

[0020] Figure 8 is a graph of attraction versus distance; and

[0021] Fig. 9is a schematic diagram of a tortuous scan path to be used during the alignment process. DETAILED DESCRIPTION

[0022] Figure 1 A lithographic apparatus LA in association with which the techniques described herein may be utilized is schematically depicted. The apparatus comprises an illumination optical system (illuminator) IL configured to condition a radiation beam B (e.g., UV radiation or DUV radiation), a patterning device support or support structure (e.g., mask table) MT configured to support a patterning device (e.g., mask) MA and connected to a first positioner PM configured to accurately position the patterning device according to certain parameters, one or more substrate stages (e.g., wafer stages) WTa, WTb configured to hold a substrate (e.g., a resist-coated wafer) W and connected to a second positioner PW configured to accurately position the substrate according to certain parameters, and a projection optical system (e.g., a refractive, reflective, or catadioptric optical system) PS configured to project a pattern imparted to the radiation beam B by the patterning device MA onto a target portion C (e.g., comprising one or more dies) of the substrate W.

[0023] The illumination optical system may include various types of optical components for directing, shaping or controlling radiation, such as refractive, reflective, magnetic, electromagnetic, electrostatic or other types of optical components, or any combination thereof. In this particular case, the illumination system also includes a radiation source SO.

[0024] The patterning device support holds the patterning device in a manner that depends on the orientation of the patterning device, the design of the lithographic apparatus, and other conditions, such as whether the patterning device is held in a vacuum environment. The patterning device support may use mechanical, vacuum, electrostatic, or other clamping techniques to hold the patterning device. The patterning device support may be, for example, a frame or table, which may be fixed or movable as desired. The patterning device support may ensure that the patterning device is in a desired position, for example, relative to a projection system. Any use of the term "reticle" or "mask" herein may be considered synonymous with the more general term "patterning device".

[0025] The term "patterning device" as used herein should be broadly interpreted as referring to any device that can be used to impart a radiation beam with a pattern in its cross-section so as to produce a pattern in a target portion of the substrate. It should be noted that, for example, if the pattern imparted to the radiation beam includes phase-shifting features or so called assist features, the pattern may not exactly correspond to the desired pattern in the target portion of the substrate. In general, the pattern imparted to the radiation beam will correspond to a specific functional layer in a device (such as an integrated circuit) produced in the target portion.

[0026] The patterning device may be transmissive or reflective. Examples of patterning devices include masks, programmable mirror arrays, and programmable LCD panels. Masks are well known in photolithography and include mask types such as binary, alternating phase-shift, and attenuated phase-shift, as well as various hybrid mask types. An example of a programmable mirror array employs a matrix arrangement of small mirrors, each of which can be independently tilted to reflect an incident radiation beam in different directions. The tilted mirrors impart a pattern in the radiation beam reflected by the matrix of mirrors.

[0027] As depicted here, the apparatus is of the transmissive type (e.g., employing a transmissive patterning device). However, the apparatus may be of the reflective type (e.g., employing a programmable mirror array of the type mentioned above, or employing a reflective mask). The apparatus may employ a patterning device of a different kind than a classical mask; examples include a programmable mirror array or an LCD matrix.

[0028] The lithographic apparatus may also be of a type in which at least a portion of the substrate may be covered by a liquid having a relatively high refractive index, such as water, so as to fill the space between the projection system and the substrate. Immersion liquid may also be applied to other spaces in the lithographic apparatus, such as the space between the mask and the projection system. Immersion techniques are well known in the art for increasing the numerical aperture of a projection system. The term "immersion" as used herein does not mean that structures such as the substrate must be immersed in the liquid, but only means that the liquid is located between the projection system and the substrate during exposure.

[0029] refer to Figure 1 , the illuminator IL receives a radiation beam from a radiation source SO (e.g. a mercury lamp or an excimer laser, an LPP (laser produced plasma) EUV source). For example, when the source is an excimer laser, the source and the lithographic apparatus may be separate entities. In these cases, the source is not considered to form part of the lithographic apparatus, and the radiation beam is transferred from the source SO to the illuminator IL by means of a beam delivery system BD comprising, for example, suitable guiding mirrors and / or a beam expander. In other cases, such as when the source is a mercury lamp, the source may be an integral part of the lithographic apparatus. The source SO and the illuminator IL together with the beam delivery system BD, if necessary, may be referred to as a radiation system.

[0030] The illuminator IL may include an adjuster AD for adjusting the spatial and / or angular intensity distribution of the radiation beam. In general, at least the outer radial extent and / or the inner radial extent (commonly referred to as σ outer and σ inner, respectively) of the intensity distribution in a pupil plane of the illuminator may be adjusted. In addition, the illuminator IL may include various other components, such as an integrator IN and a condenser CO. The illuminator may be used to condition the radiation beam to have a desired uniformity and intensity distribution in the cross-section of the radiation beam.

[0031] The radiation beam B is incident on a patterning device (e.g. a mask) MA held on a patterning device support (e.g. a mask table) MT and is patterned by the patterning device. Having traversed the patterning device (e.g. a mask) MA, the radiation beam B passes through the projection optical system PS which focuses the beam onto a target portion C of the substrate W, thereby projecting an image of the pattern onto the target portion C. With the aid of a second positioner PW and a position sensor IF (e.g. an interferometric measurement device, a linear encoder, a 2D encoder or a capacitive sensor), the substrate table WT can be accurately moved, for example in order to position different target portions C in the path of the radiation beam B. Similarly, the first positioner PM and the further position sensor (not shown) are arranged in a manner such that ... Figure 1 ) can be used to accurately position the patterning device (eg, mask) MA relative to the path of the radiation beam B, for example after mechanical retrieval from a mask library or during scanning.

[0032] The patterning device (e.g., mask) MA and substrate W may be aligned using patterning device alignment marks M1, M2 and substrate alignment marks P1, P2. Although the substrate alignment marks as illustrated occupy dedicated target portions, the substrate alignment marks may be located in spaces between target portions (these marks are referred to as scribe alignment marks). Similarly, in situations where more than one die is provided on the patterning device (e.g., mask) MA, the patterning device alignment marks may be located between the dies. Smaller alignment marks may also be included within the die in a device feature, in which case it is desirable to make the mark as small as possible and without requiring any imaging or processing conditions that are different from those of adjacent features. An alignment system for detecting alignment marks is further described below.

[0033] The lithographic apparatus LA in this example belongs to the so-called dual-platform type, which has two substrate tables WTa, WTb and two stations-exposure station and measurement station-the substrate table can be interchanged between the two tables. While exposing one substrate on one substrate table at the exposure station, another substrate can be loaded onto another substrate table at the measurement station and various preparatory steps are performed. The preparatory steps may include using a horizontal sensor LS to map the surface control of the substrate, using an alignment sensor AS to measure the position of the alignment mark on the substrate, performing any other type of measurement or inspection, etc. This achieves a significant increase in the throughput of the equipment. More generally, the lithographic apparatus may be of a type having two or more stages (e.g., two or more substrate stages, substrate stages and measurement stations, two or more pattern forming device stages, etc.). In these "multi-platform" devices, multiple stages may be used in parallel, or preparatory steps may be performed on one or more stages while one or more other stages are used for exposure. For example, a dual-platform lithographic apparatus is described in U.S. Pat. No. 5,969,441, which is incorporated herein by reference in its entirety.

[0034] Although the level sensor LS and alignment sensor AS are shown adjacent to the substrate table WTb, it will be appreciated that the level sensor LS and alignment sensor AS may additionally or alternatively be provided adjacent to the projection system PS for measuring relative to the substrate table WTa.

[0035] The depicted apparatus may be used in a variety of modes including, for example, step mode or scan mode.The construction and operation of lithographic apparatus are well known to those skilled in the art and need not be described further in order to understand embodiments of the present invention.

[0036] like Figure 2 As shown in , the lithography equipment LA forms part of the lithography system, and a part of the lithography system is called a lithography unit LC or a lithography unit or a cluster. The lithography unit LC may also include equipment for performing pre-exposure processes and post-exposure processes on the substrate. Typically, these devices include a spin coater SC for depositing a resist layer, a developer DE for developing the exposed resist, a chill plate CH, and a baking plate BK. The substrate handler or robot RO picks up the substrate from the input / output ports I / O1, I / O2, moves the substrate between different process equipment, and then transfers the substrate to the feed station LB of the lithography equipment. These devices, which are often collectively referred to as track or development and coating systems, are under the control of the track or development and coating system control unit TCU, which itself is controlled by the management control system SCS, and the management control system SCS also controls the lithography equipment via the lithography control unit LACU. Therefore, different equipment can be operated to maximize production volume and processing efficiency.

[0037] The pattern forming device mentioned above includes or can form one or more design layouts or patterns (hereinafter referred to as design patterns for convenience). The design pattern can be generated using a CAD (computer-aided design) program, which is often referred to as EDA (electronic design automation). Most CAD programs follow a predetermined set of design rules to generate a functional design pattern / pattern forming device. These rules are set by processing and design restrictions. For example, the design rule defines the space tolerance between circuit devices (such as gates, capacitors, etc.) or interconnects to ensure that the circuit devices or lines do not interact with each other in an undesirable manner. One or more of the design rule restrictions can be referred to as a "critical dimension" (CD). The critical dimension of a circuit can be defined as the minimum width of a line or hole, or the minimum space between two lines or two holes. Therefore, CD determines the overall size and density of the designed circuit. Of course, one of the goals in integrated circuit manufacturing is to faithfully reproduce the original circuit design on the substrate (via a pattern forming device).

[0038] The illumination system provides illumination (i.e., radiation) in the form of an illumination pattern to a patterning device, and the projection system directs and shapes the illumination via the patterning device onto the substrate via an aerial image (AI). The illumination pattern defines the characteristics of the illumination, such as the angular or spatial intensity distribution (e.g., conventional, dipole, annular, quadrupole, etc.), illumination mean square deviation (σ) settings, etc. The aerial image (AI) is the radiation intensity distribution at the substrate level. A resist layer on the substrate is exposed, and the aerial image is transferred to the resist layer as a latent image "resist image" (RI) therein. The resist image (RI) can be defined as the spatial distribution of the solubility of the resist in the resist layer.

[0039] A set of conditions for imaging can be considered, and for all possible sets of conditions, the process window of a pattern is the space in the set of conditions for processing parameters used to generate the pattern so that satisfactory imaging of the pattern is achieved. That is, for a given pattern, there may be a set of values ​​of depth of focus, illumination intensity, illumination pattern, numerical aperture, and other controllable variables that produce an image with sufficiently good imaging of lines or features including line width, pitch, or other aspects of the imaging pattern defined to meet the specifications for the desired imaging. The process window gives an indication of the sensitivity of the process to changes in input parameters such as radiation dose.

[0040] Processing parameters are parameters of the patterning process. The patterning process may include processes upstream and downstream of the actual lithographic transfer of the pattern. Processing parameters may belong to several categories. The first category may be parameters of the lithographic apparatus or any other equipment used in the patterning process. Examples of this category include parameters of the illumination system, projection system, substrate stage, etc. of the lithographic apparatus. The second category may be parameters of any process performed in the patterning process. Examples of this category include focus, dose, bandwidth, exposure duration, development temperature, chemical composition used in development, etc. The third category may be parameters of the designed pattern. Examples of this category may include resolution enhancement technology (RET) or optical proximity correction adjustments, such as the shape and / or position of assist features. The fourth category may be parameters of the substrate. Examples include characteristics of structures below the resist layer, the chemical composition of the resist layer, and / or the physical dimensions of the resist layer. The fifth category may be parameters representing characteristics of temporal variations of one or more parameters of the patterning process. Examples of this category include characteristics of high-frequency stage movement (e.g., frequency, amplitude, etc.), high-frequency laser bandwidth variation (e.g., frequency, amplitude, etc.), and / or high-frequency laser wavelength variation. These high frequency changes or movements are those that are higher than the response time of the mechanisms used to adjust the underlying parameters (e.g., stage position, laser intensity, etc.) A sixth category may be characteristics upstream or downstream of exposure, such as post-exposure baking (PEB), development, etching, deposition, resist application, doping, and / or packaging.

[0041] After the manufacturing step but before the final packaging step, a cutting step is usually performed. Cutting can be performed by any of several mechanisms (including conventional sawing machines, plasma-assisted cutting, or laser cutting), any of which can be conventional or invisible (i.e., erosion occurs in the body portion of the wafer rather than at the surface). Regardless of which method is used, the wafer is cut into dozens of desired final chip size dies. Cutting occurs along the scribe lines, which should be arranged with specific restrictions (such as avoiding active areas or metal lines that intersect with the scribe lines). The scribe lines will often include printed features such as alignment marks, which are related to the imaging process but not to the final desired chip. In an embodiment, plasma-assisted cutting is used, because plasma-assisted cutting can provide very precise cutting and smooth the edges leading to the die, which allows relatively more precise mechanical alignment in the initial steps as discussed in more detail below.

[0042] Included in the broad category of packages are assemblies of multiple substrate devices. As technology advances to advanced nodes, it is useful to increase the performance of the resulting microprocessor through innovations in scaling at the size, device, circuit, and architecture levels. Improving performance per dollar with upcoming nodes has become challenging because the boost introduced by the size, device, and circuit level scaling engines has plateaued. Therefore, 3D stacking has become a promising candidate to continue to find improvements.

[0043] Building 3D structures generally involves wafer-to-wafer stacking and subsequent bonding operations, and such stacking and bonding are already important manufacturing steps in producing, for example, CMOS image sensors and 3D NAND devices. Stacking memory directly on logic is also considered to reduce the bottleneck caused by having to incorporate a bus between the memory and the logic functions within the device (von Neumann bottleneck).

[0044] Thus, stacking can include: memory on memory, logic on logic, or memory on logic. In each case, one or more dies are stacked onto another die. The two dies can be interconnected (bonded) by through silicon vias (TSVs) or by other suitable contact pads that can be used on the separate dies. By using a 3D stacking approach, performance per dollar can continue to increase without having to shrink the size of the individual functional elements of the device.

[0045] Therefore, the inventors have recognized the need for a high speed lamination tool that can also produce good alignment accuracy.Current tools for this purpose tend to be either high accuracy or high volume, but not both.

[0046] exist Figure 3 In the embodiment illustrated in FIG. 1 , the stacking device 100 includes a top platform 102 and a bottom platform 104. The platforms 102, 104 can move relative to each other. That is, although one or both platforms can move in six degrees of freedom (i.e., in the x-direction, the y-direction, and the z-direction, and in the corresponding rotation r x 、r y and r zIn the embodiment of the present invention, the stacking device 100 can be moved on the two platforms, but in fact one of the two platforms can be fixed and the other can be movable. It is not important whether the top or bottom platform is movable, and it is not important whether any one platform or both platforms are movable, as long as there is the ability to move the platforms relative to each other in six degrees of freedom. In the case where the electric field between the tube cores is large, the stacking device 100 can be located in a vacuum chamber 122 to avoid problems related to the breakdown voltage of the air dielectric. In this case, a load lock system 124 for the vacuum chamber will also be included. It should be noted that, in general, when referring to "top" and "bottom" in the text, these components can be reversed. Similarly, although there may be advantages in horizontal orientation, these components can be arranged in any orientation (e.g., vertical orientation).

[0047] Each platform 102, 104 includes a holder 106, 108, which may include one or more recesses 110 (in Figure 4 ), each of the recesses is adapted to receive a corresponding die, wafer, or substrate. Figure 3 In the embodiment, each retainer 106, 108 is represented by a single recess 110. In an embodiment, each recess is slightly larger than the die that each recess is intended to hold. That is, the die has a diameter of about tens, hundreds, or thousands of mm. 2 The size of the recess is 1 μm, and the recess has a margin of L μm on each side. Here L may be about 1 μm, 10 μm, or 100 μm. The upper holder 106 holds the upper die 112 , while the lower holder 108 holds the lower die 114 .

[0048] In an embodiment, the top platform 102 can be actuated in six degrees of freedom and the bottom platform is fixed. Although each platform is connected to a voltage source (see Figure 5 ) to generate an electrostatic clamping force on the die held by the platform, but any clamping method can replace the electrostatic clamping. In principle, the lower platform 104 does not need an electrostatic clamp, because strictly speaking only the upper platform 102 is required to hold its die, because gravity will keep the die in the lower platform 104. However, in order to reduce the risk of the bottom die moving, it may also be useful to include a clamping mechanism in the lower platform 104. Such clamping can include any fixation of the bottom die, including vacuum, electrostatic clamping, adhesive paper, etc. The electrostatic clamping force can, for example, be provided as a DC voltage.

[0049] In an embodiment, the electrostatic chuck is arranged as Figure 5. A portion of the electrostatic clamp 200 of the platform includes a conductive layer 202 and a dielectric layer 204. The dielectric layer may include fingers or burls 206 for contacting a reduced area of ​​a die or wafer 208 when the die or wafer 208 is held by the chuck. A bipolar potential is applied to the conductive layer 202 using a DC voltage source 210. The same general structure can be used for both the top platform 102 and the bottom platform 104. As mentioned above, the top and bottom can be reversed, or the platform can be vertical instead of horizontal.

[0050] In each of these platforms, the clamps are designed to reduce the movement of the wafer or die held thereby in the z direction, specifically, where z is considered to be the direction perpendicular to the supporting platform. That is, the upper chuck supports the upper wafer or die and prevents it from falling, while the lower chuck supports the lower wafer or die and prevents it from being lifted by any upward force. In addition, the normal force generated by the chuck enhances the friction between the chuck and the supported object, thereby reducing movement in the x and y directions and in the rotational direction. The recessed structure further reduces the ability of each supported object to move. The clamping pressure in the bottom platform can be arbitrarily high, for example, with a DC voltage of 3.2 kV, a clamping pressure of 0.41 bar can be achieved across the wafer.

[0051] like Figure 3 As seen in FIG. 1 , the top platform 102 may include an array of rollers 113, rather than the fingers used on the lower side. Due to the rollers, the clamping pressure (in use) will only constrain the substrate or die in the z-direction, while the rollers allow the substrate or die to move in a plane defined by the distal ends of the rollers, such as Figure 3 Translation and / or rotation in the xy plane as shown in . The rollers can be, for example, cylindrical rollers, or spherical rollers. In an embodiment, each recess includes a set of five spherical rollers, one spherical roller at or near each corner, and one spherical roller in a center position. In another embodiment, the top platform 102 may include an array of fingers that allow the top tube core to slide relative to the top platform. That is, although the fingers are rigid in the z direction, a low friction force is applied that opposes the lateral movement of the tube core. As with the lower platform 104, the recess limits overall movement beyond the range of L μm allowed due to the space between the recess wall and the substrate. Here L can be approximately 1 μm or 10 μm or 100 μm.

[0052] In an embodiment, the clamp is designed to generate a clamping force. In the top platform 102, the clamping force is configured to only slightly overcome the gravity pulling on the supported die due to the weight of the supported die. As an example, a typical clamping force to overcome the gravity of a silicon-based die is 0.18 millibars, and the corresponding clamping DC voltage may be slightly less than 100 V.

[0053] The DC voltage source 120 is configured to apply an alignment voltage to each of the upper die and the lower die. The alignment voltage is applied to the conductors on the die so that a force is generated between the upper die and the lower die so that the upper die and the lower die become aligned. This will be discussed in more detail below.

[0054] The upper tube core 112 and the lower tube core 114 have corresponding conductive pads 116, 118, and the conductive pads 116, 118 correspond to the corresponding electrical characteristics of the tube core. These conductive pads 116, 118 are aligned and combined so that the stack can act as a single device. In an embodiment, the alignment method can be applied to align the TSV of one chip to the pad of another chip, or to align the TSV of two chips with each other. In an alternative embodiment, any of the tube cores may include a conductive alignment pad, which is a conductive pad specially designed and / or only used for the electrostatic alignment. In this embodiment, the TSV can be, for example, relatively small, and a dedicated conductive alignment pad can be used to achieve better alignment. Such conductive alignment pads may not need to be combined to produce an electrical connection between the two tube cores. In addition, in order to enhance the tight bonding between the two tube cores, the bonding can be applied to the corresponding conductive alignment pads.

[0055] The voltage source 120 is arranged to apply opposite charges to the conductive pads 116, 118. In an embodiment, this is an AC voltage source. In an embodiment, although a DC voltage source may be provided, the DC voltage used for clamping should then be a unipolar DC source rather than a DC source. Figure 5 Similarly, a dipole DC voltage can be used for clamping and a discrete monopolar DC voltage for alignment.

[0056] Fig. 6a and Fig. 6b illustrate an embodiment in which alignment marks 250 are included in the peripheral area around each tube core. Alignment marks 250 can be a completely encircling line of metal, or can use dotted lines as shown in Fig. 6a and Fig. 6b respectively. Alignment marks 250 do not have to be only at the periphery, and if there is sufficient space in the design, alignment marks 250 can also be included in the tube core. Alignment marks do not need but can be used to provide a rough / fine alignment step as further described below. And, as indicated above, such alignment marks may not need to be used to combine two tube cores together, but can only be used for rough / fine alignment. In addition to specific reference to rough alignment or fine alignment, the term "alignment" herein can refer to rough and / or fine alignment throughout this specification.

[0057] The method 300 of aligning two objects for stacking and bonding will now be described with reference to the flowchart of FIG. 7 a. In the first step (step 302), a model-based calculation is performed to determine the energy landscape. Specifically, for a given configuration, the spacing distance between the two platforms, the selected voltage, and the defined layout of the electrical components on the tube core to be bonded, there is a global minimum of the energy landscape. The various relative orientations between the top / bottom platforms can be traversed to study the complete energy landscape for each given configuration. The landscape, the global minimum energy, and the slope of the landscape around the minimum will be determined, such as calculated, before performing the physical alignment step. Since multiple identical tube cores are likely to be processed in reality, the calculation step can be considered as a pre-operation step that does not necessarily need to be repeated for each stacking and bonding process. In an alternative method (rather than a model-based calculation), one or more measurements can be performed to establish an energy landscape. Typically, the method will perform measurements for several tube cores for a given layout, and determine the average measurement to be used for the energy landscape.

[0058] This minimum energy will be used to determine a "threshold friction" between the roller and the die. The threshold friction will ensure that any local minimum in the energy landscape will be overcome via the pull of the roller against the die. However, once the global minimum is reached, the roller will not be able to move the die out of alignment, i.e., the die will roll freely relative to its platform and still remain in its aligned position as the platform is scanned. The determined threshold friction and the path of the scan pattern can be said to operate in conjunction with the matching scheme.

[0059] In the next step 304, the upper die 112 is placed in the recess 110 of the upper holder 106, and the lower die 114 is placed in the corresponding recess 112 of the lower holder 108 in the proper orientation that matches the orientation of the corresponding die. As will be appreciated, in a typical assembly operation, each corresponding recess of each holder will have a die placed therein so that an array of several dies can be aligned and bonded simultaneously.

[0060] Where multi-die packaging is desired, for example, each upper cavity may have two or more objects therein (e.g., NAND memory, DRAM, or high bandwidth memory to be bonded to a common logic circuit substrate held in the corresponding lower cavity). Alternatively, a group of upper cavities may correspond to a single lower cavity, or vice versa.

[0061] This placement in the recess results in an overall alignment equal to the leeway available in the recess (e.g., L μm on a side), which means an overlay accuracy of about 2×L μm, based on mechanical considerations alone. Here L may be about 1 μm or 10 μm or 100 μm. In order to obtain good mechanical alignment at this stage, it is useful to ensure that the die has been cut to a high degree of accuracy before assembly.

[0062] Next, a rough alignment step 306 is optionally performed. During this stage, the vertical distance between the upper and lower platforms can be reduced to, for example, a distance of 0.5 mm or less, such as a range of 100 μm to 500 μm. The metal forming the alignment mark 250 or conductive pad has a voltage applied to it so that charge accumulates, thereby generating an electric field between the upper die and the lower die. The alignment marks 250 or conductive pads 116, 118 are attracted to each other due to the accumulated charge, and the upper die moves on its rollers in the xy plane in order to minimize lateral forces caused by the charge accumulation, which occur when the upper alignment mark 250 or conductive pad 116, 118 is aligned with the corresponding lower alignment mark 250 or conductive pad 116, 118.

[0063] The actual alignment step 308, also referred to as fine alignment 308, is performed by bringing the die closer, for example, to a distance between 10 μm and 100 μm. During this step, the charge accumulated on the alignment marks 250 or the conductive pads 116, 118 will generate an even higher attractive force. The attractive force at perfect alignment will be sufficiently large enough to overcome the frictional forces at the interface between the upper die and the upper platform. Thus, the upper die is held aligned with the lower die while the top platform continues to move.

[0064] After alignment or fine alignment is completed, the parts are stacked and bonded together in step 310. In an embodiment, the electrostatic clamp of the top die is released and the die falls to its properly aligned position under gravity. In an embodiment, the release can be performed over time with a gentle decrease in the clamping force, thereby allowing smooth movement of the die. Other methods of contacting the die with each other can be used, including moving the die together through relative movement between platforms. In one embodiment, some of the alignment marks 250, conductive pads 116, 118 are bonded under the action of van der Waals forces at room temperature without adhesive. Such bonding has the following advantages: wherein any stress induced in the bonding material is minimized. After bonding by van der Waals forces, the mutual diffusion of conductors can produce stronger metallic bonds. The optional annealing step 310 can be used to accelerate the process at higher temperatures.

[0065] An alternative method 300' is illustrated in FIG7b. A mechanical alignment step 304 is performed by placing the die in its respective recess. After the mechanical alignment step, the capacitance is determined 320. In this step, the top and bottom platforms are moved in a zigzag manner relative to each other, and the capacitance is measured. A global maximum of the capacitance is determined, which corresponds to the aligned position of the die. During this measurement, the gap between the platforms may be on the order of a few microns, tens of microns, or hundreds of microns.

[0066] Next, an actuation step 322 is performed in which each die in the top platform is actuated separately in the x and y directions to achieve the global maximum capacitance determined at 320. Finally, the parts are bonded together 310.

[0067] By way of example, the typical pressure due to gravity on silicon is 18 Pa. To support the top die, the clamping force must be slightly higher than the pressure due to gravity. The clamping force can be set to, for example, 25 Pa, in which case the friction force moving the die on the roller bead sideways will be μ r (25-18) Pa << 7 Pa, because the coefficient of rolling friction μ r << 1. Figure 8 An example of a 1 μm via with a 2 μm pitch is shown, where the frictional force for lateral alignment can be overcome by applying 200V at a gap of 60 μm or less. 2 , and therefore P can also be increased by increasing the magnitude of the applied voltage V.

[0068] Because the overlay accuracy of the overall mechanical alignment is only 2×L μm, it is possible that the electrostatic attraction corresponding to lateral misalignment is too great for the stage motion to move the die to a properly aligned orientation. For example, a local energy minimum may be encountered outside the perfectly aligned position. One way to avoid this is to relatively scan the stages so that the appropriate global minimum energy configuration is achieved, as well as proper alignment of the relevant features. In the example, using Fig. 9 . Although the path is shown as having a square wave shape with sharp corners, the corners can also be rounded to a more sinusoidal shape. Using this method will tend to result in reduced jerk because the direction changes are distributed over time rather than instantaneous. Because the top tube core can move freely in the xy plane, larger jerks may cause undesirable inertial relative movement of the tube core. In other embodiments, in addition to the left and right interactive writing movement, the top platform can use actuators to move with rotational freedom in rx, ry and rz so that individual tube cores find the global minimum.

[0069] During fine alignment (308) using alignment marks 250 and conductive pads 116, 118, a pattern of n horizontal strokes (n / 2 outward and n / 2 return) is completed, where each long stroke in the x-direction covers a distance of approximately 2×L μm, and each corresponding short stroke in the y-direction covers s μm, where L is the room in the recess and s is the required bonding accuracy, typically s is half the size of the conductive via / pad. The number of strokes, n, is approximately L / s. In this way, a zone of 2×L μm×2×L μm in area is scanned. Once alignment is achieved, the top die will remain fixed relative to the bottom die even when the stage is scanned relatively.

[0070] Embodiments may include computer-readable media programmed with instructions that, when executed, perform any of the methods described herein. In addition, various aspects of the present application may take the form of a computer program product embodied in any one or more physical computer-readable media, any one or more computer-readable media having computer-usable program code embodied thereon.

[0071] Any combination of one or more computer-readable media may be used. A computer-readable medium may be a computer-readable signal medium or a computer-readable storage medium. A computer-readable storage medium may be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, device, apparatus, or any suitable combination of the foregoing. More specific examples (non-exhaustive list) of computer-readable media would include the following: an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. In the context of the content of this document, a computer-readable storage medium may be any tangible medium that may contain or store a program for use by or in conjunction with an instruction execution system, device, or apparatus.

[0072] The computer program instructions may also be loaded onto a computer, other programmable data processing device, or other apparatus to cause a series of operational steps to be performed on the computer, other programmable device, or other apparatus to produce a computer-implemented program, so that the instructions executed on the computer or other programmable device provide a process for implementing the functions / actions specified in one or more flowcharts and / or block diagram blocks.

[0073] A data processing system suitable for storing and / or executing program code will include at least one processor that is directly or indirectly connected to a memory element via a system bus. The memory element may include a local memory, a bulk memory, and a temporary storage of at least some program code to reduce the number of times that program code must be obtained from the bulk memory during execution.

[0074] Input / output or I / O devices (including but not limited to keyboards, displays, pointing devices, etc.) may be coupled to the system either directly or through intervening I / O controllers. Network adapters may also be coupled to the system to enable the data processing system to become coupled to other data processing systems or remote printers or storage devices through intervening private or public networks. Modems, cable modem and Ethernet cards are just a few of the currently available types of network adapters.

[0075] Embodiments of the present disclosure are defined in the following numbered aspects.

[0076] Aspect 1: A device for aligning and placing electrical components, comprising:

[0077] a first platform configured and arranged to support, in use, at least one first electrical component, each first electrical component having a plurality of conductive surfaces on a side remote from the first platform;

[0078] a second platform configured and arranged to support at least one second electrical component, each second electrical component having a plurality of conductive surfaces on a side remote from the second platform;

[0079] a voltage source configured and arranged to generate a voltage between the conductive surface of the first electrical component and the conductive surface of the second electrical component;

[0080] a controller configured and arranged to control relative movement between the first platform and the second platform and to align corresponding ones of the plurality of conductive surfaces of the first electrical component with corresponding ones of the plurality of conductive surfaces on the second electrical component based at least in part on electrostatic forces between corresponding ones of the plurality of conductive surfaces of the first electrical component and corresponding ones of the plurality of conductive surfaces on the second electrical component.

[0081] Aspect 2: The apparatus of Aspect 1, wherein the first platform is configured and arranged to support the at least one first electrical component using a plurality of rollers, the rollers providing the at least one first electrical component with freedom of movement in a direction substantially parallel to the first platform.

[0082] Aspect 3: The apparatus of Aspect 1, wherein the first platform is configured and arranged to support the at least one first electrical component using a plurality of fingers, the fingers providing the at least one first electrical component with freedom of movement in a direction substantially parallel to the first platform.

[0083] Aspect 4: The apparatus according to any one of aspects 1 to 3, wherein the first platform supports the at least one first electrical component using a first clamp and the second platform supports the at least one second electrical component using a second clamp.

[0084] Aspect 5: An apparatus as described in Aspect 4, wherein the controller further controls the clamping force of the first clamp of the first platform to a threshold value, and the threshold value of the clamping force is selected so that when the conductive surface of the at least one first electrical component is aligned with the conductive surface of the at least one second electrical component, the friction force between the first platform and the at least one first electrical component allows substantially free movement relative to each other.

[0085] Aspect 6: The apparatus of aspect 4 or 5, wherein the controller is further configured to release the first clamp after aligning the at least one first electrical component with the at least one second electrical component.

[0086] Aspect 7: The device according to any one of aspects 1 to 6, wherein the platform is configured and arranged to move relatively between the at least one first electrical component and the at least one second electrical component in a left-right alternating writing pattern.

[0087] Aspect 8: The device according to aspect 7, wherein corners of the left-right alternating writing pattern are rounded.

[0088] Aspect 9: The apparatus of any one of aspects 1 to 8, wherein the platform is configured for relative movement between the at least one first electrical component and the at least one second electrical component in six degrees of freedom.

[0089] Aspect 10: The apparatus of any one of aspects 1 to 9, wherein the first platform comprises at least one recess sized to accommodate a corresponding one of the at least one first electrical component.

[0090] Aspect 11: The apparatus of any one of aspects 1 to 10, wherein the second platform comprises at least one recess sized to accommodate a corresponding one of the at least one second electrical component.

[0091] Aspect 12: An apparatus as described in any one of Aspects 1 to 9, wherein the first platform includes at least one first recess sized to accommodate a corresponding one of the at least one first electrical component, and the second platform includes at least one second recess sized to accommodate a corresponding one of the at least one second electrical component, wherein the first recess and the second recess are configured to provide initial mechanical alignment between the at least one first electrical component and the at least one second electrical component.

[0092] Aspect 13: The apparatus according to any one of aspects 1 to 12, further comprising a vacuum chamber accommodating the first platform and the second platform, the vacuum chamber being configured to provide a reduced pressure environment for the alignment and placement.

[0093] Aspect 14: The apparatus of aspect 13, wherein the vacuum chamber further comprises a load lock chamber providing access to the vacuum chamber.

[0094] Aspect 15: The device according to any one of Aspects 1 to 14, wherein the voltage source is a direct current voltage source.

[0095] Aspect 16: A method of aligning and placing electrical components using a first platform supporting at least one first electrical component and a second platform supporting at least one second electrical component, each first electrical component having at least one conductive surface on a side away from the first platform and each second electrical component having at least one conductive surface on a side away from the second platform, the method comprising:

[0096] applying a voltage between the at least one conductive surface of the at least one first electrical component and the at least one conductive surface of the at least one second electrical component;

[0097] Relative movement between the first platform and the second platform is controlled based on an electrostatic force between corresponding ones of the conductive surfaces to perform alignment between corresponding ones of the conductive surfaces.

[0098] Aspect 17: The method according to Aspect 16, comprising:

[0099] mechanically aligning the at least one first electrical component with the at least one second electrical component to a first degree of alignment;

[0100] A voltage is applied between a first alignment conductive surface of the at least one first electrical component and a second alignment conductive surface of the at least one second electrical component, and a rough alignment to a second alignment degree is performed based on an alignment electrostatic force between the first alignment conductive surface of the at least one first electrical component and the second alignment conductive surface of the at least one second electrical component, wherein the second alignment degree is more precise than the first alignment degree, and wherein performing the rough alignment is performed after mechanically aligning, and wherein the alignment is performed to a third alignment degree, the third alignment degree being more precise than the second alignment degree and after performing the rough alignment.

[0101] Aspect 18: The method as described in Aspect 16 or 17 further includes: after performing the alignment, moving the at least one first electrical component and the at least one second electrical component relative to each other so that the at least one first electrical component and the at least one second electrical component contact each other to combine the first electrical component to the second electrical component.

[0102] Aspect 19: The method according to any one of Aspects 16 to 18, further comprising: placing the at least one first electrical component and the at least one second electrical component into a vacuum environment before applying the voltage.

[0103] Aspect 20: The method according to any one of Aspects 16 to 19, wherein applying the voltage comprises applying a direct current voltage.

[0104] The description of the present application has been presented for the purpose of illustration and description, and the description is not intended to be exhaustive or to limit the invention to the disclosed form. Many modifications and variations will be apparent to those of ordinary skill in the art. The embodiments are selected and described in order to best explain the principles of the invention, practical applications, and to enable other persons of ordinary skill in the art to understand the invention with respect to various embodiments with various modifications suitable for the intended specific use.

[0105] Although the above discussion has focused largely on die-to-die stacking and bonding operations, the operating principles described herein may be equally applicable to wafer-to-wafer bonding, or die-to-wafer bonding in general, for example.

[0106] Although specific reference may be made herein to the manufacture of ICs, it should be clearly understood that the description herein has many other possible applications. For example, the description herein may be used to manufacture integrated optical systems, guidance and detection patterns for magnetic domain memories, liquid crystal display panels, thin film magnetic heads, etc. It will be understood by those skilled in the art that in the context of these alternative applications, any use of the terms "reticle", "wafer" or "die" herein should be considered to be interchangeable with the more general terms "mask", "substrate" and "target portion", respectively.

[0107] In this document, the terms "radiation" and "beam" are used to cover all types of electromagnetic radiation, including ultraviolet radiation (e.g., having a wavelength of 365 nm, 248 nm, 193 nm, 157 nm or 126 nm) and EUV (extreme ultraviolet radiation, e.g., having a wavelength in the range of approximately 5 nm to 100 nm).

[0108] As used herein, the terms "optimize" and "optimized" refer to or mean adjusting a pattern forming device (e.g., a lithographic device), a pattern forming process, etc., so that the result and / or process has more desired characteristics, such as higher accuracy of projection of a design pattern on a substrate, a larger process window, etc. Thus, as used herein, the terms "optimize" and "optimized" refer to or mean a process of identifying one or more values ​​for one or more parameters that provide an improvement in at least one relevant metric, such as a local optimum, compared to an initial set of one or more values ​​for those one or more parameters. "Optimal" and other related terms should be interpreted accordingly. In an embodiment, the optimization steps may be applied iteratively to provide further improvements in one or more metrics.

[0109] Although the concepts disclosed herein may be used for imaging on substrates such as silicon wafers, it should be understood that the disclosed concepts may be used with any type of lithography imaging system, such as a lithography imaging system for imaging on substrates other than silicon wafers.

[0110] The above description is intended to be illustrative rather than limiting. It will therefore be apparent to those skilled in the art that modifications may be made as described without departing from the scope of the claims set forth hereinafter.

Claims

1. A device for aligning and placing electrical components, comprising: a first platform configured and arranged to support, in use, at least one first electrical component, each first electrical component having a plurality of conductive surfaces on a side remote from the first platform; a second platform configured and arranged to support at least one second electrical component, each second electrical component having a plurality of conductive surfaces on a side remote from the second platform; a voltage source configured and arranged to generate a voltage between the conductive surface of the first electrical component and the conductive surface of the second electrical component; a controller configured and arranged to control relative movement between the first platform and the second platform and to align corresponding ones of the plurality of conductive surfaces of the first electrical component with corresponding ones of the plurality of conductive surfaces on the second electrical component based at least in part on electrostatic forces between corresponding ones of the plurality of conductive surfaces of the first electrical component and corresponding ones of the plurality of conductive surfaces on the second electrical component, wherein the first platform is configured and arranged to support the at least one first electrical component using a plurality of rollers that provide the at least one first electrical component with freedom of movement in a direction substantially parallel to the first platform.

2. The device according to claim 1, wherein: The first platform supports the at least one first electrical component using a first clamp, and the second platform supports the at least one second electrical component using a second clamp.

3. The device as claimed in claim 2, wherein: The controller further controls a clamping force of the first clamp of the first platform to a threshold value, wherein the threshold value of the clamping force is selected so that when the conductive surface of the at least one first electrical component is aligned with the conductive surface of the at least one second electrical component, friction between the first platform and the at least one first electrical component allows substantially free movement relative to each other.

4. The device according to claim 2 or 3, wherein: The controller is further configured to release the first clamp after aligning the at least one first electrical component with the at least one second electrical component.

5. The device according to claim 1, wherein: The platform is configured and arranged to move relatively between the at least one first electrical component and the at least one second electrical component in a left-right alternating writing pattern.

6. The device according to claim 1, wherein: The platform is configured for relative movement between the at least one first electrical component and the at least one second electrical component in six degrees of freedom.

7. The device of claim 1, wherein: The first platform includes at least one recess sized to receive a corresponding one of the at least one first electrical component.

8. The device of claim 1, wherein: The second platform includes at least one recess sized to receive a corresponding one of the at least one second electrical component.

9. The device of claim 1, wherein: The first platform includes at least one first recess sized to accommodate a corresponding one of the at least one first electrical component, and the second platform includes at least one second recess sized to accommodate a corresponding one of the at least one second electrical component, wherein the first recess and the second recess are configured to provide an initial mechanical alignment between the at least one first electrical component and the at least one second electrical component.

10. The apparatus of claim 1, further comprising a vacuum chamber accommodating the first platform and the second platform, the vacuum chamber being configured to provide a reduced pressure environment for the aligning and placing.

11. The device of claim 10, wherein: The vacuum chamber also includes a load lock chamber providing access to the vacuum chamber.

12. The device of claim 1, wherein: The voltage source is a DC voltage source.

13. A method of aligning and placing electrical components using a first platform supporting at least one first electrical component and a second platform supporting at least one second electrical component, each first electrical component having at least one conductive surface on a side remote from the first platform and each second electrical component having at least one conductive surface on a side remote from the second platform, the method comprising: applying a voltage between the at least one conductive surface of the at least one first electrical component and the at least one conductive surface of the at least one second electrical component, wherein the first platform is configured and arranged to support the at least one first electrical component using a plurality of rollers that provide the at least one first electrical component with freedom of movement in a direction substantially parallel to the first platform; Relative movement between the first platform and the second platform is controlled based on an electrostatic force between corresponding ones of the conductive surfaces to perform alignment between the corresponding ones of the conductive surfaces.

14. The method of claim 13, further comprising: mechanically aligning the at least one first electrical component with the at least one second electrical component to a first degree of alignment; applying a voltage between the first aligned conductive surface of the at least one first electrical component and the second aligned conductive surface of the at least one second electrical component, and Further alignment is performed to a second degree of alignment based on an aligned electrostatic force between a first aligned conductive surface of the at least one first electrical component and a second aligned conductive surface of the at least one second electrical component, wherein the second degree of alignment is more precise than the first degree of alignment, and wherein performing the further alignment is performed after the mechanically aligning.

15. The method of claim 14, further comprising: After performing the alignment, the at least one first electrical component and the at least one second electrical component are moved relative to each other to bring them into contact with each other to bond the first electrical component to the second electrical component.

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