A gated single-photon detector spike noise suppression device and method

Abstract

This invention discloses a peak noise suppression device and method for gated single-photon detectors, belonging to the field of big data. The device includes a negative gate pulse signal module, a first peak noise extraction module, a second peak noise extraction module, and a multi-stage converter module. The output of the negative gate pulse signal module is connected to the inputs of the first and second peak noise extraction modules, respectively. The input of the multi-stage converter module is connected to the outputs of the first and second peak noise extraction modules, respectively. This invention not only suppresses peak noise in APDs, reducing dark count rate and afterpulse probability, but also simplifies circuit design and improves the reliability and stability of gated single-photon detectors.

Description

Technical Field

[0001] This invention belongs to the field of signal processing. Specifically, this invention relates to a gated single-photon detector spike noise suppression device and method. Background Technology

[0002] Gated single-photon detectors (SPPDs) are used in pulsed light detection systems with determined photon arrival times and are one of the core components of systems such as quantum key distribution (QKD). Operating in gated mode, the SPPD loads a gate pulse signal onto one end of an avalanche diode (APD) and transmits it through the APD. Due to the differential effect of the APD junction capacitance, the gate pulse generates significant spike noise after passing through the APD, obscuring the avalanche signal. Therefore, only by eliminating the spike noise of the APD can the avalanche signal be effectively extracted, identified, and output. Thus, the detection efficiency, dark count rate, and afterpulse probability of a gated SPPD depend on the performance of the APD avalanche signal processing circuit, i.e., the circuit's ability to suppress spike noise.

[0003] Low-pass filtering is one of the techniques for suppressing spike noise in gated single-photon detectors. It involves using a low-pass filter to suppress or filter out spike noise. Because the cutoff frequency of this low-pass filter is slightly lower than the frequency of the gate pulse signal, spike noise suppression can be achieved, but the suppression effect is limited. If the cutoff frequency of the low-pass filter is much lower than the frequency of the gate pulse signal, it will affect the characteristics of the avalanche signal, thus affecting the detector's detection efficiency.

[0004] Capacitor balancing cancellation is also a technique for suppressing spike noise in gated single-photon detectors. It involves generating spike noise similar to that produced by the APD by using a capacitor or diode with a capacitance close to the APD junction capacitance. This spike noise is then canceled out by a differential amplifier performing a difference operation, thus achieving spike noise suppression. Available patents and literature describe this method, but the implementation is cumbersome, the circuit design is complex, and the final results are often unsatisfactory, leading to generally poor dark count rate and afterpulse probability characteristics in single-photon detectors. Summary of the Invention

[0005] The present invention aims to overcome the shortcomings of the prior art and proposes a peak noise suppression device and method for gated single-photon detectors, so as to suppress peak noise of APD, reduce dark count rate and after-pulse probability, simplify circuit design, and improve the reliability and stability of gated single-photon detectors.

[0006] To achieve the above objectives, the technical solution adopted by the present invention is as follows: a gated single-photon detector spike noise suppression device, the device comprising a negative gate pulse signal module, a first spike noise extraction module, a second spike noise extraction module, and a multi-stage converter module, wherein: the output terminal of the negative gate pulse signal module is connected to the input terminals of the first spike noise extraction module and the second spike noise extraction module respectively; the input terminal of the multi-stage converter module is connected to the output terminals of the first spike noise extraction module and the second spike noise extraction module respectively.

[0007] Preferably, the device further includes an input impedance matching circuit, which includes a resistor R2, wherein one end of the resistor R2 is grounded and the other end is connected to the output terminal of the negative gate pulse signal module.

[0008] Preferably, the first spike noise extraction module includes an avalanche diode (APD), resistors R1 and R3, capacitors C1 and C3, and a physical delay line DL1, wherein: the anode of the avalanche diode (APD) is the input terminal of the first spike noise extraction module, and a reverse bias voltage HV is applied to the cathode of the avalanche diode (APD) through resistor R1; one end of capacitor C1 is connected to the cathode of the avalanche diode (APD), and the other end of capacitor C1 is connected to the M1 terminal of the physical delay line DL1; one end of capacitor C3 is connected to the M2 terminal of the physical delay line DL1, and the other end of capacitor C3 is grounded through resistor R3 and led out as the output terminal of the first spike noise extraction module.

[0009] Preferably, the second peak noise extraction module includes high-frequency capacitive devices Ct1 and Ct2, resistor R4, capacitors C2 and C4, and physical delay line DL2, wherein: the input terminal of the second peak noise extraction module is connected to the N1 terminal of the physical delay line DL2 through the high-frequency capacitive devices Ct1, Ct2, and C2 connected in series; one end of the capacitor C4 is connected to the N2 terminal of the physical delay line DL2, and the other end of the capacitor C4 is grounded through resistor R4 and led out as a terminal as the output terminal of the second peak noise extraction module.

[0010] Preferably, the high-frequency capacitive devices Ct1 and Ct2 are both mechanically adjustable high-frequency capacitive devices, and their capacitance values ​​are adjusted to generate spike noise of different amplitudes.

[0011] Preferably, the multi-stage converter module includes a high-speed converter 1 and a high-speed converter 2, which are connected in series. Specifically: the input terminal I1 of the high-speed converter 1 is connected to the output terminal of the first spike noise extraction module; the input terminal I2 of the high-speed converter 1 is connected to the output terminal of the second spike noise extraction module; the output terminal O1 of the high-speed converter 1 is connected to the input terminal I1 of the high-speed converter 2; the output terminal O2 of the high-speed converter 1 is connected to the input terminal I2 of the high-speed converter 2; the output terminal O1 of the high-speed converter 2 is grounded, and the output terminal O2 of the high-speed converter 2 serves as the output terminal of the multi-stage converter module.

[0012] Preferably, the amplitude of the negative gate pulse signal GATE and the reverse bias voltage HV output by the negative gate pulse signal module is higher than the avalanche breakdown voltage Vbr of the avalanche diode APD.

[0013] Preferably, the impedance matching circuit is used to achieve 50-ohm impedance matching for the output of the negative gate pulse signal generation circuit.

[0014] Preferably, both high-speed converter 1 and high-speed converter 2 are 1:1 transmission line converters with 50-ohm impedance matching and are passive devices.

[0015] Furthermore, based on the aforementioned device, this invention also proposes a method for suppressing peak noise in a gated single-photon detector, the method comprising the following steps:

[0016] S1: Solder the corresponding circuit boards correctly according to the schematic diagram;

[0017] S2: Connect capacitor C3 and disconnect capacitor C4, which means turning on the first peak noise extraction module and disconnecting the second peak noise extraction module;

[0018] S3: The circuit board is powered on, and the negative gate pulse signal module generates a negative gate pulse signal;

[0019] S4: Connect the output of the multi-stage converter module to an oscilloscope and record the amplitude and location information of the first spike noise;

[0020] S5: The negative gate pulse signal module stops generating negative gate pulse signals, and the circuit board is powered off;

[0021] S6: Connect capacitor C4 and disconnect capacitor C3, which means turning on the second peak noise extraction module and disconnecting the first peak noise extraction module;

[0022] S7: The circuit board is powered on, and the negative gate pulse signal module generates a negative gate pulse signal;

[0023] S8: Connect the output of the multi-stage converter module to an oscilloscope and record the amplitude and location information of the second spike noise;

[0024] S9: Referring to the location information of the first spike noise in step S4, adjust the length of the physical delay line DL2 between port N1 and port N2 so that the location information of the second spike noise recorded in step S8 is consistent with the location information recorded in step S4.

[0025] S10: Referring to the amplitude information of the first spike noise in step S4, adjust the high-frequency capacitive devices Ct1 and Ct2 so that the amplitude information of the second spike noise recorded in step S8 is consistent with the amplitude information recorded in step S4.

[0026] S11: The negative gate pulse signal module stops generating negative gate pulse signals, and the circuit board is powered off;

[0027] S12: Reconnect capacitor C3, meaning both the first and second spike noise extraction modules are turned on;

[0028] S13: The circuit board is powered on, and the negative gate pulse signal module generates a negative gate pulse signal;

[0029] S14: Connect the output of the multi-stage converter module to an oscilloscope. At this time, it is observed that the spike noise is effectively suppressed.

[0030] The technical effects of this invention are as follows:

[0031] 1. An extremely narrow negative gate pulse signal is applied to the anode of the APD via DC coupling to achieve APD Geiger mode operation, and a 50-ohm matching input is applied at the input end.

[0032] 2. The system employs mechanical high-frequency capacitive devices to generate adjustable spike noise, resulting in a stable mechanical structure and high reliability. Since no high-voltage bias needs to be applied to one end of the capacitive device, the corresponding circuit design is simplified.

[0033] 3. Physical delay lines DL1 and DL2 are passive components and have high stability. High-speed converter 1 and high-speed converter 2 are passive transmission line components and do not require power supply, thus avoiding the introduction of additional noise and the influence of electronic noise.

[0034] 4. This invention can suppress the spike noise of the APD, reduce the dark count rate and after-pulse probability, and at the same time simplify the circuit design and improve the reliability and stability of the gated single-photon detector. Attached Figure Description

[0035] Figure 1 This is a schematic diagram of the gate pulse implementation of the Geiger mode according to an embodiment of the present invention;

[0036] Figure 2 This is a schematic diagram of the spike noise suppression device according to an embodiment of the present invention;

[0037] Figure 3 This is a flowchart of the spike noise suppression method according to an embodiment of the present invention. Detailed Implementation

[0038] The specific embodiments of the present invention will be further described in detail below with reference to the accompanying drawings. The purpose is to help those skilled in the art to have a more complete, accurate, and in-depth understanding of the inventive concept and technical solution of the present invention, and to facilitate its implementation. To make the technical solution of the present invention clearer, the present invention will be explained and illustrated through the following embodiments:

[0039] When a gated single-photon detector is in operation, the avalanche diode (APD) typically needs to operate in Geiger mode. Under normal circumstances, the avalanche breakdown voltage Vbr at a specific temperature can be accurately measured for any APD. Therefore, simply applying a voltage exceeding Vbr across the APD will enable it to operate in Geiger mode. Based on this, this invention introduces a method for achieving Geiger mode using a gate pulse, as follows: Figure 1 As shown, the amplitude of the superposition of the reverse bias voltage Vb applied to the APD cathode and the extremely narrow gate pulse signal GATE applied to the APD anode is higher than the avalanche breakdown voltage Vbr, thereby realizing Geiger mode. This method is applied in the gated single-photon detector of the present invention, which can effectively reduce the dark count rate and afterpulse probability and improve the detection efficiency. However, it also brings greater spike noise. Therefore, the present invention further proposes a spike noise suppression device that can effectively suppress the spike noise of the APD and improve the reliability and stability of the gated single-photon detector.

[0040] A gated single-photon detector spike noise suppression device, such as Figure 2 As shown, the device includes a negative gate pulse signal module, a first peak noise extraction module, a second peak noise extraction module, and a multi-stage converter module, wherein: the output terminal (A terminal) of the negative gate pulse signal module is connected to the input terminals of the first peak noise extraction module and the second peak noise extraction module respectively; the input terminal of the multi-stage converter module is connected to the output terminals (B terminals) of the first peak noise extraction module and the second peak noise extraction module respectively.

[0041] Specifically, the device further includes an input impedance matching circuit, which includes a resistor R2, wherein one end of the resistor R2 is grounded and the other end is connected to the output terminal of the negative gate pulse signal module. The negative gate pulse signal module is used to generate a negative gate pulse signal, which is then input to the first spike noise extraction module and the second spike noise extraction module after DC coupling. In this embodiment, the input impedance matching circuit is used to achieve 50-ohm impedance matching for the output of the negative gate pulse signal module, that is, the resistor R2 can be set to 50 ohms and grounded to achieve impedance matching. In this embodiment, the negative gate pulse signal module can be composed of gate circuits and triggers, or it can be other highly integrated pulse signal generating devices. Specific circuits or devices are common in the prior art, and will not be described in detail here.

[0042] Specifically, the first spike noise extraction module in this embodiment includes an avalanche diode (APD), resistors R1 and R3, capacitors C1 and C3, and a physical delay line DL1. The anode of the avalanche diode (APD) is the input terminal of the first spike noise extraction module, and a reverse bias voltage HV is applied to the cathode of the avalanche diode (APD) through resistor R1. One end of capacitor C1 is connected to the cathode of the avalanche diode (APD), and the other end of capacitor C1 is connected to terminal M1 of the physical delay line DL1. One end of capacitor C3 is connected to terminal M2 of the physical delay line DL1, and the other end of capacitor C3 is grounded through resistor R3 and led out as the output terminal of the first spike noise extraction module. Preferably, to ensure that the APD is in Geiger mode, the amplitude value of the negative gate pulse signal GATE output by the negative gate pulse signal module and the reverse bias voltage HV superimposed in this embodiment must be higher than the avalanche breakdown voltage Vbr of the avalanche diode (APD).

[0043] Specifically, the second peak noise extraction module in this embodiment includes high-frequency capacitive devices Ct1 and Ct2, resistor R4, capacitors C2 and C4, and physical delay line DL2. The input terminal of the second peak noise extraction module is connected to the N1 terminal of the physical delay line DL2 via the high-frequency capacitive devices Ct1, Ct2, and C2 connected in series. One end of capacitor C4 is connected to the N2 terminal of the physical delay line DL2, and the other end of capacitor C4 is grounded through resistor R4 and led out as the output terminal of the second peak noise extraction module. In this embodiment, the high-frequency capacitive devices Ct1 and Ct2 are both mechanically adjustable high-frequency capacitive devices. Different amplitude peak noises are generated by adjusting their capacitance values. The mechanical structure is stable and highly reliable. Furthermore, since no high bias voltage needs to be applied to one end of the capacitive device, the corresponding circuit design is simplified. In addition, the physical delay lines DL1 and DL2 used in this embodiment are passive devices, which have the advantage of high stability.

[0044] Specifically, the multi-stage converter module in this embodiment includes a high-speed converter 1 and a high-speed converter 2, which are connected in series. The input terminal I1 of high-speed converter 1 is connected to the output terminal of the first peak noise extraction module; the input terminal I2 of high-speed converter 1 is connected to the output terminal of the second peak noise extraction module; the output terminal O1 of high-speed converter 1 is connected to the input terminal I1 of high-speed converter 2; the output terminal O2 of high-speed converter 1 is connected to the input terminal I2 of high-speed converter 2; the output terminal O1 of high-speed converter 2 is grounded, and the output terminal O2 of high-speed converter 2 serves as the output terminal of the multi-stage converter module. In this embodiment, both high-speed converter 1 and high-speed converter 2 are 1:1 transmission line converters with 50-ohm impedance matching, and are passive devices requiring no power supply. Therefore, the introduction of additional noise is avoided, thereby preventing the influence of electronic noise.

[0045] Furthermore, based on the aforementioned device, this invention also proposes a method for suppressing spike noise in a gated single-photon detector, such as... Figure 3 As shown, the method includes the following steps:

[0046] S1: According to the schematic diagram, correctly solder the corresponding circuit board to ensure that the circuit board is soldered well without any cold solder joints and that the solder joints are smooth and burr-free, thereby ensuring the integrity of the spike noise.

[0047] S2: Connect capacitor C3 and disconnect capacitor C4 to turn on the first peak noise extraction module and measure only the peak noise information of this channel. Disconnect the second peak noise extraction module.

[0048] S3: When the circuit board is powered on, the negative gate pulse signal module (A end) generates a negative gate pulse signal and loads it onto the anode of the APD. The spike noise is extracted at the cathode of the APD and transmitted to the output end (B end) of the multi-stage converter module.

[0049] S4: Connect the output of the multi-stage converter module to an oscilloscope to observe the amplitude and location information of the first spike noise, and mark and record it using the oscilloscope's coordinate scale;

[0050] S5: The negative gate pulse signal module stops generating negative gate pulse signals, and the circuit board is powered off;

[0051] S6: Connect capacitor C4 and disconnect capacitor C3 to turn on the second peak noise extraction module and measure only the peak noise information of this channel. Disconnect the first peak noise extraction module.

[0052] S7: When the circuit board is powered on, the negative gate pulse signal module (A end) generates a negative gate pulse signal, which is loaded onto the input end of the second spike noise extraction module and then transmitted to the output end (B end) of the multi-stage converter module.

[0053] S8: Connect the output of the multi-stage converter module to an oscilloscope, observe the amplitude and location information of the second spike noise, mark and record it using the oscilloscope's coordinate scale, and compare it with the amplitude and location information of the first spike noise recorded in step S4.

[0054] S9: Referring to the position information of the first spike noise in step S4, adjust the length of the physical delay line DL2 between port N1 and port N2 so that the position information of the second spike noise recorded in step S8 is consistent with the position information recorded in step S4, that is, achieve the consistency of the spike noise position information and complete the phase matching of the spike noise.

[0055] S10: Referring to the amplitude information of the first spike noise in step S4, adjust the high-frequency capacitive devices Ct1 and Ct2 so that the amplitude information of the second spike noise recorded in step S8 is consistent with the amplitude information recorded in step S4, that is, the spike noise amplitude information is consistent.

[0056] S11: The negative gate pulse signal module stops generating negative gate pulse signals, and the circuit board is powered off;

[0057] S12: Reconnect capacitor C3, that is, both the first peak noise extraction module and the second peak noise extraction module are turned on, completing the balance of the two branches;

[0058] S13: The circuit board is powered on, and the negative gate pulse signal module generates a negative gate pulse signal;

[0059] S14: Connect the output of the multi-stage converter module to an oscilloscope. At this point, you can observe that the spike noise has been effectively suppressed. The spike noise suppression operation for the gated single-photon detector is now complete.

[0060] To address the shortcomings of current peak noise suppression technologies for gated single-photon detectors, this invention provides a peak noise suppression device and method for gated single-photon detectors. This invention can not only suppress peak noise of the APD, reduce the dark count rate and after-pulse probability, but also simplify circuit design and improve the reliability and stability of the gated single-photon detector.

[0061] The present invention has been described above by way of example with reference to the accompanying drawings. Obviously, the specific implementation of the present invention is not limited to the above-described manner. Any non-substantial improvements made using the inventive concept and technical solution; or the direct application of the inventive concept and technical solution to other situations without modification, are all within the protection scope of the present invention.

Claims

1. A gated single-photon detector spike noise suppression device, characterized in that: The device includes a negative gate pulse signal module, a first peak noise extraction module, a second peak noise extraction module, and a multi-stage converter module, wherein: the output terminal of the negative gate pulse signal module is connected to the input terminals of the first peak noise extraction module and the second peak noise extraction module, respectively; the input terminal of the multi-stage converter module is connected to the output terminals of the first peak noise extraction module and the second peak noise extraction module, respectively. The first spike noise extraction module includes an avalanche diode (APD), resistors R1 and R3, capacitors C1 and C3, and a physical delay line DL1. The anode of the avalanche diode (APD) is the input terminal of the first spike noise extraction module, and a reverse bias voltage HV is applied to the cathode of the avalanche diode (APD) through resistor R1. One end of capacitor C1 is connected to the cathode of the avalanche diode (APD), and the other end of capacitor C1 is connected to terminal M1 of the physical delay line DL1. One end of capacitor C3 is connected to terminal M2 of the physical delay line DL1, and the other end of capacitor C3 is grounded through resistor R3 and leads out as the output terminal of the first spike noise extraction module. The second spike noise extraction module includes high-frequency capacitive devices Ct1 and Ct2, resistor R4, capacitors C2 and C4, and physical delay line DL2. The input terminal of the second spike noise extraction module is connected to the N1 terminal of the physical delay line DL2 through the high-frequency capacitive devices Ct1, Ct2, and C2 connected in series. One end of the capacitor C4 is connected to the N2 terminal of the physical delay line DL2, and the other end of the capacitor C4 is grounded through resistor R4 and led out as the output terminal of the second spike noise extraction module.

2. The gated single-photon detector spike noise suppression device according to claim 1, characterized in that: The device further includes an input impedance matching circuit, which includes a resistor R2, wherein one end of the resistor R2 is grounded and the other end is connected to the output terminal of the negative gate pulse signal module.

3. The gated single-photon detector spike noise suppression device according to claim 1, characterized in that: The high-frequency capacitive devices Ct1 and Ct2 are both mechanically adjustable high-frequency capacitive devices, and their capacitance values ​​can be adjusted to generate spike noise of different amplitudes.

4. The gated single-photon detector spike noise suppression device according to claim 1, characterized in that: The multi-stage converter module includes a high-speed converter 1 and a high-speed converter 2, which are connected in series. Specifically: the input terminal I1 of the high-speed converter 1 is connected to the output terminal of the first spike noise extraction module; the input terminal I2 of the high-speed converter 1 is connected to the output terminal of the second spike noise extraction module; the output terminal O1 of the high-speed converter 1 is connected to the input terminal I1 of the high-speed converter 2; the output terminal O2 of the high-speed converter 1 is connected to the input terminal I2 of the high-speed converter 2; the output terminal O1 of the high-speed converter 2 is grounded, and the output terminal O2 of the high-speed converter 2 serves as the output terminal of the multi-stage converter module.

5. The gated single-photon detector spike noise suppression device according to claim 1, characterized in that: The amplitude of the negative gate pulse signal GATE and the reverse bias voltage HV output by the negative gate pulse signal module is higher than the avalanche breakdown voltage Vbr of the avalanche diode APD.

6. The gated single-photon detector spike noise suppression device according to claim 2, characterized in that: The input impedance matching circuit is used to achieve 50-ohm impedance matching for the output of the negative gate pulse signal module.

7. The gated single-photon detector spike noise suppression device according to claim 4, characterized in that: Both high-speed converter 1 and high-speed converter 2 are 1:1 transmission line converters with 50-ohm impedance matching and are passive devices.

8. A method for suppressing spike noise in a gated single-photon detector according to any one of claims 1-7, characterized in that: The method includes the following steps: S1: Solder the corresponding circuit boards correctly according to the schematic diagram; S2: Connect capacitor C3 and disconnect capacitor C4, which means turning on the first peak noise extraction module and disconnecting the second peak noise extraction module; S3: The circuit board is powered on, and the negative gate pulse signal module generates a negative gate pulse signal; S4: Connect the output of the multi-stage converter module to an oscilloscope and record the amplitude and location information of the first spike noise; S5: The negative gate pulse signal module stops generating negative gate pulse signals, and the circuit board is powered off; S6: Connect capacitor C4 and disconnect capacitor C3, which means turning on the second peak noise extraction module and disconnecting the first peak noise extraction module; S7: The circuit board is powered on, and the negative gate pulse signal module generates a negative gate pulse signal; S8: Connect the output of the multi-stage converter module to an oscilloscope and record the amplitude and location information of the second spike noise; S9: Referring to the location information of the first spike noise in step S4, adjust the length of the physical delay line DL2 between port N1 and port N2 so that the location information of the second spike noise recorded in step S8 is consistent with the location information recorded in step S4. S10: Referring to the amplitude information of the first spike noise in step S4, adjust the high-frequency capacitive devices Ct1 and Ct2 so that the amplitude information of the second spike noise recorded in step S8 is consistent with the amplitude information recorded in step S4. S11: The negative gate pulse signal module stops generating negative gate pulse signals, and the circuit board is powered off; S12: Reconnect capacitor C3, meaning both the first and second spike noise extraction modules are turned on; S13: The circuit board is powered on, and the negative gate pulse signal module generates a negative gate pulse signal; S14: Connect the output of the multi-stage converter module to an oscilloscope. At this time, it is observed that the spike noise is effectively suppressed.

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