IGBT module layout method and system applied to optical storage system

Abstract

The invention provides an IGBT module layout method and system applied to an optical storage system, and relates to the technical field of wireless communication networks, the method comprises the steps that an IGBT module is constructed, the IGBT module comprises a device layer, a substrate layer, an electrical isolation layer, a bottom plate layer and a heat dissipation layer which are arranged in a stacked mode, the device layer is provided with a plurality of device units, and the device units are arranged on the substrate layer; each device unit comprises an IGBT and an FRD which are matched for use; determining the surface temperature distribution of the device layer by taking each IGBT and each FRD as discrete heat sources; determining a temperature uniformity parameter value and a thermal diffusion resistance value according to the surface temperature distribution of the device layer; and the optimal layout mode of the IGBT module is determined by taking the minimum temperature uniformity parameter value and the thermal diffusion resistance value as targets. According to the invention, the heat dissipation efficiency of the module can be improved, the IGBT can work in an optimal temperature range, and performance reduction caused by too high temperature can be avoided.

Description

Technical Field

[0001] The present invention relates to the technical field of device layout, and in particular to an IGBT module layout method and system applied to a photovoltaic storage system. Background Art

[0002] Insulated gate bipolar transistor (IGBT) is the core device for realizing power conversion in photovoltaic storage system, and is usually used in inverters and converters. It can effectively convert direct current into alternating current (DC-AC inversion), or convert alternating current into direct current (AC-DC rectification). IGBT has efficient switching function, can perform switching operation at high frequency, and can regulate and control power, such as voltage and current regulation, power factor correction, etc.

[0003] The performance of IGBT is greatly affected by temperature. Increased temperature will cause the IGBT on-resistance to increase, switching losses to increase, and overall efficiency to decrease.

[0004] Currently, in order to prevent the performance of IGBTs from being degraded due to temperature increase, the distance between each IGBT is often increased to improve the heat dissipation efficiency.

[0005] However, simply increasing the spacing between IGBTs based on design experience can improve heat dissipation, but it will directly increase the overall size of the module, affecting the compactness and integration of the system, and further affecting the efficiency and performance of the system. Summary of the invention

[0006] In order to solve the technical problem in the prior art that although the spacing between each IGBT is increased according to design experience, which can improve heat dissipation, it will directly increase the overall size of the module, affect the compactness and integration of the system, and further affect the efficiency and performance of the system, the present invention provides a module layout method and system for IGBTs applied to a photovoltaic storage system.

[0007] The technical solution provided by the embodiment of the present invention is as follows:

[0008] A first aspect of an embodiment of the present invention provides a module layout method of an IGBT applied to a photovoltaic storage system, comprising:

[0009] S1: constructing an IGBT module, wherein the IGBT module comprises: a stacked device layer, a substrate layer, an electrical isolation layer, a bottom plate layer and a heat dissipation layer, wherein the device layer is provided with a plurality of device units, and each device unit comprises an IGBT and an FRD used in conjunction with each other;

[0010] S2: using each IGBT and FRD as a discrete heat source, determining the surface temperature distribution of the device layer;

[0011] S3: determining a temperature uniformity parameter value and a heat diffusion resistance value according to the surface temperature distribution of the device layer;

[0012] S4: Determine the optimal layout of the IGBT module with the goal of minimizing the temperature uniformity parameter value and the heat diffusion resistance value.

[0013] Furthermore, the material of the substrate layer is copper, the material of the electrical isolation layer is aluminum nitride, and a heat sink is provided on the heat dissipation layer.

[0014] Furthermore, the S4 specifically includes:

[0015] S401: constructing an objective function with the goal of minimizing the temperature uniformity parameter value and the thermal diffusion resistance value;

[0016] S402: According to the objective function, various layout parameters of the IGBT module are optimized by a harmony search algorithm to determine the best layout method.

[0017] Furthermore, the layout parameters specifically include: the placement position of each device unit and the placement position of the IGBT and the FRD in each device unit.

[0018] A second aspect of an embodiment of the present invention provides an IGBT module layout system applied to a photovoltaic storage system, including:

[0019] processor;

[0020] A memory having computer-readable instructions stored thereon, wherein when the computer-readable instructions are executed by the processor, the module layout method of the IGBT applied to the photovoltaic storage system as described in the first aspect is implemented.

[0021] The third aspect

[0022] A third aspect of an embodiment of the present invention provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the module layout method of an IGBT applied to a photovoltaic storage system as described in the first aspect.

[0023] The beneficial effects brought about by the technical solution provided by the embodiment of the present invention include at least:

[0024] In the present invention, the optimal layout of the IGBT module is determined with the goal of minimizing the temperature uniformity parameter value and the heat diffusion resistance value, which helps to improve the heat dissipation efficiency of the module, reduce the formation of local hot spots, and ensure that heat can be quickly and effectively transferred from the heat source to the heat dissipation layer. The uniform temperature distribution helps to keep the IGBT working within the optimal temperature range, avoid performance degradation caused by excessive temperature, avoid directly increasing the distance between each IGBT for heat dissipation, improve the rationality of the overall size of the module, and help improve the compactness and integration of the system, thereby improving the efficiency and performance of the system. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0026] Figure 1 A schematic flow chart of a module layout method of an IGBT applied to a photovoltaic storage system provided by an embodiment of the present invention;

[0027] Figure 2 A schematic structural diagram of an IGBT module layout system applied to a photovoltaic storage system provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0028] The technical solution of the present invention is described below in conjunction with the accompanying drawings.

[0029] Reference Manual Attached Figure 1 , showing a schematic flow chart of a module layout method of an IGBT applied to a photovoltaic storage system provided by an embodiment of the present invention.

[0030] The embodiment of the present invention provides a module layout method for an IGBT applied to a photovoltaic storage system. The method can be implemented by a module layout device for an IGBT applied to a photovoltaic storage system. The module layout device for an IGBT applied to a photovoltaic storage system can be a terminal or a server. The processing flow of the module layout method for an IGBT applied to a photovoltaic storage system can include the following steps:

[0031] S1: Build the IGBT module.

[0032] Optionally, the IGBT module includes: a device layer, a substrate layer, an electrical isolation layer, a bottom plate layer and a heat dissipation layer which are stacked.

[0033] Optionally, the device layer is the core layer of the IGBT module, and is provided with a plurality of device units, each of which includes an IGBT and a fast recovery diode (FRD) used in conjunction with each other. These devices are responsible for the conversion and control of electric power and are the main working units of the module.

[0034] It should be noted that it is very common to use IGBT and FRD together in power electronics applications. The reason for this is the functional complementarity of the two in the circuit and the performance and efficiency improvement that this combination can bring. IGBT can only handle forward current when working. When there is reverse current in the circuit (such as in the commutation process of motor drive or inverter), the IGBT itself cannot withstand the reverse voltage and may cause device damage. FRD is a fast-response diode that can quickly turn on when reverse current appears, providing a return path for the current and protecting the IGBT from the impact of reverse current.

[0035] Optionally, the substrate layer is mainly used to provide mechanical support and facilitate thermal conduction of the device layer. It effectively transfers the heat generated by the device layer to the heat dissipation layer below. The material of the substrate layer is copper. Copper has excellent thermal conductivity and electrical conductivity, making it an ideal choice for substrate material. It can effectively conduct the heat generated by the device layer, reduce heat accumulation, and improve heat dissipation efficiency.

[0036] Optionally, an electrical isolation layer is used to provide electrical isolation between the conductive substrate and the device layer while allowing heat to be efficiently transferred. The material for the electrical isolation is aluminum nitride. Aluminum nitride is a high thermal conductivity, low dielectric constant ceramic material with excellent electrical insulation properties and thermal conductivity, making it a common choice for the electrical isolation layer.

[0037] Optionally, the bottom plate layer mainly provides mechanical support and further transfers heat from the substrate layer to the heat dissipation layer. The bottom plate layer is also the mechanical structural support part of the module, maintaining the physical stability of the entire module.

[0038] Optionally, the heat dissipation layer is a key part of the entire IGBT module, responsible for dissipating the heat transferred from all layers to the environment, ensuring that the temperature of the module remains within a safe range. A heat sink is provided on the heat dissipation layer.

[0039] In the present invention, each layer in the IGBT module has clear functions and works closely with each other to form an efficient and reliable power conversion and management system. The design and material selection of each layer directly affect the thermal management, electrical performance and mechanical strength of the IGBT module, thereby ensuring that the module can operate stably in high-demand environments such as photovoltaic storage systems.

[0040] S2: Using each IGBT and FRD as discrete heat sources, determine the surface temperature distribution of the device layer.

[0041] In a possible implementation manner, the surface temperature distribution of the device layer is specifically as follows:

[0042]

[0043] Where T represents the surface temperature, x represents the horizontal axis, y represents the vertical axis, T f represents the heat dissipation temperature, θ i represents the excess temperature of the i-th heat source, and N represents the total number of heat sources.

[0044] In the present invention, IGBT and FRD are considered as discrete heat sources, which can more accurately analyze and predict the temperature distribution of the device layer. Through this fine-grained approach, the mutual influence between different heat sources and the temperature changes in local areas can be captured, which can provide accurate temperature analysis, optimize thermal management design, and improve the reliability and efficiency of the module.

[0045] Optionally, the excess temperature is expanded by a Fourier series as follows:

[0046]

[0047] Among them, A0 represents the constant term, A m , A n , A mn represents the Fourier coefficient, m represents the modal index in the x direction, n represents the modal index in the y direction, λ represents the spatial frequency in the x direction, and δ represents the spatial frequency in the y direction.

[0048] Optionally, the spatial frequency λ in the x direction is specifically:

[0049]

[0050] Where a represents the size of the heat flow channel in the x direction.

[0051] Optionally, the spatial frequency δ in the y direction is specifically:

[0052]

[0053] Wherein, b represents the dimension of the heat flow channel in the y direction.

[0054] In the present invention, the Fourier series expansion can decompose the complex temperature distribution into multiple frequency components (modes). Through this type of expansion, various subtle changes and features in the temperature distribution, such as local hot spots and temperature gradients, can be accurately described and analyzed. Even if the temperature distribution has significant non-uniformity, the Fourier series can accurately describe these non-uniform phenomena through the combination of multiple modes, making the analysis more refined.

[0055] S3: Determine the temperature uniformity parameter value and the heat diffusion resistance value according to the surface temperature distribution of the device layer.

[0056] In a possible implementation manner, the temperature uniformity parameter value is specifically:

[0057]

[0058] Where σ represents the temperature uniformity parameter value, T represents the surface temperature, T(x,y,0) represents the surface temperature at (x,y,0), X represents the device layer length, and Y represents the device layer width. represents the average surface temperature, and S represents the surface area of ​​the device layer.

[0059] It should be noted that the temperature uniformity parameter value can be used to measure the uniformity of the surface temperature of the device layer in a standardized manner.

[0060] In a possible implementation manner, the thermal diffusion resistance is specifically:

[0061]

[0062] Where R represents the thermal diffusion resistance, T max Indicates the maximum surface temperature, T f represents the ambient temperature for reference and Q represents the power loss.

[0063] It should be noted that the power loss can be obtained through simulation or electrical measurement. When the IGBT module layout is confirmed, the power loss of the entire module is also determined.

[0064] Furthermore, the heat diffusion resistance directly reflects the resistance in the heat dissipation path. The larger the value, the more difficult it is to effectively dissipate the heat and the lower the heat dissipation efficiency.

[0065] S4: Determine the optimal layout of the IGBT module with the goal of minimizing the temperature uniformity parameter value and the thermal diffusion resistance value.

[0066] It should be noted that minimizing the temperature uniformity parameter value and the thermal diffusion resistance value can reduce the formation of local hot spots, ensure that heat is quickly dissipated, keep the device operating within a safe temperature range, and avoid IGBT or FRD failure due to overheating.

[0067] In a possible implementation, S4 specifically includes:

[0068] S401: Construct an objective function with the goal of minimizing the temperature uniformity parameter value and the thermal diffusion resistance value.

[0069] Optionally, the objective function is specifically:

[0070] f(θ)=βσ+(1-β)R

[0071] Wherein, f represents the objective function, θ represents the layout parameter, σ represents the temperature uniformity parameter value, R represents the thermal diffusion resistance value, and β represents the weight coefficient of the temperature uniformity parameter value.

[0072] Among them, those skilled in the art can set the weight coefficient β of the temperature uniformity parameter value according to actual conditions, and the present invention does not limit this.

[0073] It should be noted that the objective function comprehensively considers the temperature uniformity parameter value and the thermal diffusion resistance value, and introduces a weight coefficient, which can find the best balance between temperature uniformity and heat dissipation efficiency and improve the thermal management effect.

[0074] S402: According to the objective function, various layout parameters of the IGBT module are optimized by using a harmony search algorithm to determine the best layout method.

[0075] Optionally, the layout parameters specifically include: the placement position of each device unit and the placement position of the IGBT and the FRD in each device unit.

[0076] In detail, the placement position of the device unit can be described in the form of the horizontal coordinate and the vertical coordinate (x, y) of the device unit. Accordingly, when optimizing through the harmony search algorithm, the optimal horizontal coordinate and the optimal vertical coordinate are optimized to determine the optimal placement position of the device unit.

[0077] Among them, the Harmony Search Algorithm (HS) is a heuristic optimization algorithm based on finding harmonious tones during music improvisation. The Harmony Search Algorithm imitates the process of musicians finding the best harmony by constantly adjusting the tones during improvisation.

[0078] Specifically, the inverse of the objective function is used as the fitness function of the harmony search algorithm.

[0079] Initialize the harmony memory library. The harmony memory library includes multiple harmonies. Harmonies include multiple components. Each harmony represents a feasible layout method, and each component represents a layout parameter:

[0080]

[0081] Among them, HM represents the harmony memory, D represents the harmony dimension, and X i represents the i-th harmony, i = 1, 2, ..., HMS, HMS represents the size of the harmony memory bank, x ij represents the jth component in the ith harmony, j = 1, 2, …, D, and D represents the harmony dimension.

[0082] Generate a random number r1 and determine whether the random number r1 is less than the probability of the harmony memory. If so, randomly generate a new harmony through the harmony memory. Otherwise, generate a new harmony through random selection.

[0083] Optionally, randomly generating new harmonies through a harmony memory library is specifically as follows:

[0084] X new =[x new,1 ,x new,2 …,x new,D ]

[0085] x new,j ∈rand[x 1j ,x 2j ,…,x HMS,j ]

[0086] Among them, X new Indicates new harmony, x new,j represents the jth component in the new harmony, j = 1, 2, ..., D, D represents the harmony dimension, rand represents random selection, x ij represents the jth component in the ith harmony, i = 1, 2, ..., HMS, and HMS represents the size of the harmony memory bank.

[0087] In the present invention, by randomly generating new harmonies from the harmony memory, the algorithm can quickly utilize the currently available excellent solutions. The harmony memory stores the historically good solutions, so the new harmonies generated in this way often have higher fitness, thereby accelerating the convergence speed of the algorithm.

[0088] Optionally, generating new harmony by random selection is as follows:

[0089] x new,j = r1[upper j -lower j ]+lower j

[0090] Among them, upper j Represents the upper boundary of the jth component, lower j represents the lower bound of the j-th component.

[0091] It should be noted that for the upper and lower boundaries, taking the parameter (component) of the horizontal coordinate of the device unit as an example, if the lower left corner of the device layer is the origin, then the lower boundary of the parameter (component) of the horizontal coordinate of the device unit should be 0, and the upper boundary should be the total length of the board.

[0092] In the present invention, the newly generated harmony components are randomly selected within the current upper and lower boundaries. This random selection ensures that the new solutions generated in each iteration are diverse, thereby avoiding the solution being too concentrated in a specific area and helping to explore a wider search space.

[0093] Optionally, the upper boundary and the lower boundary are specifically:

[0094]

[0095] Among them, upper j t represents the upper boundary of the jth component at the tth iteration, upper j t-1 represents the upper boundary of the jth component at the t-1th iteration, HM(:j) represents the jth component in the harmony memory library, max[HM(:j)] represents the maximum value of the jth component in the harmony memory library, lower j t represents the lower bound of the jth component at the tth iteration, lower j t-1 represents the lower boundary of the j-th component at the t-1-th iteration, min[HM(:j)] represents the minimum value of the j-th component in the harmony memory library, and T represents the total number of iterations.

[0096] In the present invention, by gradually narrowing the search range, the algorithm can ensure that a region close to the global optimum is found in the early stage of optimization, and can also carefully develop the local optimal solution in the later stage of optimization, thereby improving the overall optimization effect.

[0097] In the case of randomly generating a new harmony through the harmony memory library, a random number r2 is generated, and it is determined whether the random number r2 is less than the pitch fine-tuning probability. If so, a new harmony is generated through pitch fine-tuning. Otherwise, the harmony remains unchanged.

[0098] Optionally, generating a new harmony by fine-tuning the pitch is specifically as follows:

[0099] x′ new,j =x new,j +r2BW+r3(x best,j -x worst,j )+x worst,j

[0100] Among them, x′ new,j represents the jth component of the harmony after the new harmony is fine-tuned, x new,j Indicates that the jth component in the new harmony is randomly generated through the harmony memory library, BW represents the fine-tuning bandwidth, r3 represents a random number between -1 and 1, and x best,jrepresents the jth component of the harmony with the highest current fitness value, x worst,j Represents the jth component in the harmony with the lowest current fitness value.

[0101] In the present invention, in the search space, when the algorithm is close to the optimal solution, pitch fine-tuning can further refine the search to ensure that a better solution is found near the optimal solution. In this way, the algorithm can improve the local search capability in the later stage of optimization, thereby avoiding missing the best solution.

[0102] The generated new harmony is compared with the harmony with the lowest fitness value in the harmony memory library to determine whether the fitness value of the new harmony is greater than the fitness value of the harmony with the lowest fitness value in the harmony memory library. If so, the harmony with the lowest fitness value in the harmony memory library is replaced with the new harmony to update the harmony memory library. Otherwise, the harmony memory library remains unchanged.

[0103] Determine whether the current number of iterations has reached the maximum number of iterations. If so, output the layout of the harmony representative with the highest fitness. Otherwise, return to continue iterating.

[0104] In the present invention, the layout parameters of the IGBT module are optimized by a harmony search algorithm, which can efficiently perform a global search, comprehensively consider a variety of design objectives, achieve automated optimization, and improve design efficiency and quality.

[0105] The beneficial effects brought about by the technical solution provided by the embodiment of the present invention include at least:

[0106] In the present invention, the optimal layout of the IGBT module is determined with the goal of minimizing the temperature uniformity parameter value and the heat diffusion resistance value, which helps to improve the heat dissipation efficiency of the module, reduce the formation of local hot spots, and ensure that heat can be quickly and effectively transferred from the heat source to the heat dissipation layer. The uniform temperature distribution helps to keep the IGBT working within the optimal temperature range, avoid performance degradation caused by excessive temperature, avoid directly increasing the distance between each IGBT for heat dissipation, improve the rationality of the overall size of the module, and help improve the compactness and integration of the system, thereby improving the efficiency and performance of the system.

[0107] Reference Manual Attached Figure 2 , showing a structural schematic diagram of an IGBT module layout system applied to a photovoltaic storage system provided by the present invention.

[0108] The present invention further provides a module layout system 20 for an IGBT applied to a photovoltaic storage system, which is applied to the above-mentioned module layout method for an IGBT applied to a photovoltaic storage system, comprising:

[0109] Processor 201.

[0110] The memory 202 stores computer-readable instructions. When the computer-readable instructions are executed by the processor 201 , the module layout method of the IGBT applied to the photovoltaic storage system according to the method embodiment is implemented.

[0111] The module layout system 20 of IGBT applied to the photovoltaic storage system provided by the present invention can execute the above-mentioned module layout method of IGBT applied to the photovoltaic storage system and achieve the same or similar technical effects. To avoid repetition, the present invention will not elaborate on it.

[0112] The beneficial effects brought about by the technical solution provided by the embodiment of the present invention include at least:

[0113] In the present invention, the optimal layout of the IGBT module is determined with the goal of minimizing the temperature uniformity parameter value and the heat diffusion resistance value, which helps to improve the heat dissipation efficiency of the module, reduce the formation of local hot spots, and ensure that heat can be quickly and effectively transferred from the heat source to the heat dissipation layer. The uniform temperature distribution helps to keep the IGBT working within the optimal temperature range, avoid performance degradation caused by excessive temperature, avoid directly increasing the distance between each IGBT for heat dissipation, improve the rationality of the overall size of the module, and help improve the compactness and integration of the system, thereby improving the efficiency and performance of the system.

[0114] It should be understood that the processor in the embodiment of the present invention may be a central processing unit (CPU), and the processor may also be other general-purpose processors, digital signal processors (DSP), application specific integrated circuits (ASIC), field programmable gate arrays (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or the processor may also be any conventional processor, etc.

[0115] It should also be understood that the memory in the embodiments of the present invention may be a volatile memory or a non-volatile memory, or may include both volatile and non-volatile memories. Among them, the non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory may be a random access memory (RAM), which is used as an external cache. By way of example and not limitation, many forms of random access memory (RAM) are available, such as static RAM (SRAM), dynamic random access memory (DRAM), synchronous DRAM (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous link DRAM (SLDRAM), and direct rambus RAM (DR RAM).

[0116] The above embodiments can be implemented in whole or in part by software, hardware (such as circuits), firmware or any other combination. When implemented by software, the above embodiments can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions or computer programs. When the computer instructions or computer programs are loaded or executed on a computer, the process or function described in the embodiment of the present invention is generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions can be transmitted from one website, computer, server or data center to another website, computer, server or data center by wired (such as infrared, wireless, microwave, etc.). The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server or data center that contains one or more available media sets. The available medium can be a magnetic medium (for example, a floppy disk, a hard disk, a tape), an optical medium (for example, a DVD), or a semiconductor medium. The semiconductor medium can be a solid-state hard disk.

[0117] It should be understood that in various embodiments of the present invention, the size of the serial numbers of the above-mentioned processes does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present invention.

Claims

1. A module layout method for IGBTs applied to a photovoltaic storage system, characterized in that: include: S1: constructing an IGBT module, wherein the IGBT module comprises: a stacked device layer, a substrate layer, an electrical isolation layer, a bottom plate layer and a heat dissipation layer, wherein the device layer is provided with a plurality of device units, and each device unit comprises an IGBT and an FRD used in conjunction with each other; S2: using each IGBT and FRD as a discrete heat source, determining the surface temperature distribution of the device layer; S3: determining a temperature uniformity parameter value and a heat diffusion resistance value according to the surface temperature distribution of the device layer; S4: Determine the optimal layout of the IGBT module with the goal of minimizing the temperature uniformity parameter value and the heat diffusion resistance value.

2. The module layout method of IGBT applied to the photovoltaic storage system according to claim 1, characterized in that: The material of the substrate layer is copper, the material of the electrical isolation layer is aluminum nitride, and a heat sink is arranged on the heat dissipation layer.

3. The module layout method of IGBT applied to the photovoltaic storage system according to claim 1, characterized in that: The S4 specifically includes: S401: constructing an objective function with the goal of minimizing the temperature uniformity parameter value and the thermal diffusion resistance value; S402: According to the objective function, various layout parameters of the IGBT module are optimized by a harmony search algorithm to determine the best layout method.

4. The module layout method of IGBT applied to the photovoltaic storage system according to claim 3, characterized in that: The layout parameters specifically include: the placement position of each device unit and the placement position of the IGBT and the FRD in each device unit.

5. A module layout system for IGBTs used in a photovoltaic storage system, characterized in that: include: processor; A memory having computer-readable instructions stored thereon, wherein when the computer-readable instructions are executed by the processor, the module layout method of the IGBT applied to the photovoltaic storage system as claimed in any one of claims 1 to 4 is implemented.

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