Power supply system, electronic device, and power supply control method

By turning on the switching unit after the power management chip detects a preset duration of skip mode, the power management chip and the load extraction module are connected, which solves the flickering problem caused by ELVDD fluctuations in the display screen and improves display performance and system durability.

CN119418655BActive Publication Date: 2025-10-21VIVO MOBILE COMM CO LTD
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Patent Information

Application Number
CN202411446823.7
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-10-16
Publication Date
2025-10-21
Estimated Expiration
2044-10-16

AI Technical Summary

Technical Problem

After the PMIC enters skip mode, the ELVDD of the display screen fluctuates greatly, causing the display screen to flicker and affecting display performance.

Method used

When the path between the power management chip and the display screen is open, the duration of the power management chip in skip mode is detected, and after the preset duration is reached, the first switching unit is turned on to connect the path between the power management chip and the load extraction module, so as to increase the load current and quickly exit the skip mode.

Benefits of technology

This avoids damage to the power management chip caused by negative current, reduces the duration of screen flicker, and improves the durability of the power system and the display performance of the screen.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application discloses a power supply system, an electronic device and a power supply control method, and belongs to the technical field of display. The power supply system comprises a power management chip, a first switch unit and a load drawing module. The power management chip is connected with the first switch unit, the first switch unit is connected with the load drawing module, and the power management chip is further connected with a display screen. The power management chip is used for turning on the first switch unit to turn on the path between the power management chip and the load drawing module, so that the power management chip exits the skip mode, when the path between the power management chip and the display screen is turned on, and the first time length of the power management chip in the skip mode is greater than or equal to a preset time length.
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Description

Technical Field

[0001] The present application belongs to the field of display technology, and specifically relates to a power supply system, an electronic device, and a power supply control method. Background Art

[0002] Typically, the power management integrated circuit (PMIC) of an electronic device can periodically output a driving voltage (ELVDD) to the display to keep the display in operation. During this process, if the PMIC detects a large negative current in the PMIC, it can enter skip mode to prevent damage to the PMIC caused by the negative current.

[0003] However, after the PMIC enters the skip mode, the ELVDD output by the PMIC may fluctuate greatly, and thus the display screen may flicker (for example, black stripes may appear on the display screen), resulting in poor display performance of the display screen. Summary of the Invention

[0004] The purpose of the embodiments of the present application is to provide a power supply system, an electronic device, and a power supply control method, which can solve the problem of improving the display performance of a display screen.

[0005] In a first aspect, an embodiment of the present application provides a power supply system, which includes: a power management chip, a first switch unit, and a load extraction module; the power management chip is connected to the first switch unit, the first switch unit is connected to the load extraction module, and the power management chip is also connected to a display screen; wherein the above-mentioned power management chip is used to turn on the first switch unit when the path between the power management chip and the display screen is turned on and it is detected that the first time length of the power management chip in the skip mode is greater than or equal to the preset time length, so as to turn on the path between the power management chip and the load extraction module, thereby causing the power management chip to exit the skip mode.

[0006] In a second aspect, an embodiment of the present application provides an electronic device, comprising: a power supply system and a display screen as described in the first aspect; wherein the above-mentioned power management chip is used to turn on the first switching unit when the path between the power management chip and the display screen is turned on and it is detected that the first time length of the power management chip in the skip mode is greater than or equal to the preset time length, so as to turn on the path between the power management chip and the loading module, thereby causing the power management chip to exit the skip mode.

[0007] In a third aspect, an embodiment of the present application provides a power control method, which includes: when a path between a power management chip of a power system of an electronic device and a display screen of the electronic device is connected, the electronic device controls the power management chip to detect a first duration that the power management chip is in skip mode; and when the first duration is greater than or equal to a preset duration, controls the power management chip to connect the path between the power management chip and a load module of the power system, so that the power management chip exits skip mode.

[0008] In a fourth aspect, an embodiment of the present application provides an electronic device comprising a processor and a memory, wherein the memory stores programs or instructions that can be run on the processor, and when the programs or instructions are executed by the processor, the steps of the method described in the third aspect are implemented.

[0009] In a fifth aspect, an embodiment of the present application provides a readable storage medium, on which a program or instruction is stored. When the program or instruction is executed by a processor, the steps of the method described in the third aspect are implemented.

[0010] In a sixth aspect, an embodiment of the present application provides a chip, which includes a processor and a communication interface, the communication interface and the processor are coupled, and the processor is used to run programs or instructions to implement the method described in the third aspect.

[0011] In a seventh aspect, an embodiment of the present application provides a computer program product, which is stored in a storage medium and executed by at least one processor to implement the method described in the third aspect.

[0012] In an embodiment of the present application, a power supply system includes a power management chip, a first switch unit, and a load extraction module; the power management chip is connected to the first switch unit, which is connected to the load extraction module, and the power management chip is also connected to a display screen; wherein the power management chip is configured to, when a path between the power management chip and the display screen is connected and the power management chip is detected to be in skip mode for a first duration greater than or equal to a preset duration, turn on the first switch unit to connect the path between the power management chip and the load extraction module, thereby causing the power management chip to exit skip mode. Since the power supply system includes the power management chip, the first switch unit, and the load extraction module, and the power management chip can connect the path between the power management chip and the load extraction module by turning on the first switch unit when the power management chip is in skip mode for a first duration greater than or equal to a preset duration, the power supply load of the power management chip can be increased, thereby quickly increasing the load current in the power management chip, thereby quickly triggering the power management chip to exit skip mode. In this way, on the one hand, when the first time duration that the power management chip is in the skip mode is less than the preset time duration, the power management chip can still be in the skip mode, thereby avoiding damage to the power management chip caused by negative current; on the other hand, when the power management chip is in the skip mode for too long, the power management chip can make the power management chip exit the skip mode, thereby avoiding the user observing the flickering of the display screen due to the flickering of the display screen for a long time; furthermore, the display performance of the display screen can be improved while improving the durability of the power supply system.

[0013] In an embodiment of the present application, an electronic device includes a power supply system and a display screen; wherein the power management chip of the power supply system is configured to, when a path between the power supply system and the display screen is connected and it is detected that the first duration of the power management chip being in skip mode is greater than or equal to a preset duration, turn on a first switch unit of the power supply system to connect a path between the power management chip and a load extraction module of the power supply system, thereby causing the power management chip to exit skip mode. Since the power supply system of the electronic device is provided with a power management chip, a first switch unit, and a load extraction module, and the power management chip can connect the path between the power management chip and the load extraction module by turning on the first switch unit when the first duration of the power management chip being in skip mode is greater than or equal to a preset duration, the power supply load of the power management chip can be increased, thereby quickly increasing the load current in the power management chip, thereby quickly triggering the power management chip to exit skip mode. In this way, on the one hand, when the first time duration that the power management chip is in the skip mode is less than the preset time duration, the power management chip can still be in the skip mode, thereby avoiding damage to the power management chip caused by negative current; on the other hand, when the power management chip is in the skip mode for too long, the power management chip can make the power management chip exit the skip mode, thereby avoiding the user observing the flickering of the display screen due to the flickering of the display screen for a long time; furthermore, the display performance of the display screen can be improved while improving the durability of the power supply system.

[0014] In an embodiment of the present application, when a path between a power management chip of a power system of an electronic device and a display screen of the electronic device is connected, the electronic device can control the power management chip to detect a first duration that the power management chip is in skip mode, and when the first duration is greater than or equal to a preset duration, control the power management chip to connect a path between the power management chip and a load extraction module of the power system, so that the power management chip exits skip mode. Because when a path between the power management chip of the power system of the electronic device and the display screen of the electronic device is connected, the electronic device can control the power management chip to detect a first duration that the power management chip is in skip mode, and when the first duration is greater than or equal to a preset duration, connect the path between the power management chip and the load extraction module by turning on the first switch unit, the power supply load of the power management chip can be increased, thereby quickly increasing the load current in the power management chip, thereby quickly triggering the power management chip to exit skip mode. In this way, on the one hand, when the first time duration that the power management chip is in the skip mode is less than the preset time duration, the power management chip can still be in the skip mode, thereby avoiding damage to the power management chip caused by negative current; on the other hand, when the power management chip is in the skip mode for too long, the power management chip can make the power management chip exit the skip mode, thereby avoiding the user observing the flickering of the display screen due to the flickering of the display screen for a long time; furthermore, the display performance of the display screen can be improved while improving the durability of the power supply system. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 It is a structural diagram of an AMOLED display screen in the related art;

[0016] Figure 2 1 is a schematic diagram of a circuit structure of a power supply adjustment circuit of a PMIC in the related art;

[0017] Figure 3 is a schematic diagram of the structure of the power supply system provided in an embodiment of the present application;

[0018] Figure 4 Schematic diagram of voltage output of the power supply system provided in an embodiment of the present application;

[0019] Figure 5 This is one of the circuit structure diagrams of the power supply system provided in the embodiment of the present application;

[0020] Figure 6 This is the second circuit structure diagram of the power supply system provided in the embodiment of the present application;

[0021] Figure 7This is the third circuit structure diagram of the power supply system provided in the embodiment of the present application;

[0022] Figure 8 This is the fourth circuit structure diagram of the power supply system provided in the embodiment of the present application;

[0023] Figure 9 1 is a signal diagram of level signals of a first switch unit, a second switch unit, and a third switch unit of a power supply system provided in an embodiment of the present application;

[0024] Figure 10 is a structural diagram of an electronic device provided in an embodiment of the present application;

[0025] Figure 11 1 is a flow chart of a power supply control method provided in an embodiment of the present application;

[0026] Figure 12 This is one of the hardware structure diagrams of the electronic device provided in the embodiment of the present application;

[0027] Figure 13 This is the second hardware structure diagram of the electronic device provided in the embodiment of the present application. DETAILED DESCRIPTION

[0028] The following will be combined with the accompanying drawings in the embodiments of the present application to clearly describe the technical solutions in the embodiments of the present application. Obviously, the embodiments described are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field are within the scope of protection of this application.

[0029] The professional terms involved in the embodiments of this application are explained below.

[0030] 1. Active Matrix Organic Light Emitting Diode (AMOLED) display

[0031] Usually, such as Figure 1 As shown, the AMOLED display includes an AMOLED pixel matrix 11. Each AMOLED pixel has three self-emitting diodes. Its light emission is controlled by three voltages provided by a control circuit (e.g., a PMIC): an analog power supply voltage (AVDD), a drive voltage (ELVDD), and a low-level power supply voltage (ELVSS). It should be noted that AVDD is not shown in the figure.

[0032] The DC converter 12 converts the battery voltage into ELVDD and ELVSS, and then inputs ELVDD, ELVSS, and AVDD into the display driver chip 13 to drive the light-emitting diodes. ELVDD is transmitted by the DC converter 12 to the anode of the organic light-emitting diode unit, and ELVSS is transmitted by the DC converter 12 to the cathode of the organic light-emitting diode unit.

[0033] During normal operation, the ELVSS value is adjustable, while the ELVDD value is fixed. However, in abnormal situations, the ELVDD value may fluctuate. Large fluctuations in ELVDD can cause display flicker (black stripes on the screen) of varying degrees of severity. Therefore, maintaining ELVDD stability is essential.

[0034] 2. Skip mode

[0035] Usually, such as Figure 2 As shown, the power regulation circuit of the PMIC can generally be a boost architecture. The power regulation circuit includes a capacitor C i1 , inductor L1, switch tube Q1, switch tube Q2 and capacitor C o1 , the capacitor C i1 The first end and the input end V of the switching power supply circuit in connection, the V in Connected to the battery of PMIC, the capacitor C i1 The second end of the capacitor C is connected to the drain of the switch tube Q1. i1 The second end is also connected to the capacitor C o1 The second end of the inductor L1 is connected to the input end V in The second end of the inductor L1 is connected to the source of the switch tube Q1, the second end of the inductor L1 is also connected to the source of the switch tube Q2, and the drain of the switch tube Q2 is connected to the output terminal V out Connect the capacitor C o1 The first end and the output end V out Connect the output terminal V out Connect the display to the output terminal V out The above-mentioned ELVDD is provided to the display panel.

[0036] Therefore, the PMIC can first control the switch tube Q1 and the switch tube Q2 to be alternately turned on and off according to the cycle T1 to output ELVDD to the display screen, and detect in real time whether the current value of the negative current in the inductor L1 is greater than a certain threshold. If the current value of the negative current in the inductor L1 is greater than the certain threshold, the PMIC can enter the skip mode and first turn off the switch tube Q1 and the switch tube Q2 to reduce the current value of the negative current in the inductor L1, thereby preventing the negative current from damaging the battery and passing the capacitor C o1 Provide ELVDD to the display screen to avoid the display screen from failing to display. Then, every X T1, control the switch tube Q1 and the switch tube Q2 to be turned on and off alternately, so that when the switch tube Q2 is turned on, the capacitor C o1 Charge so that the capacitor C o1 ELVDD can be continuously output to the display, where X is a positive integer greater than 1. Next, when the PMIC detects that the negative current of the inductor L1 decreases to another threshold, the PMIC can exit the skip mode and control the switch tubes Q1 and Q2 to continue to be alternately turned on and off according to the cycle T1.

[0037] It should be noted that when the PMIC is in skip mode, ELVDD fluctuates greatly, and the display may flicker.

[0038] 3. Other terms

[0039] The terms "first," "second," and the like in the specification and claims of this application are used to distinguish similar objects, and are not used to describe a specific order or precedence. It should be understood that the terms used in this manner are interchangeable where appropriate, so that the embodiments of this application can be implemented in an order other than that illustrated or described herein, and that the objects distinguished by "first," "second," and the like are generally of the same type, and do not limit the number of objects; for example, the first object can be one or more. In addition, the term "and / or" in the specification and claims refers to at least one of the connected objects, and the character " / " generally indicates that the objects connected are in an "or" relationship.

[0040] The terms "at least one" and "at least one of" in the specification and claims of this application refer to any one, any two, or a combination of more than two of the objects included. For example, at least one of a, b, and c can be represented by: "a", "b", "c", "a and b", "a and c", "b and c", and "a, b, and c", where a, b, and c can be single or multiple. Similarly, "at least two" means two or more, and its meaning is similar to "at least one".

[0041] The power supply system, electronic device, and power supply control method provided in the embodiments of the present application are described in detail below with reference to specific embodiments and their application scenarios in conjunction with the accompanying drawings.

[0042] The power supply system, electronic device, and power supply control method provided in the embodiments of the present application can be applied to a scenario where a PMIC of an electronic device supplies power to an AMOLED display screen.

[0043] Usually, combined Figure 2 , the PMIC of the electronic device can first control the switch tube Q1 and the switch tube Q2 to be alternately turned on and off according to the cycle T1, so as to periodically output ELVDD to the AMOLED display screen so that the display screen can be in working state. During this process, if the PMIC detects that the current value of the negative current in the inductor L1 of the PMIC is large, it can enter the skip mode. At this time, the PMIC can first disconnect the switch tube Q1 and the switch tube Q2, and after a long time, control the switch tube Q1 and the switch tube Q2 to be turned on and off once, so as to avoid the damage to the PMIC caused by the negative current while continuing to output ELVDD to the display screen. In this way, the PMIC exits the skip mode when it detects that the negative current of the inductor is small. At this time, the PMIC can output ELVDD to the AMOLED display screen again according to the cycle T1. However, since the PMIC will disconnect the switch tube Q1 and the switch tube Q2 after entering the skip mode, the capacitor C o1 Will output ELVDD to the AMOLED display, and as the capacitor C o1 While outputting ELVDD, the capacitor C o1 The voltage of ELVDD is reduced, which may cause ELVDD to fluctuate. When the switch tube Q1 and the switch tube Q2 are turned on and off once, when the switch tube Q2 is turned on, the PMIC can o1 While charging, ELVDD is output to the AMOLED display, which may cause ELVDD to fluctuate again. When the PMIC disconnects the switch tubes Q1 and Q2 again, the capacitor C o1 ELVDD will be output to the AMOLED display, which may cause ELVDD to fluctuate again. In other words, after the PMIC enters skip mode, ELVDD fluctuates greatly. If the PMIC load current is small, the PMIC output current is also small, that is, the PMIC output voltage is small, which may cause the current value of the inductor to increase slowly, causing the PMIC to stay in skip mode for a long time, that is, the AMOLED display may flicker for a long time, which may cause the user to observe the AMOLED display flickering, thus resulting in poor display performance of the AMOLED display.

[0044] However, in an embodiment of the present application, in addition to being connected to the display, the PMIC can also be connected to the load removal module via a switch unit. Thus, when the path between the PMIC and the AMOLED display is connected and the PMIC detects that it has been in skip mode for a duration greater than or equal to a preset duration, the PMIC can turn on the switch unit to connect the path between the PMIC and the load removal module. At this point, the PMIC will output current to the display and the load removal module, increasing the current output by the PMIC and the voltage output by the PMIC. This can rapidly increase the current value in inductor L1 and quickly trigger the aforementioned other threshold, thereby triggering the PMIC to quickly exit skip mode. This prevents damage to the PMIC from negative current and reduces the duration of flickering on the AMOLED display (since the AMOLED display flickers for a shorter duration, the user may not notice the flickering). This improves both the durability of the power system and the display performance of the display.

[0045] Figure 3 FIG. 1 shows a schematic diagram of a circuit structure of a power supply system provided in an embodiment of the present application. Figure 3 As shown, the power supply system provided in an embodiment of the present application may include: a power management chip 10, a first switch unit 11 and a load extraction module 12; the power management chip 10 is connected to the first switch unit 11, the first switch unit 11 is connected to the load extraction module 12, and the power management chip 10 is also connected to the display screen 13.

[0046] In some embodiments of the present application, the first switch unit 11 may be any one of the following: a switch tube, a single-pole single-throw switch, or a single-pole multiple-throw switch. The switch tube may be a metal oxide semiconductor field effect transistor (MOS) tube, specifically a PMOS tube or an NMOS tube.

[0047] In some embodiments of the present application, the first switch unit 11 is used to control the on / off state of the path between the power management chip 10 and the load module 12 .

[0048] In some embodiments of the present application, the first switch unit 11 may be disposed in the power control chip 10 or on a circuit board of the electronic device.

[0049] In some embodiments of the present application, the above-mentioned load extraction module 12 may include at least one resistor and / or at least one constant current source. The at least one resistor may be connected in series and / or in parallel, and the at least one constant current source may be connected in series and / or in parallel.

[0050] In some embodiments of the present application, the above-mentioned load-drawing module 12 is used to absorb the current output by the PMIC.

[0051] It can be understood that when the path between the power management chip 10 and the load extraction module 12 is conductive, the display screen 13 and the load extraction module 12 can be connected in parallel. At this time, the power management chip 10 can output voltage to the display screen 13 and the load extraction module 12 at the same time. At this time, the total voltage output by the power management chip 10 will increase, that is, the load current output by the power management chip 10 will increase.

[0052] In some embodiments of the present application, the above-mentioned load extraction module 12 can be disposed in the power control chip 10, or disposed on a circuit board of the electronic device.

[0053] In some embodiments of the present application, the display screen 13 may be an AMOLED display screen. Of course, the display screen 13 may also be other display screens, which is not limited in the present application.

[0054] In the embodiment of the present application, the power management chip 10 is used to control the voltage output by the power system, wherein the voltage output by the power system may be ELVDD.

[0055] In some embodiments of the present application, the power management chip 10 may be a PMIC.

[0056] In an embodiment of the present application, the above-mentioned power management chip 10 is used to turn on the first switch unit 11 when the path between the power management chip 10 and the display screen 13 is connected and it is detected that the first time length of the power management chip 10 in the skip mode is greater than or equal to the preset time length, so as to turn on the path between the power management chip 10 and the load module 12, thereby allowing the power management chip 10 to exit the skip mode.

[0057] In some embodiments of the present application, the power management chip 10 can detect in real time the moment when the power management chip 10 enters the skip mode (for example, the first moment in the following embodiment) when the path between the power management chip 10 and the display screen 13 is turned on and a voltage is output to the display screen 13, and determine a first duration based on the moment, thereby turning on the first switch unit 11 when the first duration is greater than or equal to the preset duration.

[0058] In an embodiment of the present application, if the first duration of the power management chip 10 in the skip mode is greater than or equal to a preset duration, it can be considered that the power management chip 10 has been in the skip mode for too long, that is, it can be considered that the display screen 13 flickers for a long time, and the user may observe the display screen 13 flickering. Therefore, the power management chip 10 can turn on the first switch unit 11 to conduct the path between the power management chip 10 and the load extraction module 12. At this time, the power management chip 10 can simultaneously output voltage to the display screen 13 and the load extraction module 12, so that the load current of the power management chip 10 can be increased, that is, the load current in the power management chip 10 can quickly change from negative current to positive current, and the current value of the positive current reaches the other threshold mentioned above, thereby triggering the power management chip 10 to exit the skip mode.

[0059] In some embodiments of the present application, when the power management chip 10 exits the skip mode, the power management chip 10 may turn off the first switch unit 11 to avoid wasting power.

[0060] like Figure 4 As shown, when the power management chip 10 is not in the skip mode, that is, when the power management chip 10 is working normally, the power supply component 101 outputs the first voltage. When the negative current in the power control chip 10 is large, the power control chip 10 enters the skip mode and the first time length is less than the preset time length T safe In the case of the first switch unit 11 being disconnected, the ELVDD output by the power management chip 10 fluctuates greatly, and the first time length is greater than or equal to the preset time length T safe In this case, the first switch unit 11 is turned on, the power management chip 10 quickly exits the skip mode, and the first switch unit 11 is turned off, so that the ELVDD fluctuation output by the power management chip 10 is reduced, thereby avoiding the flickering of the display screen 13.

[0061] An embodiment of the present application provides a power supply system, comprising a power management chip, a first switch unit, and a load extraction module; the power management chip is connected to the first switch unit, which is connected to the load extraction module, and the power management chip is also connected to a display screen; wherein the power management chip is configured to, when a path between the power management chip and the display screen is connected and the power management chip is detected to be in skip mode for a first duration greater than or equal to a preset duration, turn on the first switch unit to connect the path between the power management chip and the load extraction module, thereby causing the power management chip to exit skip mode. Because the power management chip, the first switch unit, and the load extraction module are provided in the power supply system, and the power management chip can connect the path between the power management chip and the load extraction module by turning on the first switch unit when the power management chip is in skip mode for a first duration greater than or equal to a preset duration, the power supply load of the power management chip can be increased, thereby quickly increasing the load current in the power management chip, thereby quickly triggering the power management chip to exit skip mode. In this way, on the one hand, when the first time duration that the power management chip is in the skip mode is less than the preset time duration, the power management chip can still be in the skip mode, thereby avoiding damage to the power management chip caused by negative current; on the other hand, when the power management chip is in the skip mode for too long, the power management chip can make the power management chip exit the skip mode, thereby avoiding the user observing the flickering of the display screen due to the flickering of the display screen for a long time; furthermore, the display performance of the display screen can be improved while improving the durability of the power supply system.

[0062] The specific circuit structure of the power management chip 10 will be described below with examples.

[0063] In some embodiments of the present application, Figure 3 ,like Figure 5 As shown, the power management chip 10 includes a power supply component 101 and a driving circuit 102; the output end of the power supply component 102 is connected to the display screen 13, the output end of the power supply component 101 is also connected to the driving circuit 102, and the driving circuit 102 is also connected to the first switching unit 11.

[0064] In the embodiment of the present application, the power supply component 101 is used to output a first voltage to the display screen 13 .

[0065] In some embodiments of the present application, the power supply component 101 may include a battery and a voltage regulating circuit. The battery is connected to the voltage regulating circuit. The battery can output a voltage to the voltage regulating circuit. The voltage regulating circuit can adjust the voltage to obtain an adjusted voltage and output the adjusted voltage V to the display screen 13. outThe voltage adjustment circuit may be a boost circuit or a buck circuit.

[0066] In some embodiments of the present application, Figure 5 The above-mentioned load removal module 12 can specifically be a resistor R1.

[0067] In some embodiments of the present application, the driving circuit 102 may be connected to the gate of the first switch unit 11 (ie, Q3 in the figure). Thus, the driving circuit 102 may output a level signal V to the first switch unit 11. gs3 To control the first switch unit 11 to be on or off. For example, when the level signal V gs3 When the level signal V gs3 When it is a low level signal, the first switch unit 11 is disconnected.

[0068] In an embodiment of the present application, the above-mentioned driving circuit 102 is used to determine the first moment when the power management chip 10 enters the skip mode based on the first voltage value of the first voltage, and determine the first duration based on the first moment, and turn on the first switching unit 11 when the first duration is greater than or equal to the preset duration.

[0069] In some embodiments of the present application, the first voltage value may be the voltage value of the first voltage, or a voltage value obtained by multiplying the voltage value of the first voltage by a certain coefficient (eg, K1 in the following embodiment).

[0070] In an embodiment of the present application, since the first voltage value of the first voltage is related to the current value of the negative current in the PMIC, for example, the larger the first voltage value, the larger the current value of the negative current in the power management chip 10 may be, therefore, the driving circuit 102 can determine the first moment when the power management chip 10 enters the skip mode based on the first voltage value.

[0071] In some embodiments of the present application, the driving circuit 102 may obtain the current system time, so that the driving circuit 102 may determine the duration between the system time and the first time as the first duration.

[0072] In some embodiments of the present application, the driving circuit 102 may output a high-level signal to the first switching unit 11 to turn on the first switching unit 11 .

[0073] It can be seen that since the power management chip is provided with a power supply component and a driving circuit, the power management chip can output a first voltage adapted to the display screen through the power supply component, and accurately determine the first duration based on the first voltage value of the first voltage through the driving circuit to accurately determine whether the first duration is greater than or equal to the preset duration. Therefore, it can be ensured that the power management chip can output the adapted first voltage to the display screen while ensuring that the driving circuit can accurately cause the power management chip to exit the skip mode.

[0074] The specific circuit structure of the driving circuit 102 will be described below with examples.

[0075] In some embodiments of the present application, Figure 5 ,like Figure 6 As shown, the above-mentioned driving circuit 102 includes: a first error amplifier 1021, a first comparator 1022 and a first control module 1023; the input end of the first error amplifier 1021 is connected to the output end of the power supply component 101, the output end of the first error amplifier 1021 is connected to the positive end of the first comparator 1021, the output end of the first comparator 1021 is connected to the first control module 1023, and the first control module 1023 is connected to the first switching unit 11.

[0076] In the embodiment of the present application, the first error amplifier 1021 is configured to calculate a first error value between the first voltage value and a preset voltage value.

[0077] In some embodiments of the present application, the reference terminal of the first error amplifier 1021 can be connected to the first power supply V ref connection. Thus, the first power supply V ref A preset voltage value is provided to the first error amplifier 1021 .

[0078] In some embodiments of the present application, Figure 6 The input terminal of the first error amplifier 1021 can be connected to the input terminal of the first error amplifier 1021 via a first multiplier 1024. The first multiplier 1024 is configured to multiply the voltage value of the first voltage by a first coefficient K1 to obtain a first voltage value, and input the first voltage value to the first error amplifier 1021, so that the first error amplifier 1021 can determine the difference between the preset voltage value and the first voltage value as the first error value EA_OUT. K1 is an integer greater than 1.

[0079] In an embodiment of the present application, the above-mentioned first comparator 1022 is used to output a first level signal based on the first error value and the first detection threshold. When the first error value is greater than the first detection threshold, the first level signal is a high level signal; when the first error value is less than or equal to the first detection threshold, the first level signal is a low level signal.

[0080] In some embodiments of the present application, the first comparator 1022 may be a hysteresis comparator. That is, the first comparator 1022 may delay the second time length before outputting the first level signal. The second time length may be understood as the debounce time T delay It can be understood that by setting the second time duration, it is possible to avoid the first comparator 1022 outputting an erroneous level signal due to jitter of the first voltage value, thereby causing the moment when the power management chip 10 enters the skip mode determined by the first control module 1023 (for example, the first moment in the following embodiment) to be inaccurate.

[0081] In some embodiments of the present application, the negative terminal of the first comparator 1022 may be connected to the second power supply, so that the second power supply may provide a first detection threshold to the first comparator 1022. It is understood that the first detection threshold may be a voltage detection threshold.

[0082] In an embodiment of the present application, the above-mentioned first control module 1023 is used to determine the moment when the first control module 1023 receives the first level signal as the first moment when the first level signal is a low level signal, and determine the first duration based on the first moment, and turn on the first switch unit 11 when the first duration is greater than or equal to the preset duration.

[0083] In some embodiments of the present application, the first control module 1023 may be specifically connected to the gate of the first switch unit 11 .

[0084] In some embodiments of the present application, the first control module 1023 may be specifically a timer logic module. The timer logic module includes a timing unit and a processing unit. The processing unit may determine the moment when the first control module 1023 receives the first level signal as the first moment, and the timer may start timing at the first moment. The processing unit may determine the current timing value of the timing unit as the first duration, and, if the first duration is greater than or equal to a preset duration, output a control signal (e.g., a high-level signal) to the gate of the first switch unit 11 to turn on the first switch unit 11.

[0085] It can be seen that since the driving circuit is provided with a first error amplifier, a first comparator and a first control module, the first error value can be determined by the first error amplifier, and based on the size relationship between the first error value and the first detection threshold, it can be determined with certainty whether the power management chip enters the skip mode, without the power management chip detecting and indicating whether the power management chip enters the skip mode. Therefore, the computing power waste of the power management chip can be reduced.

[0086] In some embodiments of the present application, Figure 5 ,like Figure 7 As shown, the power supply component 101 includes: a battery 1011 and a voltage regulating circuit 1012, the voltage regulating circuit 1012 includes a first capacitor 10121, an inductor 10122, a second switch unit 10123, a third switch unit 10124 and a second capacitor 10125; the first end of the first capacitor 10121 is connected to the battery 1011, the second end of the first capacitor 10121 is connected to the drain of the second switch unit 10123, the first end of the inductor 10122 is connected to the battery 1011, and the second end of the inductor 10122 is connected to the source of the second switch unit 10123. The gate of the second switch unit 10123 is connected to the drive circuit 102, and the gate of the third switch unit 10124 is connected to the drive circuit 102.

[0087] In the embodiment of the present application, the battery 1011 is used to output a voltage V to the voltage regulating circuit 1012. in The voltage adjustment circuit 1012 is used to increase the voltage output by the battery to obtain a first voltage, ie, V out .

[0088] It can be understood that in this example, the voltage adjustment circuit 1012 can be a boost circuit.

[0089] In some embodiments of the present application, the first capacitor 10121 may be a filter capacitor. Figure 7 C1 in.

[0090] In some embodiments of the present application, the second switch unit 10123 can be any one of the following: a switch tube, a single-pole single-throw switch, or a single-pole multi-throw switch. The switch tube can be a MOS tube, and more specifically, a PMOS tube or an NMOS tube. Figure 7 Q1 in.

[0091] In some embodiments of the present application, the third switch unit 10124 can be any one of the following: a switch tube, a single-pole single-throw switch, or a single-pole multi-throw switch. The switch tube can be a MOS tube, and more specifically, a PMOS tube or an NMOS tube. Figure 7 Q2 in.

[0092] In some embodiments of the present application, the second capacitor 10125 may be a power supply capacitor. Figure 7 C2 in.

[0093] In some embodiments of the present application, the second end of the first capacitor 10121 and the second end of the second capacitor 10125 may also be grounded.

[0094] In the embodiment of the present application, the driving circuit 102 is further configured to control the second switch unit 10123 and the third switch unit 10124 to be alternately turned on and off based on the first current value of the current in the inductor 10122 , so as to adjust the voltage output by the battery 1011 to obtain a first voltage.

[0095] The driving circuit 102 may also be connected to the gates of the second switching unit 10123 and the third switching unit 10124. In this way, the driving circuit 102 may output a level signal to the second switching unit 10123 to control the on / off of the second switching unit 10123, and output a level signal to the third switching unit 10124 to control the on / off of the third switching unit 10124.

[0096] When the level signal output by the driving circuit 102 to the second switch unit 10123 is a high level signal, the second switch unit 10123 is turned on; when the level signal is a low level signal, the second switch unit 10123 is turned off.

[0097] When the level signal output by the driving circuit 102 to the third switch unit 10124 is a high level signal, the third switch unit 10124 is turned on; when the level signal is a low level signal, the third switch unit 10124 is turned off.

[0098] In some embodiments of the present application, the first current value may be the current value of the current in the inductor 10122 , or the current value obtained by multiplying the current value of the current in the inductor 10122 by a certain coefficient (eg, K2 in the following embodiment).

[0099] In some embodiments of the present application, when the drive circuit 102 turns on the second switch unit 10123 and turns off the third switch unit 10124, the battery 1011 can charge the inductor 10122, the current value of the current in the inductor 10122 increases, and the second capacitor 10125 can output a voltage to the display screen 13. When the drive circuit 102 turns off the second switch unit 10123 and turns on the third switch unit 10124, the load of the power control chip 10 increases, so the voltage output by the battery 1011 decreases, while the inductor 10122 can output a voltage. At this time, the battery 1011 and the inductor 10122 can charge the second capacitor 10125 while outputting a first voltage to the display screen 13. It can be understood that since the battery 1011 and the inductor 10122 can simultaneously output the first voltage to the display screen 13, the first voltage is higher than the voltage output by the battery 1011, that is, the voltage output by the battery 1011 can be increased.

[0100] It can be seen that since the above-mentioned power supply component may include a battery, a first capacitor, an inductor, a second switch unit, a third switch unit and a second capacitor, the driving circuit can increase the voltage output by the power supply component by controlling the second switch unit and the third switch unit to be alternately turned on and off, so that the power supply component can output the voltage required by the display screen to the display screen.

[0101] In some embodiments of the present application, Figure 7 ,like Figure 8 As shown, the above-mentioned driving circuit 102 includes: a second comparator 1025, a third comparator 1026, an OR gate unit 1027 and a reset RS trigger 1028; the negative terminal of the second comparator 1025 is connected to the inductor 10122, and the output terminal of the second comparator 1025 is connected to the input terminal of the OR gate unit 1027; the negative terminal of the third comparator 1026 is connected to the inductor 10122, and the output terminal of the third comparator 1026 is connected to the input terminal of the OR gate unit 1027; the output terminal of the OR gate unit 1027 is connected to the set terminal of the RS trigger 1028; the first output terminal of the RS trigger 1028 is connected to the gate of the second switch unit 10123, and the second output terminal of the RS trigger 1028 is connected to the gate of the third switch unit 10124.

[0102] In an embodiment of the present application, the above-mentioned second comparator 1025 is used to output a second level signal based on the first current value and the second detection threshold. When the first current value is greater than the second detection threshold, the second level signal is a low level signal. When the first current value is less than or equal to the second detection threshold, the second level signal is a high level signal.

[0103] In some embodiments of the present application, the positive terminal of the second comparator 1025 can be connected to a third power supply, so that the third power supply can provide a second detection threshold to the second comparator 1025. The second detection threshold can also be called a negative current threshold I ref .

[0104] In some embodiments of the present application, if the first current value is greater than the second detection threshold, it can be considered that the current value of the negative current in the power management chip 10 (i.e., the negative current in the inductor 10122) is small, that is, the negative current in the inductor 10122 is small, for example, the current in the inductor 10122 is positive or negative and the current value is small. If the first current value is less than or equal to the second detection threshold, it can be considered that the current value of the negative current in the power management chip 10 is large, that is, the negative current in the inductor 10122 is large, for example, the current in the inductor 10122 is negative and the current value is large.

[0105] In an embodiment of the present application, the upper third comparator 1026 is used to output a third level signal based on the first current value and the first error value, where the first error value is the error value between the first voltage value of the first voltage and the preset voltage value. When the first current value is greater than the first error value, the third level signal is a low level signal. When the first current value is less than or equal to the first error value, the third level signal is a high level signal.

[0106] In some embodiments of the present application, Figure 8 The negative terminal of the third comparator 1026 can be connected to the inductor 10122 via a second multiplier 1029. The second multiplier 1029 is configured to multiply the current value of the current IL in the inductor 10122 by a second coefficient K2 to obtain a first current value, and input the first current value to the third comparator 1026, so that the third comparator 1026 can output a third level signal based on the first current value and the first error value; K2 is an integer greater than 1.

[0107] In the embodiment of the present application, the OR gate unit 1027 is configured to output a fourth level signal according to the second level signal and the third level signal, where the fourth level signal is a high level signal or a low level signal.

[0108] It can be understood that when one of the second level signal and the third level signal is a high level signal, the fourth level signal is a high level signal; when the second level signal and the third level signal are both low level signals, the fourth level signal is a low level signal.

[0109] In an embodiment of the present application, the above-mentioned RS trigger 1028 is used to turn on the second switch unit 10123 and turn off the third switch unit 10124 when the fourth level signal is a high level signal; or, when the fourth level signal is a low level signal, turn off the second switch unit 10123 and turn on the third switch unit 10124.

[0110] It can be seen that since the second comparator, the third comparator, the OR gate unit and the RS trigger can be set in the driving circuit, the second switch unit and the third switch unit can be accurately controlled to be alternately turned on and off by the second comparator, the third comparator, the OR gate unit and the RS trigger, thereby avoiding damage to the battery due to the large current value of the negative current, and ensuring that the power supply component can output a suitable first voltage to the display screen.

[0111] In some embodiments of the present application, when the power management chip 10 exits the skip mode, the RS trigger 1028 is in a working state; the RS trigger 1028 is specifically used to turn on the second switch unit 10123 and disconnect the third switch unit 10124 when the RS trigger 1028 is in a working state and the fourth level signal is a high level signal; or, when the RS trigger 1028 is in a working state and the fourth level signal is a low level signal, disconnect the second switch unit 10123 and turn on the third switch unit 10124.

[0112] In some embodiments of the present application, the first comparator 1022 may be further connected to an RS trigger 1028, so that the first comparator 1022 may output a first level signal to the RS trigger 1028. Thus, the RS trigger 1028 may be in an operating state when the first level signal is a high level signal, and in a non-operating state when the first level signal is a low level signal.

[0113] It can be seen that the RS trigger will control the second switch unit and the third switch unit to be alternately turned on and off to output the first voltage only when the power management chip exits the skip mode, instead of still controlling the second switch unit and the third switch unit to be alternately turned on and off when the power management chip is in the skip mode. Therefore, it can avoid damage to the battery due to the large current value of the negative current, and can ensure that the power supply component can output a suitable first voltage to the display screen.

[0114] The following will use a specific example to illustrate a specific solution of the driving circuit 102 controlling the power supply component 101 to output the first voltage and controlling the power management chip 10 to exit the skip mode.

[0115] Combine Figures 3 to 8 , first, the power management chip 10 is not in the skip mode, that is, the power management chip 10 is working normally. At this time, the first voltage value V out The first error value EA_OUT is smaller, the first error value EA_OUT is larger, the first error value EA_OUT is greater than the first detection threshold (i.e., the voltage detection threshold), the first level signal skip_EN output by the first comparator 1022 is a high level signal, and the RS trigger 1028 is in an operating state. As a result, the second comparator 1025 can output a second level signal PWM2 based on the first current value of the inductor 10122 and the second detection threshold (i.e., the negative current threshold), and the third comparator 1026 can output a third level signal PWM1 based on the first current value of the current IL in the inductor 10122 and the first error value EA_OUT. During each switching cycle, the current IL in the inductor 10122 is a triangular wave. Thus, when the clock signal arrives within the switching cycle, the driver circuit 102 can first disconnect the second switch unit 10123 and connect the third switch unit 10124. At this time, the battery 1011 and the inductor 10122 charge the second capacitor 10125 and output the first voltage to the display screen 13, causing the current IL in the inductor 10122 to begin to decrease. When the current value of the current IL in the inductor 10122 reaches a valley value, the first current value of the current IL is less than the first error value EA_OUT, the third level signal PWM1 becomes a high level signal, and the fourth level signal also becomes a high level signal, so that the RS trigger 1028 can turn on the second switch unit 10123 and disconnect the third switch unit 10124. At this time, the battery 1011 can charge the inductor 10122, and the current value of the current IL in the inductor 10122 begins to increase. When the current value of the current IL in the inductor 10122 reaches a peak value, the first current value of the current IL is greater than the first error value EA_OUT, the third level signal PWM1 becomes a low level signal, and the fourth level signal also becomes a low level signal, so that the RS trigger 1028 can disconnect the second switch unit 10123 and turn on the third switch unit 10124, and so on.

[0116] In the process of the RS trigger 1028 controlling the second switch unit 10123 and the third switch unit 10124 to switch alternately, each time the second switch unit 10123 is turned off and the third switch unit 10124 is turned on, the battery 1011 and the inductor 10122 simultaneously output voltage to the display screen 13. Therefore, the first voltage value V outThe first error value EA_OUT decreases, which in turn decreases the valley value of the current IL in the inductor 10122. This means that the current IL in the inductor 10122 may be negative and have a large current value. To prevent damage, when the current IL in the inductor 10122 is less than the second detection threshold, the power control chip 10 enters skip mode, and the second level signal PWM2 becomes high. At this point, regardless of whether the third level signal PWM1 is high or low, the fourth level signal is high. The RS trigger 1028 turns on the second switch unit 10123 and turns off the third switch unit 10124 to charge the inductor 10122, thereby increasing the first current value of the current IL in the inductor 10122. Furthermore, the first error value EA_OUT decreases, and when the first error value EA_OUT is less than the first detection threshold, the first level signal skip_EN becomes low, meaning that the driver circuit 102 can quickly recognize that the power control chip 10 has entered skip mode. Thus, when the first level signal skip_EN is a low level signal, the RS trigger 1028 is in a non-operating state, the second switch unit 10123 and the third switch unit 10124 are both disconnected, and the second capacitor 10125 outputs the first voltage to the display screen 13. The first control module 1023 can determine the moment of receiving the first level signal skip_EN as the first moment, and determine in real time whether the first duration of the power control chip 10 in the skip mode is greater than or equal to the preset duration T safe , in the first time period, it is greater than or equal to the preset time period T safe Under this circumstance, the first control module 1023 can turn on the first switch unit 11. At this time, the second capacitor 10125 outputs a voltage to the display screen 13 and the loading module 12. Therefore, the voltage of the second capacitor 10125 decreases rapidly, the power control chip 10 exits the skip mode, and makes the first error value EA_OUT increase rapidly. The first error value EA_OUT is greater than the first detection threshold, so that the first level signal becomes a high level signal, the RS trigger 1028 is in working state, and controls the second switch unit 10123 and the third switch unit 10124 to be alternately turned on and off.

[0117] like Figure 9 As shown, when the power management chip 10 is not in the skip mode, that is, when the power management chip 10 is working normally, the level signal V gs1 (ie, the control level signal sent by the RS trigger 1028) is a high level signal, the second switch unit 10123 is turned on, and the level signal V gs1 When the level signal V is low, the second switch unit 10123 is disconnected; the level signal Vgs2 (ie, the control level signal sent by the RS trigger 1028) is a high level signal, the third switch unit 10124 is turned on, and the level signal V gs2 When it is a low level signal, the third switch unit 10124 is disconnected. Figure 9 When the power management chip 10 is working normally, the second switch unit 10123 and the third switch unit 10124 are alternately turned on and off. When the first error value EA_OUT is less than the first detection threshold, after the debounce time Tdelay is exceeded, the second switch unit 10123 and the third switch unit 10124 are both turned off (i.e., the control level signal V gs1 and V gs2 are both low-level signals), so that when the first duration is less than the preset duration Tsafe, the first switch unit 11 is disconnected, and when the first duration is greater than or equal to the preset duration Tsafe, the first switch unit 11 is turned on (i.e., the first control module 1023 outputs a level signal V gs3 is a high-level signal), at this time the first error value EA_OUT can increase rapidly, that is, the power management chip 10 can quickly exit the skip mode. When the first error value EA_OUT is greater than the first detection threshold, the second switch unit 10123 and the third switch unit 10124 continue to be alternately turned on and off.

[0118] Figure 10 FIG. 1 shows a schematic diagram of the structure of an electronic device provided in an embodiment of the present application. Figure 10 As shown, the electronic device 20 provided in the embodiment of the present application may include: the power supply system 21 and the display screen 22 in the above embodiment.

[0119] In an embodiment of the present application, the power management chip of the above-mentioned power supply system 21 is used to turn on the first switching unit of the power supply system 21 when the path between the power management chip and the display screen 22 is connected and it is detected that the first time length of the power management chip in the skip mode is greater than or equal to the preset time length, so as to turn on the path between the power management chip and the unloading module of the power supply system 21, thereby making the power management chip exit the skip mode.

[0120] An embodiment of the present application provides an electronic device, comprising a power supply system and a display screen; wherein the power management chip of the power supply system is configured to, when a path between the power supply system and the display screen is connected and it is detected that the first duration of the power management chip being in skip mode is greater than or equal to a preset duration, turn on a first switch unit of the power supply system to connect a path between the power management chip and a load extraction module of the power supply system, thereby causing the power management chip to exit skip mode. Because the power supply system of the electronic device is provided with a power management chip, a first switch unit, and a load extraction module, and the power management chip can connect the path between the power management chip and the load extraction module by turning on the first switch unit when the first duration of the power management chip being in skip mode is greater than or equal to a preset duration, the power supply load of the power management chip can be increased, thereby quickly increasing the load current within the power management chip, thereby quickly triggering the power management chip to exit skip mode. In this way, on the one hand, when the first time duration that the power management chip is in the skip mode is less than the preset time duration, the power management chip can still be in the skip mode, thereby avoiding damage to the power management chip caused by negative current; on the other hand, when the power management chip is in the skip mode for too long, the power management chip can make the power management chip exit the skip mode, thereby avoiding the user observing the flickering of the display screen due to the flickering of the display screen for a long time; furthermore, the display performance of the display screen can be improved while improving the durability of the power supply system.

[0121] Figure 11 FIG. 1 shows a flow chart of a power supply control method provided by an embodiment of the present application. Figure 11 As shown, the power control method provided in the embodiment of the present application may include the following steps 101 and 102.

[0122] Step 101: When a path between a power management chip of a power system of an electronic device and a display screen of the electronic device is connected, the electronic device controls the power management chip to detect a first duration of time that the power management chip is in skip mode.

[0123] In some embodiments of the present application, the above step 101 can be specifically implemented through the following steps 101a and 101b.

[0124] Step 101a: When a path between a power management chip of a power system of an electronic device and a display screen of the electronic device is connected, the electronic device controls a driving circuit of the power management chip, and determines a first moment when the power management chip enters skip mode based on a first voltage value of a first voltage output from an output end of a power supply component of the power management chip.

[0125] In some embodiments of the present application, the above step 101a can be specifically implemented through the following steps 101a1 to 101a3.

[0126] Step 101a1: When a path between a power management chip of a power system of an electronic device and a display screen of the electronic device is connected, the electronic device controls a first error amplifier of a driving circuit to calculate a first error value between a first voltage value and a preset voltage value.

[0127] Step 101a2: The electronic device controls the first comparator of the driving circuit to output a first level signal according to the first error value and the first detection threshold.

[0128] In the embodiment of the present application, when the first error value is greater than the first detection threshold, the first level signal is a high level signal; when the first error value is less than or equal to the first detection threshold, the first level signal is a low level signal.

[0129] Step 101a3: The electronic device controls the first control module of the driving circuit, and when the first level signal is a low level signal, determines the moment when the first control module receives the first level signal as the first moment.

[0130] It can be seen that since the driving circuit is provided with a first error amplifier, a first comparator and a first control module, the first error value can be determined by the first error amplifier, and based on the size relationship between the first error value and the first detection threshold, it can be determined with certainty whether the power management chip enters the skip mode, without the power management chip detecting and indicating whether the power management chip enters the skip mode. Therefore, the computing power waste of the power management chip can be reduced.

[0131] Step 101b: The electronic device controls the driving circuit to determine a first duration based on the first moment.

[0132] It can be seen that since the electronic device can accurately determine the first duration based on the first voltage value of the first voltage through the driving circuit to accurately determine whether the first duration is greater than or equal to the preset duration, it can ensure that the power management chip can output the adapted first voltage to the display screen while ensuring that the driving circuit can accurately make the power management chip exit the skip mode.

[0133] Step 102: When the first time duration is greater than or equal to the preset time duration, the electronic device controls the power management chip to connect a path between the power management chip and the load withdrawal module of the power system, so that the power management chip exits the skip mode.

[0134] An embodiment of the present application provides a power control method. When a path between a power management chip of a power system of an electronic device and a display screen of the electronic device is connected, the electronic device can control the power management chip to detect a first duration that the power management chip is in skip mode, and when the first duration is greater than or equal to a preset duration, control the power management chip to connect a path between the power management chip and a load extraction module of the power system, so that the power management chip exits skip mode. Because when a path between the power management chip of the power system of the electronic device and the display screen of the electronic device is connected, the electronic device can control the power management chip to detect a first duration that the power management chip is in skip mode, and when the first duration is greater than or equal to the preset duration, connect the path between the power management chip and the load extraction module by turning on a first switch unit, the power supply load of the power management chip can be increased, thereby quickly increasing the load current in the power management chip, thereby quickly triggering the power management chip to exit skip mode. In this way, on the one hand, when the first time duration that the power management chip is in the skip mode is less than the preset time duration, the power management chip can still be in the skip mode, thereby avoiding damage to the power management chip caused by negative current; on the other hand, when the power management chip is in the skip mode for too long, the power management chip can make the power management chip exit the skip mode, thereby avoiding the user observing the flickering of the display screen due to the flickering of the display screen for a long time; furthermore, the display performance of the display screen can be improved while improving the durability of the power supply system.

[0135] In some embodiments of the present application, before the above step 101, the power control method provided by the embodiment of the present application may further include the following step 201.

[0136] Step 201: The electronic device controls the driving circuit of the power management chip, and based on the first current value of the current in the inductor of the voltage adjustment circuit of the power supply component of the power management chip, controls the second switch unit and the third switch unit of the voltage adjustment circuit to be alternately turned on and off to adjust the voltage output by the battery of the power supply component to obtain a first voltage.

[0137] In the embodiment of the present application, the above-mentioned first voltage is the voltage output by the power supply component to the display screen.

[0138] As can be seen, since the driving circuit can increase the voltage output by the power supply component by controlling the second switch unit and the third switch unit to be alternately turned on and off, the power supply component can output the voltage required by the display screen to the display screen.

[0139] In some embodiments of the present application, the above-mentioned step 201 can be specifically implemented through the following steps 201a, 201b, 201c and 201d.

[0140] Step 201a: The electronic device controls the second comparator of the driving circuit to output a second level signal according to the first current value and the second detection threshold.

[0141] In the embodiment of the present application, when the first current value is greater than the second detection threshold, the second level signal is a low level signal; when the first current value is less than or equal to the second detection threshold, the second level signal is a high level signal.

[0142] Step 201b: The electronic device controls the third comparator of the driving circuit to output a third level signal according to the first current value and the first error value.

[0143] In an embodiment of the present application, the above-mentioned first error value is an error value between the first voltage value of the first voltage and a preset voltage value. When the first current value is greater than the first error value, the third level signal is a low level signal. When the first current value is less than or equal to the first error value, the third level signal is a high level signal.

[0144] Step 201c: The electronic device controls the OR gate unit of the driving circuit to output a fourth level signal according to the second level signal and the third level signal.

[0145] In the embodiment of the present application, the fourth level signal is a high level signal or a low level signal.

[0146] Step 201d: When the fourth level signal is a high level signal, the electronic device controls the RS trigger of the driving circuit to turn on the second switch unit and turn off the third switch unit.

[0147] In some embodiments of the present application, the above step 201d can also be replaced by the following step 201e.

[0148] Step 201e: When the fourth level signal is a low level signal, the electronic device controls the RS trigger to turn off the second switch unit and turn on the third switch unit.

[0149] It can be seen that since the electronic device accurately controls the second switch unit and the third switch unit to be alternately turned on and off through the second comparator, the third comparator, the OR gate unit and the RS trigger, it can avoid damage to the battery due to the large current value of the negative current while ensuring that the power supply component can output a suitable first voltage to the display screen.

[0150] In some embodiments of the present application, when the power management chip exits the skip mode, the RS trigger is in an active state. The above step 201d can be specifically implemented by the following step 201d1, and the above step 201e can be specifically implemented by the following step 201e1.

[0151] Step 201d1: When the RS trigger is in the working state and the fourth level signal is a high level signal, the electronic device controls the RS trigger to turn on the second switch unit and turn off the third switch unit.

[0152] Step 201e1: When the RS trigger is in the working state and the fourth level signal is a low level signal, the electronic device controls the RS trigger to turn off the second switch unit and turn on the third switch unit.

[0153] It can be seen that only when the power management chip exits the skip mode will the electronic device control the second switch unit and the third switch unit to be alternately turned on and off through the RS trigger to output the first voltage, instead of still controlling the second switch unit and the third switch unit to be alternately turned on and off when the power management chip is in the skip mode. Therefore, it can avoid damage to the battery due to the large current value of the negative current, and can ensure that the power supply component can output a suitable first voltage to the display screen.

[0154] The power control method provided in the embodiment of the present application can be executed by a power control device. In the embodiment of the present application, the power control device provided in the embodiment of the present application is described by taking the power control method executed by the power control device as an example.

[0155] In some embodiments of the present application, Figure 12 As shown, an embodiment of the present application also provides an electronic device 30, including a processor 31 and a memory 32, wherein the memory 32 stores a program or instruction that can be run on the processor 31, and when the program or instruction is executed by the processor 31, the various process steps of the above-mentioned power control method embodiment are implemented, and the same technical effect can be achieved. To avoid repetition, it will not be repeated here.

[0156] It should be noted that the electronic devices in the embodiments of the present application include the mobile electronic devices and non-mobile electronic devices mentioned above.

[0157] Figure 13 A schematic diagram of the hardware structure of an electronic device implementing an embodiment of the present application.

[0158] The electronic device 100 includes but is not limited to components such as a radio frequency unit 101 , a network module 102 , an audio output unit 103 , an input unit 104 , a sensor 105 , a display unit 106 , a user input unit 107 , an interface unit 108 , a memory 109 , and a processor 110 .

[0159] Those skilled in the art will understand that the electronic device 100 may also include a power source (such as a battery) to power each component, and the power source may be logically connected to the processor 110 through a power management system, thereby implementing functions such as charging, discharging, and power consumption management through the power management system. Figure 13 The electronic device structure shown in the figure does not constitute a limitation on the electronic device. The electronic device may include more or fewer components than shown in the figure, or combine certain components, or arrange the components differently, which will not be repeated here.

[0160] Among them, the processor 110 is used to control the power management chip to detect the first duration of time that the power management chip is in skip mode when the path between the power management chip of the power system of the electronic device and the display screen of the electronic device is connected; and when the first duration is greater than or equal to the preset duration, control the power management chip to connect the path between the power management chip and the load extraction module of the power system, so that the power management chip exits skip mode.

[0161] An embodiment of the present application provides an electronic device. When a path between a power management chip of a power system of the electronic device and a display screen of the electronic device is connected, the electronic device can control the power management chip to detect a first duration that the power management chip is in skip mode. When the first duration that the power management chip is in skip mode is greater than or equal to a preset duration, the electronic device can connect the path between the power management chip and a load extraction module by turning on a first switch unit. This increases the load supplied by the power management chip, thereby quickly increasing the load current within the power management chip and thereby quickly triggering the power management chip to exit skip mode. Thus, on the one hand, even when the first duration that the power management chip is in skip mode is less than the preset duration, the power management chip can still remain in skip mode, thereby preventing damage to the power management chip caused by negative current. On the other hand, if the power management chip is in skip mode for too long, the power management chip can exit skip mode, thereby preventing a user from observing flickering of the display screen due to a prolonged period of time. Furthermore, the durability of the power system can be improved while also improving the display performance of the display screen.

[0162] In some embodiments of the present application, the above-mentioned processor 110 is specifically used to control the driving circuit of the power management chip, determine the first moment when the power management chip enters the skip mode based on the first voltage value of the first voltage output from the output end of the power supply component of the power management chip; and control the driving circuit to determine the first duration based on the first moment.

[0163] In some embodiments of the present application, the above-mentioned processor 110 is specifically used to control the first error amplifier of the driving circuit to calculate the first error value between the first voltage value and the preset voltage value; and control the first comparator of the driving circuit to output a first level signal according to the first error value and the first detection threshold. When the first error value is greater than the first detection threshold, the first level signal is a high level signal; when the first error value is less than or equal to the first detection threshold, the first level signal is a low level signal; and control the first control module of the driving circuit to determine the moment when the first control module receives the first level signal as the first moment when the first level signal is a low level signal.

[0164] In some embodiments of the present application, the above-mentioned processor 110 is also used to control the driving circuit of the power management chip, and based on the first current value of the current in the inductor of the voltage adjustment circuit of the power supply component of the power management chip, control the second switch unit and the third switch unit of the voltage adjustment circuit to be alternately turned on and off to adjust the voltage output by the battery of the power supply component to obtain a first voltage, which is the voltage output by the output end of the power supply component.

[0165] In some embodiments of the present application, the processor 110 is specifically configured to control a second comparator of the driving circuit to output a second level signal according to the first current value and the second detection threshold, wherein the second level signal is a low level signal when the first current value is greater than the second detection threshold, and the second level signal is a high level signal when the first current value is less than or equal to the second detection threshold; and control a third comparator of the driving circuit to output a third level signal according to the first current value and the first error value, wherein the first error value is an error value between a first voltage value of the first voltage and a preset voltage value, wherein the third level signal is a low level signal when the first current value is greater than the first error value, and the third level signal is a high level signal when the first current value is less than or equal to the first error value; and control an OR gate unit of the driving circuit to output a fourth level signal according to the second level signal and the third level signal, wherein the fourth level signal is a high level signal or a low level signal; and, when the fourth level signal is a high level signal, control an RS trigger of the driving circuit to turn on the second switch unit and turn off the third switch unit; or, when the fourth level signal is a low level signal, control the RS trigger to turn off the second switch unit and turn on the third switch unit.

[0166] In some embodiments of the present application, when the power management chip exits the skip mode, the RS trigger is in a working state.

[0167] The processor 110 is further configured to, when the RS trigger is in an operating state and the fourth level signal is a high level signal, control the RS trigger to turn on the second switch unit and turn off the third switch unit; or, when the RS trigger is in an operating state and the fourth level signal is a low level signal, control the RS trigger to turn off the second switch unit and turn on the third switch unit.

[0168] It should be understood that in an embodiment of the present application, the input unit 104 may include a graphics processing unit (GPU) 1041 and a microphone 1042, and the graphics processor 1041 processes the image data of a static picture or video obtained by an image capture device (such as a camera) in a video capture mode or an image capture mode. The display unit 106 may include a display panel 1061, and the display panel 1061 may be configured in the form of a liquid crystal display, an organic light emitting diode, etc. The user input unit 107 includes a touch panel 1071 and at least one of other input devices 1072. The touch panel 1071 is also called a touch screen. The touch panel 1071 may include two parts: a touch detection device and a touch controller. Other input devices 1072 may include, but are not limited to, a physical keyboard, function keys (such as volume control keys, switch keys, etc.), a trackball, a mouse, and a joystick, which will not be repeated here.

[0169] The memory 109 can be used to store software programs and various data. The memory 109 may mainly include a first storage area for storing programs or instructions and a second storage area for storing data, wherein the first storage area may store an operating system, applications or instructions required for at least one function (such as a sound playback function, an image playback function, etc.), etc. In addition, the memory 109 may include a volatile memory or a non-volatile memory, or the memory 109 may include both volatile and non-volatile memories. Among them, the non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory may be a random access memory (RAM), a static random access memory (SRAM), a dynamic random access memory (DRAM), a synchronous dynamic random access memory (SDRAM), a double data rate synchronous dynamic random access memory (DDRSDRAM), an enhanced synchronous dynamic random access memory (ESDRAM), a synchronous link dynamic random access memory (SLDRAM), and a direct rambus RAM (DRRAM). The memory 109 in the embodiment of the present application includes but is not limited to these and any other suitable types of memory.

[0170] Processor 110 may include one or more processing units. Optionally, processor 110 integrates an application processor and a modem processor. The application processor primarily handles operations related to the operating system, user interface, and application programs, while the modem processor primarily processes wireless communication signals, such as a baseband processor. It is understood that the modem processor may not be integrated into processor 110.

[0171] An embodiment of the present application also provides a readable storage medium, on which a program or instruction is stored. When the program or instruction is executed by a processor, the various processes of the above-mentioned power control method embodiment are implemented and the same technical effect can be achieved. To avoid repetition, it will not be repeated here.

[0172] The processor is the processor in the electronic device described in the above embodiment. The readable storage medium includes a computer readable storage medium, such as a computer read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk.

[0173] An embodiment of the present application further provides a chip, which includes a processor and a communication interface, wherein the communication interface is coupled to the processor, and the processor is used to run programs or instructions to implement the various processes of the above-mentioned power control method embodiment and achieve the same technical effect. To avoid repetition, it will not be repeated here.

[0174] It should be understood that the chip mentioned in the embodiments of the present application can also be called a system-level chip, a system chip, a chip system or a system-on-chip chip, etc.

[0175] An embodiment of the present application provides a computer program product, which is stored in a storage medium. The program product is executed by at least one processor to implement the various processes of the above-mentioned power control method embodiment and can achieve the same technical effect. To avoid repetition, it will not be repeated here.

[0176] It should be noted that, in this article, the terms "comprise", "include" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the statement "comprises a ..." does not exclude the presence of other identical elements in the process, method, article or device comprising the element. In addition, it should be noted that the scope of the methods and devices in the embodiments of the present application is not limited to performing functions in the order shown or discussed, and may also include performing functions in a substantially simultaneous manner or in the opposite order according to the functions involved. For example, the described method may be performed in an order different from that described, and various steps may also be added, omitted, or combined. In addition, the features described with reference to certain examples may be combined in other examples.

[0177] Through the description of the above implementation methods, those skilled in the art can clearly understand that the above-mentioned embodiment methods can be implemented by means of software plus the necessary general hardware platform, and of course can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the prior art can be embodied in the form of a computer software product, which is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk), including a number of instructions for enabling a terminal (which can be a mobile phone, computer, server, or network device, etc.) to execute the methods described in each embodiment of the present application.

[0178] The embodiments of the present application are described above in conjunction with the accompanying drawings, but the present application is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the guidance of this application, ordinary technicians in this field can also make many forms without departing from the purpose of this application and the scope of protection of the claims, all of which are within the protection of this application.

Claims

1. A power supply system, characterized in that: include: A power management chip, a first switch unit, and a load extraction module; The power management chip is connected to the first switch unit, the first switch unit is connected to the load module, and the power management chip is also connected to the display screen; Among them, the power management chip is used to turn on the first switch unit when the path between the power management chip and the display screen is connected and it is detected that the first time length of the power management chip in the skip mode is greater than or equal to the preset time length, so as to open the path between the power management chip and the load extraction module, thereby causing the power management chip to exit the skip mode.

2. The power supply system according to claim 1, wherein: The power management chip includes a power supply component and a drive circuit; the output end of the power supply component is connected to the display screen, the output end of the power supply component is also connected to the drive circuit, and the drive circuit is also connected to the first switch unit; Wherein, the power supply component is used to output a first voltage to the display screen; The driving circuit is used to determine the first moment when the power management chip enters the skip mode based on the first voltage value of the first voltage, and to determine the first duration based on the first moment, and to turn on the first switching unit when the first duration is greater than or equal to the preset duration.

3. The power supply system according to claim 2, wherein: The driving circuit includes: a first error amplifier, a first comparator, and a first control module; the input end of the first error amplifier is connected to the output end of the power supply component, the output end of the first error amplifier is connected to the positive end of the first comparator, the output end of the first comparator is connected to the first control module, and the first control module is connected to the first switch unit; Wherein, the first error amplifier is used to calculate a first error value between the first voltage value and a preset voltage value; The first comparator is configured to output a first level signal according to the first error value and a first detection threshold, wherein when the first error value is greater than the first detection threshold, the first level signal is a high level signal; and when the first error value is less than or equal to the first detection threshold, the first level signal is a low level signal; The first control module is used to determine the moment when the first control module receives the first level signal as the first moment when the first level signal is a low level signal, and to determine the first duration based on the first moment, and to turn on the first switching unit when the first duration is greater than or equal to the preset duration.

4. The power supply system according to claim 2 or 3, characterized in that: The power supply component includes: a battery and a voltage regulation circuit, the voltage regulation circuit including a first capacitor, an inductor, a second switch unit, a third switch unit, and a second capacitor; a first end of the first capacitor is connected to the battery, a second end of the first capacitor is connected to the drain of the second switch unit, a first end of the inductor is connected to the battery, a second end of the inductor is connected to the source of the second switch unit, a second end of the inductor is also connected to the source of the third switch unit, a drain of the third switch unit is connected to the first end of the second capacitor, a first end of the second capacitor is also connected to the display screen, a second end of the second capacitor is connected to the drain of the first switch unit, and a second end of the second capacitor is also connected to the second end of the first capacitor; a gate of the second switch unit is connected to the drive circuit, and a gate of the third switch unit is connected to the drive circuit; Wherein, the battery is used to output voltage to the voltage regulating circuit; The driving circuit is further configured to control the second switching unit and the third switching unit to be alternately turned on and off based on a first current value of the current in the inductor, so as to adjust the voltage output by the battery to obtain the first voltage.

5. The power supply system according to claim 4, characterized in that: The driving circuit includes: a second comparator, a third comparator, an OR gate unit, and a reset RS trigger; the negative terminal of the second comparator is connected to the inductor, and the output terminal of the second comparator is connected to the input terminal of the OR gate unit; the negative terminal of the third comparator is connected to the inductor, and the output terminal of the third comparator is connected to the input terminal of the OR gate unit; the output terminal of the OR gate unit is connected to the set terminal of the RS trigger; the first output terminal of the RS trigger is connected to the gate of the second switch unit, and the second output terminal of the RS trigger is connected to the gate of the third switch unit; The second comparator is configured to output a second level signal according to the first current value and the second detection threshold, wherein when the first current value is greater than the second detection threshold, the second level signal is a low level signal; and when the first current value is less than or equal to the second detection threshold, the second level signal is a high level signal; The third comparator is configured to output a third level signal according to the first current value and a first error value, wherein the first error value is an error value between a first voltage value of the first voltage and a preset voltage value, and when the first current value is greater than the first error value, the third level signal is a low level signal; and when the first current value is less than or equal to the first error value, the third level signal is a high level signal; The OR gate unit is used to output a fourth level signal according to the second level signal and the third level signal, and the fourth level signal is a high level signal or a low level signal; The RS trigger is used to turn on the second switch unit and turn off the third switch unit when the fourth level signal is a high level signal; or to turn off the second switch unit and turn on the third switch unit when the fourth level signal is a low level signal.

6. The power supply system according to claim 5, characterized in that: When the power management chip exits the skip mode, the RS trigger is in a working state; The RS trigger is specifically used to turn on the second switch unit and turn off the third switch unit when the RS trigger is in a working state and the fourth level signal is a high level signal; or, when the RS trigger is in a working state and the fourth level signal is a low level signal, turn off the second switch unit and turn on the third switch unit.

7. An electronic device, characterized in that: include: The power supply system and display screen according to any one of claims 1 to 6; Among them, the power management chip of the power system is used to turn on the first switching unit of the power system when the path between the power management chip and the display screen is connected and it is detected that the first time length of the power management chip in the skip mode is greater than or equal to the preset time length, so as to turn on the path between the power management chip and the load extraction module of the power system, thereby causing the power management chip to exit the skip mode.

8. A power control method, applied to the electronic device according to claim 7, characterized in that: include: When a path between a power management chip of a power system of the electronic device and a display screen of the electronic device is conductive, controlling the power management chip to detect a first duration for which the power management chip is in a skip mode; When the first time period is greater than or equal to a preset time period, the power management chip is controlled to conduct a path between the power management chip and the load withdrawal module of the power system, so that the power management chip exits the skip mode.

9. The method according to claim 8, characterized in that The controlling the power management chip to detect a first duration during which the power management chip is in the skip mode includes: controlling a driving circuit of the power management chip to determine a first moment at which the power management chip enters the skip mode based on a first voltage value of a first voltage outputted from an output terminal of a power supply component of the power management chip; The driving circuit is controlled to determine the first duration based on the first moment.

10. The method according to claim 9, characterized in that The controlling the driving circuit of the power management chip to determine a first moment at which the power management chip enters the skip mode based on a first voltage value of a first voltage outputted by an output terminal of a power supply component of the power management chip comprises: controlling a first error amplifier of the driving circuit to calculate a first error value between the first voltage value and a preset voltage value; controlling a first comparator of the driving circuit to output a first level signal according to the first error value and a first detection threshold, wherein the first level signal is a high level signal when the first error value is greater than the first detection threshold, and the first level signal is a low level signal when the first error value is less than or equal to the first detection threshold; The first control module controlling the driving circuit determines, when the first level signal is a low level signal, a moment when the first control module receives the first level signal as the first moment.

11. The method according to claim 8, characterized in that When a path between a power management chip of a power system of the electronic device and a display screen of the electronic device is connected, controlling the power management chip to detect that the power management chip is in a skip mode before a first duration, the method further includes: The driving circuit of the power management chip is controlled, based on the first current value of the current in the inductor of the voltage adjustment circuit of the power supply component of the power management chip, to control the second switch unit and the third switch unit of the voltage adjustment circuit to be alternately turned on and off to adjust the voltage output by the battery of the power supply component to obtain a first voltage, which is the voltage output by the power supply component to the display screen.

12. The method according to claim 11, characterized in that The driving circuit of the power management chip is controlled to control the second switch unit and the third switch unit of the voltage adjustment circuit to be alternately turned on and off based on a first current value of a current in an inductor of a voltage adjustment circuit of a power supply component of the power management chip, including: controlling a second comparator of the driving circuit to output a second level signal according to the first current value and a second detection threshold, wherein the second level signal is a low level signal when the first current value is greater than the second detection threshold, and the second level signal is a high level signal when the first current value is less than or equal to the second detection threshold; controlling a third comparator of the driving circuit to output a third level signal according to the first current value and a first error value, wherein the first error value is an error value between a first voltage value of the first voltage and a preset voltage value, wherein when the first current value is greater than the first error value, the third level signal is a low level signal, and when the first current value is less than or equal to the first error value, the third level signal is a high level signal; controlling the OR gate unit of the driving circuit to output a fourth level signal according to the second level signal and the third level signal, wherein the fourth level signal is a high level signal or a low level signal; When the fourth level signal is a high level signal, controlling the RS trigger of the driving circuit to turn on the second switch unit and turn off the third switch unit; or When the fourth level signal is a low level signal, the RS trigger is controlled to turn off the second switch unit and turn on the third switch unit.

13. The method according to claim 12, characterized in that When the power management chip exits the skip mode, the RS trigger is in a working state; When the fourth level signal is a high level signal, controlling the RS trigger of the driving circuit to turn on the second switch unit and turn off the third switch unit includes: When the RS trigger is in an operating state and the fourth level signal is a high level signal, controlling the RS trigger to turn on the second switch unit and turn off the third switch unit; When the fourth level signal is a low level signal, controlling the RS trigger to turn off the second switch unit and turn on the third switch unit includes: When the RS trigger is in an operating state and the fourth level signal is a low level signal, the RS trigger is controlled to turn off the second switch unit and turn on the third switch unit.

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