Hybrid bonding structure and method of manufacturing the same, semiconductor device

Abstract

A hybrid bonding structure, a manufacturing method thereof, and a semiconductor device. The hybrid bonding structure includes a dielectric layer, including a first dielectric layer and a second dielectric layer which are bonded; a bonding interface layer between the first dielectric layer and the second dielectric layer; a metal structure in the dielectric layer; and a diffusion barrier layer in the dielectric layer, the diffusion barrier layer isolating the bonding interface layer. The hybrid bonding structure can improve device performance.

Description

TECHNICAL FIELD

[0001] Embodiments of the present disclosure relate to the technical field of semiconductor technology, and particularly relate to a hybrid bonding structure, a manufacturing method thereof, and a semiconductor device. BACKGROUND

[0002] Wafer bonding technology is one of the key technologies to realize three-dimensional integrated circuits, wherein hybrid bonding technology can realize internal connection of thousands of chips, greatly improve chip performance, save area, and reduce cost.

[0003] However, the hybrid bonding method has the risk of metal diffusion. SUMMARY

[0004] According to a first aspect of embodiments of the present disclosure, a hybrid bonding structure is provided, comprising:

[0005] a dielectric layer, comprising a first dielectric layer and a second dielectric layer arranged by bonding;

[0006] a bonding interface layer located between the first dielectric layer and the second dielectric layer;

[0007] a metal structure located in the dielectric layer;

[0008] a diffusion barrier layer located in the dielectric layer, the diffusion barrier layer isolating the bonding interface layer.

[0009] In some embodiments, the diffusion barrier layer surrounds the metal structure.

[0010] In some embodiments, the thickness of the bonding interface layer is less than the thickness of the diffusion barrier layer.

[0011] In some embodiments, the metal structure comprises a first metal structure and a second metal structure, the diffusion barrier layer is located between the first metal structure and the second metal structure, and the spacing of the diffusion barrier layer to the first metal structure is different from the spacing of the diffusion barrier layer to the second metal structure.

[0012] In some embodiments, the diffusion barrier layer comprises a first diffusion barrier layer and a second diffusion barrier layer, the first diffusion barrier layer surrounds the first metal structure, and the second diffusion barrier layer surrounds the second metal structure.

[0013] The spacing of the first diffusion barrier layer to the second diffusion barrier layer is greater than the spacing of the first diffusion barrier layer to the first metal structure.

[0014] In some embodiments, the first diffusion barrier layer comprises:

[0015] a lower barrier layer;

[0016] an upper barrier layer on the lower barrier layer;

[0017] wherein the upper barrier layer and the lower barrier layer do not have a bonding reaction.

[0018] In some embodiments, a projection area of the lower barrier layer is within a projection area of the upper barrier layer.

[0019] In some embodiments, the lower barrier layer of the first diffusion barrier layer is in the first dielectric layer, and the upper barrier layer of the first diffusion barrier layer is in the second dielectric layer; the lower barrier layer of the second diffusion barrier layer is in the second dielectric layer, and the upper barrier layer of the second diffusion barrier layer is in the first dielectric layer.

[0020] In some embodiments, the lower barrier layer comprises one of a metal barrier layer or an insulating barrier layer, and the upper barrier layer is the other of a metal barrier layer or an insulating barrier layer.

[0021] In some embodiments, a thickness of the upper barrier layer is greater than a thickness of the lower barrier layer.

[0022] In some embodiments, a top surface of the upper barrier layer is in contact with the lower barrier layer, and a nitrogen concentration at a bottom of the upper barrier layer is less than a nitrogen concentration at a top of the upper barrier layer.

[0023] According to a second aspect of the embodiments of the present disclosure, a manufacturing method of a hybrid bonding structure is provided, comprising:

[0024] providing a first dielectric layer, the first dielectric layer having a lower metal structure and a lower barrier layer therein;

[0025] providing a second dielectric layer, the second dielectric layer having an upper metal structure and an upper barrier layer therein;

[0026] bonding the first dielectric layer and the second dielectric layer, and bonding the upper metal structure and the lower metal structure to form dielectric layers and metal structures, respectively;

[0027] wherein, during the bonding, a bonding interface layer is formed in the first dielectric layer and the second dielectric layer; the upper barrier layer and the lower barrier layer are in contact to form a diffusion barrier layer, and the diffusion barrier layer separates the bonding interface layer.

[0028] In some embodiments, during the bonding, the upper barrier layer and the lower barrier layer do not have a bonding reaction.

[0029] In some embodiments, the step of forming the lower barrier layer comprises:

[0030] forming a trench around the lower metal structure in the first dielectric layer;

[0031] filling the trench with a diffusion barrier material to form the lower barrier layer.

[0032] In some embodiments, the step of forming the upper barrier layer comprises:

[0033] forming a trench around the upper metal structure in the second dielectric layer;

[0034] filling the trench with a diffusion barrier material to form the upper barrier layer;

[0035] wherein a nitrogen concentration at a top of the upper barrier layer is greater than a nitrogen concentration at a bottom of the upper barrier layer.

[0036] According to a third aspect of embodiments of the present disclosure, a semiconductor device is provided, which comprises the hybrid bonding structure described above.

[0037] In summary, the hybrid bonding structure and the manufacturing method thereof, and the semiconductor device are provided according to the embodiments of the present disclosure. The dielectric layer of the hybrid bonding structure has a diffusion barrier layer, which separates the bonding interface layer. When metal atoms diffuse in the bonding interface layer, the diffusion barrier layer can block the further diffusion of the metal atoms along the bonding interface layer, thereby reducing the risk caused by the diffusion of the metal atoms. BRIEF DESCRIPTION OF DRAWINGS

[0038] Figure 1 is a schematic diagram of a hybrid bonding structure according to an example embodiment;

[0039] Figure 2 is an enlarged schematic diagram of the dashed box in Figure 1

[0040] Figure 3 is a schematic diagram of a plurality of metal structures according to an example embodiment; Figure 1

[0041] Figure 4 is a schematic diagram of a plurality of metal structures according to an example embodiment;

[0042] Figure 5 is a schematic diagram of a plurality of metal structures according to an example embodiment; Figure 4

[0043] Figure 6 is a schematic diagram of a plurality of metal structures according to an example embodiment;

[0044] Figure 7 is a schematic diagram of a plurality of metal structures according to an example embodiment;​​​Figure 6 schematic top view of a hybrid bonding structure;

[0045] Figure 8 is shown according to an exemplary embodiment Figure 4 schematic view of a diffusion barrier layer;

[0046] Figure 9 is shown according to an exemplary embodiment Figure 6 schematic view of a diffusion barrier layer;

[0047] Figure 10 is shown according to an exemplary embodiment

[0048] Figure 11 is shown according to an exemplary embodiment

[0049] Figure 12 is shown according to an exemplary embodiment

[0050] Figure 13 is shown according to an exemplary embodiment

[0051] Figure 14 is shown according to an exemplary embodiment Figure 13 schematic top view of a hybrid bonding structure;

[0052] Figure 15 is shown according to an exemplary embodiment

[0053] Figure 16 is shown according to an exemplary embodiment

[0054] Figure 17 is shown according to an exemplary embodiment

[0055] Figure 18 is shown according to an exemplary embodiment

[0056] Figure 19 is shown according to an exemplary embodiment Figure 18 schematic top view of a hybrid bonding structure;

[0057] Figure 20 is shown according to an exemplary embodiment

[0058] Figure 21 is shown according to an exemplary embodiment DETAILED DESCRIPTION

[0059] The technical solutions of this disclosure will be further described in detail below with reference to the accompanying drawings and embodiments. Although exemplary embodiments of this disclosure are shown in the drawings, it should be understood that this disclosure can be implemented in various forms and should not be limited to the embodiments described herein. Rather, these embodiments are provided to enable a more thorough understanding of this disclosure and to fully convey the scope of this disclosure to those skilled in the art.

[0060] The present disclosure is described in more detail below by way of example with reference to the accompanying drawings. The advantages and features of the present disclosure will become clearer from the following description and claims. It should be noted that the drawings are in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of the present disclosure.

[0061] It is understood that the meanings of “on”, “above” and “above” in this disclosure should be interpreted in the broadest sense, such that “on” means not only that it is “on” something without any intervening feature or layer (i.e., directly on something), but also that it is “on” something with an intervening feature or layer.

[0062] In the embodiments of this disclosure, the terms "first," "second," "third," etc., are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.

[0063] In embodiments of this disclosure, the term "layer" refers to a portion of material comprising a region having thickness. A layer may extend over the entirety of a lower or upper structure, or may have a range smaller than that of the lower or upper structure. Furthermore, a layer may be a region of a homogeneous or heterogeneous continuous structure with a thickness less than the thickness of the continuous structure. For example, a layer may be located between the top and bottom surfaces of a continuous structure, or a layer may be located between any horizontal faces at the top and bottom surfaces of the continuous structure. A layer may extend horizontally, vertically, and / or along an inclined surface. A layer may include multiple sublayers.

[0064] It should be noted that the technical solutions described in the embodiments of this disclosure can be combined arbitrarily without conflict.

[0065] Wafer bonding is a technique that uses external energy to bond atoms at the wafer interface together through van der Waals forces, molecular forces, and even atomic forces. Hybrid bonding (e.g., including insulator-insulator bonding, semiconductor-semiconductor bonding, and metal-metal bonding simultaneously) is a commonly used wafer bonding method, widely applied in the 3D chip field, such as in the bonding of CMOS image sensors, DRAM, 3D-NAND flash memory, and logic devices.

[0066] However, the applicant discovered that during wafer bonding, a very thin layer of silicon oxide forms at the interface between the two wafers. This silicon oxide cannot prevent the diffusion of metal atoms (copper atoms), further affecting the reliability of electron migration in the bonded structure. Furthermore, applying high voltage to the bonded structure can cause short circuits due to the presence of diffused metal atoms, posing a significant risk to the hybrid bonded structure.

[0067] To address the aforementioned technical problems, this disclosure provides a hybrid bonding structure 100. The hybrid bonding structure 100 includes a first substrate 101 and a second substrate 102, with the second substrate 102 located on the first substrate 101. A dielectric layer 103 is located between the first substrate 101 and the second substrate 102. The dielectric layer 103 may include a first dielectric layer 104 and a second dielectric layer 105. The first dielectric layer 104 is located on the first substrate 101, and the second dielectric layer 105 is located on the second substrate 102. In this disclosure, the first substrate 101 and the second dielectric layer 104 may belong to a first wafer, and the second substrate 102 and the second dielectric layer 105 may belong to a second wafer. The second wafer is bonded to the first wafer, i.e., bonded to the first dielectric layer 104 via the second dielectric layer 105. In this embodiment, the materials of the first dielectric layer 104 and the second dielectric layer 105 may be silicon oxide, silicon nitride, or silicon oxynitride dielectric layers, etc. The formation of the first dielectric layer 104 and the second dielectric layer 105 can be achieved by thermal oxidation or deposition. For example, the oxidation atmosphere of thermal oxidation can be dry oxygen oxidation, water vapor oxidation, or wet oxygen oxidation. The deposition method can be physical vapor deposition, chemical vapor deposition, or sputtering.

[0068] like Figures 1-2 As shown, Figure 2 Displayed as Figure 1 Enlarged view within the dashed box. When the first dielectric layer 104 is bonded to the second dielectric layer 105, a dielectric layer 103 is formed. Simultaneously, during the bonding process, a bonding interface layer 106 is formed between the first dielectric layer 104 and the second dielectric layer 105. This bonding interface layer 106 can also be a bonding bonding layer. The principle behind the formation of this bonding interface layer is as follows:

[0069] First, under the action of plasma, Si-OH bonds are formed on the surfaces of the first dielectric layer 104 and the second dielectric layer 105, respectively. The reaction mode can be Si-O-Si+H2O=Si-OH+OH-Si.

[0070] Then, the Si-OH bonds on the first dielectric layer 104 and the second dielectric layer 105 are bonded together, thereby bonding the first wafer to the second wafer. The reaction mode can be Si-OH+OH-Si=Si-O-Si+H2O.

[0071] Thus, the first dielectric layer 104 and the second dielectric layer 105 are bonded together by the Si-OH generated respectively, and a very thin bonding interface layer 106 is formed between the first dielectric layer 104 and the second dielectric layer 105.

[0072] As shown in FIG. 1, the first dielectric layer 104 is bonded to the second dielectric layer 105, and a metal structure 107 is formed in the dielectric layer 103. Figures 1-2 As shown in FIG. 1, the first dielectric layer 104 is bonded to the second dielectric layer 105, and a metal structure 107 is formed in the dielectric layer 103.

[0073] As shown in FIG. 1, the first dielectric layer 104 is bonded to the second dielectric layer 105, and a metal structure 107 is formed in the dielectric layer 103. Figures 1-3 As shown in FIG. 1, the first dielectric layer 104 is bonded to the second dielectric layer 105, and a metal structure 107 is formed in the dielectric layer 103. Figure 3 A simple top view of the diffusion barrier layer 108 and the metal structure 107 is shown in FIG. 1. The hybrid bonding structure 100 further comprises the diffusion barrier layer 108. The diffusion barrier layer 108 is located in the dielectric layer 103, and separates the bonding interface layer 106. It should be noted that the diffusion barrier layer 108 separates the bonding interface layer 106 into several independent regions, thereby preventing further diffusion of copper atoms in the bonding interface layer 106. The metal structure 107 is surrounded by the bonding interface layer 106. Meanwhile, the diffusion barrier layer 108 also surrounds the metal structure 107, so that when the copper atoms in the metal structure 107 diffuse to the bonding interface layer 106, the diffusion barrier layer 108 can prevent the copper atoms from diffusing further, thereby improving the electron migration reliability. Meanwhile, copper contamination can also be improved. In this embodiment, the thickness of the diffusion barrier layer 108 can be greater than the thickness of the bonding interface layer 106, so as to improve the blocking ability of the diffusion barrier layer 108 and further prevent the copper atoms from diffusing deeper.

[0074] As shown in FIG. 1, the first dielectric layer 104 is bonded to the second dielectric layer 105, and a metal structure 107 is formed in the dielectric layer 103. Figures 4-5 As shown in FIG. 1, the first dielectric layer 104 is bonded to the second dielectric layer 105, and a metal structure 107 is formed in the dielectric layer 103. Figure 4The image shows two metal structures 107, namely a first metal structure 1071 and a second metal structure 1072. The first metal structure 1071 and the second metal structure 1072 have the same structure. Figure 5 Displayed as Figure 4 A simplified top view. The diffusion barrier layer 108 surrounds both the first metal structure 1071 and the second metal structure 1072, meaning that the first metal structure 1071 and the second metal structure 1072 share a portion of the diffusion barrier layer 108. From Figure 5 As can be seen, the first metal structure 1071 and the second metal 1072 share the same diffusion barrier layer 108, and the distance from the diffusion barrier layer 108 to the first metal structure 1071 is different from the distance from the diffusion barrier layer 108 to the second metal structure 1072. The diffusion barrier layer 108 can be made of either a metallic barrier material or an insulating barrier material. If a metallic barrier material is used, the different distances from the diffusion barrier layer 108 to the two metal structures 107 result in different diffusion distances for copper atoms in the bonding interface layer 106, preventing the copper atoms of the two metal structures from bonding in the diffusion barrier layer 106, thereby preventing short circuits between the two metal structures under high voltage. Of course, if the diffusion barrier layer 108 is made of an insulating barrier material, the distance from the diffusion barrier layer 108 to the two metal structures 107 can be the same. Furthermore, the hybrid structure 100 can also include more metal structures 107, in which case adjacent metal structures 107 share the diffusion barrier layer 108; this can also be understood as all metal structures 107 sharing the same diffusion barrier layer 108.

[0075] like Figures 6-7 As shown, Figure 6 Another structure shown is a hybrid structure. Figure 7 Displayed as Figure 6 A simplified top view. The hybrid bonding structure 100 includes multiple diffusion barrier layers 108, specifically a first diffusion barrier layer 1081 and a second diffusion barrier layer 1082. The first diffusion barrier layer 1081 surrounds the first metal structure 1071, and the second diffusion barrier layer 1082 surrounds the second metal structure 1072. The first diffusion barrier layer 1081 and the second diffusion barrier layer 1082 are independent of each other, meaning there is no shared portion between them. A partial bonding interface layer 106 exists between the first diffusion barrier layer 1081 and the second diffusion barrier layer 1082. From... Figure 6As can be seen, the distance between the first diffusion barrier layer 1081 and the second diffusion barrier layer 1082 is greater than the distance between the first diffusion barrier layer 1081 and the first metal structure 1071, and also greater than the distance between the second diffusion barrier layer 1082 and the second metal structure 1072. In this embodiment, the distance between the first diffusion barrier layer 1081 and the first metal structure 1071 is closer, and the distance between the second diffusion barrier layer 1082 and the second metal structure 1072 is closer, i.e. the first diffusion barrier layer 1081 tightly surrounds the first metal structure 1071, and the second diffusion barrier layer 1082 only surrounds the second metal structure 1082, so that the diffusion distance of copper atoms is very short, and the copper atoms will not combine, thereby preventing the two metal structures 107 from shorting under high voltage. In this embodiment, when the hybrid structure 100 includes more metal structures 107, the hybrid structure 100 also includes more diffusion barrier layers 108, and the number of diffusion barrier layers 108 can be equal to the number of metal structures 107, each diffusion barrier layer 108 surrounds each metal structure 107, and the diffusion barrier layers 108 are independent of each other. In some embodiments, the structure of the first diffusion barrier layer 1081 and the structure of the second diffusion barrier layer 1082 can be the same. For example, both are metal barrier layers, insulating barrier layers, or a combination of metal barrier layers and insulating barrier layers.

[0076] As Figure 8 shown, Figure 8 shown Figure 4A structural diagram of the diffusion barrier layer 108 is shown. The diffusion barrier layer 108 includes an upper barrier layer 109 and a lower barrier layer 110. The upper barrier layer 109 is located in the second dielectric layer 105, and the lower barrier layer 110 is located in the first dielectric layer 104. When the second dielectric layer 105 is bonded to the first dielectric layer 104, the upper barrier layer 109 is located on the lower barrier layer 110. The upper barrier layer 109 and the lower barrier layer 110 are in close contact, but no bonding reaction occurs between them. In this embodiment, the upper barrier layer 109 can be an insulating barrier material, such as silicon nitride or silicon carbide nitride, or it can be a metallic barrier material, such as tantalum or tantalum nitride. The lower barrier layer 110 can be an insulating material, such as silicon nitride or silicon carbide nitride, or it can be a metallic barrier material, such as tantalum or tantalum nitride. However, when the upper barrier layer 109 is made of an insulating barrier material, the lower barrier layer 110 can be made of a metallic barrier material; the lower barrier layer 110 cannot be made of an insulating barrier material. This is because if both the upper barrier layer 109 and the lower barrier layer 110 use insulating barrier materials, a bonding interface layer 106 will form between them. The resulting diffusion barrier layer 108 will not interrupt the bonding interface layer 106, meaning the diffusion barrier layer cannot effectively block the diffusion of copper atoms. Conversely, when the upper barrier layer 109 is made of a metallic barrier material, the lower barrier layer 110 can be made of an insulating barrier material. In other words, the upper barrier layer 109 can be made of either an insulating barrier material or a metallic barrier material, and the lower barrier layer 110 can be made of the other.

[0077] like Figure 8 As shown, in this embodiment, the upper barrier layer 109 is located directly above the lower barrier layer 110. In the horizontal direction, the width of the upper barrier layer 109 is equal to the width of the lower barrier layer 110. The projection area of ​​the upper barrier layer 109 in the first dielectric layer 104 can cover the projection area of ​​the lower barrier layer 110 in the first dielectric layer 104, that is, the projection area of ​​the upper barrier layer 109 in the first dielectric layer 104 can be larger than the projection area of ​​the lower barrier layer 110 in the first dielectric layer 104. In this embodiment, in Figure 8 In this embodiment, the projected area of ​​the upper barrier layer 109 in the first dielectric layer 104 can completely overlap with the projected area of ​​the lower barrier layer 110 in the first dielectric layer 104, thereby ensuring complete contact between the upper barrier layer 109 and the lower barrier layer 110 and improving the ability to block the diffusion of copper atoms. In this embodiment, the upper barrier layer 109 and the lower barrier layer 110 have the same thickness. The upper barrier layer 109 is, for example, an insulating barrier material such as silicon nitride, and the lower barrier layer 110 is, for example, a metallic barrier material such as tantalum.

[0078] like Figure 9 As shown, Figure 9 Displayed as Figure 6A simplified schematic diagram of the diffusion barrier layer. Figure 9 The first diffusion barrier layer 1081 in Figure 8 The structure of the diffusion barrier layer 108 is the same. The first diffusion barrier layer 1081 also includes an upper barrier layer 109 and a lower barrier layer 110. The upper barrier layer 109 is located on the lower barrier layer 110. Figure 9 The second diffusion barrier layer 110 also includes an upper barrier layer 109 and a lower barrier layer 110, with the lower barrier layer 110 located on top of the upper barrier layer 109. The structure of the second diffusion barrier layer 110 is the opposite of that of the first diffusion barrier layer 109; that is, in the first diffusion barrier layer 109, the upper barrier layer 109 is located in the second dielectric layer 105, and the lower barrier layer 110 is located in the first dielectric layer 104; similarly, in the second diffusion barrier layer 110, the upper barrier layer 109 is located in the first dielectric layer 104, and the lower barrier layer 110 is located in the second dielectric layer 105. In this embodiment, since the upper barrier layer 109 is an insulating barrier material and the lower barrier layer 110 is a metallic barrier material, the lower barrier layers 110 are located in different dielectric layers, preventing short circuits between the lower barrier layers 110. Figure 9 As can be seen, the thickness of the upper barrier layer 110 and the thickness of the lower barrier layer 109 can be basically the same.

[0079] like Figure 10 As shown, in some embodiments, the widths of the upper barrier layer 109 and the lower barrier layer 110 differ in the horizontal direction. For example, the width of the upper barrier layer 109 is greater than the width of the lower barrier layer 110, meaning the projected area of ​​the upper barrier layer 109 on the dielectric layer is greater than the projected area of ​​the lower barrier layer 110 on the dielectric layer, and the upper barrier layer 109 can completely cover the lower barrier layer 110. In this embodiment, since the upper barrier layer 109 is an insulating barrier material and the lower barrier layer 110 is a metallic barrier material, the increased width of the upper barrier layer 109 will not cause a short circuit problem. Of course, if the upper barrier layer 109 is a metallic barrier material and the lower barrier layer 110 is an insulating barrier material, the width of the lower barrier layer 110 can also be greater than the width of the upper barrier layer 109.

[0080] like Figures 10-11As shown, in some embodiments, the thickness of the upper barrier layer 109 can be greater than the thickness of the lower barrier layer 110. Since the upper barrier layer 109 is an insulating barrier material and the lower barrier layer 110 is a metallic barrier material, when the thickness of the upper barrier layer 109 is larger, more nitrogen can be doped at the top of the upper barrier layer 109, resulting in a higher nitrogen concentration at the top of the upper barrier layer 109 and a lower nitrogen concentration at the bottom. The higher the nitrogen concentration, the higher the density of the insulating barrier material, thereby further increasing the blocking capability of the top of the upper barrier layer 109. It should be noted that the surface of the upper barrier layer 109 that contacts the lower barrier layer 110 is the top surface of the upper barrier layer 109, so the portion of the upper barrier layer 109 near the lower barrier layer 110 is the top of the upper barrier layer 109. The upper barrier layer 109 may include a blocking top 1091, a blocking middle 1092, and a blocking bottom 1093. Because this application employs a face-to-face hybrid bonding method, the top barrier 1091 is brought closer to the lower barrier layer 110. By increasing the thickness of the upper barrier layer 109, nitrogen doping of the top barrier 1091 is improved, increasing the nitrogen concentration and thus allowing for the diffusion of copper atoms at the contact surfaces of the upper barrier layer 109 and the lower barrier layer 110. Of course, in some embodiments, a back-to-back hybrid bonding method or a face-to-back hybrid bonding method can also be used.

[0081] like Figure 12 As shown in the embodiments of this disclosure, a method for manufacturing a hybrid bonding structure is also proposed, comprising:

[0082] S1: Provide a first dielectric layer, wherein the first dielectric layer has a lower metal structure and a lower barrier layer; and provide a second dielectric layer, wherein the second dielectric layer has an upper metal structure and an upper barrier layer;

[0083] S2: Bonding the first dielectric layer and the second dielectric layer, and bonding the lower metal structure and the upper metal structure to form a dielectric layer and a metal structure respectively; wherein, during the bonding process, a bonding interface layer is formed between the first dielectric layer and the second dielectric layer; the upper barrier layer contacts the lower barrier layer to form a diffusion barrier layer, and the diffusion barrier layer isolates the bonding interface layer.

[0084] like Figures 12-15As shown in FIG. 1, in step S1, the present embodiment is described by taking the formation of the lower barrier layer as an example. First, a first wafer is provided, which includes a first substrate 101, a first dielectric layer 104 on the first substrate 101, and then the first dielectric layer 104 is etched to form a lower metal recess 111 and a lower barrier trench 112 surrounding the lower metal recess 111, and then the lower metal recess 111 is filled with a metal material to form a lower metal structure 113, and the lower barrier trench 112 is filled with a barrier material to form a lower barrier layer 110, so that the lower barrier layer 110 can surround the lower metal structure 113. Of course, in some embodiments, the lower metal structure 113 can be formed first, and then the first dielectric layer 104 is etched to form the lower barrier trench 112, and then the lower barrier trench 112 is filled to form the lower barrier layer 110. That is, the lower barrier layer 110 and the lower metal structure 113 can be formed simultaneously, or the lower barrier layer 110 can be formed after the lower metal structure 113. Of course, in some embodiments, the lower barrier layer 110 can be formed before the lower metal structure 113, for example, the lower barrier layer 110 is formed first, then the lower metal recess 111 is formed, and then the metal material is filled to form the lower metal structure 113.

[0085] As shown in FIG. 1, Figures 14-15 The material of the lower barrier layer 110 can be a metal barrier material, such as tantalum, tantalum nitride, titanium, titanium nitride, etc. The material of the lower metal structure 113 can be copper. It should be noted that before the lower metal structure 113 is formed, a metal barrier material needs to be formed on the inner wall of the lower metal recess 111 to prevent copper atoms from diffusing into the first dielectric layer 104. Therefore, the present embodiment can form the metal barrier material in the lower metal recess 111 at the same time as forming the metal barrier material in the lower barrier trench 112, so as to form the lower barrier layer 110 together.

[0086] The process of forming the upper barrier layer 109 can refer to the process of the lower barrier layer 110. At the same time, since the upper barrier layer 109 adopts an insulating barrier material, the thickness of the upper barrier layer 109 can be appropriately increased, and the nitrogen concentration at the top of the upper barrier layer 109 can be increased, for example, when the upper barrier layer 109 is formed to the top, the concentration of the nitrogen plasma is increased, so as to increase the nitrogen concentration at the top of the upper barrier layer 109, increase the density at the top of the upper barrier layer 109, and increase the barrier ability.

[0087] As shown in FIG. 1, Figure 16As shown, in step S2, the second wafer is bonded to the first wafer, that is, the front side of the second wafer is bonded to the front side of the first wafer. The first wafer includes a first substrate 101, on which a first dielectric layer 104 is disposed. The first dielectric layer 104 has a lower metal structure 113 and a lower barrier layer 110, with the lower barrier layer 110 surrounding the lower metal structure 113. The second wafer includes a second substrate 102, on which a second dielectric layer 105 is disposed. The second dielectric layer 105 has an upper metal structure 114 and an upper barrier layer 109, with the upper barrier layer 109 surrounding the upper metal structure 114. In this embodiment, the surface of the second dielectric layer 105 facing the first dielectric layer 104 can be the front side of the second wafer, and thus the surface of the upper barrier layer 109 facing the lower barrier layer 110 can be the top surface of the upper barrier layer 109. During the bonding process, the first dielectric layer 104 and the second dielectric layer 105 undergo a bonding reaction, and the lower metal structure 113 and the upper metal structure 114 undergo a bonding reaction, thereby forming the dielectric layer 103 and the metal structure 107. Simultaneously, during the bonding of the first dielectric layer 104 to the second dielectric layer 105, a bonding interface layer 106 is formed between the first dielectric layer 104 and the second dielectric layer 105; that is, the bonding interface layer 106 is located within the dielectric layer 103. The bonding interface layer 106 surrounds the metal structure 107. However, since the upper barrier layer 109 does not undergo a bonding reaction with the lower barrier layer 110, the upper barrier layer 109 and the lower barrier layer 110 are tightly disengaged, forming a diffusion barrier layer 108. Because the upper barrier layer 109 and the lower barrier layer 110 do not form a bonding interface layer 106, the diffusion barrier layer 108 serves to isolate the bonding interface layer 106. Since the diffusion barrier layer 108 isolates the bonding interface layer 106, even if copper atoms in the metal structure 107 can diffuse in the bonding interface layer 106, they will not diffuse deeper into the bonding interface layer 106. This can improve the reliability of electron migration in the metal structure 107 and reduce the risk of copper atom diffusion.

[0088] like Figure 17 As shown in the embodiments of this disclosure, a method for manufacturing a hybrid bonding structure is also proposed. First, a second wafer is bonded to a first wafer. The first wafer includes a first substrate 101 and a first dielectric layer 104, with a lower metal structure in the first dielectric layer 104. The second wafer includes a second substrate 101 and a second dielectric layer 105, with an upper metal structure in the second dielectric layer 105. During the bonding process, the first dielectric layer 104 and the second dielectric layer 105 are bonded to form a dielectric layer 103. The upper metal structure and the lower metal structure are bonded to form a metal structure 107. Simultaneously, a bonding interface layer 106 is formed between the first dielectric layer 104 and the second dielectric layer 105. The bonding interface layer 106 can contact the metal structure 107. After the bonding process is completed, the back side of the second substrate 102 is thinned, so that the thickness of the second substrate 102 is less than the thickness of the first substrate 101.

[0089] As shown in Figures 18-19 Since the second substrate 102 has been thinned, the thickness of the second substrate 102 is reduced, which is beneficial to form the barrier trench 115. In this embodiment, the second substrate 102, the second dielectric layer 105, the bonding interface layer 106 and the first dielectric layer 104 can be etched by an etching process, so as to form the barrier trench 115, i.e., the barrier trench 115 extends from the second substrate 102 into the first dielectric layer 104, so that the barrier trench 115 destroys the integrity of the bonding interface layer 106, i.e., the barrier trench 115 interrupts the bonding interface layer 106. Figure 19 As can be seen from

[0090] As shown in Figure 20 After the barrier trench 115 is formed, the barrier trench 115 is filled with an insulating barrier material, so as to form the diffusion barrier layer 108. The surface of the diffusion barrier layer 108 is flush with the surface of the second substrate 102, and the diffusion barrier layer 108 extends from the second substrate 102 into the first substrate 101, so that the diffusion barrier layer 108 can interrupt the bonding interface layer 106. Since the diffusion barrier layer 108 surrounds the metal structure 107, and the diffusion barrier layer 108 interrupts the bonding interface layer 106, the diffusion barrier layer 108 can block the metal atoms from extending deeper in the bonding interface layer 106, so as to improve the reliability of the electron migration of the metal structure 107.

[0091] As shown in Figure 21As shown, the embodiments of the present disclosure further propose a semiconductor device 10, which can include a first semiconductor structure 11 and a second semiconductor structure 12. The first semiconductor structure 11 can be bonded on the second semiconductor structure 12. The first semiconductor structure 11 and the second semiconductor structure 12 can be fixed together by a hybrid bonding manner, and the hybrid bonding structure described above can be further formed between the first semiconductor structure 11 and the second semiconductor structure 12, thereby improving the performance of the semiconductor device. The semiconductor device 10 can be a multi-layer stacked structure, such as an HBM structure. The semiconductor device 10 can also be applied to an electronic device. The electronic device can include one or more of, for example, a smart phone, a tablet personal computer (PC), a mobile phone, a video phone, an electronic book (e-book) reader, a desktop PC, a laptop PC, a netbook computer, a workstation, a server, a personal digital assistant (PDA), a portable multimedia player (PMP), an MPEG-1 audio layer 3 (MP3) player, a mobile medical device, a camera, a home appliance, a medical device, an Internet of Things (IoT) device, and a wearable device. The wearable device can be a type of accessory, a type of fabric or clothing, a type of body attachment, or a type of implantable circuit. The accessory type wearable device can be, for example, a watch, a ring, a bracelet, an anklet, a necklace, glasses, contact lenses, or a head-mounted device (HMD).

[0092] In summary, the embodiments of the present disclosure propose a hybrid bonding structure and a manufacturing method thereof and a semiconductor device. By forming a diffusion barrier layer in the dielectric layer, the diffusion of copper atoms in the bonding interface layer in a further direction is blocked, thereby improving the electron migration reliability of the metal structure, and at the same time, the pollution caused by the diffusion of copper atoms can also be reduced.

[0093] The above merely describes specific embodiments of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any person skilled in the art can easily think of changes or replacements within the technical range disclosed by the present disclosure, which should be covered within the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure should be subject to the protection scope of the claims.

Claims

1. A hybrid bonding structure, comprising: The method comprises: providing a first dielectric layer and a second dielectric layer; providing a bonding interface layer between the first dielectric layer and the second dielectric layer; providing a metal structure in the dielectric layer; providing a diffusion barrier layer in the dielectric layer, the diffusion barrier layer separating the bonding interface layer, the diffusion barrier layer being spaced apart from the metal structure; wherein the diffusion barrier layer comprises: a lower barrier layer in the first dielectric layer; an upper barrier layer in the second dielectric layer; wherein the upper barrier layer and the lower barrier layer do not undergo a bonding reaction, the lower barrier layer being one of a metal barrier layer or an insulating barrier layer, and the upper barrier layer being the other of a metal barrier layer or an insulating barrier layer.

2. The hybrid bonded structure of claim 1, wherein, the diffusion barrier layer surrounds the metal structure.

3. The hybrid bonded structure of claim 1, wherein, the thickness of the bonding interface layer is less than the thickness of the diffusion barrier layer.

4. The hybrid bond structure according to any one of claims 1 to 3, wherein the metal structure comprises a first metal structure and a second metal structure, the diffusion barrier layer being between the first metal structure and the second metal structure, the diffusion barrier layer being spaced apart from the first metal structure by a first distance and spaced apart from the second metal structure by a second distance, the first distance being different from the second distance.

5. The hybrid bonded structure of claim 4, wherein, the diffusion barrier layer comprises a first diffusion barrier layer and a second diffusion barrier layer, the first diffusion barrier layer surrounding the first metal structure, and the second diffusion barrier layer surrounding the second metal structure; wherein the first diffusion barrier layer is spaced apart from the second diffusion barrier layer by a third distance, the third distance being greater than the first distance.

6. The hybrid bonded structure of claim 1, wherein, the upper barrier layer is thicker than the lower barrier layer.

7. The hybrid bonded structure of claim 5, wherein, the top surface of the upper barrier layer is in contact with the lower barrier layer, and the nitrogen concentration in the bottom of the upper barrier layer is less than the nitrogen concentration in the top of the upper barrier layer. The method comprises:

8. The hybrid bonded structure of claim 1, wherein, providing a first dielectric layer, the first dielectric layer having a lower metal structure and a lower barrier layer therein; 9. The hybrid bonded structure of claim 1, wherein, providing a second dielectric layer, the second dielectric layer having an upper metal structure and an upper barrier layer therein; 10. A method of manufacturing a hybrid bonded structure, comprising: bonding the first dielectric layer and the second dielectric layer, and bonding the upper metal structure and the lower metal structure, to form a dielectric layer and a metal structure, respectively; wherein, during the bonding, a bonding interface layer is formed in the first dielectric layer and the second dielectric layer; the upper barrier layer and the lower barrier layer are in contact to form a diffusion barrier layer, the diffusion barrier layer separating the bonding interface layer, the diffusion barrier layer being spaced apart from the metal structure; wherein, during the bonding, the upper barrier layer and the lower barrier layer do not undergo a bonding reaction, the lower barrier layer comprising one of a metal barrier layer or an insulating barrier layer, and the upper barrier layer being the other of a metal barrier layer or an insulating barrier layer. the step of forming the lower barrier layer comprises: ​ ​ 11. The manufacturing method according to claim 10, wherein ​ forming a trench around the lower metal structure in the first dielectric layer; filling the trench with a diffusion barrier material to form the lower barrier layer.

12. The manufacturing method according to claim 10 or 11, characterized by, The step of forming the upper barrier layer includes: forming a trench around the upper metal structure in the second dielectric layer; filling the trench with a diffusion barrier material to form the upper barrier layer; wherein a nitrogen concentration at a top of the upper barrier layer is greater than a nitrogen concentration at a bottom of the upper barrier layer.

13. A semiconductor device, characterized by comprising: A hybrid bonded structure comprising any one of claims 1-9.

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