Driving circuit and driving chip
By designing a driving circuit for switching power supply, using multiple current branches and the first driving branch, gradually increasing the current of the driving switch tube, the problem of electromagnetic interference in the switching power supply is solved, and the effect of reducing electromagnetic interference is achieved .
Patent Information
- Application Number
- CN202411499803.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-25
- Publication Date
- 2025-02-11
AI Technical Summary
In switching power supply, the gate driving method of the switch tube is too strong, resulting in too large du/dt and di/dt of the guide passage, resulting in serious electromagnetic interference (EMI).
A driving circuit is designed, including at least two current branches and a first driving branch, and electromagnetic interference is reduced by gradually increasing the current of the driving switch tube. Under different driving voltages, the driving circuit gradually increases the operation of the current branch to increase the current flowing out of the first node, ensuring that the magnitude of the third current is equal to the sum of the current flowing out of the first node, thereby gradually increasing the second Three currents.
By gradually increasing the current driving the switch tube, the du/dt and di/dt of the switching tube guide passage are reduced, thereby effectively reducing electromagnetic interference.
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Figure CN119420158A_ABST
Abstract
Description
Technical Field
[0001] The embodiments of the present application relate to the technical field of electronic circuits, and in particular to a driving circuit and a driving chip. Background Art
[0002] In electronic devices with switch tubes, such as switching power supplies, the gate drive mode of the switch tube has a great influence on the performance of the electronic device. If the drive capability is too strong, that is, the drive current is too large, the du / dt and di / dt of the conduction process of the switch tube will be too large, thus causing more serious electromagnetic interference (EMI). Summary of the invention
[0003] The embodiments of the present application provide a driving circuit and a driving chip, which can gradually increase the current driving the first switch tube to reduce electromagnetic interference.
[0004] In a first aspect, an embodiment of the present application provides a driving circuit, characterized in that it is used to drive a first switching tube, and the driving circuit includes: at least two current branches, each current branch is connected to a first node, and each current branch is configured to generate a current flowing out of the first node when it is running, wherein there are two current branches among the at least two current branches, and the magnitude of the first driving voltage corresponding to them is different when they start running; a first driving branch, connected to the first node and to the first switching tube, is configured to output the first driving voltage to the first switching tube based on a third current flowing into the first node to drive the first switching tube, wherein the rate of change of the first driving voltage is positively correlated with the third current flowing into the first node.
[0005] In one or more embodiments, the at least two current branches include:
[0006] A first current branch, connected to the first node, is configured to operate when the first driving voltage is less than a first preset voltage to generate a first current flowing from the first node;
[0007] The second current branch is connected to the first node and is configured to operate when the first driving voltage is greater than the first preset voltage to generate a second current flowing out of the first node.
[0008] In one or more embodiments, the first driving branch is further configured to generate a first driving current based on the third current, and the driving circuit further includes: a constant current branch connected to the first driving branch, configured to generate a constant fourth current, and the fourth current flows through the first driving branch, wherein when the first driving voltage is greater than a second preset voltage and the first driving current is a constant current, the first driving current is the fourth current, and the second preset voltage is greater than the first preset voltage; a voltage detection branch, respectively connected to the first switch tube and the second current branch, configured to generate a second driving voltage after dividing the first driving voltage, and based on the second driving voltage and the third preset voltage, the fourth current flows through the first driving branch. The comparison result of the voltage outputs a control signal to the second current branch, wherein when the first driving voltage is greater than the first preset voltage, the second driving voltage is greater than the third preset voltage; the second current branch is also configured to operate in response to the control signal when the comparison result is that the second driving voltage is greater than the third preset voltage; the driving current branch is respectively connected to the first driving branch and the input voltage, and is configured to generate a second driving current to the first driving branch based on the input voltage to maintain the normal operation of the first driving branch; the second driving branch is respectively connected to the first driving branch and the first switch tube, and is configured to pull the first driving voltage down to zero when it is running.
[0009] In one or more embodiments, the constant current branch includes: a first current mirror module, connected to the input voltage, configured to generate a reference current based on the input voltage, and to generate N mirror currents based on the reference current, wherein any one of the N mirror currents is in proportional relationship with the reference current, and the magnitudes of different mirror currents among the N mirror currents may be the same or different, and N is an integer greater than or equal to 1; a second current mirror module, connected to the first current mirror module and the first driving branch, configured to input the N mirror currents, and to generate the fourth current in proportional relationship with the sum of the N mirror currents.
[0010] In one or more embodiments, the first current branch includes a second switch tube, a first NOT gate and a first current source; the first NOT gate inputs a first drive signal, the output end of the first NOT gate is connected to the first end of the second switch tube, the second end of the second switch tube is connected to the positive electrode of the first current source, the negative electrode of the first current source is grounded, and the third end of the second switch tube is connected to the first node; wherein the second switch tube is turned on or off in response to the first drive signal.
[0011] In one or more embodiments, the second current branch includes a third switch tube and a second current source; the first end of the third switch tube inputs the second drive signal, the second end of the third switch tube is connected to the positive electrode of the second current source, the negative electrode of the second current source is grounded, and the third end of the third switch tube is connected to the first node; wherein the third switch tube is turned on in response to the second drive signal when the first drive voltage is greater than the first preset voltage, and is turned off in response to the second drive signal when the first drive voltage is less than or equal to the first preset voltage.
[0012] In one or more embodiments, the first driving branch includes a fourth switch tube, a fifth switch tube, a sixth switch tube and a first voltage regulator diode; the first end of the fourth switch tube is respectively connected to the third end of the fourth switch tube, the first end of the fifth switch tube and the first node, and the second end of the fourth switch tube is connected to the second end of the fifth switch tube.
[0013] In one or more embodiments, the first current mirror module includes a third current source, a seventh switch tube, an eighth switch tube, a ninth switch tube, a tenth switch tube and M current units, each of the M current units includes a switch and a switch tube, and M is an integer greater than or equal to N; the second end of the seventh switch tube and the second end of the eighth switch tube are both connected to the input voltage, the first end of the seventh switch tube is respectively connected to the first end of the eighth switch tube, the third end of the seventh switch tube and the positive electrode of the third current source, and the negative electrode of the third current source is connected, the third end of the eighth switch tube is respectively connected to the third end of the ninth switch tube, the first end of the ninth switch tube, the first end of the tenth switch tube and the first end of the switch tube in the current unit, the second end of the ninth switch tube, the second end of the tenth switch tube and the second end of the switch tube in the current unit are all grounded, and the switch tube in the current unit is grounded. The third end is connected to the first end of the switch in the current unit, the third end of the tenth switch tube is respectively connected to the second end of the switch in the current unit and the second current mirror module; the second current mirror module includes an eleventh switch tube, a twelfth switch tube, a thirteenth switch tube, a second NOT gate and a first resistor; the second end of the eleventh switch tube is connected to the first current mirror module, the first end of the eleventh switch tube is connected to the output end of the second NOT gate, the input end of the second NOT gate inputs the first driving signal, the third end of the eleventh switch tube is connected to the first end of the first resistor, the second end of the first resistor is respectively connected to the second end of the twelfth switch tube, the first end of the twelfth switch tube and the first end of the thirteenth switch tube, the third end of the twelfth switch tube and the third end of the thirteenth switch tube are both connected to the input voltage, and the second end of the thirteenth switch tube is connected to the first driving branch.
[0014] In one or more embodiments, the voltage detection branch includes a second resistor, a third resistor, a first comparator, a third NOT gate, a fourth NOT gate and a first AND gate; the second resistor and the third resistor are connected in series between the first end of the first switch tube and the ground, the connection point between the second resistor and the third resistor is connected to the inverting input of the first comparator, the third preset voltage is input to the non-inverting input of the first comparator, the output of the first comparator is connected to the input of the third NOT gate, the output of the third NOT gate is connected to the first input of the first AND gate, the second input of the first AND gate is connected to the output of the fourth NOT gate, the input of the fourth NOT gate is input to the first drive signal, and the output of the first AND gate outputs the second drive signal.
[0015] In one or more embodiments, the driving current branch includes a fourteenth switch tube, a fifteenth switch tube, a sixteenth switch tube, a second voltage regulator diode, a third voltage regulator diode, a fourth current source and a first capacitor; the first end of the fourteenth switch tube is respectively connected to the first end of the fifteenth switch tube, the third end of the fourteenth switch tube and the positive electrode of the fourth current source, the second end of the fourteenth switch tube, the second end of the fifteenth switch tube and the third end of the sixteenth switch tube are all connected to the input voltage, the negative electrode of the fourth current source is grounded, the third end of the fifteenth switch tube is respectively connected to the cathode of the second voltage regulator diode, the cathode of the third voltage regulator diode and the first end of the sixteenth switch tube, the second end of the sixteenth switch tube is respectively connected to the cathode of the third voltage regulator diode, the first end of the first capacitor and the first driving branch, and the anode of the second voltage regulator diode and the second end of the first capacitor are both grounded.
[0016] In one or more embodiments, the second driving branch includes a seventeenth switch tube and an eighteenth switch tube; the first end of the seventeenth switch tube and the first end of the eighteenth switch tube are both input with the first driving signal, the second end of the seventeenth switch tube and the second end of the eighteenth switch tube are both grounded, the third end of the seventeenth switch tube is connected to the first driving branch, and the third end of the eighteenth switch tube is connected to the first driving branch and the first end of the first switch tube.
[0017] In a second aspect, an embodiment of the present application provides a driver chip, comprising the driver circuit as described above.
[0018] In a third aspect, an embodiment of the present application provides an electronic device, including a first switch tube and a driving chip as described above, wherein the driving chip is connected to the first switch tube to drive the first switch tube to be turned on or off.
[0019] The beneficial effect of the present application is that the driving circuit of the embodiment of the present application is used to drive the first switch tube, and the driving circuit includes at least two current branches and a first driving branch. Each current branch is connected to the first node, and each current branch is configured to generate a current flowing out of the first node when it is running, wherein there are two current branches in at least two current branches with different first driving voltages corresponding to them at the beginning of operation. In the process of driving the first switch tube, under different first driving voltages, the running current branches are gradually increased to increase the current flowing out of the first node, and the magnitude of the third current is equal to the sum of the currents flowing out of the first node, and the third current is also gradually increased. In summary, when driving the first switch tube, by gradually increasing the current driving the first switch tube, the du / dt and di / dt of the conduction process of the first switch tube can be made smaller, which is beneficial to reducing electromagnetic interference. BRIEF DESCRIPTION OF THE DRAWINGS
[0020] One or more embodiments are exemplarily described by the figures in the corresponding drawings, and these exemplary descriptions are not intended to limit the embodiments. Elements with the same reference numerals in the drawings represent similar elements.
[0021] Figure 1 The schematic diagram of the composition block diagram of the driving circuit provided in the embodiment of the present application is Figure 1 ;
[0022] Figure 2 The schematic diagram of the composition block diagram of the driving circuit provided in the embodiment of the present application is Figure 2 ;
[0023] Figure 3 The schematic diagram of the composition block diagram of the driving circuit provided in the embodiment of the present application is Figure 3 ;
[0024] Figure 4 The schematic diagram of the composition block diagram of the driving circuit provided in the embodiment of the present application is Figure 4 ;
[0025] Figure 5 The schematic diagram of the composition block diagram of the driving circuit provided in the embodiment of the present application is Figure 5 ;
[0026] Figure 6 The schematic diagram of the composition block diagram of the driving circuit provided in the embodiment of the present application is Figure 6 ;
[0027] Figure 7 The schematic diagram of the composition block diagram of the driving circuit provided in the embodiment of the present application is Figure 7 ;
[0028] Figure 8 is with Figure 7A schematic diagram of the circuit structure corresponding to the composition block diagram shown;
[0029] Fig. 9 yes Figure 8 Schematic diagram of each signal in the circuit structure shown. DETAILED DESCRIPTION
[0030] In order to make the purpose, technical scheme and advantages of the embodiments of the present application clearer, the technical scheme in the embodiments of the present application will be described clearly and in detail in combination with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.
[0031] It should be noted that, when an element is described as being “connected to” another element, it may be directly connected to the other element, or one or more intervening elements may exist therebetween.
[0032] In addition, the technical features involved in the various embodiments of the present application described below can be combined with each other as long as there is no structural conflict between them.
[0033] Please refer to Figure 1 , Figure 1 Schematic diagram of a block diagram of a driving circuit provided in an embodiment of the present application. Figure 1 As shown, the driving circuit 100 is used to drive the first switch tube Q1 (drive the first switch tube Q1 to turn on or drive the first switch tube Q1 to turn off). The first switch tube Q1 is an electronic component, which is mainly used to control the current flow in the circuit and can quickly switch between the on and off states. The first switch tube Q1 can be any controllable switch, such as a MOS tube or a triode.
[0034] The driving circuit 100 includes at least one current branch and a first driving branch 30. The at least one current branch includes a first current branch ID1, a second current branch ID2, ... a J-th current branch IDJ. At least two current branches have different first driving voltages corresponding to two current branches at the start of operation, that is, at least two current branches have different first driving voltages corresponding to two current branches at the start of operation, for example, the first driving voltage corresponding to the first current branch ID1 at the start of operation is different from the first driving voltage corresponding to the second current branch ID2 at the start of operation.
[0035] The first current branch ID1 , the second current branch ID2 . . . the Jth current branch IDJ and the first driving branch 30 are all connected to the first node P1 , and the first driving branch 30 is also connected to the first switch tube Q1 .
[0036] Specifically, each current branch is configured to generate a current flowing out of the first node P1 when it is in operation, that is, the first current branch ID1 is configured to generate a current IF1 flowing out of the first node P1 when it is in operation; the second current branch ID2 is configured to generate a current IF2 flowing out of the first node P1 when it is in operation; ...; the Jth current branch IDJ is configured to generate a current IFJ flowing out of the first node P1 when it is in operation. The first driving branch 30 is configured to output a first driving voltage to the first switch tube Q1 based on the third current I3 flowing into the first node P1 to drive the first switch tube Q1, wherein the change rate of the first driving voltage is positively correlated with the third current I3.
[0037] In this embodiment, in the process of driving the first switch tube Q1, the current branches in operation can be gradually increased under different first driving voltages to increase the current flowing out of the first node P1, and the magnitude of the third current I3 is equal to the sum of the currents flowing out of the first node P1, that is, the magnitude of the third current I3 is the sum of the currents IF1, IF2, ..., and IFJ, and the third current I3 also gradually increases. Specifically, when the first switch tube Q1 is driven to turn on, a smaller number of current branches can be operated (such as one current branch), and the third current I3 is smaller. The rate of change of the first driving voltage is positively correlated with the third current I3 flowing in, and the rate of change of the first driving voltage is smaller due to the smaller third current I3. Then, at this time, the du / dt and di / dt of the conduction process of the first switch tube Q1 are smaller, which is conducive to reducing electromagnetic interference. Among them, the first preset voltage can be set based on the actual application scenario, and the embodiment of the present application does not make specific restrictions on this. Afterwards, the running current branches can be gradually increased, the third current I3 also gradually increases, and the first driving voltage also gradually increases to drive the first switch tube Q1 to turn on quickly.
[0038] In some embodiments, only one current branch can be set, and the current branch can linearly increase the generated current. At the same time, the magnitude of the first driving voltage is obtained in real time, so as to gradually increase the current generated by the current branch according to the magnitude of the first driving voltage. It can also be achieved that the du / dt and di / dt of the conduction process of the first switch tube Q1 are small to reduce electromagnetic interference. However, this method requires real-time sampling and linearly increases the current through a current branch, which is more complex and difficult to design.
[0039] In some embodiments, Figure 2 As shown, at least one current branch includes a first current branch ID1 and a second current branch ID2. The first current branch ID1 and the second current branch ID2 are both connected to a first node P1.
[0040] Specifically, the first current branch ID1 is configured to generate a current IF1 flowing out of the first node P1 when it operates. The second current branch ID2 is configured to operate when the first driving voltage is greater than the first preset voltage to generate a current IF2 flowing out of the first node P1.
[0041] When the first switch tube Q1 needs to be driven to conduct, the first driving voltage is less than the first preset voltage, and the first current branch ID1 can be operated first to generate the current IF1 flowing out of the first node P1. At this time, since the second current branch ID2 has not yet operated. Then only the current IF1 flows out from the first node P1, and only the third current I3 flows into the first node P1. According to Kirchhoff's current law, at any circuit node, the sum of all currents flowing into the node is equal to the sum of all currents flowing out of the node, so at this time the third current I3 is the same as the current IF1, and the third current I3 is smaller. At the same time, the rate of change of the first driving voltage is positively correlated with the inflow of the third current I3, so the rate of change of the first driving voltage is smaller due to the smaller third current I3. Then, at this time, the du / dt and di / dt of the conduction process of the first switch tube Q1 are smaller, which is conducive to reducing electromagnetic interference.
[0042] Afterwards, the first driving voltage gradually increases, and when the first driving voltage increases to be greater than the first preset voltage, the second current branch ID2 operates and generates a current IF2 flowing out of the first node P1. At this time, currents IF1 and IF2 flow out of the first node P1, and a third current I3 flows into the first node P1. The magnitude of the third current I3 is the sum of the currents IF1 and IF2. At this time, the first driving voltage is relatively large, and the first switch tube Q1 can be driven to turn on quickly.
[0043] In some embodiments, Figure 3 As shown, the first driving branch 30 is further configured to generate a first driving current IC1 based on the third current I3 , and the driving circuit 100 further includes a constant current branch 40 .
[0044] The constant current branch 40 is connected to the first driving branch 30, and the constant current branch 40 is configured to generate a constant fourth current I4, and the fourth current I4 flows through the first driving branch 30, wherein when the first driving voltage is greater than the second preset voltage and the first driving current is a constant current, the first driving current IC1 is the fourth current I4. The second preset voltage can be set based on the actual application scenario, and the embodiment of the present application does not impose specific restrictions on this, and it is only necessary to make the second preset voltage greater than the first preset voltage.
[0045] Specifically, in the process of driving the first switch tube Q1 to turn on, the third current I3 is in a state of gradually increasing. The rate of change of the first drive voltage is positively correlated with the inflow of the third current I3, so the first drive voltage also increases with the increase of the third current I3, and the rate of change also gradually increases, that is, the speed of the increase of the first drive voltage is also in a state of gradually increasing. At the same time, as the first drive voltage increases, the first drive current IC1 also increases. When the third current I3 increases to make the first drive voltage greater than the second preset voltage, the first drive current IC1 increases to a maximum value. After that, the first drive current IC1 remains unchanged. The magnitude of the first drive current IC1 at this time is the same as the magnitude of the fourth current I4. It can be seen that in this embodiment, the magnitude of the fourth current I4 output by the constant current branch 40 can be adjusted based on demand to adjust the magnitude of the first drive current IC1. On the one hand, electromagnetic interference can be further reduced; on the other hand, the first drive current IC1 can be adjusted to be suitable for different types of first switch tubes Q1, thereby increasing the versatility of the drive circuit 100, wherein the magnitude of the drive current required for different types of first switch tubes Q1 is different.
[0046] In some embodiments, Figure 4 As shown, the constant current branch 40 includes a first current mirror module 41 and a second current mirror module 42 .
[0047] The first current mirror module 41 is connected to the input voltage VDD, and the first current mirror module 41 is configured to generate a reference current (denoted as IREF) based on the input voltage VDD, and generate N mirror currents based on the reference current IREF. The N mirror currents include a first mirror current IA1, a second mirror current IA2, ..., and an N-th mirror current IAN, where N is an integer greater than or equal to 1. Among them, any mirror current among the N mirror currents is in a proportional relationship with the reference current, that is, the first mirror current IA1, the second mirror current IA2, ..., and the N-th mirror current IAN are all in a proportional relationship with the reference current IREF, for example, the first mirror current IA1 = K1 * IREF, K1 is a proportional coefficient, and K1 can be an integer greater than or equal to 1. The magnitudes of different mirror currents among the N mirror currents can be the same or different, that is, the magnitudes of any two mirror currents among the first mirror current IA1, the second mirror current IA2, ..., and the N-th mirror current IAN can be the same or different, for example, the magnitudes of the first mirror current IA1 and the second mirror current IA2 can be the same or different.
[0048] The second current mirror module 42 is connected to the first current mirror module 41 and the first driving branch 30. The second current mirror module 42 is configured to input N mirror currents and generate a fourth current I4 that is proportional to the sum of the N mirror currents. That is, the first mirror current IA1, the second mirror current IA2, ..., and the Nth mirror current IAN are all input to the second current mirror module 42, and the fourth current I4 output by the second current mirror module 42 is: I4 = K2*(IA1+IA2+...+IAN), wherein K2 is a proportionality coefficient, and K2 can be an integer greater than or equal to 1. Then, the fourth current I4 can be adjusted by adjusting the sum of the first mirror current IA1, the second mirror current IA2, ..., and the Nth mirror current IAN or adjusting the proportional coefficient K2, wherein adjusting the sum of the first mirror current IA1, the second mirror current IA2, ..., and the Nth mirror current IAN can be achieved by at least one of the following methods: the first method is to adjust the size of the reference current IREF; the second method is to adjust the size of N; the third method is to adjust the proportional coefficient between the first mirror current IA1, the second mirror current IA2, ..., the Nth mirror current IAN and the reference current IREF.
[0049] Thus, this embodiment provides a method of adjusting the fourth current I4 to adjust the magnitude of the first drive current IC1, thereby further reducing electromagnetic interference and making the drive circuit 100 suitable for driving different types of first switch tubes Q1, thereby increasing the versatility of the drive circuit 100.
[0050] In some embodiments, Figure 5 As shown, the driving circuit 100 further includes a voltage detection branch 50. The voltage detection branch 50 is connected to the first switch tube Q1 and the second current branch ID2 respectively.
[0051] Specifically, the voltage detection branch 50 is configured to generate a second driving voltage after dividing the first driving voltage, and output a control signal to the second current branch ID2 based on the comparison result between the second driving voltage and the third preset voltage, wherein the second driving voltage is greater than the third preset voltage when the first driving voltage is greater than the first preset voltage. The second current branch ID2 is also configured to operate in response to the control signal when the comparison result is that the second driving voltage is greater than the third preset voltage (here corresponds to the second current branch ID2 being configured to operate when the first driving voltage is greater than the first preset voltage in the above). The third preset voltage can be set based on the actual application scenario, and the embodiment of the present application does not impose specific restrictions on this.
[0052] In some embodiments, Figure 6As shown, the driving circuit 100 further includes a driving current branch 60. The driving current branch 60 is respectively connected to the first driving branch 30 and the input voltage VDD, and the driving current branch 60 is configured to generate a second driving current IC2 to the first driving branch 30 based on the input voltage VDD, and the second driving current IC2 is used to maintain the normal operation of the first driving branch 30.
[0053] In some embodiments, Figure 7 As shown, the driving branch 100 further includes a second driving branch 70. The second driving branch 70 is connected to the first driving branch 30 and the first switch tube Q1 respectively, and the second driving branch 70 is configured to pull the first driving voltage down to zero when it is running. That is, when the first switch tube Q1 is turned on, if the second driving branch 70 is operated, the first driving voltage can be pulled down to zero, and then the first switch tube Q1 can be driven to turn off.
[0054] Please refer to Figure 8 , Figure 8 An example is shown with Figure 7 A circuit structure corresponding to the block diagram shown in FIG. Figure 8 As shown, the first current branch ID1 includes a second switch tube Q2, a first NOT gate NOT1 and a first current source IB1.
[0055] Among them, the input end of the first NOT gate NOT1 inputs the first driving signal S1, the output end of the first NOT gate NOT1 is connected to the first end of the second switch tube Q2, the second end of the second switch tube Q2 is connected to the positive electrode of the first current source IB1, the negative electrode of the first current source IB1 is grounded GND, and the third end of the second switch tube Q2 is connected to the first node P1.
[0056] Specifically, the second switch tube Q2 is turned on or off in response to the first drive signal S1. When the second switch tube Q2 is turned on, the first current branch ID1 operates and generates a current IF1 flowing out of the first node P1; when the second switch tube Q2 is turned off, the first current branch ID1 stops operating and stops generating the current IF1. Since the second switch tube Q2 is an NMOS tube as an example in this embodiment, when the first drive signal S1 is at a low level, the inverted signal of the first drive signal S1 is is high level, the second switch tube Q2 is turned on; when the first drive signal S1 is high level, the inverted signal of the first drive signal S1 is at a low level, and the second switch tube Q2 is turned off.
[0057] It should be noted that in the embodiments of the present application, only a specific implementation method of each switch tube (including the first switch tube Q1 and the second switch tube Q2 in the above embodiment and the third switch tube Q3 to the eighteenth switch tube Q18 in the subsequent embodiments) is illustrated by way of example, while in other embodiments, each switch tube can be any controllable switch, such as an insulated gate bipolar transistor (IGBT) device, an integrated gate-commutated thyristor (IGCT) device, a gate turn-off thyristor (GTO) device, a silicon-controlled rectifier (SCR) device, a junction-gate field-effect transistor (JFET) device, a MOS-controlled thyristor (MCT) device, etc.
[0058] Among them, when any of the switch tubes is implemented as a MOS tube, the gate of the MOS tube corresponds to the first end of the switch tube, the source of the MOS tube corresponds to the second end of the switch tube, and the drain of the MOS tube corresponds to the third end of the switch tube; when any of the switch tubes is implemented as a triode, the base of the triode corresponds to the first end of the switch tube, the emitter of the triode corresponds to the second end of the switch tube, and the collector of the triode corresponds to the third end of the switch tube.
[0059] In some embodiments, the second current branch ID2 includes a third switch tube Q3 and a second current source IB2.
[0060] A first end of the third switch tube Q3 inputs the second drive signal S2, a second end of the third switch tube Q3 is connected to the positive electrode of the second current source IB2, a negative electrode of the second current source IB2 is grounded GND, and a third end of the third switch tube Q3 is connected to the first node P1.
[0061] The third switch tube Q3 is turned on in response to the second drive signal S2 when the first drive voltage is greater than the first preset voltage, and is turned off in response to the second drive signal S2 when the first drive voltage is less than or equal to the first preset voltage.
[0062] In some embodiments, the first driving branch 30 includes a fourth switch tube Q4 , a fifth switch tube Q5 , a sixth switch tube Q6 and a first zener diode D1 .
[0063] The first end of the fourth switch tube Q4 is connected to the third end of the fourth switch tube Q4, the first end of the fifth switch tube Q5 and the first node P1 respectively, and the second end of the fourth switch tube Q4 is connected to the second end of the fifth switch tube Q5. The first voltage regulator diode D1 is used to clamp the voltage between the first end and the second end of the sixth switch tube Q6 to prevent the first end of the sixth switch tube Q6 from being broken down.
[0064] In some embodiments, the first current mirror module 41 includes a third current source IB3, a seventh switch tube Q7, an eighth switch tube Q8, a ninth switch tube Q9, a tenth switch tube Q10 and M current units, where M is an integer greater than or equal to N. The M current units include a first current unit A1, a second current unit A2, ..., an Mth current unit AM, where M is an integer greater than or equal to N. Each of the M current units includes a switch and a switch tube, that is, the first current unit A1 includes a switch KA1 and a switch tube QA1; the second current unit A2 includes a switch KA2 and a switch tube QA2; ...; the Mth current unit AM includes a switch KAM and a switch tube QAM.
[0065] Among them, the second end of the seventh switch tube Q7 and the second end of the eighth switch tube Q8 are both connected to the input voltage VDD, the first end of the seventh switch tube Q7 is respectively connected to the first end of the eighth switch tube Q8, the third end of the seventh switch tube Q7 and the positive electrode of the third current source IB3, and is connected to the negative electrode of the third current source IB3, the third end of the eighth switch tube Q8 is respectively connected to the third end of the ninth switch tube Q9, the first end of the ninth switch tube Q9, the first end of the tenth switch tube Q10 and the first end of the switch tube in the current unit (including the first end of the switch tube QA1 in the first current unit A1, the first end of the switch tube QA2 in the second current unit A2, ..., the first end of the switch tube QAM in the Mth current unit AM), the second end of the ninth switch tube Q9, the second end of the tenth switch tube Q10 and the second ends of the switch tubes in the current unit (including the second end of the switch tube QA1 in the first current unit A1, the first end of the switch tube QA2 in the second current unit A2, ..., the first end of the switch tube QAM in the Mth current unit AM) The second ends of the switch tubes QA2 in the M-th current unit A1, ..., the second ends of the switch tubes QAM in the M-th current unit AM) are all grounded GND, the third ends of the switch tubes in the current unit (including the third ends of the switch tubes QA1 in the first current unit A1, the third ends of the switch tubes QA2 in the second current unit A2, ..., the third ends of the switch tubes QAM in the M-th current unit AM) are connected to the first ends of the switches in the current unit (including the first ends of the switch KA1 in the first current unit A1, the first ends of the switch KA2 in the second current unit A2, ..., the first ends of the switch KAM in the M-th current unit AM), and the third ends of the tenth switch tubes Q10 are respectively connected to the second ends of the switches in the current units (including the second ends of the switch KA1 in the first current unit A1, the second ends of the switch KA2 in the second current unit A2, ..., the second ends of the switch KAM in the M-th current unit AM) and the second current mirror module 42.
[0066] Specifically, the current flowing through the seventh switch tube Q7 is the current I_IB3 output by the third current source IB3. The seventh switch tube Q7 and the eighth switch tube Q8 form a current mirror. The current flowing through the seventh switch tube Q7 and the current flowing through the eighth switch tube Q8 are proportional. Assuming that the proportionality coefficient is K3 (K3 is an integer greater than or equal to 1), the current flowing through the eighth switch tube Q8 is K3*I_IB3, and the current flowing through the ninth switch tube Q9 is also K3*I_IB3. The current K3*I_IB3 is the reference current IREF.
[0067] At the same time, when the switch in any current unit is closed, the switch connected to the closed switch also forms a current mirror with the ninth switch Q9. At this time, the current flowing through the switch is the product of the corresponding proportional coefficient and the reference current IREF. For example, when the switch KA1 in the first current unit A1 is closed, the switch QA1 connected to the switch KA1 forms a current mirror with the ninth switch Q9, and the current flowing through the switch QA1 is the product of the corresponding proportional coefficient (assuming it is K4, K4 is an integer greater than or equal to 1) and the reference current IREF, that is, K3*K4*I_IB3. When different switch tubes form a current mirror with the ninth switch Q9, the currents flowing through different switch tubes can be the same or different, that is, the proportional coefficients between the currents flowing through different switch tubes and the reference current IREF can be the same or different.
[0068] Thus, when N mirror currents need to be provided, the switches in N-1 current units among the first current unit A1, the second current unit A2, ..., and the Mth current unit AM can be optionally closed to generate N-1 mirror currents, plus the current flowing through the tenth switch tube Q10, for a total of N mirror currents.
[0069] In some embodiments, the second current mirror module 42 includes an eleventh switch tube Q11 , a twelfth switch tube Q12 , a thirteenth switch tube Q13 , a second NOT gate NOT2 , and a first resistor R1 .
[0070] Among them, the second end of the eleventh switch tube Q11 is connected to the first current mirror module 41, the first end of the eleventh switch tube Q11 is connected to the output end of the second NOT gate NOT2, the input end of the second NOT gate NOT2 inputs the first drive signal S1, the third end of the eleventh switch tube Q11 is connected to the first end of the first resistor R1, the second end of the first resistor R1 is respectively connected to the second end of the twelfth switch tube Q12, the first end of the twelfth switch tube Q12 and the first end of the thirteenth switch tube Q13, the third end of the twelfth switch tube Q12 and the third end of the thirteenth switch tube Q13 are both connected to the input voltage VDD, and the second end of the thirteenth switch tube Q13 is connected to the first drive branch 30.
[0071] Specifically, when the eleventh switch tube Q11, the twelfth switch tube Q12 and the thirteenth switch tube Q13 are turned on, the current flowing through the eleventh switch tube Q11 and the current flowing through the twelfth switch tube Q12 are both the sum of the N mirror currents output by the first current mirror unit 41, that is, the sum of the first mirror current IA1, the second mirror current IA2, ..., and the Nth mirror current IAN. The twelfth switch tube Q12 and the thirteenth switch tube Q13 form a current mirror, and the proportional coefficient is K2, then I4 = K2*(IA1+IA2+...+IAN).
[0072] In some embodiments, the voltage detection branch 50 includes a second resistor R2 , a third resistor R3 , a first comparator U1 , a third NOT gate NOT3 , a fourth NOT gate NOT4 , and a first AND gate AND1 .
[0073] Among them, the second resistor R2 and the third resistor R3 are connected in series between the first end of the first switch tube Q1 and the ground GND, the connection point between the second resistor R2 and the third resistor F3 is connected to the inverting input terminal of the first comparator U1, the third preset voltage VT is input to the non-inverting input terminal of the first comparator U1, the output terminal of the first comparator U1 is connected to the input terminal of the third NOT gate NOT3, the output terminal of the third NOT gate NOT3 is connected to the first input terminal of the first AND gate AND1, the second input terminal of the first AND gate AND1 is connected to the output terminal of the fourth NOT gate NOT4, the input terminal of the fourth NOT gate NOT4 is input with the first drive signal S1, and the output terminal of the first AND gate AND1 outputs the second drive signal S2.
[0074] Specifically, the first driving voltage V1 is divided by the second resistor R2 and the third resistor R3 to generate the second driving voltage V1_1 on the third resistor R3.
[0075] When the second driving voltage V1_1 is less than or equal to the third preset voltage VT, the first comparator U1 outputs a high level, and the third NOT gate NOT3 outputs a low level. When the first driving signal S1 is a low level, the fourth NOT gate NOT4 outputs a high level. Then the first AND gate AND1 outputs a low level, that is, the second driving signal S2 is a low level.
[0076] When the second driving voltage V1_1 is greater than the third preset voltage VT, the first comparator U1 outputs a low level, and the third NOT gate NOT3 outputs a high level. When the first driving signal S1 is a low level, the fourth NOT gate NOT4 outputs a high level. Then the first AND gate AND1 outputs a high level, that is, the second driving signal S2 is a high level.
[0077] In some embodiments, the driving current branch 60 includes a fourteenth switch tube Q14, a fifteenth switch tube Q15, a sixteenth switch tube Q16, a second Zener diode D2, a third Zener diode D3, a fourth current source IA4 and a first capacitor C1.
[0078] Among them, the first end of the fourteenth switch tube Q14 is respectively connected to the first end of the fifteenth switch tube Q15, the third end of the fourteenth switch tube Q14 and the positive electrode of the fourth current source IA4, the second end of the fourteenth switch tube Q14, the second end of the fifteenth switch tube Q15 and the third end of the sixteenth switch tube Q16 are all connected to the input voltage VDD, the negative electrode of the fourth current source IA4 is grounded GND, the third end of the fifteenth switch tube Q15 is respectively connected to the cathode of the second voltage zener diode D2, the cathode of the third voltage zener diode D3 and the first end of the sixteenth switch tube Q16, the second end of the sixteenth switch tube Q16 is respectively connected to the cathode of the third voltage zener diode D3, the first end of the first capacitor C1 and the first driving branch 30, the anode of the second voltage zener diode D2 and the second end of the first capacitor C1 are both grounded GND.
[0079] Specifically, the current flowing through the fourteenth switch tube Q14 is the current I_IA4 output by the fourth current source IA4. Since the fourteenth switch tube Q14 and the fifteenth switch tube Q15 form a current mirror, that is, the current flowing through the fourteenth switch tube Q14 is proportional to the current flowing through the fifteenth switch tube Q15. Assuming that the proportional coefficient is K5, the current flowing through the fifteenth switch tube Q15 is K5*I_IA4. When the input voltage VDD voltage is higher than the breakdown voltage VDZ of the second voltage stabilizing diode D2, the voltage at the first end of the sixteenth switch tube Q16 is clamped to the breakdown voltage VDZ. The sixteenth switch tube Q16 is turned on, and the current flowing through the sixteenth switch tube Q16 is used as the second drive current IC2 to provide drive current for the fourth switch tube Q4 and the fifth switch tube Q5. The third voltage stabilizing diode D3 is also a clamping diode to clamp the voltage between the first end and the second end of the sixteenth switch tube Q16, thereby preventing the first end of the sixteenth switch tube Q16 from being broken down.
[0080] In some embodiments, the second driving branch 70 includes a seventeenth switch tube Q17 and an eighteenth switch tube Q18.
[0081] Among them, the first end of the seventeenth switch tube Q17 and the first end of the eighteenth switch tube Q18 are both input with the first driving signal S1, the second end of the seventeenth switch tube Q17 and the second end of the eighteenth switch tube Q18 are both grounded GND, the third end of the seventeenth switch tube Q17 is connected to the first driving branch 30, and the third end of the eighteenth switch tube Q18 is connected to the first driving branch 30 and the first end of the first switch tube Q1.
[0082] The following will be combined Fig. 9 right Figure 8 The principle of the circuit structure shown is explained, in which Fig. 9In the figure, the horizontal axis is time; the vertical axis is the curves from small to small, respectively, the first drive signal S1, the inverted signal of the first drive signal S1, and the inverted signal of the first drive signal S1. The second driving signal S2, the voltage V2 of the first end of the sixth switch tube Q6, the first driving voltage V1 and the first driving current IC1 driving the first switch tube Q1.
[0083] Specifically, when the first switch tube Q1 needs to be driven to turn on, the first drive signal S1 is first configured to be low level, and then the inverted signal S1 is turned on after passing through the first NOT gate NOT1. is high level, which drives the second switch tube Q2 to turn on and generates a current IF1 flowing out of the first node P1. The fourth switch tube Q4, the fifth switch tube Q5 and the sixth switch tube Q6 are all turned on. The first driving voltage V1 is generated to drive the first switch tube Q1 to turn on.
[0084] At this time, the second driving voltage V1_1 after the first driving voltage V1 is divided is less than the third preset voltage VT, and the first comparator U1 outputs a high level. After the output of the first comparator U1 passes through the third NOT gate NOT3, it is ANDed with the reverse signal of the first driving signal S1, and the generated second driving signal S2 is a low level. The third switch tube Q3 is turned off, and the current IF2 is not generated, and the third current I3 is equal to the current IF1. At this time, the third current I3 is small, so the voltage V2 rises slowly, and the first driving voltage V1 also rises slowly. Among them, the first driving voltage V1 is equal to the sum of the voltage V2 and the voltage difference between the first end and the second end of the sixth switch tube Q6, then the change rate of the first driving voltage V1 is positively correlated with the change rate of the voltage V2; and the change rate of the voltage V2 is positively correlated with the current flowing through the fifth switch tube Q5, and the current flowing through the fifth switch tube Q5 is positively correlated with the third current I3. In summary, the change rate of the first driving voltage V1 is positively correlated with the third current I3. Then, the change rate of the first driving voltage V1 is small due to the small third current I3. Then, at this time, du / dt and di / dt of the conduction process of the first switch tube Q1 are small, which is beneficial to reducing electromagnetic interference.
[0085] For example, in Fig. 9 At time T1, the first drive signal S1 is at a low level, and the inverting signal is high level, the second drive signal S2 is low level, and the voltage V2, the first drive voltage V1 and the first drive current IC1 all increase gradually. In this case, since the third current I3 is small, the voltage V2, the first drive voltage V1 and the first drive current IC1 all increase slowly, so that the du / dt and di / dt of the conduction process of the first switch tube Q1 are small, thereby reducing electromagnetic interference.
[0086] Afterwards, the first drive voltage V1 continues to increase. When the first drive voltage V1 increases to be greater than the first preset voltage, the second drive voltage V1_1 is greater than the third preset voltage VT, and the first comparator U1 outputs a low level. After the output of the first comparator U1 passes through the third NOT gate NOT3, it is ANDed with the reverse signal of the first drive signal S1, and the generated second drive signal S2 is a high level. The third switch tube Q3 is turned on to generate a current IF2 flowing out of the first node P1. The third current I3 is equal to the sum of the current IF1 and the current IF2. At this time, the third current I3 is relatively large, so that the voltage V2 rises rapidly, and the first drive voltage V1 also rises rapidly. Among them, the first drive voltage V1 is equal to the sum of the voltage V2 and the voltage difference between the first end and the second end of the sixth switch tube Q6, and the change rate of the first drive voltage V1 is positively correlated with the third current I3. Then, due to the large change rate of the third current I3, the first drive voltage V1 is large, which is conducive to driving the first switch tube Q1 to turn on quickly.
[0087] For example, in Fig. 9 At time T2, the first driving voltage V1 increases to be greater than the first preset voltage, the second driving signal S2 switches from a low level to a high level, the first driving signal S1 remains at a low level, and the inverting signal Maintaining a high level, in this case, since the third current I3 is relatively large, the voltage V2, the first driving voltage V1 and the first driving current IC1 all increase rapidly, so as to drive the first switch tube Q1 to be turned off rapidly.
[0088] In some embodiments, the configurable current IF1 is much smaller than the current IF2, for example, the current IF1 is 1 / 10 of the current IF2, so that the difference between the third current I3 when the third switch tube Q3 is turned off and the third current I3 when the third switch tube Q3 is turned on is larger, thereby better reducing the du / dt and di / dt of the conduction process of the first switch tube Q1, which is beneficial to reducing electromagnetic interference.
[0089] When the voltage V2 increases to make the sixth switch tube Q6 in a saturated state, the current flowing through the sixth switch tube Q6 (the current is the first drive current IC1) remains unchanged, and the first drive current IC1 at this time is a constant fourth current I4. It can be seen that in this embodiment, the size of the fourth current I4 output by the constant current branch 40 can be adjusted based on demand to adjust the size of the first drive current IC1. On the one hand, electromagnetic interference can be further reduced; on the other hand, the first drive current IC1 can be adjusted to be suitable for different types of first switch tubes Q1, thereby increasing the versatility of the drive circuit 100.
[0090] For example, in Fig. 9 At time T3, the first drive current IC1 remains unchanged and is equal to the constant fourth current I4.
[0091] When the first switch tube Q1 needs to be driven to turn off, the first drive signal S1 is first configured to be high level, and the inverted signal S1 passes through the first NOT gate NOT1. The first drive signal S1 is at a low level, which drives the second switch tube Q2 to turn off and stop generating the current IF1. In addition, the high level of the first drive signal S1 is input to the first AND gate AND1 through the fourth NOT gate NOT4, so that the second drive signal S2 is at a low level, which drives the third switch tube Q3 to turn off and stop generating the current IF2. Then, the fourth switch tube Q4 and the fifth switch tube Q5 are both turned off. At the same time, the high level of the first drive signal S1 drives the seventeenth switch tube Q17 and the eighteenth switch tube Q18 to turn on, so as to pull down the voltage V2 and the first drive voltage V1, so that the sixth switch tube Q6 and the first switch tube Q1 are both pulled down and turned off.
[0092] For example, in Fig. 9 At time T4, the first drive signal S1 is at a high level, and the inverted signal is low level, the second driving signal S2 is low level, the voltage V2, the first driving voltage V1 and the first driving current IC1 are all reduced to zero, thereby driving the first switch tube Q1 to be turned off.
[0093] An embodiment of the present application further provides a driver chip, which includes the driver circuit 100 in any embodiment of the present application.
[0094] The embodiment of the present application further provides an electronic device, which includes a first switch tube Q1 and a driver chip in any embodiment of the present application, wherein the driver chip is connected to the first switch tube Q1 to drive the first switch tube Q1 to turn on or off.
[0095] In some embodiments, the electronic device is a switching power supply. The switching power supply may be an AC-DC converter, a DC-DC converter, or a linear power supply. In other embodiments, the switching power supply may be a primary-side regulation (PSR) switching power supply.
[0096] The above descriptions are merely embodiments of the present application and are not intended to limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present application.
[0097] The above embodiments are only used to illustrate the technical solutions of the present application, but not to limit them. Under the idea of the present application, the technical features in the above embodiments or different embodiments can also be combined, and the steps can be implemented in any order. It should be understood by ordinary technicians in this field that they can still modify the technical solutions recorded in the above embodiments, or replace some of the technical features by equivalents; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application.
Claims
1. A driving circuit, characterized in that: Used to drive the first switch tube, the driving circuit includes: at least two current branches, each current branch is connected to a first node, each current branch is configured to generate a current flowing from the first node when it is running, wherein two of the at least two current branches have different first drive voltages corresponding to them when they start running; The first driving branch is connected to the first node and to the first switch tube, and is configured to output the first driving voltage to the first switch tube based on the third current flowing into the first node to drive the first switch tube, wherein the rate of change of the first driving voltage is positively correlated with the third current.
2. The driving circuit according to claim 1, characterized in that: The at least two current branches include: A first current branch, connected to the first node, is configured to operate when the first driving voltage is less than a first preset voltage to generate a first current flowing from the first node; The second current branch is connected to the first node and is configured to operate when the first driving voltage is greater than the first preset voltage to generate a second current flowing out of the first node.
3. The driving circuit according to claim 2, characterized in that: The first driving branch is further configured to generate a first driving current based on the third current, and the driving circuit further includes: a constant current branch connected to the first driving branch and configured to generate a constant fourth current, and the fourth current flows through the first driving branch, wherein when the first driving voltage is greater than a second preset voltage and the first driving current is a constant current, the first driving current is the fourth current, and the second preset voltage is greater than the first preset voltage; a voltage detection branch, connected to the first switch tube and the second current branch respectively, configured to generate a second driving voltage after dividing the first driving voltage, and output a control signal to the second current branch based on a comparison result between the second driving voltage and a third preset voltage, wherein the second driving voltage is greater than the third preset voltage when the first driving voltage is greater than the first preset voltage; The second current branch is further configured to operate in response to the control signal when the comparison result is that the second driving voltage is greater than the third preset voltage; a driving current branch, connected to the first driving branch and the input voltage respectively, and configured to generate a second driving current to the first driving branch based on the input voltage to maintain normal operation of the first driving branch; The second driving branch is connected to the first driving branch and the first switch tube respectively, and is configured to pull the first driving voltage down to zero when it is running.
4. The driving circuit according to claim 3, characterized in that: The constant current branch comprises: A first current mirror module, connected to an input voltage, configured to generate a reference current based on the input voltage, and to generate N mirror currents based on the reference current, wherein any mirror current among the N mirror currents is in proportional relationship with the reference current, and sizes of different mirror currents among the N mirror currents may be the same or different, and N is an integer greater than or equal to 1; The second current mirror module is connected to the first current mirror module and the first driving branch, and is configured to input the N mirror currents and generate the fourth current that is proportional to the sum of the N mirror currents.
5. The driving circuit according to claim 2, characterized in that: The first current branch includes a second switch tube, a first NOT gate and a first current source; The first driving signal is input to the input end of the first NOT gate, the output end of the first NOT gate is connected to the first end of the second switch tube, the second end of the second switch tube is connected to the negative electrode of the first current source, the positive electrode of the first current source is grounded, and the third end of the second switch tube is connected to the first node; The second switch tube is turned on or off in response to the first driving signal.
6. The driving circuit according to claim 2, characterized in that: The second current branch includes a third switch tube and a second current source; A first end of the third switch tube inputs a second driving signal, a second end of the third switch tube is connected to a positive electrode of the second current source, a negative electrode of the second current source is grounded, and a third end of the third switch tube is connected to the first node; The third switch tube is turned on in response to the second drive signal when the first drive voltage is greater than a first preset voltage, and is turned off in response to the second drive signal when the first drive voltage is less than or equal to the first preset voltage.
7. The driving circuit according to claim 1, characterized in that: The first driving branch includes a fourth switch tube, a fifth switch tube, a sixth switch tube and a first voltage regulator diode; The first end of the fourth switch tube is respectively connected to the third end of the fourth switch tube, the first end of the fifth switch tube and the first node, and the second end of the fourth switch tube is connected to the second end of the fifth switch tube.
8. The driving circuit according to claim 4, characterized in that: The first current mirror module includes a third current source, a seventh switch tube, an eighth switch tube, a ninth switch tube, a tenth switch tube and M current units, each of the M current units includes a switch and a switch tube, and M is an integer greater than or equal to N; The second end of the seventh switch tube and the second end of the eighth switch tube are both connected to the input voltage, the first end of the seventh switch tube is respectively connected to the first end of the eighth switch tube, the third end of the seventh switch tube and the positive electrode of the third current source, and the negative electrode of the third current source, the third end of the eighth switch tube is respectively connected to the third end of the ninth switch tube, the first end of the ninth switch tube, the first end of the tenth switch tube and the first end of the switch tube in the current unit, the second end of the ninth switch tube, the second end of the tenth switch tube and the second end of the switch tube in the current unit are all grounded, the third end of the switch tube in the current unit is connected to the first end of the switch in the current unit, and the third end of the tenth switch tube is respectively connected to the second end of the switch in the current unit and the second current mirror module; The second current mirror module includes an eleventh switch tube, a twelfth switch tube, a thirteenth switch tube, a second NOT gate and a first resistor; The second end of the eleventh switch tube is connected to the first current mirror module, the first end of the eleventh switch tube is connected to the output end of the second NOT gate, the input end of the second NOT gate inputs the first drive signal, the third end of the eleventh switch tube is connected to the first end of the first resistor, the second end of the first resistor is respectively connected to the second end of the twelfth switch tube, the first end of the twelfth switch tube and the first end of the thirteenth switch tube, the third end of the twelfth switch tube and the third end of the thirteenth switch tube are both connected to the input voltage, and the second end of the thirteenth switch tube is connected to the first drive branch.
9. The driving circuit according to claim 3, characterized in that: The voltage detection branch includes a second resistor, a third resistor, a first comparator, a third NOT gate, a fourth NOT gate and a first AND gate; The second resistor and the third resistor are connected in series between the first end of the first switch tube and the ground, the connection point between the second resistor and the third resistor is connected to the inverting input end of the first comparator, the non-inverting input end of the first comparator inputs the third preset voltage, the output end of the first comparator is connected to the input end of the third NOT gate, the output end of the third NOT gate is connected to the first input end of the first AND gate, the second input end of the first AND gate is connected to the output end of the fourth NOT gate, the input end of the fourth NOT gate inputs the first drive signal, and the output end of the first AND gate outputs the second drive signal; The driving current branch includes a fourteenth switch tube, a fifteenth switch tube, a sixteenth switch tube, a second voltage stabilizing diode, a third voltage stabilizing diode, a fourth current source and a first capacitor; The first end of the fourteenth switch tube is respectively connected to the first end of the fifteenth switch tube, the third end of the fourteenth switch tube and the positive electrode of the fourth current source, the second end of the fourteenth switch tube, the second end of the fifteenth switch tube and the third end of the sixteenth switch tube are all connected to the input voltage, the negative electrode of the fourth current source is grounded, the third end of the fifteenth switch tube is respectively connected to the cathode of the second voltage zener diode, the cathode of the third voltage zener diode and the first end of the sixteenth switch tube, the second end of the sixteenth switch tube is respectively connected to the cathode of the third voltage zener diode, the first end of the first capacitor and the first driving branch, and the anode of the second voltage zener diode and the second end of the first capacitor are both grounded; The second driving branch includes a seventeenth switch tube and an eighteenth switch tube; The first end of the seventeenth switch tube and the first end of the eighteenth switch tube are both input with the first drive signal, the second end of the seventeenth switch tube and the second end of the eighteenth switch tube are both grounded, the third end of the seventeenth switch tube is connected to the first drive branch, and the third end of the eighteenth switch tube is connected to the first drive branch and the first end of the first switch tube.
10. A driver chip, characterized in that: Comprising a driving circuit as described in any one of claims 1-9.