Switch chip, circuit system and electronic equipment

Abstract

The invention provides a switch chip, a circuit system and electronic equipment, the chip comprises a grid electrode pin, a source electrode pin and a drain electrode pin, the grid electrode pin is connected with a switch control signal, the source electrode pin is connected with a power supply voltage, and the drain electrode pin is connected with a load. And the boosting module is used for boosting a difference value between the power supply voltage and the switch control signal and outputting a corresponding boosted voltage. The anti-backflow module is used for cutting off the connection between the input end and the output end of the anti-backflow module when the switch control signal is at a high level; and when the switch control signal is at a low level, connection between the input end and the output end is established. The grid electrode of the NMOS tube is connected with the output end of the anti-backflow module, the drain electrode of the NMOS tube is connected with the source electrode pin, and the source electrode of the NMOS tube is connected with the drain electrode pin; and the pull-down module is used for pulling down the grid voltage of the NMOS tube to the source voltage of the NMOS tube when the switch control signal is at a high level. According to the switch chip, the circuit cost of the chip can be reduced, and the application cost of the chip can also be reduced.

Description

Technical Field

[0001] The present invention relates to the field of circuit switches, and in particular to a switch chip, a circuit system and an electronic device. Background Art

[0002] Using MOS tubes as switches has become a common technical means in the industry. The specific application scenarios are roughly divided into: high-side switches and low-side switches. Among them, the high-side switch is coupled between the power supply and the load. The low-side switch is coupled between the load and the ground.

[0003] Although the prior art usually selects PMOS tubes as high-side switches, under the premise of the same withstand voltage and the same impedance, the size of the PMOS tube is 2-3.5 times that of the NMOS tube. Therefore, compared with using PMOS tubes as high-side switches, using NMOS tubes as high-side switches can greatly save circuit costs.

[0004] However, the existing switch chip that selects NMOS tube as high-side switch has a high application cost because it needs to redesign the boost circuit for different application scenarios and has the problem of low pin compatibility.

[0005] Therefore, providing a switch chip that can reduce both circuit cost and application cost has become a technical problem that the industry urgently needs to solve. Summary of the invention

[0006] The embodiments of the present invention provide a switch chip, a circuit system and an electronic device, which can reduce both the circuit cost of the switch chip and the application cost of the switch chip.

[0007] In order to solve the above technical problems, the technical solution of the present invention provides a switch chip, comprising: A gate pin, a source pin and a drain pin, wherein the gate pin is connected to a switch control signal, the source pin is connected to a power supply voltage, and the drain pin is connected to a load; A boost module, whose ground terminal is connected to the gate pin, and whose power terminal is connected to the source pin, and the boost module is used to boost the difference between the power supply voltage and the switch control signal, and output a corresponding boost voltage; An anti-backflow module, whose input end is connected to the output end of the boost module, and the anti-backflow module is used to: completely cut off the connection between its own input end and output end when the switch control signal is at a high level; and establish a connection between its own input end and output end when the switch control signal is at a low level; An NMOS tube, whose drain is connected to the source pin, whose gate is connected to the output end of the anti-backflow module, and whose source is connected to the drain pin; A pull-down module, used for pulling down the gate voltage of the NMOS tube to the source voltage of the NMOS tube when the switch control signal is at a high level; The boost module, the anti-backflow module, the NMOS tube and the pull-down module are all integrated in the same chip.

[0008] Optionally, the boost module is a charge pump.

[0009] Optionally, the charge pump is specifically a second-order voltage-doubling charge pump.

[0010] Optionally, the anti-backflow module includes a first PMOS tube, whose gate is connected to the source pin, whose source serves as the input end of the anti-backflow module, and whose drain serves as the output end of the anti-backflow module, and the substrate of the first PMOS tube is connected to its own source.

[0011] Optionally, the anti-backflow module includes a second PMOS tube, whose gate is connected to the source pin, whose source serves as the input end of the anti-backflow module, whose drain serves as the output end of the anti-backflow module, and whose substrate is connected to the one with the largest voltage between its own source and its own drain.

[0012] Optionally, the pull-down module includes a pull-down resistor, an input end of the pull-down resistor is connected to the gate of the NMOS tube, and an output end of the pull-down resistor is connected to the source of the NMOS tube.

[0013] Optionally, the resistance of the pull-down resistor is greater than or equal to a first threshold, and the first threshold is used to represent a minimum resistance for maintaining normal driving of the NMOS tube.

[0014] Optionally, a difference between the power supply voltage and a high level of the switch control signal is smaller than a second threshold, and the second threshold is used to characterize a minimum operating voltage of the boost module.

[0015] The technical solution of the present invention further provides a circuit system, including the switch chip.

[0016] The technical solution of the present invention further provides an electronic device, comprising the circuit system.

[0017] Compared with the prior art, the technical solution provided by the present invention has the following beneficial effects: The switch chip provided by the technical solution of the present invention realizes the function of the high-side switch by integrating the NMOS tube, compared with the high-side switch chip integrating the PMOS tube, so the chip area is greatly reduced under the same conduction impedance, thereby reducing the circuit cost of the switch chip. At the same time, by making the ground terminal of the boost module reuse as the input control terminal of the boost module, the switch chip can be compatible with the existing PMOS tube high-side switch chip without additionally setting the ground terminal pin, thereby improving the compatibility of the switch chip and further reducing the application cost of the switch chip. In addition, the boost module outputs the boost voltage according to the difference between the external power supply voltage and the external switch control signal, so the conduction of the boost module to the NMOS tube is independent of the parameters of the internal circuit of the boost module. Compared with the existing high-side switch chip integrating the NMOS tube, the switch chip of the present invention does not need to redesign the boost module in different application scenarios, thereby further reducing the application cost of the switch chip.

[0018] At the same time, the anti-backflow module and the pull-down module ensure that the NMOS tube is completely turned off when the switch control signal is at a high level, thereby ensuring that the NMOS tube can be turned off and achieving zero standby power consumption when turned off. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 Schematic diagram of the circuit structure of the switch chip provided in the embodiment of the present invention Figure 1 ; Figure 2 Schematic diagram of the circuit structure of the switch chip provided in the embodiment of the present invention Figure 2 . DETAILED DESCRIPTION

[0020] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments in the present invention, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present invention. The terms "gate", "source", "drain", "fourth", etc. (if any) in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described here can be implemented in an order other than those illustrated or described here. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0021] The high-side switch specifically refers to a switch set between the power supply voltage and the load, which is used to control the on-off between the power supply voltage and the load. If a PMOS tube is set as a high-side switch, the high-side switch can be turned on by pulling the gate voltage of the PMOS tube down to the ground. If an NMOS tube is set as a high-side switch, a voltage higher than the power supply voltage needs to be applied to the gate of the NMOS tube to turn on the high-side switch, so a boost circuit needs to be additionally provided for the high-side switch of the NMOS tube. Although setting an NMOS tube as a high-side switch requires an additional boost circuit to increase the complexity of the circuit, under the same withstand voltage value and the same impedance, the size of the PMOS tube is as high as 2-3.5 times that of the NMOS tube, so technicians in this field are still willing to choose NMOS tubes as high-side switches.

[0022] However, NMOS tubes still have the following problems when used as high-side switches: 1. When the high-side switch of the PMOS tube needs to be replaced with the high-side switch of the NMOS tube, because an additional boost circuit needs to be set inside the high-side switch of the NMOS tube, and the boost circuit needs a ground terminal, it is necessary to set an additional ground pin for the high-side switch of the NMOS tube on the basis of the original high-side switch when replacing the switch, that is, the existing high-side switch of the NMOS tube and the existing high-side switch of the PMOS tube are not compatible in terms of pin architecture, thereby increasing the application cost of the high-side switch that replaces the NMOS tube.

[0023] 2. In different application scenarios, the existing NMOS tube high-side switch needs to adjust the parameters of the internal devices of the boost circuit to ensure that the voltage output by the boost circuit can completely turn on the NMOS tube, thereby increasing the application cost of the NMOS tube high-side switch in different application scenarios.

[0024] In view of this, an embodiment of the present invention provides a new switch chip to greatly reduce the application cost of the switch chip as a high-side switch in different application scenarios.

[0025] in, Figure 1 Schematic diagram of the circuit structure of the switch chip provided in the embodiment of the present invention Figure 1 .

[0026] Please refer to Figure 1 , the switch chip provided by the embodiment of the present invention includes: A gate pin G, a source pin S and a drain pin D, wherein the gate pin G is connected to a switch control signal V1, the source pin S is connected to a power supply voltage VDD, and the drain pin D is connected to a load; A boost module, whose ground terminal AGND is connected to the gate pin G, and whose power terminal AVDD is connected to the source pin S, and the boost module is used to boost the difference between the power supply voltage VDD and the switch control signal V1, and output a corresponding boost voltage VGC; An anti-backflow module 20, whose input end is connected to the output end of the boost module, and the anti-backflow module 20 is used to: completely cut off the connection between its own input end and output end when the switch control signal V1 is at a high level; and establish a connection between its own input end and output end when the switch control signal V1 is at a low level; NMOS tube M1, whose drain is connected to the source pin S, whose gate is connected to the output end of the anti-backflow module 20, and whose source is connected to the drain pin D; A pull-down module 30, which is used to pull down the gate voltage of the NMOS tube M1 to the source voltage of the NMOS tube M1 when the switch control signal V1 is at a high level; The boost module, the anti-backflow module 20 , the NMOS transistor M1 and the pull-down module 30 are all integrated in the same chip.

[0027] The pin settings of the existing high-side switch of the PMOS tube specifically include: a gate pin G, a source pin S, and a drain pin D to correspond to the gate, source, and drain of the PMOS tube respectively. The gate pin G of the high-side switch of the PMOS tube is connected to the PWM pulse signal to drive the PMOS tube to turn on or off; its source pin S is connected to the power supply voltage VDD; and its drain pin D is connected to the input end of the load.

[0028] In order to make the pin architecture of the switch chip of the embodiment of the present invention compatible with the high-side switch of the existing PMOS tube, the present invention multiplexes the ground terminal AGND of the boost module inside the switch chip as the input control terminal and connects it to the gate pin G of the switch chip, thereby avoiding the need to set up an additional ground terminal AGND pin for the ground terminal AGND of the boost module. In addition, the power supply terminal AVDD of the boost module is connected to the source pin S of the switch chip. When the source pin S of the switch chip of the present invention is connected to the power supply voltage VDD and the gate pin G is connected to the switch control signal V1, the boost module will directly boost the voltage according to the difference between the power supply voltage VDD and the switch control signal V1, and output the corresponding boost voltage VGC.

[0029] If the switch control signal V1 is at a low level, the boost voltage VGC is boosted to be greater than the power supply voltage VDD. For example, if the power supply voltage VDD is 5V and the switch control signal V1 is at a low level, the boost module will increase the difference of 5V to 8V-10V according to its own boosting capability. At this time, the anti-backflow module 20 establishes a connection between its own input and output ends, and outputs the boost voltage VGC to the gate of the NMOS tube M1 to turn on the NMOS tube M1.

[0030] If the switch control signal V1 is at a high level, the boost voltage VGC is approximately equal to the power supply voltage VDD. At this time, the anti-backflow module 20 completely cuts off the connection between its input and output terminals. The pull-down module 30 pulls down the gate voltage of the NMOS tube M1 to the source voltage of the NMOS tube M1 to turn off the NMOS tube M1.

[0031] Therefore, through the above-mentioned technical means, the switch chip provided in the embodiment of the present invention is based on the integrated NMOS tube M1, and the control method of the switch chip is completely equivalent to the high-side switch of the existing PMOS tube, thereby being compatible with the pin architecture of the high-side switch of the existing PMOS tube, thereby reducing the application cost of the switch chip.

[0032] In addition, the boost module of the switch chip outputs a boost voltage VGC based on the difference between the external input power supply voltage VDD and the external input switch control signal V1. Therefore, the conduction of the NMOS tube M1 by the boost module is independent of the parameters of the internal circuit of the boost module. Compared with the existing high-side switch chip integrating the NMOS tube M1, the switch chip of the present invention does not need to redesign the boost module in different application scenarios, thereby further reducing the application cost of the switch chip.

[0033] Finally, the anti-backflow module 20 and the pull-down module 30 ensure that the NMOS tube M1 is completely turned off when the switch control signal V1 is at a high level, thereby ensuring that the NMOS tube can be turned off and achieving zero standby power consumption when turned off.

[0034] In order to make the above-mentioned objects, features and beneficial effects of the present invention more obvious and easy to understand, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0035] Please refer to Figure 1 As a specific implementation, the boost module is a charge pump circuit, and the charge pump circuit is specifically a second-order voltage doubler charge pump. The power supply terminal AVDD of the second-order voltage doubler charge pump inputs the power supply voltage VDD connected to the source pin S, and the ground terminal AGND of the second-order voltage doubler charge pump is used as the input control terminal and inputs the switch control signal V1 connected to the gate pin G, so as to realize the multiplexing of the ground terminal AGND and the input control terminal of the second-order voltage doubler charge pump, so that the switch chip does not need to set an additional ground terminal AGND pin for the ground terminal AGND, so that the switch chip of the embodiment of the present invention is compatible with the pin architecture of the existing PMOS tube switch chip, thereby reducing the application cost of the switch chip.

[0036] Since the second-order voltage doubling charge pump is a common technical means in this field, its specific circuit structure is not described here. Of course, in addition to the second-order voltage doubling charge pump, the boost module can also select other types of charge pumps, which are not limited here.

[0037] in, Figure 2 Schematic diagram of the circuit structure of the switch chip provided in the embodiment of the present invention Figure 2 .

[0038] Please refer to Figure 2 As a specific implementation, the anti-backflow module 20 includes a first PMOS tube M2, whose gate is connected to the source pin S, whose source serves as the input end of the anti-backflow module 20, and whose drain serves as the output end of the anti-backflow module 20, and the substrate of the first PMOS tube M2 is connected to its own source.

[0039] The pull-down module 30 includes a pull-down resistor R1. If the resistance of the pull-down resistor R1 is too small, the pull-down resistor R1 will divide a large current, thereby affecting the charging of the gate voltage of the NMOS tube M1, and further affecting the conduction of the NMOS tube M1. Therefore, it is necessary to set the resistance of the pull-down resistor R1 to be greater than or equal to the first threshold value to ensure that the pull-down resistor R1 does not affect the normal conduction of the NMOS tube M1.

[0040] The first threshold is used to characterize the minimum resistance value for maintaining the normal driving of the NMOS tube. For example, if the boost module can provide a driving current of 1 mA, the calculation formula of the first threshold is as follows: Rth = VGC / 10μA; Formula (1) wherein Rth is used to characterize the first threshold; VGC is used to characterize the gate-source voltage of the switch NMOS tube.

[0041] When the gate-source voltage of the NMOS tube is equal to 10V, the first threshold is set to 1MΩ. Of course, the specific value of the first threshold is related to the driving capability of the boost module and the gate-source voltage of the NMOS tube, and is not limited here.

[0042] Please refer to Figure 2 , the working principle of the anti-backflow module 20 and the pull-down module 30 is described below by taking the power supply voltage VDD as 5V, the boost module as a second-order voltage doubler charge pump, and the high and low levels of the switch control signal V1 as 5V and 0V respectively as an example: When the switch control signal V1 is at a low level, the voltage difference between the power supply terminal AVDD and the ground terminal AGND of the boost module is 5V, and the boost module boosts the voltage difference and outputs a 10V boost voltage VGC to the source of the first PMOS tube M2, and the gate of the first PMOS tube M2 is connected to the 5V power supply voltage VDD, so the source-gate voltage difference of the first PMOS tube M2 is 5V, which is greater than the threshold voltage of the first PMOS tube M2 and turns on the first PMOS tube M2. Because the drain of the first PMOS tube M2 is connected to the gate of the NMOS tube M1, the boost voltage VGC acts on the gate of the NMOS tube M1 to turn on the NMOS tube M1. Since the boost voltage VGC has a strong driving capability at this time, the gate voltage of the NMOS tube M1 will not be pulled down to the source voltage of the NMOS tube M1 by the pull-down resistor R1, so the pull-down resistor R1 does not work.

[0043] When the switch control signal V1 is at a high level, the voltage difference between the power supply terminal AVDD and the ground terminal AGND of the boost module is 0V. This voltage difference is less than the normal working voltage of the boost module, so the boost module outputs a boost voltage VGC of approximately 5V to the source of the first PMOS tube M2. The gate of the first PMOS tube M2 is connected to the 5V power supply voltage VDD, so the source-gate voltage difference of the first PMOS tube M2 is approximately 0V, which is less than the threshold voltage of the first PMOS tube M2 and turns off the first PMOS tube M2. Because the positive electrode of the body diode of the first PMOS tube M2 is connected to its own drain, and the negative electrode of the body diode of the first PMOS tube M2 is connected to its own source. Therefore, when the first PMOS tube M2 is turned off, the boost voltage VGC will not be transmitted from its own source to its own drain through the body diode of the first PMOS tube M2, so as to prevent the boost voltage VGC from acting on the gate of the NMOS tube M1, so that the output end of the boost module and the gate of the NMOS tube M1 are completely isolated. At this time, since the gate of the NMOS tube M1 is in a suspended state, the pull-down resistor R1 will pull the gate voltage of the NMOS tube M1 down to its own source voltage, that is, the gate-source voltage of the NMOS is approximately 0V, thereby ensuring that the NMOS tube M1 is turned off.

[0044] Of course, in addition to the first PMOS tube M2 mentioned above, other PMOS tube switch circuits with anti-backflow function in the anti-backflow module 20 are also within the protection scope of the present invention and are not limited here.

[0045] As a specific implementation, the switch control signal V1 is a periodic PWM pulse signal, and the difference between the high level of the PWM pulse signal and the voltage value of the power supply voltage VDD is smaller than a second threshold, and the second threshold is used to represent the minimum operating voltage of the boost module.

[0046] As can be seen from the above, when the PWM pulse signal is at a high level, the boost module will output a boost voltage VGC that is similar to the power supply voltage VDD, which means that the boost module does not work. And because the boost module can only work normally when the voltage difference between its own power supply terminal AVDD and the ground terminal AGND is greater than a certain threshold. Therefore, by setting the difference between the high level of the PWM pulse signal and the power supply voltage VDD to be less than the threshold, it is ensured that the boost module does not work when the PWM pulse signal is at a high level, and further ensures that the anti-backflow module 20 works, so that the pull-down module 30 turns off the NMOS tube M1.

[0047] In summary, the switch chip provided in the embodiment of the present invention realizes the function of the high-side switch by integrating the NMOS tube, which greatly reduces the chip area compared to the existing switch chip of the PMOS tube, thereby reducing the circuit cost of the switch chip. At the same time, the switch chip provided in the embodiment of the present invention also reuses the ground terminal of the boost module as the input control terminal, so that the switch chip can be compatible with the existing PMOS tube high-side switch chip without additionally setting the ground terminal pin, thereby improving the compatibility of the switch chip and further reducing the application cost of the switch chip. In addition, the boost module outputs the boost voltage according to the difference between the external power supply voltage and the external switch control signal, so the conduction of the boost module to the NMOS tube is independent of the parameters of the internal circuit of the boost module. Compared with the existing high-side switch chip integrated with the NMOS tube, the switch chip of the present invention does not need to redesign the boost module in different application scenarios, thereby further reducing the application cost of the switch chip.

[0048] At the same time, the anti-backflow module and the pull-down module ensure that the NMOS tube is completely turned off when the switch control signal is at a high level, thereby ensuring that the NMOS tube can be turned off and achieving zero standby power consumption when turned off.

[0049] An embodiment of the present invention further provides a circuit system, including the switch chip provided by the embodiment of the present invention.

[0050] An embodiment of the present invention further provides an electronic device, comprising the circuit system provided by the embodiment of the present invention.

[0051] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A switch chip, characterized in that: include: A gate pin, a source pin and a drain pin, wherein the gate pin is connected to a switch control signal, the source pin is connected to a power supply voltage, and the drain pin is connected to a load; A boost module, whose ground terminal is connected to the gate pin, and whose power terminal is connected to the source pin, and the boost module is used to boost the difference between the power supply voltage and the switch control signal, and output a corresponding boost voltage; An anti-backflow module, whose input end is connected to the output end of the boost module, and the anti-backflow module is used to: completely cut off the connection between its own input end and output end when the switch control signal is at a high level; and establish a connection between its own input end and output end when the switch control signal is at a low level; An NMOS tube, whose drain is connected to the source pin, whose gate is connected to the output end of the anti-backflow module, and whose source is connected to the drain pin; A pull-down module, used for pulling down the gate voltage of the NMOS tube to the source voltage of the NMOS tube when the switch control signal is at a high level; The boost module, the anti-backflow module, the NMOS tube and the pull-down module are all integrated in the same chip.

2. The switch chip according to claim 1, characterized in that: The boost module is a charge pump.

3. The switch chip according to claim 2, characterized in that: The charge pump is specifically a second-order voltage-doubling charge pump.

4. The switch chip according to claim 1, characterized in that: The anti-backflow module comprises a first PMOS tube, whose gate is connected to the source pin, whose source serves as the input end of the anti-backflow module, and whose drain serves as the output end of the anti-backflow module. The substrate of the first PMOS tube is connected to its own source.

5. The switch chip according to claim 1, characterized in that: The anti-backflow module includes a second PMOS tube, whose gate is connected to the source pin, whose source serves as the input end of the anti-backflow module, whose drain serves as the output end of the anti-backflow module, and whose substrate is connected to the one with the largest voltage between its own source and its own drain.

6. The switch chip according to claim 1, characterized in that: The pull-down module comprises a pull-down resistor, an input end of the pull-down resistor is connected to the gate of the NMOS tube, and an output end of the pull-down resistor is connected to the source of the NMOS tube.

7. The switch chip according to claim 6, characterized in that: The resistance of the pull-down resistor is greater than or equal to a first threshold, and the first threshold is used to represent a minimum resistance value for maintaining normal driving of the NMOS tube.

8. The switch chip according to claim 1, characterized in that: The difference between the power supply voltage and the high level of the switch control signal is smaller than a second threshold value, and the second threshold value is used to represent the minimum operating voltage of the boost module.

9. A circuit system, characterized in that: A switch chip comprising any one of claims 1 to 8.

10. An electronic device, characterized in that: A circuit system comprising the circuit system of claim 9.

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