Forming method of boss structure, preparation method of MEMS device and MEMS device

Abstract

The invention discloses a forming method of a boss structure, a preparation method of an MEMS (Micro Electro Mechanical System) device and the MEMS device. The forming method of the boss structure comprises the following steps: forming an etching stop layer on a first substrate; forming a first material layer on the etching stop layer; finishing the surface of the first material layer through a trimming process, removing part of the first material layer, enabling the sum of the thickness of the etching stop layer and the thickness of the first material layer to be the design height of the boss structure, and flattening the surface of the first material layer; forming a patterned photoresist layer on the trimmed first material layer; etching the first material layer until the etching stop layer is exposed; etching the etch stop layer until the surface of the first substrate is exposed; the photoresist layer is removed, and the remaining first material layer and the etching stop layer form a plurality of boss structures on the first substrate. According to the method, the height difference of the bosses can be accurately controlled and adjusted, so that the capacitance value stability and the metal bonding stability of the MEMS device are improved.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor device manufacturing, and in particular to a method for forming a boss structure, a method for preparing a MEMS device, and a MEMS device. Background Art

[0002] MEMS (micro-electro-mechanical system) accelerometers and gyroscopes are very susceptible to dust, water vapor, mechanical factors and other factors during the dicing and packaging process due to their movable microstructures, which may cause device damage or device performance degradation. Therefore, MEMS accelerometers and gyroscopes require airtight packaging to prevent damage to the movable microstructures, and at the same time, maintain a stable gas damping coefficient to improve device performance.

[0003] The aluminum-germanium eutectic bonding process is often used in the production of MEMS accelerometers and gyroscopes. Taking the MEMS gyroscope as an example, its production process is as follows: Figure 1-Figure 3 As shown, first, a cap wafer is provided, the cap wafer has an opening, an oxide layer is deposited on the surface of the cap wafer, a device wafer is bonded to the cap wafer, a cavity is formed between the device wafer and the cap wafer, and the structure after bonding is as shown in FIG. Figure 1 As shown; then the top surface of the device wafer is thinned, a boss structure is directly etched on the top surface of the device wafer, and then a germanium layer of a certain thickness is formed on the boss through deposition and patterning processes, and then the device wafer above the cavity is etched to form an interdigitated electrode structure. The structure formed is as shown Figure 2 After that, the structure is flipped over and the germanium layer on the boss is bonded to the aluminum layer on the top surface of the substrate wafer. The device structure is as shown in FIG. Figure 3 shown.

[0004] The capacitance stability of a capacitive MEMS accelerometer or gyroscope refers to the ability of the accelerometer to maintain a constant capacitance value during the measurement process. Capacitance stability is critical to the performance and accuracy of the accelerometer or gyroscope, because changes in capacitance value will directly affect the output signal of the accelerometer. How to improve its stability is related to product yield and production cost.

[0005] In existing technologies, the capacitance stability of capacitive MEMS accelerometers or gyroscopes is affected by many factors, including temperature, humidity, pressure, electromagnetic interference, etc. In order to improve the capacitance stability, advanced manufacturing processes can be used to improve the accuracy and consistency of capacitors and to perform strict calibration and testing during the production process to ensure that the capacitance value is within the specified range. The height difference of the boss will have a certain impact on the capacitance. The greater the height difference of the boss, the greater the distance between the electrodes ( Figure 3As the distance h) from the end of the middle finger electrode to the top metal on the substrate wafer increases, the capacitance value will decrease. This is because the capacitance value is proportional to the area between the electrodes and inversely proportional to the distance. However, it is currently difficult to accurately control the height difference of the bosses from the etching process alone, which is not conducive to the stability of metal bonding and cannot ensure the stability of the capacitance value of the MEMS device. Summary of the invention

[0006] The purpose of the present invention is to provide a method for forming a boss structure, a method for preparing a MEMS device and a MEMS device, so as to achieve precise control and adjustment of the boss height difference, thereby improving the capacitance stability and metal bonding stability of the MEMS device.

[0007] In order to achieve the above object, in a first aspect, the present invention provides a method for forming a boss structure, comprising:

[0008] forming an etch stop layer on the first substrate;

[0009] forming a first material layer on the etch stop layer;

[0010] trimming the surface of the first material layer by a trimming process, removing part of the first material layer, making the sum of the thickness of the etch stop layer and the thickness of the first material layer equal to the designed height of the boss structure, and flattening the surface of the first material layer;

[0011] forming a patterned photoresist layer on the trimmed first material layer;

[0012] Etching the first material layer until the etch stop layer is exposed;

[0013] Etching the etch stop layer until a surface of the first substrate is exposed;

[0014] The photoresist layer is removed, and the remaining first material layer and the etch stop layer form a plurality of boss structures on the first substrate.

[0015] Optionally, the hardness of the material of the first material layer is greater than the hardness of the material of the first substrate.

[0016] Optionally, the material of the first material layer is a metal material or a semiconductor material;

[0017] Wherein, the metal material includes tungsten, and the semiconductor material includes silicon oxide and silicon nitride.

[0018] Optionally, the first substrate material is silicon, and the first material layer material is tungsten.

[0019] Optionally, the material of the etch stop layer is titanium nitride.

[0020] Optionally, the thickness of the first material layer is greater than the thickness of the etch stop layer.

[0021] Optionally, after forming the etch stop layer on the first substrate, the method further includes:

[0022] measuring the actual thickness of the etch stop layer;

[0023] After forming the first material layer on the etch stop layer, the method further includes:

[0024] The actual thickness of the first material layer is measured.

[0025] Optionally, before trimming the surface of the first material layer by a trimming process to remove a portion of the first material layer, the method further includes:

[0026] The difference between the sum of the actual thickness of the etch stop layer and the actual thickness of the first material layer and the designed height of the boss structure is calculated to obtain the thickness of the first material layer that needs to be removed in the trimming process.

[0027] Optionally, after trimming the surface of the first material layer by a trimming process to remove a portion of the first material layer, the method further includes:

[0028] The actual thickness of the trimmed first material layer is measured to determine whether the actual thickness of the first material layer reaches the expected thickness value.

[0029] Optionally, the trimming process adopts an Ion Beam trimming process.

[0030] In a second aspect, the present invention provides a boss structure, comprising a substrate and a plurality of bosses spaced apart and distributed on the substrate;

[0031] The boss includes an etch stop layer located on the surface of the substrate and a first material layer located on the etch stop layer.

[0032] Optionally, the hardness of the material of the first material layer is greater than the hardness of the material of the substrate.

[0033] Optionally, the material of the first material layer is a metal material or a semiconductor material;

[0034] Wherein, the metal material includes tungsten, and the semiconductor material includes silicon oxide and silicon nitride.

[0035] Optionally, the material of the etch stop layer is titanium nitride.

[0036] Optionally, the thickness of the first material layer is greater than the thickness of the etch stop layer.

[0037] Optionally, the substrate includes a cap wafer and a device wafer, a plurality of openings are formed on the front side of the cap wafer, the front side of the device wafer is bonded to the front side of the cap wafer, and the device wafer closes the openings to form a cavity; the boss is located on the back side of the device wafer and in the peripheral area of ​​the cavity.

[0038] In a third aspect, the present invention provides a method for preparing a MEMS device, comprising:

[0039] Providing a second substrate, the second substrate comprising a cap wafer and a device wafer, a plurality of openings being formed on the front side of the cap wafer, the front side of the device wafer being bonded to the front side of the cap wafer, and the device wafer closing the openings to form a cavity;

[0040] Using the method for forming a boss structure described in the first aspect, a plurality of boss structures are formed on the back side of the device wafer;

[0041] forming a first metal bonding layer on the surface of the boss structure;

[0042] forming an interdigitated electrode structure in the device wafer, wherein the interdigitated electrode structure is located above the cavity;

[0043] Providing a base wafer, wherein an insulating layer is formed on the front side of the base wafer, a wiring layer is formed in the insulating layer, a second metal bonding layer corresponding to the boss structure is formed on the insulating layer, and the second metal bonding layer is connected to the wiring layer;

[0044] The back side of the device wafer is bonded to the front side of the base wafer through the first metal bonding layer and the second metal bonding layer.

[0045] In a fourth aspect, the present invention provides a MEMS device, wherein the MEMS device is obtained by using the method for preparing the MEMS device described in the second aspect.

[0046] The beneficial effects of the present invention are:

[0047] The method for forming a boss structure of the present invention first forms an etch stop layer and a first material layer on the first substrate in sequence, then trims the surface of the first material layer through a trimming process, removes part of the first material layer, makes the sum of the thickness of the etch stop layer and the thickness of the first material layer equal to the designed height of the boss structure, and simultaneously realizes the flatness of the surface of the first material layer, then forms a patterned photoresist layer on the trimmed first material layer, etches the first material layer until the etch stop layer is exposed, and then etches the etch stop layer until the surface of the first substrate is exposed, after removing the photoresist layer, a plurality of boss structures are formed on the first substrate, compared with the existing manufacturing method of directly etching the substrate material to form the boss structure, the present invention forms the protruding structure by depositing material on the substrate and etching, and can realize precise control and adjustment of the height difference of the boss structure by adding the etch stop layer scheme and the trimming process, thereby improving the uniformity of the height difference of the boss on the whole wafer, which is beneficial to improving the stability of subsequent metal bonding.

[0048] Furthermore, in the MEMS device preparation method of the present invention, since the boss structure forming method of the present invention is used to prepare the boss structure on the back side of the device wafer, the height difference of the steps on the wafer surface can be precisely controlled to ensure the accuracy of the distance between the bonding electrodes of the device wafer and the substrate wafer, thereby effectively ensuring the stability of the device capacitance value and improving the yield and product quality. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0050] Figure 1-Figure 3 The figure is a schematic diagram of the device structure corresponding to each step in the existing MEMS gyroscope manufacturing process.

[0051] Figure 4-Figure 10 The present invention is a schematic diagram of a device structure corresponding to each step of a method for forming a boss structure according to an embodiment of the present invention.

[0052] Fig.11 It is a schematic diagram of a boss structure according to an embodiment of the present invention.

[0053] Figure 12-Figure 22 The present invention is a schematic diagram of a device structure corresponding to each step of a method for preparing a MEMS device according to an embodiment of the present invention. DETAILED DESCRIPTION

[0054] The following is a further detailed description of a filter chip packaging structure and a wafer-level packaging method of the present invention in combination with the accompanying drawings and specific embodiments. According to the following description and drawings, the advantages and features of the present invention will be clearer. However, it should be noted that the concept of the technical solution of the present invention can be implemented in a variety of different forms and is not limited to the specific embodiments described herein. The drawings are all in a very simplified form and are not in precise proportions, which are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention.

[0055] The terms "first", "second", etc. in the specification and claims are used to distinguish between similar elements and are not necessarily used to describe a specific order or time sequence. It is to be understood that, where appropriate, these terms used in this way are interchangeable, for example, so that the embodiments of the invention described herein can be operated in an order other than that described or shown herein. Similarly, if the method described herein includes a series of steps, the order of these steps presented herein is not necessarily the only order in which these steps can be performed, and some of the steps described may be omitted and / or some other steps not described herein may be added to the method. If the components in a certain figure are the same as the components in other figures, although these components can be easily identified in all figures, in order to make the description of the figures clearer, this specification will not mark all the same component numbers in each figure.

[0056] Example 1

[0057] like Figure 4-Figure 10 As shown, this embodiment provides a method for forming a boss structure, comprising:

[0058] S101: Reference Figure 4 , forming an etching stop layer 2 on the first substrate 1;

[0059] In this embodiment, the material of the first substrate 1 is silicon.

[0060] Preferably, the material of the etch stop layer 2 in this embodiment is titanium nitride. In this step, a deposition process can be used to deposit titanium nitride of a set thickness on the first substrate 1 as the etch stop layer 2. After the etch stop layer 2 is deposited, the actual thickness of the etch stop layer 2 is measured (pre-value measurement), assuming that the actual thickness of the etch stop layer 2 measured is consistent with the deposition thickness x (μm) set by the deposition process.

[0061] S102: Reference Figure 5 , forming a first material layer 3 on the etch stop layer 2;

[0062] Preferably, the hardness of the material of the first material layer 3 is greater than the hardness of the material of the first substrate 1; the material of the first material layer 3 may be a metal material or a semiconductor material, wherein the metal material includes tungsten, and the semiconductor material includes silicon oxide and silicon nitride.

[0063] In this embodiment, the material of the first material layer 3 is preferably tungsten. Meanwhile, the thickness of the first material layer 3 is greater than the thickness of the etching stop layer 2 .

[0064] In this step, a thicker layer of metal tungsten (Mohs hardness of tungsten is 7.5, and Mohs hardness of silicon is 6.5) is deposited on the thinner first etch stop layer 2 through a deposition process to form a first material layer 3, and then the actual thickness of the first material layer 3 is measured (previous value measurement), assuming that the actual thickness of the first material layer 3 measured is consistent with the deposition thickness y (μm) set by the deposition process, y>x.

[0065] In this embodiment, before executing step S103, the process further includes:

[0066] The difference between the sum of the actual thickness of the etch stop layer 2 and the actual thickness of the first material layer 3 and the designed height of the boss structure is calculated to obtain the thickness of the first material layer 3 that needs to be removed in the trimming process.

[0067] That is, before performing the trimming process, it is necessary to calculate the thickness of the first material layer 3 that needs to be removed by trimming based on the designed height of the boss structure, the actual thickness of the etch stop layer 2 and the actual thickness of the first material layer 3. For example, if the height of the boss structure is z (μm), then the thickness of the first material layer 3 that needs to be removed is k=x+yz.

[0068] S103: Reference Figure 6 , trimming the surface of the first material layer 3 by a trimming process, removing part of the first material layer 3, making the sum of the thickness of the etch stop layer 2 and the thickness of the first material layer 3 equal to the designed height of the boss structure, and flattening the surface of the first material layer 3;

[0069] After trimming the surface of the first material layer 3 by a trimming process and removing a portion of the first material layer 3, the method further includes:

[0070] The actual thickness of the trimmed first material layer 3 is measured (post-value measurement) to determine whether the actual thickness of the first material layer 3 reaches the expected thickness value.

[0071] Preferably, the trimming process of this embodiment adopts the Ion Beam trimming process. The thickness of the first material layer 3 is precisely adjusted by the trimming process, and the first material layer 3 with a thickness of k (μm) is removed, so that the thickness of the first material layer 3 reaches the expected value, thereby ensuring that the height of the subsequently formed boss structure is consistent with the designed height. At the same time, the trimming process can also complete the flattening of the surface of the first material layer 3, improve the flatness of the boss structure surface and the uniformity of the height difference of the boss structure.

[0072] S104: Reference Figure 7 , forming a patterned photoresist layer 4 on the trimmed first material layer 3;

[0073] In this step, a photoresist is spin-coated on the first material layer 3 , and then the photoresist is exposed and developed to complete patterning, thereby forming a patterned photoresist layer 4 on the first material layer 3 , which serves as a mask for subsequent etching of the first material layer 3 .

[0074] S105: Reference Figure 8 , etching the first material layer 3 until the etching stop layer 2 is exposed;

[0075] In this step, the first material layer 3 (metal tungsten) is preferably etched by a wet etching process, and SF 6 The chemical solution etches the metal tungsten layer, and the etching stops at the etching stop layer 2 (titanium nitride interface).

[0076] S106: Reference Fig. 9 , etching the etch stop layer 2 until the surface of the first substrate 1 is exposed;

[0077] In this step, a dry etching process is preferably used to etch the etching stop layer 2 (titanium carbide), and the etching stops at the surface of the first material layer 3 (silicon interface).

[0078] S107: Reference Fig.10 , the photoresist layer 4 is removed, and the remaining first material layer 3 and the etch stop layer 2 form a plurality of boss structures on the first substrate 1 .

[0079] In this step, the residual photoresist layer 4 on the first material layer 3 can be removed by a common stripping process, thereby obtaining a highly precisely controlled boss structure (composed of the remaining first material layer 3 and the etch stop layer 2).

[0080] Compared with the existing manufacturing method of directly etching the substrate material to form a boss structure, this method forms a raised structure by depositing materials on the substrate and etching. This method can achieve precise control and adjustment of the height difference of the boss structure by adding an etch stop layer 2 scheme combined with the trimming process, thereby improving the uniformity of the step height difference of the entire wafer, which is beneficial to improving the stability of subsequent metal bonding.

[0081] It should be noted that the method of this embodiment can be applied to any process scenario that requires the formation of a boss structure for metal bonding between wafers. At the same time, the first substrate 1 in this embodiment can be any suitable base material well known to those skilled in the art, for example, it can be at least one of the following materials: silicon (Si), germanium (Ge), silicon germanium (SiGe), carbon silicon (SiC), carbon germanium silicon (SiGeC), indium arsenide (InAs), gallium arsenide (GaAs), indium phosphide (InP) or other III / V compound semiconductors, including multilayer structures composed of these semiconductors, or silicon on insulator (SOI), stacked silicon on insulator (SSOI), stacked silicon germanium on insulator (S-SiGeOI), silicon germanium on insulator (SiGeOI) and germanium on insulator (GeOI), or it can also be double-sided polished silicon wafers (Double Side Polished Wafers, DSP), or it can be a ceramic substrate such as alumina, a quartz or glass substrate, etc.

[0082] Example 2

[0083] like Fig.11 As shown, this embodiment provides a boss structure, including a substrate 300 and a plurality of bosses spaced apart and distributed on the substrate;

[0084] The boss includes an etch stop layer 2 located on the surface of the substrate and a first material layer 3 located on the etch stop layer.

[0085] In this embodiment, the hardness of the material of the first material layer 3 is greater than the hardness of the material of the substrate 300 , and the thickness of the first material layer 3 is greater than the thickness of the etching stop layer 2 .

[0086] Optionally, the material of the first material layer 3 is a metal material or a semiconductor material; wherein the metal material includes tungsten, and the semiconductor material includes silicon oxide and silicon nitride.

[0087] In this embodiment, the material of the first material layer 3 is preferably metal tungsten, the material of the etch stop layer 2 is preferably titanium nitride, and the material of the substrate 300 is preferably silicon.

[0088] In this embodiment, a deposition process can be used to sequentially deposit a titanium carbide layer and a metal tungsten layer on the substrate 300 to form an etch stop layer 2 and a first material layer 3, respectively. Then, a trimming process is used to trim the surface of the first material layer 3 to remove part of the first material layer so that the sum of the thickness of the etch stop layer 2 and the thickness of the first material layer 3 is the designed height of the boss, and the surface of the first material layer 3 is flattened. Thereafter, the first material layer 3 and the etch stop layer 2 are sequentially etched through an etching process to finally form a boss on the substrate 300.

[0089] In this embodiment, the substrate 300 includes a cap wafer 301 and a device wafer 302. The front side of the cap wafer 301 is formed with multiple openings. The front side of the device wafer 302 is bonded to the front side of the cap wafer 301. The device wafer 302 closes the openings to form a cavity. The boss is located on the back side of the device wafer and in the peripheral area of ​​the cavity.

[0090] The boss structure of this embodiment has good uniformity of step height difference on the entire wafer, which is beneficial to improving the stability of subsequent metal bonding.

[0091] In other embodiments, the substrate 300 may be any suitable base material known to those skilled in the art, for example, at least one of the following materials: silicon (Si), germanium (Ge), silicon germanium (SiGe), carbon silicon (SiC), carbon germanium silicon (SiGeC), indium arsenide (InAs), gallium arsenide (GaAs), indium phosphide (InP) or other III / V compound semiconductors, including multilayer structures composed of these semiconductors, or silicon on insulator (SOI), stacked silicon on insulator (SSOI), stacked silicon germanium on insulator (S-SiGeOI), silicon germanium on insulator (SiGeOI) and germanium on insulator (GeOI), or double-sided polished silicon wafers (Double Side Polished Wafers, DSP), or ceramic substrates such as alumina, quartz or glass substrates, etc.

[0092] Example 3

[0093] like Figure 12-Figure 22 As shown, this embodiment provides a method for preparing a MEMS device, comprising:

[0094] S101: Provide a second substrate 100, such as Fig.12As shown, the second substrate 100 includes a cap wafer 101 and a device wafer 102. The cap wafer 101 has a plurality of openings formed on its front side. The front side of the cap wafer 101 is covered with a dielectric layer 103 for bonding. The material of the dielectric layer 103 can be any suitable dielectric material, including but not limited to at least one of silicon oxide, silicon nitride, silicon oxynitride, silicon carbonitride, etc. In this embodiment, silicon oxide is used. The front side of the device wafer 102 is bonded to the front side of the cap wafer 101, and the device wafer 102 closes the openings to form a cavity.

[0095] S102: Figure 13-Figure 18 As shown, a plurality of boss structures are formed on the back side of the device wafer 102 using the boss structure forming method described in Example 1;

[0096] Specifically, refer to Fig.13 , forming an etch stop layer 2 on the back side of the device wafer 102, and then forming a first material layer 3 on the etch stop layer 2;

[0097] refer to Fig.14 , trimming the surface of the first material layer 3 by a trimming process, removing part of the first material layer 3, making the sum of the thickness of the etch stop layer 2 and the thickness of the first material layer 3 equal to the designed height of the boss structure, and flattening the surface of the first material layer 3;

[0098] refer to Fig.15 , forming a patterned photoresist layer 4 on the trimmed first material layer 3;

[0099] refer to Fig.16 , etching the first material layer 3 until the etching stop layer 2 is exposed;

[0100] refer to Fig.17 , etching the etch stop layer 2 until the surface of the first substrate 1 is exposed;

[0101] refer to Fig.18 , the photoresist layer 4 is removed, and the remaining first material layer 3 and the etch stop layer 2 form a plurality of boss structures on the first substrate 1 .

[0102] For the specific process methods and related film layer materials corresponding to each step, please refer to Example 1 and will not be described in detail here.

[0103] S103: Fig.19 As shown, a first metal bonding layer 5 is formed on the surface of the boss structure;

[0104] In this embodiment, the material of the first metal bonding layer 5 is germanium.

[0105] The method of forming the first metal bonding layer 5 includes:

[0106] A germanium layer covering the platform structure and the surface of the device wafer 102 is formed on the back side of the device wafer 102, and then the germanium layer is patterned to remove the germanium layer outside the top surface of the platform structure, leaving only the germanium layer on the top surface of the platform structure to form the first metal bonding layer 5. The germanium layer can be formed by physical vapor deposition such as magnetron sputtering and evaporation or chemical vapor deposition.

[0107] S104: Fig. 20 As shown, an interdigitated electrode structure 6 is formed in the device wafer 102, and the interdigitated electrode structure 6 is located above the cavity;

[0108] The device wafer 102 above the cavity can be etched by an etching process to form an interdigitated electrode structure 6, in which gaps between interdigitated fingers of the interdigitated electrode structure 6 are connected to the cavity; the etching process preferably adopts a dry etching process.

[0109] S105: Fig.21 As shown, a base wafer 200 is provided, an insulating layer 201 is formed on the front side of the base wafer 200, a wiring layer is formed in the insulating layer 201, a second metal bonding layer 202 corresponding to the boss structure is formed on the insulating layer 201, and the second metal bonding layer 202 is connected to the wiring layer;

[0110] In this embodiment, the material of the second metal bonding layer 202 is aluminum, and the position of the second metal bonding layer 202 on the front side of the base wafer 200 corresponds one-to-one to the first metal bonding layer 5 on the protruding structure. The material of the insulating layer 201 can be any suitable dielectric material, including but not limited to at least one of silicon oxide, silicon nitride, silicon oxynitride, silicon carbonitride and the like, and in this embodiment, it is silicon oxide.

[0111] S106: Fig. 22 As shown, the back side of the device wafer 102 is bonded to the front side of the base wafer 200 through the first metal bonding layer 5 and the second metal bonding layer 202 .

[0112] In this embodiment, the first metal layer and the second metal layer may be aligned and bonded together using an aluminum-germanium eutectic bonding process. The MEMS device finally formed in this embodiment may be a capacitive MEMS accelerometer or a gyroscope.

[0113] In the MEMS device preparation method of the present embodiment, since the boss structure forming method of Example 1 is adopted to prepare the boss structure on the back side of the device wafer 102, it is possible to achieve precise control of the height difference of the steps on the surface of the device wafer 102, thereby ensuring the accuracy of the distance between the bonding electrodes of the device wafer 102 and the base wafer 200 (the distance from the end of the fork finger to the top metal of the base wafer 200), thereby effectively ensuring the stability of the device capacitance value and improving the yield and product quality.

[0114] Example 4

[0115] This embodiment provides a MEMS device, and the MEMS device is obtained by using the preparation method of the MEMS device described in Embodiment 3.

[0116] The MEMS device of this embodiment may be a capacitive MEMS accelerometer or gyroscope. Since it is prepared by the method of Embodiment 3, the stability of the capacitance value of the MEMS device is ensured, and the performance of the device and the yield of the product are improved.

[0117] It should be noted that the various embodiments in this specification are described in a related manner, and the same or similar parts between the various embodiments can be referred to each other, and each embodiment focuses on the differences from other embodiments. In particular, for the structural embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment.

[0118] The above description is only a description of the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention. Any changes or modifications made by a person skilled in the art in the field of the present invention based on the above disclosure shall fall within the scope of protection of the claims.

Claims

1. A method for forming a boss structure, characterized in that: include: forming an etch stop layer on the first substrate; forming a first material layer on the etch stop layer; trimming the surface of the first material layer by a trimming process, removing part of the first material layer, making the sum of the thickness of the etch stop layer and the thickness of the first material layer equal to the designed height of the boss structure, and flattening the surface of the first material layer; forming a patterned photoresist layer on the trimmed first material layer; Etching the first material layer until the etch stop layer is exposed; Etching the etch stop layer until a surface of the first substrate is exposed; The photoresist layer is removed, and the remaining first material layer and the etch stop layer form a plurality of boss structures on the first substrate.

2. The method for forming a boss structure according to claim 1, characterized in that: The hardness of the material of the first material layer is greater than the hardness of the material of the first substrate.

3. The method for forming a boss structure according to claim 2, characterized in that: The material of the first material layer is a metal material or a semiconductor material; Wherein, the metal material includes tungsten, and the semiconductor material includes silicon oxide and silicon nitride.

4. The method for forming a boss structure according to claim 2, characterized in that: The material of the first substrate is silicon, and the material of the first material layer is tungsten.

5. The method for forming a boss structure according to claim 4, characterized in that: The material of the etching stop layer is titanium nitride.

6. The method for forming a boss structure according to claim 1, characterized in that: The thickness of the first material layer is greater than the thickness of the etch stop layer.

7. The method for forming a boss structure according to claim 1, characterized in that: After forming an etch stop layer on the first substrate, the method further includes: measuring the actual thickness of the etch stop layer; After forming the first material layer on the etch stop layer, the method further includes: The actual thickness of the first material layer is measured.

8. The method for forming a boss structure according to claim 1, characterized in that: Before trimming the surface of the first material layer by a trimming process to remove a portion of the first material layer, the method further includes: The difference between the sum of the actual thickness of the etch stop layer and the actual thickness of the first material layer and the designed height of the boss structure is calculated to obtain the thickness of the first material layer that needs to be removed in the trimming process.

9. The method for forming a boss structure according to claim 1, characterized in that: After trimming the surface of the first material layer by a trimming process and removing a portion of the first material layer, the method further includes: The actual thickness of the trimmed first material layer is measured to determine whether the actual thickness of the first material layer reaches the expected thickness value.

10. The method for forming a boss structure according to claim 1, characterized in that: The trimming process adopts the Ion Beam trimming process.

11. A boss structure, characterized in that: It includes a substrate and a plurality of bosses spaced apart and located on the substrate; The boss includes an etch stop layer located on the surface of the substrate and a first material layer located on the etch stop layer.

12. The boss structure according to claim 11, characterized in that: The hardness of the material of the first material layer is greater than the hardness of the material of the substrate.

13. The boss structure according to claim 11, characterized in that: The material of the first material layer is a metal material or a semiconductor material; Wherein, the metal material includes tungsten, and the semiconductor material includes silicon oxide and silicon nitride.

14. The boss structure according to claim 11, characterized in that: The material of the etching stop layer is titanium nitride.

15. The boss structure according to claim 11, characterized in that: The thickness of the first material layer is greater than the thickness of the etch stop layer.

16. The boss structure according to claim 11, characterized in that: The substrate includes a cap wafer and a device wafer, a plurality of openings are formed on the front side of the cap wafer, the front side of the device wafer is bonded to the front side of the cap wafer, and the device wafer closes the openings to form a cavity; the boss is located on the back side of the device wafer and in the peripheral area of ​​the cavity.

17. A method for preparing a MEMS device, characterized in that: include: Providing a second substrate, the second substrate comprising a cap wafer and a device wafer, a plurality of openings being formed on the front side of the cap wafer, the front side of the device wafer being bonded to the front side of the cap wafer, and the device wafer closing the openings to form a cavity; Using the method for forming a boss structure according to any one of claims 1 to 10, a plurality of boss structures are formed on the back side of the device wafer; forming a first metal bonding layer on the surface of the boss structure; forming an interdigitated electrode structure in the device wafer, wherein the interdigitated electrode structure is located above the cavity; Providing a base wafer, wherein an insulating layer is formed on the front side of the base wafer, a wiring layer is formed in the insulating layer, a second metal bonding layer corresponding to the boss structure is formed on the insulating layer, and the second metal bonding layer is connected to the wiring layer; The back side of the device wafer is bonded to the front side of the base wafer through the first metal bonding layer and the second metal bonding layer.

18. A MEMS device, characterized in that: The MEMS device is obtained by the preparation method of the MEMS device according to claim 17.

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