Integrated MEMS chip and manufacturing method thereof

Abstract

The invention discloses an integrated MEMS chip and a manufacturing method thereof, and the manufacturing method comprises the steps: forming a first substrate which comprises a first structural layer and a first dielectric film located on the surface of the first structural layer, the first structural layer is provided with a first opening and a second opening which are independent from each other, and the first dielectric film and the first structural layer are made of different materials; an MEMS structure layer is formed on the first substrate, an auxiliary groove facing an opening of the first substrate is formed in the MEMS structure layer, and the groove length of the auxiliary groove is larger than the groove depth; bonding a second substrate on the MEMS structure layer; after the second substrate is bonded, the first substrate is etched from one side opposite to the first dielectric film to form a conductive through hole, and the conductive through hole and the first opening are respectively communicated with the micro-gas channel; air is pumped or fed into the first cavity through the conductive through hole and the micro air channel; and forming a first electric interconnection structure in the conductive through hole, wherein the first electric interconnection structure is connected with the groove bottom of the auxiliary groove. According to the manufacturing method, respective air pressure can be respectively set for different sensors on the same MEMS chip.

Description

Technical Field

[0001] The present invention relates to the technical field of manufacturing methods of integrated MEMS chips, and in particular to an integrated MEMS chip and a manufacturing method thereof. Background Art

[0002] Integrated MEMS chip means integrating multiple sensors with different functions on the same MEMS chip. This integration trend can not only reduce the physical size of the system and reduce power consumption, but also improve the reliability and performance of the overall system.

[0003] Some sensor structures integrated on MEMS chips need to work in a closed cavity structure, and wafer bonding is usually used to package the sensor in a closed cavity. However, sensors with different functions require different cavity pressures, and wafer bonding can only achieve a given cavity pressure, and it is impossible to set the pressure for different sensor structures integrated on the same wafer. Summary of the invention

[0004] The technical problem solved by the present invention is to provide an integrated MEMS chip and a manufacturing method thereof, and to respectively set respective air pressures for different sensors on the same MEMS chip.

[0005] In order to solve the above technical problems, the technical solution of the present invention provides a method for manufacturing an integrated MEMS chip, comprising: forming a first substrate, the first substrate comprising a first structural layer, and a first dielectric film located on the surface of the first structural layer, the first structural layer having a first opening and a second opening independent of each other, and the first dielectric film and the first structural layer are made of different materials; forming a MEMS structural layer on the first substrate, the MEMS structural layer having an auxiliary groove opening toward the first substrate, the groove length of the auxiliary groove being greater than the groove depth, and the first dielectric film and the auxiliary groove enclosing a micro gas channel; bonding a second substrate on the MEMS structural layer to seal the first opening and The second opening forms a first cavity and a second cavity that are independent of each other; after bonding the second substrate, the first substrate is etched from the side opposite to the first dielectric film to form a conductive through hole independent of the first opening and the second opening in the first substrate, and the conductive through hole and the first opening are respectively connected to the micro-air channel; air is evacuated or introduced into the first cavity through the conductive through hole and the micro-air channel, so that the air pressure in the first cavity is different from the air pressure in the second cavity; a first electrical interconnection structure is formed in the micro-air channel between the bottom of the conductive through hole and the bottom of the auxiliary groove, and in the conductive through hole, and the first electrical interconnection structure is connected to the bottom of the auxiliary groove.

[0006] Optionally, the method for forming a MEMS structure layer on the first substrate includes: providing a third substrate, the third substrate having a first side and a second side opposite to each other; forming the auxiliary groove exposed on the first side in the third substrate; after forming the auxiliary groove, bonding the third substrate to the first substrate with the first side facing the first substrate; after bonding the third substrate to the first substrate, thinning the third substrate from the second side to form a MEMS material layer; patterning the MEMS material layer from the second side to form a second structure layer, the second structure layer including a first sensor structure corresponding to the first opening, and a second sensor structure corresponding to the second opening.

[0007] Optionally, the method of forming a MEMS structure layer on the first substrate also includes: forming a second electrical interconnection layer on the surface of the MEMS material layer; the second substrate includes a second dielectric layer, a third electrical interconnection layer located in the second dielectric layer, and a fourth electrical interconnection layer located on the surface of the second dielectric layer, the fourth electrical interconnection layer corresponds to the second electrical interconnection layer, and the method of bonding the second substrate on the MEMS structure layer includes: making the fourth electrical interconnection layer face the second side, and aligning and bonding the fourth electrical interconnection layer with the second electrical interconnection layer, and there is air between the second dielectric layer and the first sensor structure, and between the second dielectric layer and the second sensor structure.

[0008] Optionally, the material of the first structural layer and the material of the second structural layer are both silicon.

[0009] Optionally, the method for forming the first electrical interconnection structure includes: depositing a seed material film on the other side surface of the first substrate relative to the first dielectric film, the inner wall surface of the conductive through hole, and the bottom surface of the auxiliary groove corresponding to the bottom of the conductive through hole; forming a filling conductive material layer on the surface of the seed material film, the filling conductive material layer at least partially filling the conductive through hole; grinding or etching the filling conductive material layer and the seed material film from the other side of the first substrate relative to the first dielectric film until the other side surface of the first substrate relative to the first dielectric film is exposed to form the first electrical interconnection structure.

[0010] Optionally, before forming the conductive via, the air pressure in the first cavity and the air pressure in the second cavity are the same initial air pressure; during the deposition of the seed material film, the process air pressure of the deposition process is a target air pressure different from the initial air pressure, so that air is evacuated or introduced into the first cavity through the conductive via and the micro-air channel, so that the air pressure in the first cavity is adjusted to the target air pressure.

[0011] Optionally, the target air pressure is lower than the initial air pressure.

[0012] Optionally, the film thickness of the seed material film is more than 3 times the groove depth of the auxiliary groove.

[0013] Optionally, the conductive through hole is completely filled with the filling conductive material layer.

[0014] Optionally, the first opening has a first projection on the surface of the first substrate, the bottom of the conductive through hole has a second projection on the surface of the first substrate, and the auxiliary groove is divided into a first end region, a channel region, and a second end region in sequence along the groove length. The groove lengths of the first end region and the second end region are both smaller than the groove length of the channel region. The projection of the first end region on the surface of the first substrate is within the range of the first projection, and the projection of the second end region on the surface of the first substrate passes through the second projection or is within the range of the second projection.

[0015] Optionally, the length of the auxiliary groove is more than 10 times the depth of the groove.

[0016] Optionally, the auxiliary groove has a length of more than 10 microns, and a depth of the auxiliary groove is in a range of 0.1 microns to 1 micron.

[0017] Optionally, there are multiple auxiliary grooves.

[0018] Optionally, the auxiliary groove includes one or a combination of two or more of a straight line structure, a bent structure and a circular coil structure.

[0019] Optionally, the method for forming the first substrate includes: providing an initial first substrate; patterning the initial first substrate to form the first structural layer; and forming the first dielectric film on the surface of the first structural layer, the inner wall surface of the first opening, and the inner wall surface of the second opening.

[0020] Optionally, the method for forming the first substrate includes: providing an initial first substrate; forming an initial first dielectric film on the surface of the initial first substrate; and patterning the initial first substrate and the initial first dielectric film to form the first structural layer and the first dielectric film located on the surface of the first structural layer.

[0021] Correspondingly, the technical solution of the present invention also provides an integrated MEMS chip manufactured by the above-mentioned manufacturing method, comprising: a first substrate, comprising a first structural layer, and a first dielectric film located on the surface of the first structural layer, the first structural layer having a first opening and a second opening independent of each other, and the first dielectric film and the first structural layer are made of different materials; a MEMS structural layer, stacked on the first substrate, the MEMS structural layer having an auxiliary groove opening toward the first substrate, the groove length of the auxiliary groove being greater than the groove depth, and the first dielectric film and the auxiliary groove enclosing a micro gas channel; a second substrate, bonded to the MEMS structural layer, and The second substrate is located on two sides opposite to the MEMS structure layer, and is used to seal the first opening and the second opening to form a first cavity and a second cavity that are independent of each other, and the air pressure in the first cavity is different from the air pressure in the second cavity; a conductive through hole is located in the first substrate and is independent of the first opening and the second opening, and the conductive through hole and the first opening are connected to the micro-air channel respectively; a first electrical interconnection structure is located in the micro-air channel between the bottom of the conductive through hole and the bottom of the auxiliary groove, and in the conductive through hole, and the first electrical interconnection structure is connected to the bottom of the auxiliary groove.

[0022] Optionally, the MEMS structure layer includes: a second structure layer, the second structure layer having a first side and a second side relative to each other, the second structure layer is bonded to the first substrate, the first side faces the first substrate, the auxiliary groove is located in the second structure layer and is exposed to the first side by the surface of the second structure layer, and the second structure layer also includes a first sensor structure corresponding to the first opening, and a second sensor structure corresponding to the second opening.

[0023] Optionally, the MEMS structure layer also includes: a second electrical interconnection layer located on the second side surface of the second structure layer; the second substrate includes a second dielectric layer, a third electrical interconnection layer located in the second dielectric layer, and a fourth electrical interconnection layer located on the surface of the second dielectric layer, the fourth electrical interconnection layer corresponds to the second electrical interconnection layer, the fourth electrical interconnection layer is aligned and bonded to the second electrical interconnection layer, and the second dielectric layer and the first sensor structure are both separated by air, as well as the second dielectric layer and the second sensor structure.

[0024] Optionally, the first electrical interconnection structure includes: a seed layer and a filling conductive layer, the seed layer is located on the inner wall surface of the conductive through hole and extends to the bottom surface of the auxiliary groove corresponding to the bottom of the conductive through hole, and the filling conductive layer is located on the surface of the seed layer and at least partially fills the conductive through hole.

[0025] Optionally, the film thickness of the seed layer 511 is more than 3 times the groove depth of the auxiliary groove.

[0026] Optionally, the first opening has a first projection on the surface of the first substrate, the bottom of the conductive through hole has a second projection on the surface of the first substrate, and the auxiliary groove is divided into a first end region, a channel region, and a second end region in sequence along the groove length. The groove lengths of the first end region and the second end region are both smaller than the groove length of the channel region. The projection of the first end region on the surface of the first substrate is within the range of the first projection, and the projection of the second end region on the surface of the first substrate passes through the second projection or is within the range of the second projection.

[0027] Optionally, the length of the auxiliary groove is more than 10 times the depth of the groove.

[0028] Optionally, there are multiple auxiliary grooves.

[0029] Optionally, the first dielectric film is also located on inner wall surfaces of the first opening and the second opening.

[0030] Compared with the prior art, the technical solution of the present invention has the following beneficial effects:

[0031] The integrated MEMS chip and the manufacturing method thereof provided by the technical solution of the present invention can set different internal pressures for the first cavity 610 and the second cavity 620 on the same MEMS chip. In addition, both device reliability and conductive performance are taken into consideration. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figures 1 to 14 It is a structural schematic diagram of each step in a method for manufacturing an integrated MEMS chip according to an embodiment of the present invention;

[0033] Fig.15 yes Fig.14 Schematic diagram of projection of each structure on the surface of the first substrate;

[0034] Fig.16 is a schematic diagram of projection of various structures in an integrated MEMS chip on the surface of a first substrate according to another embodiment of the present invention;

[0035] Fig.17 yes Fig.16 Schematic diagram of the groove length of the auxiliary groove;

[0036] Figure 18 to Figure 19 It is a schematic structural diagram of each step of a method for forming a first substrate in another embodiment of the present invention.

[0037] Reference numerals:

[0038] 100 - first substrate; 11 - initial first substrate; 110 - first structural layer; 111 - first opening; 112 - second opening; 120, 121 - first dielectric film; 1211 - initial first dielectric film; 130 - conductive via;

[0039] 200 - second substrate; 210 - substrate structure layer; 220 - second dielectric layer; 230 - third electrical interconnection layer; 240 - fourth electrical interconnection layer;

[0040] 300 - third substrate; 301 - first side; 302 - second side; 303 - MEMS material layer; 310 - second structure layer; 311 - first sensor structure; 312 - second sensor structure; 313 - auxiliary groove; H - groove depth; 320 - second electrical interconnection layer;

[0041] 400-micro air channel;

[0042] 500 - first electrical interconnection structure; 510 - seed material layer; 511 - seed layer; 520 - filling conductive material layer; 521 - filling conductive layer;

[0043] 610-first cavity; 620-second cavity;

[0044] 601 - first projection; 602 - second projection; 6031, 6032 - auxiliary groove projections. DETAILED DESCRIPTION

[0045] In order to make the above-mentioned objects, features and beneficial effects of the present invention more obvious and easy to understand, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0046] Figures 1 to 14 is a schematic structural diagram of each step in a method for manufacturing an integrated MEMS chip according to an embodiment of the present invention, Fig.15 yes Fig.14 A schematic diagram of the projection of each structure on the surface of the first substrate is shown in FIG. 1 , which is described in detail in conjunction with the accompanying drawings.

[0047] First, the first substrate 100 is formed.

[0048] The first substrate 100 includes a first structure layer 110 and a first dielectric film 120 .

[0049] Figures 1 to 3 1 is a schematic diagram of each step of forming the first substrate 100 in this embodiment. Figures 1 to 3 A method of forming the first substrate 100 is described in detail.

[0050] Please refer to Figure 1 , providing an initial first substrate 11.

[0051] In this embodiment, the material of the initial first substrate 11 is silicon.

[0052] Please refer to Figure 2 , patterning the initial first substrate 11 to form a first structure layer 110.

[0053] The first structure layer 110 has a first opening 111 and a second opening 112 which are independent of each other.

[0054] The first opening 111 is used to form a first cavity 610 (such as Fig.11 The second opening 112 is used to form a second cavity 620 (as shown in FIG. Fig.11 shown).

[0055] The first opening 111 has a first projection 601 (eg Fig.15 shown).

[0056] In this embodiment, the material of the first structure layer 110 corresponds to the material of the initial first substrate 11 , that is, the material of the first structure layer 110 is silicon.

[0057] In some embodiments, the method of patterning the initial first substrate 11 includes: forming a first mask layer (not shown) on the surface of the initial first substrate 11, the first mask layer exposing a portion of the surface of the initial first substrate 11; using the first mask layer as a mask, etching the initial first substrate 11 until a first structural layer 110 having a first opening 111 and a second opening 112 is formed.

[0058] Furthermore, after the first structure layer 110 is formed, the first mask layer is removed.

[0059] Please refer to Figure 3 A first dielectric film 120 is formed on the surface of the first structure layer 110 , the inner wall surface of the first opening 111 , and the inner wall surface of the second opening 112 .

[0060] The material of the first dielectric film 120 is different from that of the first structure layer 110 .

[0061] In this embodiment, the material of the first dielectric film 120 is silicon oxide.

[0062] In the present embodiment, the first dielectric film 120 is preferably formed by oxidizing the first structure layer 110 .

[0063] In some other embodiments, the first dielectric film may also be formed by a deposition process.

[0064] In yet another embodiment, please Figure 1 Based on reference Fig.18 and Fig.19The method for forming the first substrate includes: forming an initial first dielectric film 1211 (such as Fig.18 ); patterning the initial first substrate 11 and the initial first dielectric film 1211 to form a first structural layer 110 and a first dielectric film 121 located on the surface of the first structural layer 110 (as shown); Fig.19 shown).

[0065] Next, a MEMS structure layer is formed on the first substrate 100 .

[0066] The MEMS structure layer has an auxiliary groove 313 (eg, Figure 4 As shown), the first dielectric film 120 and the auxiliary groove 313 enclose a micro gas channel 400 (as shown Figure 5 shown).

[0067] Figures 4 to 8 1 is a schematic diagram of the steps of forming a MEMS structure layer on the first substrate 100 in this embodiment. Figures 4 to 8 A method of forming a MEMS structure layer on the first substrate 100 is described in detail.

[0068] Please refer to Figure 4 , providing a third substrate 300.

[0069] The third substrate 300 has a first side 301 and a second side 302 opposite to each other.

[0070] In this embodiment, the material of the third substrate 300 is silicon.

[0071] Continue to refer Figure 4 , an auxiliary trench 313 exposed at the first side 301 is formed in the third substrate 300 .

[0072] The auxiliary groove 313 has an auxiliary groove projection 6031 (eg Fig.15 shown).

[0073] The groove length L1 of the auxiliary groove 313 is greater than the groove depth H. The groove length L1 of the auxiliary groove 313 refers to the total length of the extension path of the auxiliary groove 313 .

[0074] In some embodiments, the trench length L1 of the auxiliary trench 313 is greater than 10 times the trench depth H.

[0075] Furthermore, the groove length L1 of the auxiliary groove 313 is greater than 10 micrometers, and the groove depth H of the auxiliary groove 313 is in the range of 0.1 micrometer to 1 micrometer.

[0076] In this embodiment, the number of the auxiliary groove 313 is one.

[0077] In some embodiments, there are multiple auxiliary grooves 313 so that when one of the micro-air channels 400 is blocked due to environmental or process pollutants, other micro-air channels 400 can ensure ventilation, and the air intake or exhaust efficiency can also be better guaranteed.

[0078] In this embodiment, the auxiliary groove 313 is a straight line structure.

[0079] In another embodiment, the auxiliary groove includes a plurality of straight structures and a plurality of bent structures, wherein the plurality of straight structures and the plurality of bent structures are sequentially connected, and the auxiliary groove has an auxiliary groove projection 6032 (such as Fig.16 ), please refer to Fig.17 The length of the auxiliary groove L2 = a1 + a2 + (3 × a3) + b1 + b2 + b3 + b4 + b5 + b6.

[0080] In some other embodiments, the auxiliary groove may also be a circular coil structure, or the auxiliary groove may also be a combination of at least one of a straight structure and a bent structure and a circular coil structure.

[0081] By adopting a bending structure or a disc tube structure, it is beneficial to increase the ratio of the length to the width of the auxiliary groove and increase the complexity of the auxiliary groove extension path. Therefore, in the subsequent process of forming the material of the first electrical interconnection structure, the risk of conductive material molecules entering the first cavity through the auxiliary groove is further reduced. Therefore, while forming cavities with different gas pressures, the reliability of the device is improved.

[0082] In some embodiments, the method for forming the auxiliary groove 313 includes: forming a second mask layer (not shown) on the surface of the third substrate 300, the second mask layer exposing a portion of the surface of the third substrate 300; using the second mask layer as a mask, etching the third substrate 300 until the auxiliary groove 313 is formed.

[0083] Furthermore, after the auxiliary trench 313 is formed, the second mask layer is removed.

[0084] It is important to understand that Figure 4 The steps shown are similar to Figures 1 to 3 There is no sequential order between the steps shown in .

[0085] Please refer to Figure 5 After the auxiliary groove 313 is formed, the third substrate 300 is bonded to the first substrate 100 , with the first side 301 facing the first substrate 100 .

[0086] Specifically, the surface of the first side 301 of the third substrate 300 is laminated to the first dielectric film 120 to achieve bonding between the third substrate 300 and the first substrate 100 , wherein the first dielectric film 120 is a bonding layer when the third substrate 300 and the first substrate 100 are bonded.

[0087] Thus, the auxiliary groove 313 opens toward the first substrate 100 , and the first dielectric film 120 and the auxiliary groove 313 enclose a micro gas channel 400 .

[0088] The micro-air channel 400 is communicated with the first opening 111 .

[0089] Please refer to Figure 6 After the third substrate 300 is bonded to the first substrate 100 , the third substrate 300 is thinned from the second side 302 to form a MEMS material layer 303 .

[0090] The process of forming the MEMS material layer 303 includes: grinding the third substrate 300 to thin the third substrate 300 , and then performing chemical mechanical polishing (CMP) on the surface of the thinned third substrate 300 to planarize the surface of the thinned third substrate 300 .

[0091] Please refer to Figure 7 , a second electrical interconnection layer 320 is formed on the surface of the MEMS material layer 303 .

[0092] In some embodiments, the material of the second electrical interconnect layer 320 is metal.

[0093] Furthermore, the material of the second electrical interconnection layer 320 is a stacked layer of one or more of Ti, TiW, Cr, Al, Ge, Cu and Au.

[0094] In some embodiments, the method for forming the second electrical interconnection layer 320 includes: forming a second electrical interconnection material layer (not shown) on the surface of the MEMS material layer 303; forming a third mask layer (not shown) on the surface of the second electrical interconnection material layer, the third mask layer exposing a portion of the surface of the second electrical interconnection material layer; etching the second electrical interconnection material layer using the third mask layer as a mask until the MEMS material layer 303 is exposed, thereby forming a patterned second electrical interconnection layer 320.

[0095] Please refer to Figure 8 After forming the second electrical interconnection layer 320 , the MEMS material layer 303 is patterned from the second side 302 to form a second structure layer 310 .

[0096] The second structure layer 310 includes a first sensor structure 311 corresponding to the first opening 111 and a second sensor structure 312 corresponding to the second opening 112 .

[0097] A large shear force will be generated during the grinding and planarization process. Since the third substrate 300 is thinned from the second side 302, and the MEMS material layer 303 is patterned from the second side 302 to form the second structure layer 310, the third substrate 300 with high structural strength bears the shear force during grinding and planarization, avoiding the shear force from damaging the more fragile second structure layer 310, thereby the manufactured integrated MEMS chip has good reliability.

[0098] In this embodiment, the material of the second structure layer 310 corresponds to that of the third substrate 300 , that is, the material of the second structure layer 310 is silicon.

[0099] In this embodiment, the etching process in the process of patterning the MEMS material layer 303 can produce a large etching ratio for the material of the MEMS material layer 303 and the material of the first dielectric film 120. Since the first dielectric film 120 is also located on the inner wall surface of the first opening 111 and the inner wall surface of the second opening 112, the first dielectric film 120 can also be used as a protective film to protect the inner wall surface of the first opening 111 and the inner wall surface of the second opening 112 during the etching process, thereby better ensuring the graphic size and morphology of the first opening 111 and the second opening 112. Please refer to Fig. 9 , providing a second substrate 200.

[0100] The second substrate 200 includes a substrate structure layer 210 , a second dielectric layer 220 , a third electrical interconnection layer 230 and a fourth electrical interconnection layer 240 .

[0101] In some embodiments, the base structure layer 210 includes a control chip or a driver chip.

[0102] In some other embodiments, the base structure layer may not include a chip.

[0103] The material of the base structure layer 210 includes silicon.

[0104] The second dielectric layer 220 is located on the surface of the base structure layer 210 .

[0105] In some embodiments, the material of the second dielectric layer 220 is a stacked combination of one or both of silicon oxide and silicon nitride.

[0106] The third electrical interconnect layer 230 is located within the second dielectric layer 220 .

[0107] In some embodiments, the material of the third electrical interconnection layer 230 is a stacked layer of one or a combination of two or more of Ti, TiW, TiN, Al, Cu, Au, and Cr.

[0108] The fourth electrical interconnection layer 240 is located on the surface of the second dielectric layer 220, and the fourth electrical interconnection layer 240 corresponds to the second electrical interconnection layer 320. The fourth electrical interconnection layer 240 is used for bonding with the second electrical interconnection layer 320.

[0109] In some embodiments, the material of the fourth electrical interconnection layer 240 is a stacked layer of one or a combination of two or more of Ti, TiW, Cr, Al, Ge, Cu, and Au.

[0110] Please refer to Fig.10 , a second substrate 200 is bonded on the MEMS structure layer to seal the first opening 111 and the second opening 112 to form a first cavity 610 and a second cavity 620 that are independent of each other.

[0111] During the bonding of the second substrate 200 to the MEMS structure layer, the process gas pressure of the bonding process is controlled so that the first cavity 610 and the second cavity 620 have the same initial gas pressure.

[0112] In addition, since the micro-air channel 400 is in communication with the first opening 111 , the micro-air channel 400 is also in communication with the first cavity 610 accordingly, so as to be used for subsequently evacuating or inflating the first cavity 610 .

[0113] Specifically, the method of bonding the second substrate 200 on the MEMS structure layer includes: making the fourth electrical interconnection layer 240 face the second side 302 , and aligning and laminating the fourth electrical interconnection layer 240 with the second electrical interconnection layer 320 .

[0114] A first overhead space is formed by spacing the fourth electrical interconnection layer 240 and the second electrical interconnection layer 320, and the second dielectric layer 220 and the first sensor structure 311. The first overhead space and the first opening 111 provide a deformation space for the first sensor structure 311, so that the first sensor structure 311 can be deformed in the first cavity 610 formed by the first overhead space and the first opening 111.

[0115] Similarly, a second overhead space is formed by spacing the fourth electrical interconnection layer 240 and the second electrical interconnection layer 320, and the second dielectric layer 220 and the second sensor structure 312. The second overhead space and the second opening 112 provide deformation space for the second sensor structure 312, so that the second sensor structure 312 can be deformed in the second cavity 620 formed by the second overhead space and the second opening 112.

[0116] Please refer to Fig.11 After bonding the second substrate 200 , the first substrate 100 is etched from the side opposite to the first dielectric film 120 to form a conductive through hole 130 independent of the first openings 111 and 112 in the first substrate 100 , and the conductive through hole 130 is connected to the micro gas channel 400 .

[0117] On the one hand, the conductive through hole 130 reserves space for forming the first electrical interconnection structure. On the other hand, the conductive through hole 130 and the first opening 111 are respectively connected to the micro-air channel 400. That is to say, the conductive through hole 130 and the first cavity 610 are respectively connected to the micro-air channel 400. Therefore, air can be exhausted or introduced into the first cavity 610 through the conductive through hole 130 and the micro-air channel 400.

[0118] In this embodiment, the first dielectric film 120 is not only a bonding layer when the third substrate 300 is bonded to the first substrate 100, but also a protective film for the first opening 111 and the second opening 112. Since the first dielectric film 120 and the auxiliary groove 313 enclose the micro-gas channel 400, and after bonding the second substrate 200, the first substrate 100 is etched from the side opposite to the first dielectric film 120, and a conductive through hole 130 independent of the first opening 111 and the second opening 112 and connected to the micro-gas channel 400 is formed in the first substrate 100, therefore, in the process of etching the first structure layer 110 to form the conductive through hole 130, there is the first dielectric film 120 between the first structure layer 110 and the auxiliary groove 313, and on this basis, the materials of the first structure layer 110 and the first dielectric film 120 are different, therefore, the etching process is as follows: The etching process for etching the first structure layer 110 can produce a larger etching ratio for the material of the first structure layer 110 and the material of the first dielectric film 120, so that the first dielectric film 120 can also serve as an etching stop layer in this process to protect the groove wall of the auxiliary groove 313 from being damaged. At the same time, the influencing factors of the etching process for etching the first structure layer 110 are reduced, and the process freedom is high. Thorough etching steps and cleaning steps can be performed to form a smooth conductive through hole 130 wall and reduce contaminants attached to the conductive through hole 130 wall, thereby forming a conductive through hole 130 with small wall roughness and less attached contaminants.

[0119] Furthermore, since the materials of the first dielectric film 120 (silicon oxide) and the second structure layer 310 (silicon) in the MEMS structure layer are also different, the etching process of etching the first dielectric film 120 to form the conductive through hole 130 has little effect on the second structure layer 310, so that the process of etching the first dielectric film 120 is not likely to damage the auxiliary groove 313.

[0120] In this embodiment, the bottom of the conductive via 130 has a second projection 602 (eg, Fig.15 shown).

[0121] In some embodiments, the method for forming the conductive via 130 includes: flipping the first substrate 100 after bonding the second substrate 200 so that the side of the first substrate 100 relative to the first dielectric film 120 faces upward; forming a fourth mask layer on the surface of the side of the first substrate 100 relative to the first dielectric film 120, the fourth mask layer exposing a portion of the surface of the side of the first substrate 100 relative to the first dielectric film 120; etching the first structure layer 110 using the fourth mask layer as a mask to form an initial conductive via (not shown) in the first structure layer 110, wherein the etching process for etching the first structure layer 110 includes an etching step and a cleaning step; after the initial conductive via is formed, continuing to etch the first dielectric film 120 using the fourth mask layer as a mask until the micro air channel 400 is exposed to form the conductive via 130.

[0122] In some embodiments, the fourth mask layer is removed after the conductive via 130 is formed.

[0123] Next, a first electrical interconnection structure 500 (eg, a first electrical interconnection structure 500) is formed in the micro gas channel 400 between the bottom of the conductive via 130 and the bottom of the auxiliary trench 313 and in the conductive via 130. Fig.14 As shown in FIG. 3 , the first electrical interconnection structure 500 is connected to the bottom of the auxiliary trench 313 .

[0124] In the present embodiment, the conductive via 130 not only reserves space for forming the first electrical interconnect structure 500, but also allows air to be pumped or introduced into the first cavity 610 through the conductive via 130 and the micro-air channel 400. At the same time, the first electrical interconnect structure 500 can not only serve as a part of the circuit in the integrated MEMS chip, but also takes into account the sealing of the micro-air channel 400. Therefore, the conductive via 130 and the first electrical interconnect structure 500 are not only used to achieve electrical interconnection, but also, through the combined use with the micro-air channel 400, the difference in air pressure in the first cavity 610 and the air pressure in the second cavity 620 is also achieved.

[0125] Specifically, since the conductive through hole 130 and the first opening 111 are respectively connected to the micro-air channel 400, that is, the conductive through hole 130 and the first cavity 610 are respectively connected to the micro-air channel 400, therefore, by setting the process gas pressure for forming the first electrical interconnection structure 500 to a target gas pressure different from the initial gas pressure, during the process of forming the first electrical interconnection structure 500, gas can be evacuated or introduced into the first cavity 610 through the conductive through hole 130 and the micro-air channel 400, so that the gas pressure in the first cavity 610 is adjusted to the target gas pressure. On this basis, since the first electrical interconnection structure 500 is formed in the micro-gas channel 400 between the bottom of the conductive through hole 130 and the bottom of the auxiliary groove 313, and in the conductive through hole 130, the first electrical interconnection structure 500 not only blocks the conductive through hole 130, thereby sealing the micro-gas channel 400 to maintain the target gas pressure in the first cavity 610, but also the first electrical interconnection structure 500 is connected to the bottom of the auxiliary groove 313, so that the first electrical interconnection structure 500 can be used as a part of the circuit in the integrated MEMS chip.

[0126] On this basis, since the groove length L1 of the auxiliary groove 313 is greater than the groove depth H, the MEMS structure layer has an auxiliary groove 313 opening toward the first substrate 100, and after bonding the second substrate 200, the first substrate 100 is etched from the side opposite to the first dielectric film 120 to form a conductive through hole 130. Therefore, not only the conductive material molecules entering the first cavity 610 through the micro-gas channel 400 are effectively reduced, but also the first electrical interconnection structure 500 has good and stable electrical properties while having good sealing properties for the micro-gas channel 400, thereby improving the reliability of the device while taking into account the electrical properties of the device.

[0127] Specifically, when the length L1 of the auxiliary groove 313 is greater than the depth H, during the process of forming the material of the first electrical interconnect structure 500, the conductive material molecules are likely to collide with the groove wall of the auxiliary groove 313 corresponding to the bottom of the conductive through hole 130 (e.g. Fig.11 Therefore, the number of conductive material molecules entering the first cavity 610 through the micro-air channel 400 can be effectively reduced.

[0128] On this basis, since the MEMS structure layer has an auxiliary groove 313 opening toward the first substrate 100, and after bonding the second substrate 200, the first substrate 100 is etched from the side opposite to the first dielectric film 120 to form a conductive through hole 130, the groove wall of the auxiliary groove 313 is prevented from being damaged. At the same time, the hole wall roughness of the conductive through hole 130 is small and the attached pollutants are less (please refer to the above description for related reasons).

[0129] Avoiding damage to the groove wall of the auxiliary groove 313 not only reduces the risk of gas leakage from the micro-gas channel 400 , but also reduces the risk of increasing the groove depth H, thereby ensuring that the conductive material molecules can easily collide with the groove wall of the auxiliary groove 313 at the bottom of the conductive through hole 130 .

[0130] The hole wall roughness of the conductive through hole 130 is small (i.e., the hole wall of the conductive through hole 130 is smooth) and there are few attached pollutants. Not only can the first electrical interconnection structure 500 formed in the conductive through hole 130 fully fit the hole wall of the conductive through hole 130, thereby reducing the risk of air leakage or air inflow from the gap between the first electrical interconnection structure 500 and the hole wall of the conductive through hole 130, but also the influence of pollutants on the conductive performance of the first electrical interconnection structure 500 is reduced.

[0131] In summary, the integrated MEMS chip manufacturing method of this embodiment not only realizes the difference in air pressure in the first cavity 610 and the second cavity 620 in the same MEMS chip, but also takes into account both device reliability and conductive performance.

[0132] Furthermore, when the groove length L1 of the auxiliary groove 313 is more than 10 times the groove depth H, it is ensured that the groove length of the auxiliary groove 313 is much larger than the groove width. Therefore, in the process of forming the material of the first electrical interconnection structure 500, it can be ensured that the possibility of conductive material molecules entering the first cavity 610 through the micro-air channel 400 is small.

[0133] In some embodiments, please refer to Fig.15 The auxiliary groove 313 is divided into a first end zone, a channel zone and a second end zone along the groove length, wherein the groove length of the first end zone and the second end zone are both smaller than the groove length of the channel zone, and a projection I of the first end zone on the surface of the first substrate 100 is within the range of the first projection 601, and a projection III of the second end zone on the surface of the first substrate 100 passes through the second projection 602 or is within the range of the second projection 602.

[0134] Since the groove length of the first end region and the groove length of the second end region are both smaller than the groove length of the channel region, and the projection I of the first end region on the surface of the first substrate 100 is within the range of the first projection 601, and the projection III of the second end region on the surface of the first substrate 100 passes through the second projection 602 or is within the range of the second projection 602, therefore, on the one hand, it is ensured that there is a sufficiently long micro-air channel 400 between the first cavity 610 and the conductive via 130 to effectively reduce the conductive material molecules entering the first cavity 610 through the micro-air channel 400, and on the other hand, the projection I realizes the connection between the first cavity 610 and the micro-air channel 400 within the range of the first projection 601, and the projection III passes through the second projection 602 or realizes the connection between the conductive via 130 and the micro-air channel 400 within the range of the second projection 602.

[0135] For ease of understanding and explanation, Fig.15 Schematically shows the projection I of the first end region on the surface of the first substrate 100, the projection II of the channel region on the surface of the first substrate 100, the projection III of the second end region on the surface of the first substrate 100, the first projection 601 and the second projection 602 in this embodiment, and, Fig.15 This is the case where projection III passes through the second projection 602 .

[0136] Figure 12 to Figure 14 is a schematic diagram of the steps of forming the first electrical interconnection structure 500 in this embodiment. Figure 12 to Figure 14 The steps of forming the first electrical interconnection structure 500 are described in detail.

[0137] Please refer to Fig.12 A seed material film 510 is deposited on the other side surface of the first substrate 100 opposite to the first dielectric film 120 , the inner wall surface of the conductive through hole 130 , and the bottom surface of the auxiliary trench 313 corresponding to the bottom of the conductive through hole 130 .

[0138] The seed material film 510 is used to form a seed layer 511 (such as Fig.14 ), and on the other hand, is used as a seed layer for a subsequent electroplating process to achieve the formation of a filling conductive material layer 520.

[0139] The deposition process of depositing the seed material film 510 includes an evaporation process, a PVD process or a CVD process.

[0140] The material of the seed material film 510 is one or a stacked combination of two or more of Ti / Cu, Ti, Cr, TiW, Cr / Cu, TiW / Cu, Ti / Al, and TiW / Al.

[0141] In this embodiment, during the deposition of the seed material film 510, the process gas pressure of the deposition process is a target gas pressure different from the initial gas pressure, so that gas is extracted or introduced into the first cavity 610 through the conductive through hole 130 and the micro-gas channel 400, so that the gas pressure in the first cavity 610 is adjusted to the target gas pressure.

[0142] Preferably, the target air pressure is lower than the initial air pressure, so as to pump air into the first cavity 610 through the conductive vias 130 and the micro air channels 400. Compared with air intake, the pumping method can further reduce the conductive material molecules and possible contaminants entering the first cavity 610, thereby better improving device reliability.

[0143] In some embodiments, the film thickness of the seed material film 510 is more than three times of the groove depth H, so as to further ensure the sealing capability of the formed seed layer 511 to the micro air channel 400 .

[0144] Please refer to Fig.13 A filling conductive material layer 520 is formed on the surface of the seed material film 510 , and the filling conductive material layer 520 at least partially fills the conductive through hole 130 .

[0145] The filling conductive material layer 520 is formed by forming a filling conductive layer 511 (such as Fig.14 shown).

[0146] In addition, by forming a filling conductive material layer 520 on the surface of the seed material film 510 , the blocking of the conductive via 130 is further enhanced, and the sealing of the micro air channel 400 is strengthened.

[0147] Preferably, the conductive material layer 520 is filled completely with the conductive through-hole 130 to better enhance the blocking of the conductive through-hole 130 and strengthen the sealing of the micro-air channel 400 .

[0148] In some embodiments, the process of forming the filling conductive material layer 520 is an electroplating process.

[0149] In some embodiments, the material filling the conductive material layer 520 is a stacked combination of one or more of Cu, Ni, Ag, and Al.

[0150] Please refer to Fig.14 The conductive material layer 520 and the seed material film 510 are ground or etched from the other side of the first substrate 100 relative to the first dielectric film 120 until the other side surface of the first substrate 100 relative to the first dielectric film 120 is exposed to form a first electrical interconnection structure 500.

[0151] In this embodiment, the first electrical interconnect structure 500 includes: a seed layer 511 and a filling conductive layer 521, the seed layer 511 is located on the inner wall surface of the conductive through hole 130 and extends to the bottom surface of the auxiliary groove 313 corresponding to the bottom of the conductive through hole 130, and the filling conductive layer 521 is located on the surface of the seed layer 511 and at least fills a portion of the conductive through hole.

[0152] The seed layer 511 and the filling conductive layer 521 form a double sealing layer, thereby effectively ensuring the sealing performance of the first electrical interconnection structure 500 to the micro gas channel 400 .

[0153] The process of grinding or etching the filling conductive material layer 520 and the seed material film 510 includes a chemical etching process or a CMP process.

[0154] Preferably, the filling conductive layer 521 completely fills the conductive through-hole 130 to better enhance the blocking of the conductive through-hole 130 and strengthen the sealing of the micro-air channel 400 .

[0155] Please continue to refer to Fig.14The present invention also provides an integrated MEMS chip manufactured by the above-mentioned integrated MEMS chip manufacturing method, including: a first substrate 100, a MEMS structure layer, a second substrate 200, a conductive through hole 130 and a first electrical interconnection structure 500.

[0156] The first substrate 100 includes a first structure layer 110 and a first dielectric film 120 located on a surface of the first structure layer 110 . The first structure layer 110 has a first opening 111 and a second opening 112 that are independent of each other. The first dielectric film 120 and the first structure layer 110 are made of different materials.

[0157] In this embodiment, the first dielectric film 120 is also located on the inner wall surfaces of the first opening 111 and the second opening 112 .

[0158] In yet another embodiment, the first dielectric film 121 is only located on the surface of the first structure layer 110 .

[0159] The MEMS structure layer is stacked on the first substrate 100 . The MEMS structure layer has an auxiliary groove 313 opening toward the first substrate 100 . The groove length of the auxiliary groove 313 is greater than the groove depth. The first dielectric film 120 and the auxiliary groove 313 enclose a micro gas channel 400 .

[0160] In some embodiments, the trench length L1 of the auxiliary trench 313 is greater than 10 times the trench depth H.

[0161] Furthermore, the groove length L1 of the auxiliary groove 313 is greater than 10 micrometers, and the groove depth H of the auxiliary groove 313 is in the range of 0.1 micrometer to 1 micrometer.

[0162] In this embodiment, the number of the auxiliary groove 313 is one.

[0163] In some embodiments, the number of the auxiliary groove 313 is plural.

[0164] In this embodiment, the auxiliary groove 313 is a straight line structure.

[0165] In another embodiment, the auxiliary groove includes a plurality of straight structures and a plurality of bent structures, wherein the plurality of straight structures and the plurality of bent structures are sequentially connected, and the auxiliary groove has an auxiliary groove projection 6032 (such as Fig.16 ), please refer to Fig.17 The length of the auxiliary groove L2 = a1 + a2 + (3 × a3) + b1 + b2 + b3 + b4 + b5 + b6.

[0166] In some other embodiments, the auxiliary groove 313 may also be a circular coil structure, or the auxiliary groove 313 may also be a combination of at least one of a straight structure and a bent structure and a circular coil structure.

[0167] The MEMS structure layer includes: a second structure layer 310 .

[0168] The second structure layer 310 has a first side 301 and a second side 302 relative to each other. The second structure layer 310 is bonded to the first substrate 100, and the first side 301 faces the first substrate 100. The auxiliary groove 313 is located in the second structure layer 310 and is exposed to the first side 301 by the surface of the second structure layer 310. The second structure layer 310 also includes a first sensor structure 311 corresponding to the first opening 111 and a second sensor structure 312 corresponding to the second opening 112.

[0169] The MEMS structure layer further includes: a second electrical interconnection layer 320 located on the surface of the second side 302 of the second structure layer 310 .

[0170] The second substrate 200 is bonded to the MEMS structure layer and is located on two opposite sides of the MEMS structure layer with the first substrate 100. The second substrate 200 is used to seal the first opening 111 and the second opening 112 to form a first cavity 610 and a second cavity 620 that are independent of each other. The air pressure in the first cavity 610 is different from the air pressure in the second cavity 620.

[0171] The second substrate 200 includes a second dielectric layer 220, a third electrical interconnection layer 230 located in the second dielectric layer 220, and a fourth electrical interconnection layer 240 located on the surface of the second dielectric layer 220, the fourth electrical interconnection layer 240 corresponds to the second electrical interconnection layer 320, the fourth electrical interconnection layer 240 is aligned and bonded to the second electrical interconnection layer 320, and there is space between the second dielectric layer 220 and the first sensor structure 311, and between the second dielectric layer 220 and the second sensor structure 312.

[0172] The sensors formed by the MEMS structure composed of the first sensor structure 311 and the first cavity 610 and the MEMS structure composed of the second sensor structure 312 and the first cavities 610620 may be accelerometers, gyroscopes, pressure gauges or a combination of the three.

[0173] The conductive via 130 is located in the first substrate 100 and is independent of the first opening 111 and the second opening 112 . The conductive via 130 and the first opening 111 are communicated with the micro air channel 400 , respectively.

[0174] The first electrical interconnection structure 500 is located in the micro gas channel 400 between the bottom of the conductive via 130 and the bottom of the auxiliary groove 313 and in the conductive via 130 . The first electrical interconnection structure 500 is connected to the bottom of the auxiliary groove 313 .

[0175] The first electrical interconnect structure 500 includes: a seed layer 511 and a filling conductive layer 521, the seed layer 511 is located on the inner wall surface of the conductive via 130 and extends to the bottom surface of the auxiliary groove 313 corresponding to the bottom of the conductive via 130, and the filling conductive layer 521 is located on the surface of the seed layer 511 and fills the conductive via 130.

[0176] In some embodiments, the thickness of the seed layer 511 is more than three times the depth of the auxiliary trench 313 .

[0177] Please refer to Fig.15 The first opening 111 has a first projection 601 on the surface of the first substrate 100, the bottom of the conductive through hole 130 has a second projection 602 on the surface of the first substrate 100, and the auxiliary groove 313 is divided into a first end area, a channel area, and a second end area in sequence along the groove length direction. The groove lengths of the first end area and the second end area are both smaller than the groove length of the channel area. The projection of the first end area on the surface of the first substrate 100 is within the range of the first projection 601, and the projection of the second end area on the surface of the first substrate 100 passes through the second projection 602 or is within the range of the second projection 602.

[0178] For detailed descriptions of the first substrate 100 , the MEMS structure layer, the second substrate 200 , the electrical vias, the first electrical interconnect structure 500 and their underlying features, please refer to the description in the above manufacturing method embodiment, which will not be repeated here.

[0179] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the claims.

Claims

1. A method for manufacturing an integrated MEMS chip, characterized in that: include: Forming a first substrate, wherein the first substrate includes a first structural layer and a first dielectric film located on a surface of the first structural layer, the first structural layer has a first opening and a second opening that are independent of each other, and the first dielectric film and the first structural layer are made of different materials; Forming a MEMS structure layer on the first substrate, wherein the MEMS structure layer has an auxiliary groove opening toward the first substrate, the groove length of the auxiliary groove is greater than the groove depth, and the first dielectric film and the auxiliary groove enclose a micro gas channel; Bonding a second substrate on the MEMS structure layer to seal the first opening and the second opening to form a first cavity and a second cavity independent of each other; After bonding the second substrate, etching the first substrate from a side opposite to the first dielectric film to form a conductive through hole independent of the first opening and the second opening in the first substrate, wherein the conductive through hole and the first opening are respectively connected to the micro-gas channel; Pumping air or introducing air into the first cavity through the conductive through hole and the micro-air channel, so that the air pressure in the first cavity is different from the air pressure in the second cavity; A first electrical interconnection structure is formed in the micro-air channel between the bottom of the conductive through hole and the bottom of the auxiliary groove, and in the conductive through hole, and the first electrical interconnection structure is connected to the bottom of the auxiliary groove.

2. The manufacturing method according to claim 1, characterized in that The method of forming a MEMS structure layer on the first substrate includes: providing a third substrate having opposing first and second sides; forming the auxiliary groove exposed at the first side in the third substrate; After forming the auxiliary groove, bonding the third substrate to the first substrate, with the first side facing the first substrate; After bonding the third substrate to the first substrate, thinning the third substrate from the second side to form a MEMS material layer; The MEMS material layer is patterned from the second side to form a second structure layer, wherein the second structure layer includes a first sensor structure corresponding to the first opening and a second sensor structure corresponding to the second opening.

3. The manufacturing method according to claim 2, characterized in that: The method of forming a MEMS structure layer on the first substrate further includes: forming a second electrical interconnection layer on the surface of the MEMS material layer; The second substrate includes a second dielectric layer, a third electrical interconnection layer located in the second dielectric layer, and a fourth electrical interconnection layer located on the surface of the second dielectric layer, the fourth electrical interconnection layer corresponds to the second electrical interconnection layer, and the method for bonding the second substrate on the MEMS structure layer includes: making the fourth electrical interconnection layer face the second side, and aligning and bonding the fourth electrical interconnection layer with the second electrical interconnection layer, and the second dielectric layer and the first sensor structure are both spaced apart.

4. The manufacturing method according to claim 2, characterized in that: The material of the first structure layer and the material of the second structure layer are both silicon.

5. The manufacturing method according to claim 1, characterized in that: The method for forming the first electrical interconnection structure comprises: Depositing a seed material film on the other side surface of the first substrate opposite to the first dielectric film, the inner wall surface of the conductive through hole, and the bottom surface of the auxiliary trench corresponding to the bottom of the conductive through hole; forming a filling conductive material layer on the surface of the seed material film, wherein the filling conductive material layer at least fills a portion of the conductive through hole; The filling conductive material layer and the seed material film are ground or etched from the other side of the first substrate opposite to the first dielectric film until the other side of the first substrate opposite to the first dielectric film is exposed to form the first electrical interconnection structure.

6. The manufacturing method according to claim 5, characterized in that: Before forming the conductive through hole, the air pressure in the first cavity and the air pressure in the second cavity are the same initial air pressure; During the deposition of the seed material film, the process gas pressure of the deposition process is a target gas pressure different from the initial gas pressure, so that gas is evacuated or introduced into the first cavity through the conductive through hole and the micro-gas channel, so that the gas pressure in the first cavity is adjusted to the target gas pressure.

7. The manufacturing method according to claim 6, characterized in that: The target air pressure is lower than the initial air pressure.

8. The manufacturing method according to claim 5, characterized in that: The film thickness of the seed material film is at least three times the groove depth of the auxiliary groove.

9. The manufacturing method according to claim 5, characterized in that: The filling conductive material layer fully fills the conductive through hole.

10. The manufacturing method according to claim 1, characterized in that: The first opening has a first projection on the surface of the first substrate, the bottom of the conductive through hole has a second projection on the surface of the first substrate, the auxiliary groove is divided into a first end region, a channel region and a second end region in sequence along the groove length, the groove lengths of the first end region and the second end region are both smaller than the groove length of the channel region, the projection of the first end region on the surface of the first substrate is within the range of the first projection, and the projection of the second end region on the surface of the first substrate passes through the second projection or is within the range of the second projection.

11. The manufacturing method according to claim 1 or 10, characterized in that: The groove length of the auxiliary groove is more than 10 times the groove depth.

12. The manufacturing method according to claim 11, characterized in that: The auxiliary groove has a length of more than 10 micrometers, and a depth of the auxiliary groove is in the range of 0.1 micrometer to 1 micrometer.

13. The manufacturing method according to claim 1, characterized in that: The number of the auxiliary grooves is plural.

14. The manufacturing method according to claim 1, characterized in that: The auxiliary groove includes one or a combination of two or more of a straight line structure, a bent structure and a circular coil structure.

15. The manufacturing method according to claim 1, characterized in that: The method for forming the first substrate comprises: providing an initial first substrate; Patterning the initial first substrate to form the first structural layer; The first dielectric film is formed on the surface of the first structure layer, the inner wall surface of the first opening, and the inner wall surface of the second opening.

16. The manufacturing method according to claim 1, characterized in that: The method for forming the first substrate includes: providing an initial first substrate; forming an initial first dielectric film on the surface of the initial first substrate; The initial first substrate and the initial first dielectric film are patterned to form the first structural layer and the first dielectric film located on the surface of the first structural layer.

17. An integrated MEMS chip, characterized in that: include: A first substrate, comprising a first structural layer and a first dielectric film located on a surface of the first structural layer, wherein the first structural layer has a first opening and a second opening that are independent of each other, and the first dielectric film and the first structural layer are made of different materials; A MEMS structure layer is stacked on the first substrate, wherein the MEMS structure layer has an auxiliary groove opening toward the first substrate, the groove length of the auxiliary groove is greater than the groove depth, and the first dielectric film and the auxiliary groove enclose a micro gas channel; a second substrate bonded to the MEMS structure layer and located on two sides opposite to the first substrate of the MEMS structure layer, the second substrate being used to seal the first opening and the second opening to form a first cavity and a second cavity independent of each other, and the air pressure in the first cavity is different from the air pressure in the second cavity; A conductive through hole is located in the first substrate and is independent of the first opening and the second opening, the conductive through hole and the first opening are respectively connected to the micro-air channel; The first electrical interconnection structure is located in the micro-air channel between the bottom of the conductive through hole and the bottom of the auxiliary groove, and in the conductive through hole, and the first electrical interconnection structure is connected to the bottom of the auxiliary groove.

18. The integrated MEMS chip according to claim 17, characterized in that: The MEMS structure layer includes: a second structure layer, the second structure layer has a first side and a second side opposite to each other, the second structure layer is bonded to the first substrate, the first side faces the first substrate, the auxiliary groove is located in the second structure layer and is exposed to the first side by the surface of the second structure layer, and the second structure layer also includes a first sensor structure corresponding to the first opening, and a second sensor structure corresponding to the second opening.

19. The integrated MEMS chip according to claim 18, characterized in that: The MEMS structure layer further comprises: a second electrical interconnection layer located on a second side surface of the second structure layer; The second substrate includes a second dielectric layer, a third electrical interconnection layer located in the second dielectric layer, and a fourth electrical interconnection layer located on the surface of the second dielectric layer, the fourth electrical interconnection layer corresponds to the second electrical interconnection layer, the fourth electrical interconnection layer is aligned and bonded to the second electrical interconnection layer, and there is air between the second dielectric layer and the first sensor structure, and between the second dielectric layer and the second sensor structure.

20. The integrated MEMS chip according to claim 19, characterized in that: The first electrical interconnection structure includes: a seed layer and a filling conductive layer, the seed layer is located on the inner wall surface of the conductive through hole and extends to the bottom surface of the auxiliary groove corresponding to the bottom of the conductive through hole, and the filling conductive layer is located on the surface of the seed layer and at least partially fills the conductive through hole.

21. The integrated MEMS chip according to claim 20, characterized in that: The thickness of the seed layer 511 is at least three times the depth of the auxiliary trench.

22. The integrated MEMS chip according to claim 17, characterized in that: The first opening has a first projection on the surface of the first substrate, the bottom of the conductive through hole has a second projection on the surface of the first substrate, the auxiliary groove is divided into a first end region, a channel region and a second end region in sequence along the groove length, the groove lengths of the first end region and the second end region are both smaller than the groove length of the channel region, the projection of the first end region on the surface of the first substrate is within the range of the first projection, and the projection of the second end region on the surface of the first substrate passes through the second projection or is within the range of the second projection.

23. The integrated MEMS chip according to claim 17 or 22, characterized in that: The groove length of the auxiliary groove is more than 10 times the groove depth.

24. The integrated MEMS chip according to claim 23, characterized in that: The number of the auxiliary grooves is plural.

25. The integrated MEMS chip according to claim 17, characterized in that: The first dielectric film is also located on inner wall surfaces of the first opening and the second opening.

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